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Jaamoum, Amine, Thomas Hiscock, and Giorgio Di Natale. "Noise-Free Security Assessment of Eviction Set Construction Algorithms with Randomized Caches." Applied Sciences 12, no. 5 (2022): 2415. http://dx.doi.org/10.3390/app12052415.
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Cache timing attacks, i.e., a class of remote side-channel attack, have become very popular in recent years. Eviction set construction is a common step for many such attacks, and algorithms for building them are evolving rapidly. On the other hand, countermeasures are also being actively researched and developed. However, most countermeasures have been designed to secure last-level caches and few of them actually protect the entire memory hierarchy. Cache randomization is a well-known mitigation technique against cache attacks that has a low-performance overhead. In this study, we attempted to determine whether address randomization on first-level caches is worth considering from a security perspective. In this paper, we present the implementation of a noise-free cache simulation framework that enables the analysis of the behavior of eviction set construction algorithms. We show that randomization at the first level of caches (L1) brings about improvements in security but is not sufficient to mitigate all known algorithms, such as the recently developed Prime–Prune–Probe technique. Nevertheless, we show that L1 randomization can be combined with a lightweight random eviction technique in higher-level caches to mitigate known conflict-based cache attacks.
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Dong, Chao, Fang Wang, Hong Jiang, and Dan Feng. "Using Lock-Free Design for Throughput-Optimized Cache Eviction." ACM SIGMETRICS Performance Evaluation Review 53, no. 1 (2025): 49–51. https://doi.org/10.1145/3744970.3727330.
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This paper presents a practical approach to cache eviction algorithm design, called Mobius, that optimizes the concurrent throughput of caches and reduces cache operation latency by utilizing lock-free data structures, while maintaining high cache hit ratios. Mobius includes two key designs. First, Mobius employs two lock-free FIFO queues to manage cache items, ensuring that all cache operations are executed efficiently in concurrency. Second, Mobius integrates a consecutive detection mechanism that merges multiple modifications during eviction into a single operation, thereby reducing data races. The implementation of Mobius in CacheLib and RocksDB highlights its high concurrency in both synthetic and real-world workloads.
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Dong, Chao, Fang Wang, Hong Jiang, and Dan Feng. "Using Lock-Free Design for Throughput-Optimized Cache Eviction." Proceedings of the ACM on Measurement and Analysis of Computing Systems 9, no. 2 (2025): 1–28. https://doi.org/10.1145/3727136.
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In large-scale information systems, storage device performance continues to improve while workloads expand in size and access characteristics. This growth puts tremendous pressure on caches and storage hierarchy in terms of concurrent throughput. However, existing cache eviction policies often struggle to provide adequate concurrent throughput due to their reliance on coarse-grained locking mechanisms and complex data structures. This paper presents a practical approach to cache eviction algorithm design, called Mobius, that optimizes the concurrent throughput of caches and reduces cache operation latency by utilizing lock-free data structures, while maintaining comparable hit ratios. Mobius includes two key designs. First, Mobius employs two lock-free FIFO queues to manage cache items, ensuring that all cache operations are executed efficiently in parallel. Second, Mobius integrates a consecutive detection mechanism that merges multiple modifications during eviction into a single operation, thereby reducing data races. Extensive evaluations using both synthetic and real-world workloads from high-concurrency clusters demonstrate that Mobius achieves a concurrent-throughput improvement ranging from 1.2× to 8.5× over state-of-the-art methods, while also maintaining lower latency and comparable cache hit ratios. The implementation of Mobius in CacheLib and RocksDB highlights its effectiveness in enhancing cache performance in practical scenarios.
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Ge, Fen, Lei Wang, Ning Wu, and Fang Zhou. "A Cache Fill and Migration Policy for STT-RAM-Based Multi-Level Hybrid Cache in 3D CMPs." Electronics 8, no. 6 (2019): 639. http://dx.doi.org/10.3390/electronics8060639.
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Recently, in 3D Chip-Multiprocessors (CMPs), a hybrid cache architecture of SRAM and Non-Volatile Memory (NVM) is generally used to exploit high density and low leakage power of NVM and a low write overhead of SRAM. The conventional access policy does not consider the hybrid cache and cannot make good use of the characteristics of both NVM and SRAM technology. This paper proposes a Cache Fill and Migration policy (CFM) for multi-level hybrid cache. In CFM, data access was optimized in three aspects: Cache fill, cache eviction, and dirty data migration. The CFM reduces unnecessary cache fill, write operations to NVM, and optimizes the victim cache line selection in cache eviction. The results of experiments show that the CFM can improve performance by 24.1% and reduce power consumption by 18% when compared to conventional writeback access policy.
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Chuchuk, Olga, and Markus Schulz. "Data Popularity for Cache Eviction Algorithms using Random Forests." EPJ Web of Conferences 295 (2024): 01015. http://dx.doi.org/10.1051/epjconf/202429501015.
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In the HEP community the prediction of Data Popularity is a topic that has been approached for many years. Nonetheless, while facing increasing data storage challenges, especially in the upcoming HL-LHC era, there is still the need for better predictive models to answer the questions of whether particular data should be kept, replicated, or deleted. Caches have proven to be a convenient technique for partially automating storage management, potentially eliminating some of these questions. On the one hand, one can benefit even from simple cache eviction policies like LRU, on the other hand, we show that incorporation of knowledge about future access patterns has the potential to greatly improve cache performance. In this paper, we study data popularity on the file level, where the special relation between files belonging to the same dataset could be used in addition to the standard attributes. We turn to Machine Learning algorithms, such as Random Forest, which is well suited to work with Big Data: it can be parallelized, is more lightweight and easier to interpret than Deep Neural Networks. Finally, we compare the results with standard cache eviction algorithms and the theoretical optimum.
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Rashid, Salman, Shukor Abd Razak, and Fuad A. Ghaleb. "IMU: A Content Replacement Policy for CCN, Based on Immature Content Selection." Applied Sciences 12, no. 1 (2021): 344. http://dx.doi.org/10.3390/app12010344.
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In-network caching is the essential part of Content-Centric Networking (CCN). The main aim of a CCN caching module is data distribution within the network. Each CCN node can cache content according to its placement policy. Therefore, it is fully equipped to meet the requirements of future networks demands. The placement strategy decides to cache the content at the optimized location and minimize content redundancy within the network. When cache capacity is full, the content eviction policy decides which content should stay in the cache and which content should be evicted. Hence, network performance and cache hit ratio almost equally depend on the content placement and replacement policies. Content eviction policies have diverse requirements due to limited cache capacity, higher request rates, and the rapid change of cache states. Many replacement policies follow the concept of low or high popularity and data freshness for content eviction. However, when content loses its popularity after becoming very popular in a certain period, it remains in the cache space. Moreover, content is evicted from the cache space before it becomes popular. To handle the above-mentioned issue, we introduced the concept of maturity/immaturity of the content. The proposed policy, named Immature Used (IMU), finds the content maturity index by using the content arrival time and its frequency within a specific time frame. Also, it determines the maturity level through a maturity classifier. In the case of a full cache, the least immature content is evicted from the cache space. We performed extensive simulations in the simulator (Icarus) to evaluate the performance (cache hit ratio, path stretch, latency, and link load) of the proposed policy with different well-known cache replacement policies in CCN. The obtained results, with varying popularity and cache sizes, indicate that our proposed policy can achieve up to 14.31% more cache hits, 5.91% reduced latency, 3.82% improved path stretch, and 9.53% decreased link load, compared to the recently proposed technique. Moreover, the proposed policy performed significantly better compared to other baseline approaches.
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Anurag, Reddy, Naik Anil, and Reddy Sandeep. "Optimizing Cache Storage for Next-Generation Immersive Experiences: A Strategic Framework for high Content Delivery in Content Delivery Networks (CDNs)." Journal of Scientific and Engineering Research 8, no. 9 (2021): 237–41. https://doi.org/10.5281/zenodo.10903118.
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<strong>Abstract </strong>This paper explores the critical role of cache storage capacity within Content Delivery Networks (CDNs), in the context of its implications for augmented reality (AR) and virtual reality (VR) content, accentuating its strategic importance in optimizing content distribution and augmenting user experiences in these immersive environments. It investigates key variables such as content popularity, cache hit ratio, retention policy, eviction strategy, cache size, and content size distribution, providing insights into their impact on storage space optimization. The paper outlines the process of calculating the current eviction age, leveraging data collected at the node level. It introduces a forecasting approach that considers total current storage capacity, target eviction age, and a 2.5% month-over-month growth rate to estimate future storage needs and node requirements, especially pertinent in the context of the evolving demands of AR/VR content. Beyond technical aspects, the paper discusses the practical applications of model outputs in decision-making, guiding strategic node deployment and optimizing service performance. It encourages a dynamic approach to cache service growth metrics and suggests exploring long-term database integration for enhanced historical perspectives. Additionally, the paper introduces the concept of exploring the linearity between disk size and cache retention, proposing potential integration into the model for improved predictive accuracy. In essence, it serves as a comprehensive guide for understanding, optimizing, and strategically leveraging cache storage capacity in the dynamic landscape of CDNs.
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Wu, Dehua, Sha Tao, and Wanlin Gao. "Applying Address Encryption and Timing Noise to Enhance the Security of Caches." Electronics 12, no. 8 (2023): 1799. http://dx.doi.org/10.3390/electronics12081799.
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Encrypting the mapping relationship between physical and cache addresses has been a promising technique to prevent conflict-based cache side-channel attacks. However, this method is not foolproof and the attackers can still build a side-channel despite the increased difficulty of finding the minimal eviction set. To address this issue, we propose a new protection method that integrates both address encryption and timing noise extension mechanisms. By adding the timing noise extension mechanism to the address encryption method, we can randomly generate cache misses that prevent the attackers from pruning the eviction set. Our analysis shows that the timing noise extension mechanism can cause the attackers to fail in obtaining accurate timing information for accessing memory. Furthermore, our proposal reduces the timing noise generating rate, minimizing performance overhead. Our experiments on SPEC CPU 2017 show that the integrated mechanism only resulted in a tiny performance overhead of 2.9%.
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Batool, Sidra, Muhammad Kaleem, Salman Rashid, Muhammad Azhar Mushtaq, and Iqra Khan. "A survey of classification cache replacement techniques in the contentcentric networking domain." International Journal of ADVANCED AND APPLIED SCIENCES 11, no. 5 (2024): 12–24. http://dx.doi.org/10.21833/ijaas.2024.05.002.
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Content-Centric Networking (CCN) is an innovative approach that emphasizes content. A key strategy in CCN for spreading data across the network is in-network caching. Effective caching methods, including content placement and removal tactics, enhance the use of network resources. Cache replacement, also known as content eviction policies, is essential for maximizing CCN's efficiency. When cache storage is full, some content must be removed to make room for new items due to limited storage space. Recently, several advanced replacement strategies have been developed to determine the most suitable content for eviction. This study categorizes the latest cache replacement strategies into various groups such as static, space scarcity, content update, centralized, energy-efficient, weighted, adaptive, and based on dynamic popularity. These categories are based on the approaches suggested in previous research. Additionally, this paper provides a critical analysis of existing methods and suggests future research directions. To the best of our knowledge, this is the most up-to-date and comprehensive review available on this topic.
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Pan, Cheng, Xiaolin Wang, Yingwei Luo, and Zhenlin Wang. "Penalty- and Locality-aware Memory Allocation in Redis Using Enhanced AET." ACM Transactions on Storage 17, no. 2 (2021): 1–45. http://dx.doi.org/10.1145/3447573.
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Due to large data volume and low latency requirements of modern web services, the use of an in-memory key-value (KV) cache often becomes an inevitable choice (e.g., Redis and Memcached). The in-memory cache holds hot data, reduces request latency, and alleviates the load on background databases. Inheriting from the traditional hardware cache design, many existing KV cache systems still use recency-based cache replacement algorithms, e.g., least recently used or its approximations. However, the diversity of miss penalty distinguishes a KV cache from a hardware cache. Inadequate consideration of penalty can substantially compromise space utilization and request service time. KV accesses also demonstrate locality, which needs to be coordinated with miss penalty to guide cache management. In this article, we first discuss how to enhance the existing cache model, the Average Eviction Time model, so that it can adapt to modeling a KV cache. After that, we apply the model to Redis and propose pRedis, Penalty- and Locality-aware Memory Allocation in Redis, which synthesizes data locality and miss penalty, in a quantitative manner, to guide memory allocation and replacement in Redis. At the same time, we also explore the diurnal behavior of a KV store and exploit long-term reuse. We replace the original passive eviction mechanism with an automatic dump/load mechanism, to smooth the transition between access peaks and valleys. Our evaluation shows that pRedis effectively reduces the average and tail access latency with minimal time and space overhead. For both real-world and synthetic workloads, our approach delivers an average of 14.0%∼52.3% latency reduction over a state-of-the-art penalty-aware cache management scheme, Hyperbolic Caching (HC), and shows more quantitative predictability of performance. Moreover, we can obtain even lower average latency (1.1%∼5.5%) when dynamically switching policies between pRedis and HC.
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Calciu, Irina, M. Talha Imran, Ivan Puddu, et al. "Using Local Cache Coherence for Disaggregated Memory Systems." ACM SIGOPS Operating Systems Review 57, no. 1 (2023): 21–28. http://dx.doi.org/10.1145/3606557.3606561.
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Disaggregated memory provides many cost savings and resource provisioning benefits for current datacenters, but software systems enabling disaggregated memory access result in high performance penalties. These systems require intrusive code changes to port applications for disaggregated memory or employ slow virtual memory mechanisms to avoid code changes. Such mechanisms result in high overhead page faults to access remote data and high dirty data amplification when tracking changes to cached data at page-granularity. In this paper, we propose a fundamentally new approach for disaggregated memory systems, based on the observation that we can use local cache coherence to track applications' memory accesses transparently, without code changes, at cache-line granularity. This simple idea (1) eliminates page faults from the application critical path when accessing remote data, and (2) decouples the application memory access tracking from the virtual memory page size, enabling cache-line granularity dirty data tracking and eviction. Using this observation, we implemented a new software runtime for disaggregated memory that improves average memory access time and reduces dirty data amplification1.
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SEO, EUISEONG, SEUNGRYOUL MAENG, DONGHYOUK LIM, and JOONWON LEE. "EXPLOITING TEMPORAL LOCALITY FOR ENERGY EFFICIENT MEMORY MANAGEMENT." Journal of Circuits, Systems and Computers 17, no. 05 (2008): 929–41. http://dx.doi.org/10.1142/s021812660800468x.
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Memory is becoming one of the major power consumers in computing systems. Therefore, energy efficient memory management is essential. Modern memory systems employ sleep states for energy saving. To utilize this feature, existing research activities have concentrated on increasing spatial locality to deactivate as many blocks as possible. However, they did not count the unexpected activation of memory blocks due to cache eviction of deactivated tasks. In this paper, we suggest a software-based power state management scheme for memory, which exploits temporal locality to relieve the energy loss from the unexpected activation of memory blocks from cache eviction. The suggested scheme SW-NAP makes a memory block remain deactivated during a certain tick, which has no cache miss over the block. The evaluation shows that SW-NAP is 50% better than PAVM, which is an existing software scheme, and worse than PMU, which is another approach based on the specialized hardware by 20%. We also suggest task scheduling policies that increase the effectiveness of SW-NAP and they saved up to 7% additional energy.
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Qazi, Faiza, Osman Khalid, Rao Naveed Bin Rais, Imran Ali Khan, and Atta ur Rehman Khan. "Optimal Content Caching in Content-Centric Networks." Wireless Communications and Mobile Computing 2019 (January 23, 2019): 1–15. http://dx.doi.org/10.1155/2019/6373960.
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Content-Centric Networking (CCN) is a novel architecture that is shifting host-centric communication to a content-centric infrastructure. In recent years, in-network caching in CCNs has received significant attention from research community. To improve the cache hit ratio, most of the existing schemes store the content at maximum number of routers along the downloading path of content from source. While this helps in increased cache hits and reduction in delay and server load, the unnecessary caching significantly increases the network cost, bandwidth utilization, and storage consumption. To address the limitations in existing schemes, we propose an optimization based in-network caching policy, named as opt-Cache, which makes more efficient use of available cache resources, in order to reduce overall network utilization with reduced latency. Unlike existing schemes that mostly focus on a single factor to improve the cache performance, we intend to optimize the caching process by simultaneously considering various factors, e.g., content popularity, bandwidth, and latency, under a given set of constraints, e.g., available cache space, content availability, and careful eviction of existing contents in the cache. Our scheme determines optimized set of content to be cached at each node towards the edge based on content popularity and content distance from the content source. The contents that have less frequent requests have their popularity decreased with time. The optimal placement of contents across the CCN routers allows the overall reduction in bandwidth and latency. The proposed scheme is compared with the existing schemes and depicts better performance in terms of bandwidth consumption and latency while using less network resources.
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Bilal, Muhammad, and Shin-Gak Kang. "A Cache Management Scheme for Efficient Content Eviction and Replication in Cache Networks." IEEE Access 5 (2017): 1692–701. http://dx.doi.org/10.1109/access.2017.2669344.
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Jane.F, Mary Magdalene, R. Nadarajan, and Maytham Safar. "A Spatio-Temporal Cache Replacement Policy for Location Dependent Data in Mobile Environments." International Journal of Business Data Communications and Networking 6, no. 3 (2010): 31–48. http://dx.doi.org/10.4018/jbdcn.2010070102.
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Data caching in mobile clients is an important technique to enhance data availability and improve data access time. Due to cache size limitations, cache replacement policies are used to find a suitable subset of items for eviction from the cache. In this paper, the authors study the issues of cache replacement for location-dependent data under a geometric location model and propose a new cache replacement policy RAAR (Re-entry probability, Area of valid scope, Age, Rate of Access) by taking into account the spatial and temporal parameters. Mobile queries experience a popularity drift where the item loses its popularity after the user exhausts the corresponding service, thus calling for a scenario in which once popular documents quickly become cold (small active sets). The experimental evaluations using synthetic datasets for regular and small active sets show that this replacement policy is effective in improving the system performance in terms of the cache hit ratio of mobile clients.
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Zhao, Yao, Jian Dong, Hongwei Liu, Jin Wu, and Yanxin Liu. "Improving Cache Management with Redundant RDDs Eviction in Spark." Computers, Materials & Continua 68, no. 1 (2021): 727–41. http://dx.doi.org/10.32604/cmc.2021.016462.
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Dayton, Cornelia H. "Lost Years Recovered John Peters and Phillis Wheatley Peters in Middleton." New England Quarterly 94, no. 3 (2021): 309–51. http://dx.doi.org/10.1162/tneq_a_00901.
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Abstract A cache of Essex County legal papers reveals that when Phillis Wheatley Peters and her husband left Boston in 1780, they moved to Middleton where John became a landowner on a farm where he had been enslaved. I analyze the racial, class, and gender conflicts that led to their eviction.
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Nassane, Samir, Sid Ahmed Mokhtar Mostefaoui, Bendaoud Mebarek, and Abdelkader Alem. "LPCE-Based Replacement Scheme for Enhancing Caching Performance in Named Data Networking." International Journal of Interactive Mobile Technologies (iJIM) 18, no. 16 (2024): 119–41. http://dx.doi.org/10.3991/ijim.v18i16.49185.
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The substantial surge in users has adversely impacted the performance of the present IP-based Internet. Named data networking (NDN) emerges as a future alternative, given its distributed content caching system, where data can be cached in multiple routers and retrieved from the closest one instead of the original producer, enhancing content availability, reducing latency, and minimizing data loss. This paper introduces the less popular content eviction (LPCE) policy, a novel cache replacement scheme designed to enhance the caching performance of the conventional LFU (least frequently used) policy in NDN routers, thereby improving overall network efficiency. The proposed method subsumes LFU and FIFO (first in first out) policies and employs an additional list controlled by the LRU (least recently used) policy. Utilizing the ccnSim simulator, we conduct a comparison of LPCE’s performance with that of the LFU technique and other competing caching techniques, considering variations in several simulation parameters. Experimental results reveal that the proposed LPCE algorithm excels over others across a majority of performance metrics, such as cache hit ratio, content delivery delay, upstream hop count, network traffic, and producers’ load. Besides, the findings indicate that LPCE outperforms LFU, with an increase in cache hit ratio ranging from 1.32% to 5.75%.
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Carroll, Shane, and Wei-Ming Lin. "Exploiting Long-Term Temporal Cache Access Patterns for LRU Insertion Prioritization." Parallel Processing Letters 31, no. 02 (2021): 2150010. http://dx.doi.org/10.1142/s0129626421500109.
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In a CPU cache utilizing least recently used (LRU) replacement, cache sets manage a buffer which orders all cache lines in the set from LRU to most recently used (MRU). When a cache line is brought into cache, it is placed at the MRU and the LRU line is evicted. When re-accessed, a line is promoted to the MRU position. LRU replacement provides a simple heuristic to predict the optimal cache line to evict. However, LRU utilizes only simple, short-term access patterns. In this paper, we propose a method that uses a buffer called the history queue to record longer-term access-eviction patterns than the LRU buffer can capture. Using this information, we make a simple modification to LRU insertion policy such that recently-recalled blocks have priority over others. As lines are evicted, their addresses are recorded in a FIFO history queue. Incoming lines that have recently been evicted and now recalled (those in the history queue at recall time) remain in the MRU for an extended period of time as non-recalled lines entering the cache thereafter are placed below the MRU. We show that the proposed LRU insertion prioritization increases performance in single-threaded and multi-threaded workloads in simulations with simple adjustments to baseline LRU.
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Chirag, Amrutlal Pethad. "Implementing a Caching Framework in Salesforce Apex." Journal of Scientific and Engineering Research 6, no. 5 (2019): 267–71. https://doi.org/10.5281/zenodo.13599841.
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Caching is a technique used in computing to store copies of data in a temporary storage location, or cache, so that future requests for that data can be served faster. The main purpose of caching is to improve the performance and efficiency of data retrieval operations by reducing the time and resources required to access frequently used data.<strong> </strong>
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Panigrahy, Nitish K., Philippe Nain, Giovanni Neglia, and Don Towsley. "A New Upper Bound on Cache Hit Probability for Non-anticipative Caching Policies." ACM SIGMETRICS Performance Evaluation Review 48, no. 3 (2021): 138–43. http://dx.doi.org/10.1145/3453953.3453985.
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Caching systems have long been crucial for improving the performance of a wide variety of network and web based online applications. In such systems, end-to-end application performance heavily depends on the fraction of objects transfered from the cache, also known as the cache hit probability. Many cache eviction policies have been proposed and implemented to improve the hit probability. In this work, we propose a new method to compute an upper bound on hit probability for all non-anticipative caching policies, i.e. for policies that have no knowledge of future requests. At each object request arrival, we use hazard rate (HR) function based ordering to classify the request as a hit or not. Under some statistical assumptions, we prove that our proposed HR based ordering model computes the maximum achievable hit probability and serves as an upper bound for all non-anticipative caching policies. We also provide simulation results to validate its correctness and to compare it to Belady's upper bound. We find it to almost always be tighter than Belady's bound.
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Psounis, K., and B. Prabhakar. "Efficient randomized Web-cache replacement schemes using samples from past eviction times." IEEE/ACM Transactions on Networking 10, no. 4 (2002): 441–54. http://dx.doi.org/10.1109/tnet.2002.801414.
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Pires, Stéfani, Artur Ziviani, and Leobino N. Sampaio. "Contextual dimensions for cache replacement schemes in information-centric networks: a systematic review." PeerJ Computer Science 7 (March 11, 2021): e418. http://dx.doi.org/10.7717/peerj-cs.418.
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In recent years, information-centric networks (ICNs) have gained attention from the research and industry communities as an efficient and reliable content distribution network paradigm, especially to address content-centric and bandwidth-needed applications together with the heterogeneous requirements of emergent networks, such as the Internet of Things (IoT), Vehicular Ad-hoc NETwork (VANET) and Mobile Edge Computing (MEC). In-network caching is an essential part of ICN architecture design, and the performance of the overall network relies on caching policy efficiency. Therefore, a large number of cache replacement strategies have been proposed to suit the needs of different networks. The literature extensively presents studies on the performance of the replacement schemes in different contexts. The evaluations may present different variations of context characteristics leading to different impacts on the performance of the policies or different results of most suitable policies. Conversely, there is a lack of research efforts to understand how the context characteristics influence policy performance. In this direction, we conducted an extensive study of the ICN literature through a Systematic Literature Review (SLR) process to map reported evidence of different aspects of context regarding the cache replacement schemes. Our main findings contribute to the understanding of what is a context from the perspective of cache replacement policies and the context characteristics that influence cache behavior. We also provide a helpful classification of policies based on context dimensions used to determine the relevance of contents. Further, we contribute with a set of cache-enabled networks and their respective context characteristics that enhance the cache eviction process.
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Buck, B. R., and J. K. Hollingsworth. "A New Hardware Monitor Design to Measure Data Structure-Specific Cache Eviction Information." International Journal of High Performance Computing Applications 20, no. 3 (2006): 353–63. http://dx.doi.org/10.1177/1094342006067470.
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Park, SeJin, and ChanIk Park. "A Cache Management Technique Based on Eviction Cost Estimation for Heterogeneous Storage Devices." IEMEK Journal of Embedded Systems and Applications 7, no. 3 (2012): 129–34. http://dx.doi.org/10.14372/iemek.2012.7.3.129.
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Piastou, Mikita. "Evaluating the Efficiency of Caching Strategies in Reducing Application Latency." Journal of Science & Technology 4, no. 6 (2023): 83–98. http://dx.doi.org/10.55662/jst.2023.4606.
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The paper discusses the efficiency of various caching strategies that can reduce application latency. A test application was developed for this purpose to measure latency from various conditions using logging and profiling tools. These scenario tests simulated high traffic loads, large data sets, and frequent access patterns. The simulation was done in Java; accordingly, T-tests and ANOVA were conducted in order to measure the significance of the results. The findings showed that the highest reduction in latency was achieved by in-memory caching: response time improved by up to 62.6% compared to non-cached scenarios. File-based caching decreased request processing latency by about 36.6%, while database caching provided an improvement of 55.1%. These results enhance the huge benefits stemming from the application of various caching mechanisms. In-memory caching proved most efficient in high-speed data access applications. On the other hand, file-based and database caching proved to be more useful in certain content-heavy scenarios. This research study provides some insight for developers on how to identify proper caching mechanisms and implementation to further boost responsiveness and efficiency of applications. Other recommendations for improvements to be made on the cache involve hybrid caching strategies, optimization of the eviction policies further, and integrating mechanisms with edge computing for even better performance.
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Cho, Minseon, and Donghyun Kang. "ML-CLOCK: Efficient Page Cache Algorithm Based on Perceptron-Based Neural Network." Electronics 10, no. 20 (2021): 2503. http://dx.doi.org/10.3390/electronics10202503.
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Today, research trends clearly confirm the fact that machine learning technologies open up new opportunities in various computing environments, such as Internet of Things, mobile, and enterprise. Unfortunately, the prior efforts rarely focused on designing system-level input/output stacks (e.g., page cache, file system, block input/output, and storage devices). In this paper, we propose a new page replacement algorithm, called ML-CLOCK, that embeds single-layer perceptron neural network algorithms to enable an intelligent eviction policy. In addition, ML-CLOCK employs preference rules that consider the features of the underlying storage media (e.g., asymmetric read and write costs and efficient write patterns). For evaluation, we implemented a prototype of ML-CLOCK based on trace-driven simulation and compared it with the traditional four replacement algorithms and one flash-friendly algorithm. Our experimental results on the trace-driven environments clearly confirm that ML-CLOCK can improve the hit ratio by up to 72% and reduces the elapsed time by up to 2.16x compared with least frequently used replacement algorithms.
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Cho, Minseon, and Donghyun Kang. "ML-CLOCK: Efficient Page Cache Algorithm Based on Perceptron-Based Neural Network." Electronics 10, no. 20 (2021): 2503. http://dx.doi.org/10.3390/electronics10202503.
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Today, research trends clearly confirm the fact that machine learning technologies open up new opportunities in various computing environments, such as Internet of Things, mobile, and enterprise. Unfortunately, the prior efforts rarely focused on designing system-level input/output stacks (e.g., page cache, file system, block input/output, and storage devices). In this paper, we propose a new page replacement algorithm, called ML-CLOCK, that embeds single-layer perceptron neural network algorithms to enable an intelligent eviction policy. In addition, ML-CLOCK employs preference rules that consider the features of the underlying storage media (e.g., asymmetric read and write costs and efficient write patterns). For evaluation, we implemented a prototype of ML-CLOCK based on trace-driven simulation and compared it with the traditional four replacement algorithms and one flash-friendly algorithm. Our experimental results on the trace-driven environments clearly confirm that ML-CLOCK can improve the hit ratio by up to 72% and reduces the elapsed time by up to 2.16x compared with least frequently used replacement algorithms.
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Meng, Naeem, Ali, Zikria, and Kim. "DCS: Distributed Caching Strategy at the Edge of Vehicular Sensor Networks in Information-Centric Networking." Sensors 19, no. 20 (2019): 4407. http://dx.doi.org/10.3390/s19204407.
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Information dissemination in current Vehicular Sensor Networks (VSN) depends on the physical location in which similar data is transmitted multiple times across the network. This data replication has led to several problems, among which resource consumption (memory), stretch, and communication latency due to the lake of data availability are the most crucial. Information-Centric Networking (ICN) provides an enhanced version of the internet that is capable of resolving such issues efficiently. ICN is the new internet paradigm that supports innovative communication systems with location-independent data dissemination. The emergence of ICN with VSNs can handle the massive amount of data generated from heterogeneous mobile sensors in surrounding smart environments. The ICN paradigm offers an in-network cache, which is the most effective means to reduce the number of complications of the receiver-driven content retrieval process. However, due to the non-linearity of the Quality-of-Experience (QoE) in VSN systems, efficient content management within the context of ICN is needed. For this purpose, this paper implements a new distributed caching strategy (DCS) at the edge of the network in VSN environments to reduce the number of overall data dissemination problems. The proposed DCS mechanism is studied comparatively against existing caching strategies to check its performance in terms of memory consumption, path stretch ratio, cache hit ratio, and content eviction ratio. Extensive simulation results have shown that the proposed strategy outperforms these benchmark caching strategies.
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Weerasinghe, Shakthi, Arkady Zaslavsky, Seng Wai Loke, Alireza Hassani, Alexey Medvedev, and Amin Abken. "Adaptive Context Caching for IoT-Based Applications: A Reinforcement Learning Approach." Sensors 23, no. 10 (2023): 4767. http://dx.doi.org/10.3390/s23104767.
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Making internet-of-things (IoT)-based applications context-aware demands large amounts of raw data to be collected, interpreted, stored, and reused or repurposed if needed from many domains and applications. Context is transient but interpreted data can be distinguished from IoT data in many aspects. Managing context in cache is a novel area of research that has been given very little attention. Performance metric-driven adaptive context caching (ACOCA) can have a profound impact on the performance and cost efficiency of context-management platforms (CMPs) when responding to context queries in realtime. Our paper proposes an ACOCA mechanism to maximize both the cost and performance efficiency of a CMP in near realtime. Our novel mechanism encompasses the entire context-management life cycle. This, in turn, distinctively addresses the problems of efficiently selecting context for caching and managing the additional costs of context management in the cache. We demonstrate that our mechanism results in long-term efficiencies for the CMP that have not been observed in any previous study. The mechanism employs a novel, scalable, and selective context-caching agent implemented using the twin delayed deep deterministic policy gradient method. It further incorporates an adaptive context-refresh switching policy, a time-aware eviction policy, and a latent caching decision management policy. We point out in our findings that the additional complexity of adaptation introduced to the CMP through ACOCA is significantly justified, considering the cost and performance gains achieved. Our algorithm is evaluated using a real-world inspired heterogeneous context-query load and a data set based on parking-related traffic in Melbourne, Australia. This paper presents and benchmarks the proposed scheme against traditional and context-aware caching policies. We demonstrate that ACOCA outperforms the benchmarks in both cost and performance efficiency, i.e., up to 68.6%, 84.7%, and 67% more cost efficient compared to traditional data caching policies to cache context, redirector mode, and context-aware adaptive data caching under real-world-like circumstances.
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Domingues, Guilherme, Gabriel Mendonça, Edmundo De Souza E. Silva, et al. "The Role of Hysteresis in Caching Systems." ACM Transactions on Modeling and Performance Evaluation of Computing Systems 6, no. 1 (2021): 1–38. http://dx.doi.org/10.1145/3450564.
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Caching is a fundamental element of networking systems since the early days of the Internet. By filtering requests toward custodians, caches reduce the bandwidth required by the latter and the delay experienced by clients. The requests that are not served by a cache, in turn, comprise its miss stream. We refer to the dependence of the cache state and miss stream on its history as hysteresis. Although hysteresis is at the core of caching systems, a dimension that has not been systematically studied in previous works relates to its impact on caching systems between misses, evictions, and insertions. In this article, we propose novel mechanisms and models to leverage hysteresis on cache evictions and insertions. The proposed solutions extend TTL-like mechanisms and rely on two knobs to tune the time between insertions and evictions given a target hit rate. We show the general benefits of hysteresis and the particular improvement of the two thresholds strategy in reducing download times, making the system more predictable and accounting for different costs associated with object retrieval.
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Li, Bohan, Xin He, Junyang Yu, et al. "Adaptive memory reservation strategy for heavy workloads in the Spark environment." PeerJ Computer Science 10 (November 13, 2024): e2460. http://dx.doi.org/10.7717/peerj-cs.2460.
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The rise of the Internet of Things (IoT) and Industry 2.0 has spurred a growing need for extensive data computing, and Spark emerged as a promising Big Data platform, attributed to its distributed in-memory computing capabilities. However, practical heavy workloads often lead to memory bottleneck issues in the Spark platform. This results in resilient distributed datasets (RDD) eviction and, in extreme cases, violent memory contentions, causing a significant degradation in Spark computational efficiency. To tackle this issue, we propose an adaptive memory reservation (AMR) strategy in this article, specifically designed for heavy workloads in the Spark environment. Specifically, we model optimal task parallelism by minimizing the disparity between the number of tasks completed without blocking and the number completed in regular rounds. Optimal memory for task parallelism is determined to establish an efficient execution memory space for computational parallelism. Subsequently, through adaptive execution memory reservation and dynamic adjustments, such as compression or expansion based on task progress, the strategy ensures dynamic task parallelism in the Spark parallel computing process. Considering the cost of RDD cache location and real-time memory space usage, we select suitable storage locations for different RDD types to alleviate execution memory pressure. Finally, we conduct extensive laboratory experiments to validate the effectiveness of AMR. Results indicate that, compared to existing memory management solutions, AMR reduces the execution time by approximately 46.8%.
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Lykouris, Thodoris, and Sergei Vassilvitskii. "Competitive Caching with Machine Learned Advice." Journal of the ACM 68, no. 4 (2021): 1–25. http://dx.doi.org/10.1145/3447579.
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Traditional online algorithms encapsulate decision making under uncertainty, and give ways to hedge against all possible future events, while guaranteeing a nearly optimal solution, as compared to an offline optimum. On the other hand, machine learning algorithms are in the business of extrapolating patterns found in the data to predict the future, and usually come with strong guarantees on the expected generalization error. In this work, we develop a framework for augmenting online algorithms with a machine learned predictor to achieve competitive ratios that provably improve upon unconditional worst-case lower bounds when the predictor has low error. Our approach treats the predictor as a complete black box and is not dependent on its inner workings or the exact distribution of its errors. We apply this framework to the traditional caching problem—creating an eviction strategy for a cache of size k . We demonstrate that naively following the oracle’s recommendations may lead to very poor performance, even when the average error is quite low. Instead, we show how to modify the Marker algorithm to take into account the predictions and prove that this combined approach achieves a competitive ratio that both (i) decreases as the predictor’s error decreases and (ii) is always capped by O (log k ), which can be achieved without any assistance from the predictor. We complement our results with an empirical evaluation of our algorithm on real-world datasets and show that it performs well empirically even when using simple off-the-shelf predictions.
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Gomes, Cesar, Maziar Amiraski, and Mark Hempstead. "CASHT: Contention Analysis in Shared Hierarchies with Thefts." ACM Transactions on Architecture and Code Optimization 19, no. 1 (2022): 1–27. http://dx.doi.org/10.1145/3494538.
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Cache management policies should consider workloads’ contention behavior when managing a shared cache. Prior art makes estimates about shared cache behavior by adding extra logic or time to isolate per workload cache statistics. These approaches provide per-workload analysis but do not provide a holistic understanding of the utilization and effectiveness of caches under the ever-growing contention that comes standard with scaling cores. We present Contention Analysis in Shared Hierarchies using Thefts, or CASHT, 1 a framework for capturing cache contention information both offline and online. CASHT takes advantage of cache statistics made richer by observing a consequence of cache contention: inter-core evictions, or what we call THEFTS. We use thefts to complement more familiar cache statistics to train a learning model based on Gradient-boosting Trees (GBT) to predict the best ways to partition the last-level cache. GBT achieves 90+% accuracy with trained models as small as 100 B and at least 95% accuracy at 1 kB model size when predicting the best way to partition two workloads. CASHT employs a novel run-time framework for collecting thefts-based metrics despite partition intervention, and enables per-access sampling rather than set sampling that could add overhead but may not capture true workload behavior. Coupling CASHT and GBT for use as a dynamic policy results in a very lightweight and dynamic partitioning scheme that performs within a margin of error of Utility-based Cache Partitioning at a 1/8 the overhead.
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Huang, Kai, Ke Wang, Dandan Zheng, Xiaoxu Zhang, and Xiaolang Yan. "Access Adaptive and Thread-Aware Cache Partitioning in Multicore Systems." Electronics 7, no. 9 (2018): 172. http://dx.doi.org/10.3390/electronics7090172.
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Cache partitioning is a successful technique for saving energy for a shared cache and all the existing studies focus on multi-program workloads running in multicore systems. In this paper, we are motivated by the fact that a multi-thread application generally executes faster than its single-thread counterpart and its cache accessing behavior is quite different. Based on this observation, we study applications running in multi-thread mode and classify data of the multi-thread applications into shared and private categories, which helps reduce the interferences among shared and private data and contributes to constructing a more efficient cache partitioning scheme. We also propose a hardware structure to support these operations. Then, an access adaptive and thread-aware cache partitioning (ATCP) scheme is proposed, which assigns separate cache portions to shared and private data to avoid the evictions caused by the conflicts from the data of different categories in the shared cache. The proposed ATCP achieves a lower energy consumption, meanwhile improving the performance of applications compared with the least recently used (LRU) managed, core-based evenly partitioning (EVEN) and utility-based cache partitioning (UCP) schemes. The experimental results show that ATCP can achieve 29.6% and 19.9% average energy savings compared with LRU and UCP schemes in a quad-core system. Moreover, the average speedup of multi-thread ATCP with respect to single-thread LRU is at 1.89.
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Ullah, Ihsan, Muhammad Sajjad Khan, Marc St-Hilaire, Mohammad Faisal, Junsu Kim, and Su Min Kim. "Task Priority-Based Cached-Data Prefetching and Eviction Mechanisms for Performance Optimization of Edge Computing Clusters." Security and Communication Networks 2021 (March 24, 2021): 1–10. http://dx.doi.org/10.1155/2021/5541974.
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The rapid evolution of the Internet of Things (IoT) and the development of cloud computing have endorsed a new computing paradigm called edge computing, which brings the computing resources to the edge of the network. Due to low computing power and small data storage at the edge nodes, the task must be assigned to the computing nodes, where their associated data is available, to reduce overheads caused by data transmissions in the network. The proposed scheme named task priority-based data-prefetching scheduler (TPDS) tries to improve the data locality through available cached and prefetching data for offloading tasks to the edge computing nodes. The proposed TPDS prioritizes the tasks in the queue based on the available cached data in the edge computing nodes. Consequently, it increases the utilization of cached data and reduces the overhead caused by data eviction. The simulation results show that the proposed TPDS can be effective in terms of task scheduling and data locality.
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Martinoli, Valentin, Elouan Tourneur, Yannick Teglia, and Régis Leveugle. "CCALK: (When) CVA6 Cache Associativity Leaks the Key." Journal of Low Power Electronics and Applications 13, no. 1 (2022): 1. http://dx.doi.org/10.3390/jlpea13010001.
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In this work, we study an end-to-end implementation of a Prime + Probe covert channel on the CVA6 RISC-V processor implemented on a FPGA target and running a Linux OS. We develop the building blocks of the covert channel and provide a detailed view of its behavior and effectiveness. We propose a realistic scenario for extracting information of an AES-128 encryption algorithm implementation. Throughout this work, we discuss the challenges brought by the presence of a running OS while carrying out a micro architectural covert channel. This includes the effects of having other running processes, unwanted cache evictions and the OS’ timing behavior. We also propose an analysis of the relationship between the data cache’s characteristics and the developed covert channel’s capacity to extract information. According to the results of our experimentations, we present guidelines on how to build and configure a micro architectural covert channel resilient cache in a mono-core mono-thread scenario.
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Srivatsa, Akshay, Nael Fasfous, Nguyen Anh Vu Doan, Sebastian Nagel, Thomas Wild, and Andreas Herkersdorf. "Exploring a Hybrid Voting-based Eviction Policy for Caches and Sparse Directories on Manycore Architectures." Microprocessors and Microsystems 87 (November 2021): 104384. http://dx.doi.org/10.1016/j.micpro.2021.104384.
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Banditwattanawong, Thepparit, and Masawee Masdisornchote. "On formulation of online algorithm and framework of near-optimally tractable eviction for nonuniform caches." Computer Networks 178 (September 2020): 107332. http://dx.doi.org/10.1016/j.comnet.2020.107332.
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Fernández-Pascual, Ricardo, Alberto Ros, and Manuel E. Acacio. "To be silent or not: on the impact of evictions of clean data in cache-coherent multicores." Journal of Supercomputing 73, no. 10 (2017): 4428–43. http://dx.doi.org/10.1007/s11227-017-2026-6.
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Chen, Congyong, Shengan Zheng, Yuhang Zhang, and Linpeng Huang. "FusionFS: A Contention-Resilient File System for Persistent CPU Caches." ACM Transactions on Architecture and Code Optimization, February 26, 2025. https://doi.org/10.1145/3719656.
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Byte-addressable storage (BAS), such as persistent memory and CXL-SSDs, does not meet system designers’ expectations for data flushing and access granularity. Persistent CPU caches, enabled by recent techniques like Intel’s eADR and CXL’s Global Persistent Flush, can mitigate these issues without sacrificing consistency. However, the shared nature of CPU caches can lead to cache contention, which can result in cached data being frequently evicted to the BAS and reloaded into caches, negating the benefits of caching. If the BAS write granularity is larger than the cacheline eviction granularity, this can also lead to severe write amplification. In this paper, we identify, characterize, and propose solutions to the problem of contention in persistent CPU caches, which is largely overlooked by existing systems. These systems either simply assume that cached data is hot enough to survive cache evictions or use unsupported cache allocation techniques without testing their effectiveness. We also present FusionFS, a contention-resilient kernel file system that uses persistent CPU caches to redesign data update approaches. FusionFS employs an adaptive data update approach that chooses the most effective mechanism based on file access patterns during system calls and memory mapping accesses, minimizing BAS media writes and improving throughput. FusionFS also employs contention-aware cache allocation to minimize various types of cache contention. Experimental results show that FusionFS outperforms existing file systems and effectively mitigates various types of cache contention.
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Su, Liangkuan, Mingwei Lin, Bo Mao, Jianpeng Zhang, and Zeshui Xu. "HaParallel: Hit Ratio-Aware Parallel Aggressive Eviction Cache Management Algorithm for SSDs." ACM Transactions on Storage, April 9, 2025. https://doi.org/10.1145/3728644.
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Solid-state drives (SSDs) can be classified into two types: with and without built-in cache. In terms of performance, SSDs featuring cache exhibit a substantial performance advantage over their non-cache counterparts. The main focus of this paper is the management of built-in cache in SSDs. From a large number of previous studies, we observe that cache hit ratios remain relatively modest for the majority of workloads. First, based on this observation, we adopt an aggressive eviction policy, diverging from traditional eviction algorithms that follow an on-demand eviction policy. Next, considering the temporal locality and parallelism of cached data, we introduce multi-level linked lists to organize cached data. In this way, a smaller computational load can be used to increase the probability of triggering advanced commands. Finally, drawing inspiration from congestion control algorithm in computer networking, we design a cache hit ratio-aware unit. This unit can employ varying degrees of aggressive eviction policies based on its own state. The aim is to maximize the execution of advanced commands while limiting the impact of the aggressive eviction policy on the hit ratio. Our experimental simulations on real workloads show a substantial improvement in average response time compared to LRU, VBBMS, and Req-block, with our method achieving reductions of 19.7%, 19.4%, and 29.9%, respectively.
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Wei, Xueliang, Dan Feng, Wei Tong, Bing Wu, and Xu Jiang. "SEED: Speculative Security Metadata Updates for Low-Latency Secure Memory." ACM Transactions on Architecture and Code Optimization, March 7, 2025. https://doi.org/10.1145/3722111.
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Securing systems’ main memory is important for building trusted data centers. To ensure memory security, encryption and integrity verification techniques update the security metadata (e.g., encryption counters and integrity trees) during memory data writes. Existing studies are optimistic about the effect of data writes on system performance since they regard all data writes as background operations. However, we show that security metadata updates significantly increase data write latency. High-latency data writes frequently fill up write buffers in the system, forcing the system to perform the writes in the critical path. As a result, performance-critical data reads need to wait for the execution of these writes, which increases data read latency and degrades system performance. In this paper, we propose SEED that improves the performance of secure memory systems by speculatively updating security metadata in the background before data writes arrive. To enable speculative updates, SEED predicts which dirty cache lines will be written to memory through natural evictions. We find that cache evictions depend on multiple factors. To decouple the dependencies for accurate predictions, we devise a two-step eviction prediction method based on our observation that the next eviction victim rarely changes in a set. The first step predicts which cache sets will evict cache lines, while the second step predicts which cache lines will be evicted by finding the next eviction victims in the sets. For predicted evictions, we develop a speculative updater to perform speculative updates. We analyze the invariants that must be followed by the updater to ensure the correctness of speculative updates. The updater rolls back the speculatively updated security metadata of inaccurate predictions. To reduce the rollback overhead, we devise a rollback batching and an update pausing optimization for the updater. Experimental results show that SEED reduces data write latency by 39.8%, data read latency by 44.9%, and improves performance by 40.0% on average compared with the state-of-the-art secure memory design.
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Banerjee, Supratik, and Sanjay Kumar Biswash. "Enhanced dynamic fine‐grained popularity‐based caching algorithm for ICN‐based edge computing networks." Internet Technology Letters, January 28, 2024. http://dx.doi.org/10.1002/itl2.504.
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AbstractIn this letter, we propose an Enhanced Dynamic Fine‐Grained Popularity‐based Caching (ED‐FGPC) algorithm to efficiently cache static contents in ICN‐based edge computing networks. The content popularity changes with time. Thus, the ED‐FGPC algorithm considers the number of incoming interests, the practical file size, and the available cache size to adjust the content popularity threshold. This allows dynamic adjustment of the content popularity threshold. Additionally, ED‐FGPC incorporates a single bit called cached bit (CB) in the header field of the content. This eliminates caching redundancy in the on‐path routers. The cache eviction policy jointly considers the content popularity and the average content access timestamp for content replacement. Based on the content access pattern, this allows finer adjustment of the content eviction policy. We use analytical and mathematical modeling to derive the effectiveness and efficiency of our contribution. Results present a better hit ratio due to dynamic adjustment of the content popularity threshold and the elimination of caching redundancy from the on‐path routers.
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Xiao, Di, Xiaoyong Li, Daren Cline, and Dmitri Loguinov. "Estimating DNS Source and Cache Dynamics under Interval-Censored Age Sampling." ACM Transactions on Modeling and Performance Evaluation of Computing Systems, January 22, 2025. https://doi.org/10.1145/3712697.
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Since inception, DNS has used a TTL-based replication scheme that allows the source (i.e., an authoritative domain server) to control the frequency of record eviction from client caches. Existing studies of DNS predominantly focus on reducing query latency and source bandwidth, both of which are optimized by increasing the cache hit rate. However, this causes less-frequent contacts with the source and results in higher staleness of retrieved records. Given high data-churn rates at certain providers (e.g., dynamic DNS, CDNs) and importance of consistency to their clients, we propose that cache models include the probability of freshness as an integral performance measure. We derive this metric under general update/download processes and present a novel framework for measuring its value using remote observation (i.e., without access to the source or the cache). Besides freshness, our methods can estimate the inter-update distribution of DNS records, cache hit rate, distribution of TTL, and query arrival rate from other clients. Furthermore, these algorithms do not require any changes to the existing infrastructure/protocols.
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Wang, Chong, Shuai Wei, Ke Song, and Fan Zhang. "Thwarting Cache Side Channel Attacks with Encryption Address-Based Set Balance Cache." Journal of Circuits, Systems and Computers, February 25, 2022. http://dx.doi.org/10.1142/s0218126622501626.
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The deterministic memory-to-cache mapping used by cache side channel attack causes the leakage of sensitive information such as secret keys, which seriously threatens user security and highlights the need to defend against this kind of attack. Recent table-based secure cache design requires more space to store the entry while a purely encryption-based design needs complex encryption units to ensure robustness. What is more, the newer attack algorithm enabling faster eviction set discovery may still break such defenses. Even though increasing the association of cache can be a potential solution, it introduces too much redundancy cache access and storage overhead. In this paper, we eliminate this problem. We present Encryption address-based Set Balance Cache (ESBC), a novel cache design to mitigate cache-based side channel attack. ESBC encrypts an address into two-level sets and displaces the data from a primary set into the secondary set when the primary set is full. The two-level mapping structure increases the complexity for attackers to build eviction sets, which is a vital step for the conflict-based attack. Furthermore, we adopt two different optimized variants from a temporal perspective, ESBC with remapping (ESBCR), which serves dynamic-remapping, and spatial perspective, ESBC with multi-mapping (ESBCM), which performs multi-mapping to improve the robustness. Our security analysis reveals that these designs can confuse the exploitation of conflicting addresses. Simulation-based evaluation on SPEC2017 shows 0.24% instruction per cycle (IPC) degradation for ESBCR with 1% remap rate. While the reduction of ESBCM that has five potential secondary sets is 0.69%. What is exciting is that both miss per kilo instructions (MPKI) and miss rates are even reduced because of the efficient cache usage. The storage overhead of these two variants is only 0.87%. By comparing the two schemes, we can observe that though ESBCR brings less performance overhead, the ESBCM has better scalability.
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Lee, Dusol, Inhyuk Choi, Chanyoung Lee, Hyungsoo Jung, and Jihong Kim. "P2Cache: Enhancing Data-Centric Applications via Application-Guided Management of OS Page Caches." ACM Transactions on Storage, June 14, 2025. https://doi.org/10.1145/3736586.
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Data-centric applications perform tasks that require intensive data processing and ample memory resources. These tasks have varying I/O access patterns, significantly impacted by the OS cache. Therefore, it is desirable to enable application-specific cache management without compromising memory efficiency. However, infusing user-level policies into the OS cache management is challenging because it is difficult to communicate application-level I/O semantics and access patterns to general-purpose OSs. This article addresses the challenge by enabling applications to safely convey their I/O semantics to OSs via eBPF, allowing for more application-specific control over the OS cache. To this end, we introduce P2Cache , a programmable OS page cache. P2Cache extends the Linux page cache with three new probe points (i.e., eviction , prefetching , and swapping ) that can support application-directed custom policies on OS cache management using eBPF programs. Our experimental results showed that P2Cache significantly enhanced the performance of an LLM inference, a graph processing application, and a database by up to 230%, 49%, and 18%, respectively, with minimal effort.
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Tang, Chengyong, Zhibing Sha, Jun Li, et al. "Sequential Packaging-Based Cache Eviction for Ssd-Hdd Hybrid Storage." SSRN Electronic Journal, 2023. http://dx.doi.org/10.2139/ssrn.4363864.
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Liu, Ke, Kan Wu, Hua Wang, et al. "SLAP: Segmented Reuse-Time-Label Based Admission Policy for Content Delivery Network Caching." ACM Transactions on Architecture and Code Optimization, February 9, 2024. http://dx.doi.org/10.1145/3646550.
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“Learned” admission policies have shown promise in improving Content Delivery Network (CDN) cache performance and lowering operational costs. Unfortunately, existing learned policies are optimized with a few fixed cache sizes while in reality, cache sizes often vary over time in an unpredictable manner. As a result, existing solutions cannot provide consistent benefits in production settings. We present SLAP , a learned CDN cache admission approach based on segmented object reuse time prediction. SLAP predicts an object’s reuse time range using the Long-Short-Term-Memory model and admits objects that will be reused (before eviction) given the current cache size. SLAP decouples model training from cache size, allowing it to adapt to arbitrary sizes. The key to our solution is a novel segmented labeling scheme that makes SLAP without requiring precise prediction on object reuse time. To further make SLAP a practical and efficient solution, we propose aggressive reusing of computation and training on sampled traces to optimize model training, and a specialized predictor architecture that overlaps prediction computation with miss object fetching to optimize model inference. Our experiments using production CDN traces show that SLAP achieves significantly lower write traffic (38%-59%), longer SSDs lifetime (104%-178%), a consistently higher hit rate (3.2%-11.7%), and requires no effort to adapt to changing cache sizes, outperforming existing policies.
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Tang, Chengyong, Zhibing Sha, Jun Li, et al. "Cache eviction for SSD-HDD hybrid storage based on sequential packing." Journal of Systems Architecture, June 2023, 102930. http://dx.doi.org/10.1016/j.sysarc.2023.102930.
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