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TEO, SELIN H. G., A. Q. LIU, G. L. SIA, C. LU, J. SINGH, and M. B. YU. "DEEP REACTIVE ION ETCHING FOR PILLAR TYPE NANOPHOTONIC CRYSTAL." International Journal of Nanoscience 04, no. 04 (2005): 567–74. http://dx.doi.org/10.1142/s0219581x05003590.
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Experimental results and techniques developed for time multiplexed deep reactive ion etching of nano-photonic crystals are presented. Specifically, the high aspect ratio pillar type two-dimensional photonic crystal (PhC) structure on silicon is fabricated and studied for its high potential in application to lightwave circuits and also for discussion of the many unique challenges involved in its fabrication process as opposed to standard larger scale devices. In the experiments, patterns of nano-dots were first obtained using deep UV lithography and transferred to a silicon oxide hardmask prior to DRIE processing. The iteration of DRIE experiments with varying process parameters then allowed for a characterization of the varying impact of each etching parameter such as coil/ platen/ etch power, multiplexing cycling gas flows and timing patterns etc. After much optimization of sidewall etch angle and also reduction of the scalloping effect, the latest result obtained for such nano-pillar type PhC designed for application in communication is derived to have a high AR of 33.
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Gerlt, Michael S., Nino F. Läubli, Michel Manser, Bradley J. Nelson, and Jürg Dual. "Reduced Etch Lag and High Aspect Ratios by Deep Reactive Ion Etching (DRIE)." Micromachines 12, no. 5 (2021): 542. http://dx.doi.org/10.3390/mi12050542.
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Deep reactive ion etching (DRIE) with the Bosch process is one of the key procedures used to manufacture micron-sized structures for MEMS and microfluidic applications in silicon and, hence, of increasing importance for miniaturisation in biomedical research. While guaranteeing high aspect ratio structures and providing high design flexibility, the etching procedure suffers from reactive ion etching lag and often relies on complex oxide masks to enable deep etching. The reactive ion etching lag, leading to reduced etch depths for features exceeding an aspect ratio of 1:1, typically causes a height difference of above 10% for structures with aspect ratios ranging from 2.5:1 to 10:1, and, therefore, can significantly influence subsequent device functionality. In this work, we introduce an optimised two-step Bosch process that reduces the etch lag to below 1.5%. Furthermore, we demonstrate an improved three-step Bosch process, allowing the fabrication of structures with 6 μm width at depths up to 180 μm while maintaining their stability.
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Baracu, Angela M., Christopher A. Dirdal, Andrei M. Avram, et al. "Metasurface Fabrication by Cryogenic and Bosch Deep Reactive Ion Etching." Micromachines 12, no. 5 (2021): 501. http://dx.doi.org/10.3390/mi12050501.
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The research field of metasurfaces has attracted considerable attention in recent years due to its high potential to achieve flat, ultrathin optical devices of high performance. Metasurfaces, consisting of artificial patterns of subwavelength dimensions, often require fabrication techniques with high aspect ratios (HARs). Bosch and Cryogenic methods are the best etching candidates of industrial relevance towards the fabrication of these nanostructures. In this paper, we present the fabrication of Silicon (Si) metalenses by the UV-Nanoimprint Lithography method and cryogenic Deep Reactive Ion Etching (DRIE) process and compare the results with the same structures manufactured by Bosch DRIE both in terms of technological achievements and lens efficiencies. The Cryo- and Bosch-etched lenses attain efficiencies of around 39% at wavelength λ = 1.50 µm and λ = 1.45 µm against a theoretical level of around 61% (for Si pillars on a Si substrate), respectively, and process modifications are suggested towards raising the efficiencies further. Our results indicate that some sidewall surface roughness of the Bosch DRIE is acceptable in metalense fabrication, as even significant sidewall surface roughness in a non-optimized Bosch process yields reasonable efficiency levels.
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Song, Ying, and Min Zou. "Superhydrophobic surfaces by dynamic nanomasking and deep reactive ion etching." Proceedings of the Institution of Mechanical Engineers, Part N: Journal of Nanoengineering and Nanosystems 221, no. 2 (2007): 41–48. http://dx.doi.org/10.1243/17403499jnn106.
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This paper reports a study on fabricating superhydrophobic surfaces with micro- and nanohierarchical topography by dynamic nanomasking (DNM) and deep reactive ion etching (DRIE). In this study, thin layers of gold (Au) were sputtered on silicon (Si) wafers followed by annealing the samples in a conventional furnace to break the thin films into Au nanoparticles attached to the Si surfaces. These randomly distributed nanoparticles served as dynamic nanomasks during DRIE processes, in which sulphur hexafluoride (SF6) and octofluorocyclobutane (C4F8) were used as etching and polymerization gases, respectively. Surface topography and wetting properties of the samples were characterized by scanning electron microscopy (SEM) and a video-based optical contact angle meter (VOCAM). SEM images show that this technique created micro-sized craters with Au nanoparticles residing on the ridges of the microstructures. The largest water contact angle (WCA) obtained by this method is about 163°. The surface superhydrophobicity is attributed to the combination of micro- and nano-hierarchical topography and surface polymerization.
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Bolton, Chris J. W., Olivia Howells, Gareth J. Blayney, et al. "Hollow silicon microneedle fabrication using advanced plasma etch technologies for applications in transdermal drug delivery." Lab on a Chip 20, no. 15 (2020): 2788–95. http://dx.doi.org/10.1039/d0lc00567c.
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Evans, Laura J., and Glenn M. Beheim. "Deep Reactive Ion Etching (DRIE) of High Aspect Ratio SiC Microstructures Using a Time-Multiplexed Etch-Passivate Process." Materials Science Forum 527-529 (October 2006): 1115–18. http://dx.doi.org/10.4028/www.scientific.net/msf.527-529.1115.
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High aspect ratio silicon carbide (SiC) microstructures are needed for microengines and other harsh environment micro-electro-mechanical systems (MEMS). Previously, deep reactive ion etching (DRIE) of low aspect ratio (AR ≤1) deep (>100 *m) trenches in SiC has been reported. However, existing DRIE processes for SiC are not well-suited for definition of high aspect ratio features because such simple etch-only processes provide insufficient control over sidewall roughness and slope. Therefore, we have investigated the use of a time-multiplexed etch-passivate (TMEP) process, which alternates etching with polymer passivation of the etch sidewalls. An optimized TMEP process was used to etch high aspect ratio (AR up to 13) deep (>100 *m) trenches in 6H-SiC. Power MEMS structures (micro turbine blades) in 6H-SiC were also fabricated.
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Zhong, Hao, Dong Yang Li, Yu Hao Song, Wei Li, Xiang Dong Jiang, and Ya Dong Jiang. "Nano-Structured Silicon: Fabrication, Optical Property, Defect States and Device Application." Materials Science Forum 947 (March 2019): 66–70. http://dx.doi.org/10.4028/www.scientific.net/msf.947.66.
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We use two different methods to fabricate nanostructured silicon on the surface of C-Si: femtosecond laser etching (FLE) and deep reactive ion etching (DRIE) combined with plasma immersion ion implantation (PIII). Nanocone silicon arrays of dense and random distribution are obtained by FLE. Meanwhile, cylindroid silicon nanostructures of excellent regularity and uniform coverage are achieved by DRIE. These nanostructured silicon materials show a remarkable enhancement on absorptance at near-infrared wavelength. Moreover, the minority carriers lifetime measurement is also carried out to evaluate defect states caused by two etching processes and their influence on semiconductor physical effects. A Si-PIN photoelectronic detector with nanostructured silicon at the back surface exhibits high near-infrared responsivity. These novel results may have a potential application in near-infrared photoelectronic devices.
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Shi, Gui Xiong, Shi Xing Jia, Guo Qin Jiang, and Jian Zhu. "Research of Micro-Inertial Device High-Aspect-Ratio Etching Parameters." Key Engineering Materials 609-610 (April 2014): 706–9. http://dx.doi.org/10.4028/www.scientific.net/kem.609-610.706.
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This is mainly due to the high chemical reactivity and spontaneous etching nature of the fluorine radicals towards silicon, and the high volatility of the silicon fluorides as reaction products. Anisotropy can only be achieved by the inclusion of sidewall passivation schemes to the process. The existing approaches to deep reactive ion etching (DRIE) of silicon are distinguished by the way sidewall passivation is achieved, the key to anisotropy and overall performance of the etch process. Cryogenic etching and the so-called Bosch process with alternating etch and passivation cycles are the two most well-known high-aspect-ratio silicon etch processes and are discussed in this paper.
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Huff, Michael. "Recent Advances in Reactive Ion Etching and Applications of High-Aspect-Ratio Microfabrication." Micromachines 12, no. 8 (2021): 991. http://dx.doi.org/10.3390/mi12080991.
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This paper reviews the recent advances in reaction-ion etching (RIE) for application in high-aspect-ratio microfabrication. High-aspect-ratio etching of materials used in micro- and nanofabrication has become a very important enabling technology particularly for bulk micromachining applications, but increasingly also for mainstream integrated circuit technology such as three-dimensional multi-functional systems integration. The characteristics of traditional RIE allow for high levels of anisotropy compared to competing technologies, which is important in microsystems device fabrication for a number of reasons, primarily because it allows the resultant device dimensions to be more accurately and precisely controlled. This directly leads to a reduction in development costs as well as improved production yields. Nevertheless, traditional RIE was limited to moderate etch depths (e.g., a few microns). More recent developments in newer RIE methods and equipment have enabled considerably deeper etches and higher aspect ratios compared to traditional RIE methods and have revolutionized bulk micromachining technologies. The most widely known of these technologies is called the inductively-coupled plasma (ICP) deep reactive ion etching (DRIE) and this has become a mainstay for development and production of silicon-based micro- and nano-machined devices. This paper will review deep high-aspect-ratio reactive ion etching technologies for silicon, fused silica (quartz), glass, silicon carbide, compound semiconductors and piezoelectric materials.
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Liu, Yang, Ling Yun Wang, Ting Ping Lei, Jiang Du, Yi Wen Jiang, and Dao Heng Sun. "Design and Simulation of a Differential and Decoupled Micromachined Gyroscope." Key Engineering Materials 483 (June 2011): 674–78. http://dx.doi.org/10.4028/www.scientific.net/kem.483.674.
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In this paper, a differential and decoupled micromachined gyroscope fabricated by through-etching the silicon substrate anodically bonded on the glass substrate was presented. The decoupled structure can make the sense mode frequency match with the drive mode frequency and reduce the quadrature error. The sensitivity is further improved by differential detection using antiphase oscillation of double masses along the drive axis. Finite-element simulation is performed with ANSYS software to analyze the vibration mode. The device employs silicon-on-glass gyroscope sensor chip processed with Deep Reactive Ion Etching (DRIE) and glass-silicon anodic bonding. Then it is tested at atmospheric pressure. Drive mode and sense mode are obtained as 2015 Hz and 1957 Hz which are closed to the simulated ones. Q factor of the drive and sense mode also can be gained as 56 and 3.4.
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Quinn, George D. "Fractographic Analysis of Very Small Theta Specimens." Key Engineering Materials 409 (March 2009): 201–8. http://dx.doi.org/10.4028/www.scientific.net/kem.409.201.
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The theta test specimen is a versatile tool for evaluating the strength of extremely small structures. Round and hexagonal rings are compressed vertically on their ends creating a uniform tension stress in the middle gauge section. The simple compression loading scheme eliminates the need for special grips. A conventional nanoindentation hardness machine with a flat indenter applied load, monitored displacement, and recorded fracture loads. Prototype miniature specimens with web sections as thin as 7.5 m were fabricated by deep reactive ion etching (DRIE) of single crystal silicon wafers. The strength limiting flaws were 200 nm to 500 nm deep surface etch pits.
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Sun, Han, Fang Yang, Wei Wang, and Da Cheng Zhang. "Generalized Thermal Design Model for Comb-Capacitor MEMS Devices Fabricated by Bonding-DRIE Process: A Preliminary Framework." Key Engineering Materials 562-565 (July 2013): 1103–6. http://dx.doi.org/10.4028/www.scientific.net/kem.562-565.1103.
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Bonding-deep reaction ion etching (DRIE) is a standard microelectromechanical system (MEMS) fabrication technique, especially for widely-applied comb-capacitor microdevices. Being the key structure in the comb-capacitor devices, long and narrow suspended beams suffer a serious heat transfer problem during their releasing in the fabrication because of the high heat flux input and the large thermal resistance. Temperature increment of the micro beam in the DRIE releasing, especially in the unavoidable over etching stage, may cause serious problem, even lead to a failed etch. This work introduced a generalized thermal design model to estimate the possible temperature increment of microstructure in DRIE. The preliminary results indicated that this model was able to capture the basic trend of temperature variation with the geometrical parameters in a comb-capacitor MEMS device during its DRIE releasing.
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Liu, Mei, J. Zhu, Min Zhuo, Jing Wu, and Shi Xing Jia. "Design and Implementation of SOI Based Capacitive Microaccelerometers Without Notching Effects." Key Engineering Materials 483 (June 2011): 108–11. http://dx.doi.org/10.4028/www.scientific.net/kem.483.108.
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We report our efforts towards designing and fabricating capacitive microaccelerometers with flat bottom surfaces free from the notching effects of Deep Reactive Ion Etching (DRIE) based on SOI process. The substrate layer under the device structure is etched and a metal film is deposited to the backside of moving structure for protecting the bottom surfaces so that the stiction problem and notching effects are avoided. The test results demonstrate that SOI accelerometers have been released successfully. The measured sensitivity is 169.1mV/g and the linearity of output is within 0.202%.
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Mauer, Laura, John Taddei, Ramey Youssef, Kimberly Pollard, and Allison Rector. "TSV Resist and Residue Removal." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2011, DPC (2011): 001596–620. http://dx.doi.org/10.4071/2011dpc-wp14.
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3D integration is the most active methodology for increasing device performance. The ability to create Through Silicon Vias (TSV) provides the shortest path for interconnections and will result in increased device speed and reduced package footprint. There are numerous technical papers and presentations on the etching and filling of these vias, however the process for cleaning is seldom mentioned. Historically, after reactive ion etching (RIE), cleaning is accomplished using an ashing process to remove any remaining photoresist, followed by dipping the wafer in a solution-based post etch residue remover. However, in the case of TSV formation, deep reactive ion etching (DRIE) is used to create the vias. A byproduct of this etching process is the formation of a fluorinated passivation layer, often referred to as a fluoropolymer. The fluoropolymer is not easily removed using traditional post etch residue removers, thus creating the opportunity for new and improved formulations and processes for its removal. This paper will describe a robust cleaning process for one step removal of both the photoresist and sidewall polymer residues from TSVs. A combination soak and high pressure spray process using Dynastrip™ AP7880™-C, coupled with a megasonic final rinse provides clean results for high aspect ratio vias. SEM, EDX and Auger analysis will illustrate the cleanliness levels achieved.
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Gu, Ting, Ping Cheng, Hui Ying Wang, Xu Han Dai, Hong Wang, and Gui Fu Ding. "Micro-Compression Testing of TSV Copper Pillar: An In Situ Method and Mechanical Property." Advanced Materials Research 663 (February 2013): 352–56. http://dx.doi.org/10.4028/www.scientific.net/amr.663.352.
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This paper puts forward an in-situ testing method for the mechanical properties of TSV copper pillar by using micro-compression experiment. The sample for micro-compression test is prepared by the processes as follows: (a) etching TSV with deep reactive ion etching (DRIE), (b) sputtering a layer of Ti/Cu as the seed layer, (c) TSV copper plating technology, and (d) corroding the silicon to obtain the final specimen. The micro compression test is done with a micro-compression system, consisting of a three-dimensional adjustable stage, a microscope, a force sensor, and a piezoelectric motor. The experimental results show that the platform can test TSV copper pillar’s stress, the accuracy is reached mN. The yield strength of TSV copper pillar is about 199.89 MPa.
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Meng, Rui Li, Hong Qun Zhang, and Heng Liu. "Tolerance Analysis of Comb-Driving Double Ended Tuning Fork Resonator Fabricated by DRIE Technology." Key Engineering Materials 609-610 (April 2014): 1375–80. http://dx.doi.org/10.4028/www.scientific.net/kem.609-610.1375.
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Deep reactive ion etching (DRIE) process is specially invented for bulk micromachining fabrication with the objective of realizing high aspect ratio microstructures. However, various tolerances, such as slanted etched profile, uneven deep beams and undercut, cannot be avoided during the fabrication process. In this paper, the slanted etched profile fabrication tolerance with its effect on the performances of lateral comb-driving resonator, in terms of electrostatic force, mechanical stiffness, and resonance frequency, are discussed. It shows that comb finger with positive slope generates larger electrostatic force. The mechanical stiffness along lateral direction increases when the suspended beam slants negatively. The resonance frequency is 1.116 times larger if the comb finger and beam are tapered to -20and + 20, respectively. These analytical results can be used to compensate the fabrication tolerances at design stage and allow the resonator to provide more predictable performance.
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Li, Yi, Xiao Song Du, Yang Wang, et al. "MEMS-Based Gas Chromatography Column for the Analysis of Chemical Warfare Agent (CWA) Simulates." Applied Mechanics and Materials 475-476 (December 2013): 1294–98. http://dx.doi.org/10.4028/www.scientific.net/amm.475-476.1294.
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In this report the gas chromatography column was fabricated base on micro electro mechanical system (MEMS) technology. It tries to find an equilibrium point which can fast detect CWA stimulants with efficient column separation. Under deep reactive-ion etching (DRIE) process, a 1m length, 90 um thickness and 300 um height which form 3:1high-aspect-ratio, MEMS-based silicon GC column was fabricated. The GC column was coated with 95%Methyl 5% Phenyl Polysilozane (DB-5) as the stationary phase. Dimethyl methyl phosphonate (DMMP), Triethyl phosphate (TEP) and Methy salicylate were used for CWA simulations. All of these three samples can be separated less than 90s with reasonable column efficiency.
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Allani, Sonja, Andreas Jupe, Martin Figge, Andreas Goehlich, and Holger Vogt. "Fabrication and electrochemical characterization of ruthenium nanoelectrodes." Current Directions in Biomedical Engineering 3, no. 2 (2017): 393–96. http://dx.doi.org/10.1515/cdbme-2017-0082.
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AbstractThe Fraunhofer IMS has recently developed a technique for producing nanoelectrodes that are generated by atomic layer deposition (ALD) in a via deep reactive ion etching (DRIE) structured sacrificial layer. This method enables the fabrication of CMOS- and biocompatible nanoelectrodes with suitable ALD-materials. Improvements of the established fabrication processes and the electrochemical characterization of such electrodes are presented. In the frame of the Fraunhofer-Max-Planckcooperation project ZellMOS different types of nanoelectrodes are studied. Their diameter is in the range of 200 nm and thereby sufficiently small to be taken up by living cells. In addition, the electrodes are mechanically enforced by an oxide layer at the nanoelectrodes’ bottom.
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Rahim, Rosminazuin A., Badariah Bais, and Majlis Burhanuddin Yeop. "Double-Step Plasma Etching for SiO2 Microcantilever Release." Advanced Materials Research 254 (May 2011): 140–43. http://dx.doi.org/10.4028/www.scientific.net/amr.254.140.
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In this paper, an isotropic dry plasma etching was used to release the suspended SiO2 microcantilever from the substrate of SOI wafer. Employing the plasma dry etching technique, the frontside etching for the SiO2 microcantilever release is done using the Oxford Plasmalab System 100. To obtain the optimum condition for the microcantilever release using the plasma etcher, the etching parameters involved are 100 sccm of SF6 flow, 2000 W of capacitively coupled plasma (CCP) power, 3 W of inductively coupled plasma (ICP) power, 20°C of etching temperature and 30 mTorr chamber pressure. The optimum parameters yield lateral etch rate of about 5 μm/min and vertical etch rate of about 8 μm/min. Two etching methods have been considered in this study. The first method employs only the isotropic etching to realize the microcantilever release while the second method utilizes both the anisotropic etching and the isotropic etching. For the second method, the process starts with the anisotropic etching from the deep reactive ion etching (DRIE) system which is then followed by the isotropic etching to complete the microcantilever releasing process. The purpose of the anisotropic etching is to create an etching window for the subsequent isotropic etching process. By using double-step etching method which combines both isotropic and anisotropic plasma etching for the microcantilever release process, the releasing process of suspended microcantilever is significantly improved.
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Colombo, Fábio B., and Marcelo N. P. Carreño. "A Cellular Automata Based Multi-Process Microfabrication Simulator." Journal of Integrated Circuits and Systems 6, no. 2 (2011): 87–93. http://dx.doi.org/10.29292/jics.v6i2.343.
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We describe a 3D simulator for several fabrication techniques utilized to create MEMS. The software is based on a cellular automata model and allows the user to simulate several processes, such as anisotropic wet etching in alkaline solutions and deep reactive-ion etching (DRIE) on (100) oriented Si substrates. The simulator allows for arbitrarily shaped masking materials and several processes can be applied in sequence to the same substrate. This enables the software to simulate the fabrication of complex MEMS devices which require more than one etching step. So, we show examples of fabrication processes involving different combinations of substrate wet and plasma DRI etching. Although relatively simple automata were utilized for the simulations, the results are in excellent accordance with reported experimental results. At this moment the simulations do not consider physical parameters affecting the fabrication process, the results shown here are important from an engineering point of view for qualitative analyses. At this moment more sophisticated automata are in development to simulate other processes, like film deposition (with different degrees of anisotropy) on previously etched substrates.
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Chuang, Chieh Tang, and Rong Shun Chen. "Micro Capacitive Tactile Sensor for Contact Loads." Advanced Materials Research 33-37 (March 2008): 931–36. http://dx.doi.org/10.4028/www.scientific.net/amr.33-37.931.
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This paper presents a high sensitivity micro capacitive tactile sensor that can detect normal forces which is fabricated using deep reactive ion etching (DRIE) bulk silicon micromachining. The tactile sensor consists of a force transmission plate, a symmetric suspension system, and comb electrodes. The sensing character is based on the changes of capacitance between coplanar sense electrodes and it can reach the aim of large sensing range. High sensitivity is achieved by using the high aspect ratio comb electrodes with narrow comb gaps and large overlap areas. In this paper, the sensor structure is designed, the capacitance variation of the proposed device is analyzed, and the finite element analysis of mechanical behavior of the structures is performed.
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Gao, Xu Min, Zheng Shi, Xin Li, Shu Min He, Hong Bo Zhu, and Yong Jin Wang. "An Electromechanical Tunable Grating on Silicon-on-Insulator Platform." Key Engineering Materials 609-610 (April 2014): 1277–82. http://dx.doi.org/10.4028/www.scientific.net/kem.609-610.1277.
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We report here the design and fabrication of an electromechanical tunable grating on silicon-on-insulator (SOI) wafer. The tunable grating consists of a submicron electrostatic comb actuator and an expandable freestanding grating. Rigorous coupled-wave analysis (RCWA) method is utilized to analyze the optical responses of freestanding grating with different periods and filling factors. Obvious shift of the resonant peaks is obtained by changing the grating period and the grating filling factor. The electromechanical tunable grating is realized on the silicon device layer by a combination of electron beam (EB) lithography, deep reactive ion etching (DRIE) and wet etching. Scanning electron microscope (SEM) micrographs indicate that the grating is well fabricated. Via applying biased voltage, the force generated by the electrostatic comb actuator can modulate periods and filling factors of the freestanding grating. The electromechanical tunable grating with simple fabrication process shows bright prospects for optical telecoms and miniaturized spectrometers.
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Jia, Xiaoning, Joris Roels, Roel Baets, and Gunther Roelkens. "On-Chip Non-Dispersive Infrared CO2 Sensor Based On an Integrating Cylinder." Sensors 19, no. 19 (2019): 4260. http://dx.doi.org/10.3390/s19194260.
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In this paper, we propose a novel, miniaturized non-dispersive infrared (NDIR) CO2 sensor implemented on a silicon chip. The sensor has a simple structure, consisting of a hollow metallic cylindrical cavity along with access waveguides. A detailed analysis of the proposed sensor is presented. Simulation with 3D ray tracing shows that an integrating cylinder with 4 mm diameter gives an equivalent optical path length of 3 . 5 cm. The sensor is fabricated using Deep Reactive Ion Etching (DRIE) and wafer bonding. The fabricated sensor was evaluated by performing a CO2 concentration measurement, showing a limit of detection of ∼100 ppm. The response time of the sensor is only ∼2.8 s, due to its small footprint. The use of DRIE-based waveguide structures enables mass fabrication, as well as the potential co-integration of flip-chip integrated midIR light-emitting diodes (LEDs) and photodetectors, resulting in a compact, low-power, and low-cost NDIR CO2 sensor.
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Kouassi, Sebastien, Gael Gautier, Sebastien Desplobain, Loic Coudron, and Laurent Ventura. "Macroporous Silicon Electrochemical Etching for Gas Diffusion Layers Applications: Effect of Processing Temperature." Defect and Diffusion Forum 297-301 (April 2010): 887–92. http://dx.doi.org/10.4028/www.scientific.net/ddf.297-301.887.
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MEMS technology requires low cost techniques to permit large scale fabrication for production. Porous silicon (PS) can be used in different manner to replace standard expensive etching techniques like DRIE (Deep Reactive Ion Etching). To perform same process quality as the latter, one need to understand how different parameters can influence porous silicon properties. We investigate here local formation of macroporous silicon on 2D and 3D silicon substrates. The blank substrate is a low doped (26–33 Ω cm) n type 6 inches silicon wafer. Then, an in situ phosphorus-doped polycrystalline silicon (N+ Poly-Si) is deposited on a thermal oxide layer to delimit the regions to be etched. Porous silicon is obtained afterwards using electrochemical anodization in a hydrofluoric acid (HF) solution. The effect of the temperature process on Si-HF electrochemical system voltamperometric curves, macropores morphology and electrochemical etch rates is more specifically studied. Moreover, permeation of porous substrates to hydrogen is studied after various anodization post-treatments such as KOH and HF wet etching or after a thin gold layer deposition used as current collector in micro fuel cells.
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Cheah, Kean How, and Jit Kai Chin. "DESIGN AND FABRICATION OF MICRONOZZLES." IIUM Engineering Journal 12, no. 1 (2011): 51–62. http://dx.doi.org/10.31436/iiumej.v12i1.65.
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Micronozzle, a key component in micropropulsion system, has been designed and fabricated. Quasi 1D inviscid theory was used in designing a series of conical micronozzles of different expander half-angles (10°-50°). Aerospike micronozzle, a promising candidate to achieve high performance propulsion system, was designed with Angelino method (or Approximate method). Both micronozzles were fabricated using soft lithography, an inexpensive and relatively simple technique comparing to well-established deep reactive ion etching (DRIE) technique, with polydimethylsiloxane (PDMS) as structural material. Micronozzles with two different nozzle throat width, 53.5µm and 107µm, were fabricated for comparison. Microscopic inspections reveal 107µm is the more producible nozzle throat width with current equipments. The PDMS-based micronozzle can be used as cold gas microthruster system for micro- and nanosatellites.
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Kuo-Shen Chen, A. A. Ayon, Xin Zhang, and S. M. Spearing. "Effect of process parameters on the surface morphology and mechanical performance of silicon structures after deep reactive ion etching (DRIE)." Journal of Microelectromechanical Systems 11, no. 3 (2002): 264–75. http://dx.doi.org/10.1109/jmems.2002.1007405.
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Fekete, Z., P. Fürjes, T. Kárpáti, G. A. B. Gál, and I. Rajta. "MEMS-Compatible Hard Coating Technique of Moveable 3D Silicon Microstructures." Materials Science Forum 659 (September 2010): 147–52. http://dx.doi.org/10.4028/www.scientific.net/msf.659.147.
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Mechanical degradation of mobile silicon components of complex MEMS reduces device reliability and operation time. Although the considerable wear of the surface micromachined poly-crystalline elements can be decreased by substitution of crystalline-silicon-based equivalent, there is still room for further improvement in device durability. The demonstration device is the recently presented 3D crystalline silicon micro-turbine formed by the combination of proton beam writing (PBW) and subsequent selective porous silicon (PorSi) etching. Similarly to the DRIE (deep reactive ion etching) process the novel technique is capable to provide elements of vertical walls of high aspect ratio. The 3D silicon components were uniformly covered with LPCVD Si3N4 protective layer. The Si3N4 coating improves the chemical and mechanical properties; strength, hardness and chemical resistance. The elaborated processing technology can easily be adapted for deposition of protective materials of superior properties, e.g. TiN and DLC (diamond like carbon). Present work describes alternative hard coating technique integrated in the MEMS processing sequence. The feasibility of the proposed technique is demonstrated by preliminary qualitative wear tests.
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Cao, Huiliang, Yu Liu, Zhiwei Kou, et al. "Design, Fabrication and Experiment of Double U-Beam MEMS Vibration Ring Gyroscope." Micromachines 10, no. 3 (2019): 186. http://dx.doi.org/10.3390/mi10030186.
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This study presents a new microelectromechanical system, a vibration ring gyroscope with a double U-beam (DUVRG), which was designed using a combination of mathematical analysis and the finite element method. First, a ring vibration resonator with eight double U-beam structures was developed, and 24 capacitive electrodes were designed for drive and sense according to the advantageous characteristics of a thin-shell vibrating gyroscope. Then, based on the elastic mechanics and thin-shell theory, a mathematical stiffness model of the double U-beam was established. The maximum mode resonant frequency error calculated by the DUVRG stiffness model, finite element analysis (FEA) and experiments was 0.04%. DUVRG structures were manufactured by an efficient fabrication process using silicon-on-glass (SOG) and deep reactive ion etching (DRIE), and the FEA value and theoretical calculation had differences of 5.33% and 5.36% with the measured resonant frequency value, respectively. Finally, the static and dynamic performance of the fabricated DUVRG was tested, and the bias instability and angular random walk were less than 8.86 (°)/h and 0.776 (°)/√h, respectively.
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Liu, Shuang, Jiang Hu, Yong Zhang, et al. "Sub-Millimeter-Wave 10 dB Directional Coupler Based on Micromachining Technique." International Journal of Antennas and Propagation 2015 (2015): 1–8. http://dx.doi.org/10.1155/2015/940212.
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A waveguide 10 dB directional coupler operating from 325 GHz to 400 GHz is designed based on the short-slot Riblet-type coupling configuration and fabricated using the deep reactive ion etching (DRIE) silicon micromachining technique. The skin depth and the conductivity of the gold film with the roughness of 0.2 μm are investigated at 300~1000 GHz frequency band for the higher accuracy. In order to measure the small-size four-port coupler using the two-port VNA with big-size flanges, three testing topologies are designed, in which the terahertz (THz) wedged-type absorbing material terminals are adopted as the waveguide matching loads. The measured average insertion loss is 0.5 dB after deducting the intrinsic loss and the measured average isolation is better than 25 dB, which are in good agreement with simulations. The analysis and the design are verified to be accurate and valuable for the high-performance sub-millimeter-wave waveguide components.
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Li, J.-B., K. Jiang, and G. J. Davies. "Novel die-sinking micro-electro discharge machining process using microelectromechanical systems technology." Proceedings of the Institution of Mechanical Engineers, Part C: Journal of Mechanical Engineering Science 220, no. 9 (2006): 1481–87. http://dx.doi.org/10.1243/09544062jmes323ft.
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A novel die-sinking micro-electro discharge machining (EDM) process is presented for volume fabrication of metallic microcomponents. In the process, a high-precision silicon electrode is fabricated using deep reactive ion etching (DRIE) process of microelectromechanical systems (MEMS) technology and then coated with a thin layer of copper to increase the conductivity. The metalized Si electrode is used in the EDM process to manufacture metallic microcomponents by imprinting the electrode onto a flat metallic surface. The two main advantages of this process are that it enables the fabrication of metallic microdevices and reduces manufacturing cost and time. The development of the new EDM process is described. A silicon component was produced using the Surface Technology Systems plasma etcher and the DRIE process. Such components can be manufactured with a precision in nanometres. The minimum feature of the component is 50 μm. In the experiments, the Si component was coated with copper and then used as the electrode on an EDM machine of 1 μm resolution. In the manufacturing process, 130 V and 0.2 A currents were used for a period of 5 min. The SEM images of the resulting device show clear etched areas, and the electric discharge wave chart indicates a good fabrication condition. The experimental results have been analysed and the new micro-EDM process is found to be able to fabricate 25 μm features.
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Liu, Hui Liang, Chen Xu Zhao, Ling Li, and Ze Wen Liu. "Micromachined W-Band Waveguide Duplexer Design Based on MEMS Technology." Key Engineering Materials 562-565 (July 2013): 1098–102. http://dx.doi.org/10.4028/www.scientific.net/kem.562-565.1098.
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This paper presents a novel high performance W-band MEMS duplexer for digital signal transceiver applications. The design of duplexer filters follows the insertion loss method with a Chebyshev polynomial to meet the desired spectral responses. The insertion loss and return loss of the optimized duplexer are -0.3dB and -18dB respectively, while the isolation between two pass bands is -55dB. A micro-fabrication process is designed based on MEMS technology. The deep reactive ion etching (DRIE) is used for high-aspect-ratio filter cavity mold structure. Micro-electroforming, plastic embossing, and electroplating techniques are used for low-cost and high-precision mass production program for the duplexer. Fabrication error tolerance is analyzed and it is reasonable to control the shift of frequency and return loss in the range of 0.05GHz and 2dB respectively with the designed fabrication process based on MEMS technology. It proves that the proposed micromachining fabrication technique is suitable for high performance W-band waveguide filter and duplexer design in terms of stability of RF performance.
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Spadaccini, C. M., A. Mehra, J. Lee, X. Zhang, S. Lukachko, and I. A. Waitz. "High Power Density Silicon Combustion Systems for Micro Gas Turbine Engines." Journal of Engineering for Gas Turbines and Power 125, no. 3 (2003): 709–19. http://dx.doi.org/10.1115/1.1586312.
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As part of an effort to develop a microscale gas turbine engine for power generation and micropropulsion applications, this paper presents the design, fabrication, experimental testing, and modeling of the combustion system. Two radial inflow combustor designs were examined; a single-zone arrangement and a primary and dilution-zone configuration. Both combustors were micromachined from silicon using deep reactive ion etching (DRIE) and aligned fusion wafer bonding. Hydrogen-air and hydrocarbon-air combustion were stabilized in both devices, each with chamber volumes of 191mm3. Exit gas temperatures as high as 1800 K and power densities in excess of 1100MW/m3 were achieved. For the same equivalence ratio and overall efficiency, the dual-zone combustor reached power densities nearly double that of the single-zone design. Because diagnostics in microscale devices are often highly intrusive, numerical simulations were used to gain insight into the fluid and combustion physics. Unlike large-scale combustors, the performance of the microcombustors was found to be more severely limited by heat transfer and chemical kinetics constraints. Important design trades are identified and recommendations for microcombustor design are presented.
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Cetintepe, Cagri, Ebru Sagiroglu Topalli, Simsek Demir, Ozlem Aydin Civi, and Tayfun Akin. "A fabrication process based on structural layer formation using Au–Au thermocompression bonding for RF MEMS capacitive switches and their performance." International Journal of Microwave and Wireless Technologies 6, no. 5 (2014): 473–80. http://dx.doi.org/10.1017/s1759078714000968.
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This paper presents a radio frequency micro-electro-mechanical-systems (RF MEMS) fabrication process based on a stacked structural layer and Au–Au thermocompression bonding, and reports on the performance of a sample RF MEMS switch design implemented with this process. The structural layer consists of 0.1 µm SiO2/0.2 µm SixNy/1 µm Cr–Au layers with a tensile stress less than 50 MPa deposited on a silicon handle wafer. The stacked layer is bonded to a base wafer where the transmission lines and the isolation dielectric of the capacitive switch are patterned. The process flow does not include a sacrificial layer; a recess etched in the base wafer provides the air gap instead. The switches are released by thinning and complete etching of the silicon handle wafer by deep reactive ion etching (DRIE) and tetramethylammonium hydroxide (TMAH) solution, respectively. Millimeter-wave measurements of the fabricated RF MEMS switches demonstrate satisfactory up-state performance with the worst-case return and insertion losses of 13.7 and 0.38 dB, respectively; but the limited isolation at the down-state indicates a systematic problem with these first-generation devices. Optical profile inspections and retrospective electromechanical analyses not only confirm those measurement results; but also identify the problem as the curling of the MEMS bridges along their width, which can be alleviated in the later fabrication runs through proper mechanical design.
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Lu, Zhang, Yan, et al. "Resonant Pressure Micro Sensors Based on Dual Double Ended Tuning Fork Resonators." Micromachines 10, no. 9 (2019): 560. http://dx.doi.org/10.3390/mi10090560.
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This paper presents resonant pressure micro sensors based on dual double ended tuning fork (DETF) resonators, which are electrostatically excited and piezoresistively detected. In operation, the barometric pressure under measurement bends the pressure sensitive diaphragm functioning as the anchor of DETF resonators and therefore produces eigenfrequency shifts of the resonators. Theoretical analyses and finite element analyses (FEA) were conducted to optimize the key geometries of the DETF resonators with enhanced signal to noise ratios (SNRs). In fabrications, key steps including deep reactive ion etching (DRIE) and anodic bonding were used, where sleeve holes were adopted to form electrical connections, leading to high-efficiency structure layout. Experimental results indicate that the presented micro sensors produced SNRs of 63.70 ± 3.46 dB in the open-loop characterizations and differential sensitivities of 101.3 ± 1.2 Hz/kPa, in the closed-loop characterizations. In addition, pressure cycling tests with a pressure range of 5 to 155 kPa were conducted, revealing that the developed micro sensors demonstrated pressure shifts of 83 ± 2 ppm, pressure hysteresis of 67 ± 3 ppm, and repeatability errors of 39 ± 2 ppm. Thus, the developed resonant pressure micro sensors may potentially function as an enabling tool for barometric pressure measurements.
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Droumpali, Ariadni, Jörg Hübner, Lone Gram, and Rafael Taboryski. "Fabrication of Microstructured Surface Topologies for the Promotion of Marine Bacteria Biofilm." Micromachines 12, no. 8 (2021): 926. http://dx.doi.org/10.3390/mi12080926.
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Several marine bacteria of the Roseobacter group can inhibit other microorganisms and are especially antagonistic when growing in biofilms. This aptitude to naturally compete with other bacteria can reduce the need for antibiotics in large-scale aquaculture units, provided that their culture can be promoted and controlled. Micropatterned surfaces may facilitate and promote the biofilm formation of species from the Roseobacter group, due to the increased contact between the cells and the surface material. Our research goal is to fabricate biofilm-optimal micropatterned surfaces and investigate the relevant length scales for surface topographies that can promote the growth and biofilm formation of the Roseobacter group of bacteria. In a preliminary study, silicon surfaces comprising arrays of pillars and pits with different periodicities, diameters, and depths were produced by UV lithography and deep reactive ion etching (DRIE) on polished silicon wafers. The resulting surface microscale topologies were characterized via optical profilometry and scanning electron microscopy (SEM). Screening of the bacterial biofilm on the patterned surfaces was performed using green fluorescent staining (SYBR green I) and confocal laser scanning microscopy (CLSM). Our results indicate that there is a correlation between the surface morphology and the spatial organization of the bacterial biofilm.
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Pollard, Kimberly, Meng Guo, Richie Peters, et al. "Efficient TSV Resist and Residue Removal in 3DIC." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, DPC (2014): 001435–69. http://dx.doi.org/10.4071/2014dpc-wp12.
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The continuing challenge to meet the need for lighter, smaller, faster and smarter electronic systems has pushed the advancement of 2.5D and 3D technology. The ability to create and integrate through-silicon vias (TSV) into device designs in 2.5- and 3-D platforms allows a decrease in interconnection path length, which results in improved device performance and reliability in a small form factor. Mainly due to its high silicon etch rate and selectivity to mask materials, the Bosch process is often used in the TSV fabrication. In this process, the silicon via is created by the deep reactive ion etching (DRIE). DRIE is comprised of repeating a combination of steps: an etch step and a passivation step. The passivation created in the DRIE process results in a fluoropolymer residue remaining on the wafer at the end of the process. The residue must be removed to enable deposition of a defect-free barrier, which enables a defect-free seed layer and void-free plating into the via. There are numerous technical papers and presentations on the etching and filling of these vias but the process for cleaning remains under addressed. Initially, standard processes used after RIE and consisting of an ashing process to remove any remaining photoresist, followed by immersion in a solution-based post etch residue remover were adopted for post-TSV cleans. However, the fluoropolymer does not have the same chemical characteristics as typical post-RIE etch residues and the major challenge has been the difficulty to completely remove it, especially on the via sidewall, using traditional post etches residue removers. Therefore, new formulated cleaning solutions and processes are actively sought for the removal of post etch residue for TSVs. This paper will describe a robust cleaning process for one step removal of both the photoresist and sidewall polymer residues from TSVs. A combination soak and high pressure spray process using a proprietary environmentally friendly chemistry, coupled with a megasonic final rinse provides a unique solution for both polymer residue and photoresist removals on high aspect ratio vias. SEM, EDX and Auger analysis will illustrate the cleanliness levels achieved.
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Verotti, Matteo, Alvise Bagolini, Pierluigi Bellutti, and Nicola Pio Belfiore. "Design and Validation of a Single-SOI-Wafer 4-DOF Crawling Microgripper." Micromachines 10, no. 6 (2019): 376. http://dx.doi.org/10.3390/mi10060376.
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This paper deals with the manipulation of micro-objects operated by a new concept multi-hinge multi-DoF (degree of freedom) microsystem. The system is composed of a planar 3-DoF microstage and of a set of one-DoF microgrippers, and it is arranged is such a way as to allow any microgripper to crawl over the stage. As a result, the optimal configuration to grasp the micro-object can be reached. Classical algorithms of kinematic analysis have been used to study the rigid-body model of the mobile platform. Then, the rigid-body replacement method has been implemented to design the corresponding compliant mechanism, whose geometry can be transferred onto the etch mask. Deep-reactive ion etching (DRIE) is suggested to fabricate the whole system. The main contributions of this investigation consist of (i) the achievement of a relative motion between the supporting platform and the microgrippers, and of (ii) the design of a process flow for the simultaneous fabrication of the stage and the microgrippers, starting from a single silicon-on-insulator (SOI) wafer. Functionality is validated via theoretical simulation and finite element analysis, whereas fabrication feasibility is granted by preliminary tests performed on some parts of the microsystem.
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Xiang, Chao, Yulan Lu, Chao Cheng, Junbo Wang, Deyong Chen, and Jian Chen. "A Resonant Pressure Microsensor with a Wide Pressure Measurement Range." Micromachines 12, no. 4 (2021): 382. http://dx.doi.org/10.3390/mi12040382.
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This paper presents a resonant pressure microsensor with a wide range of pressure measurements. The developed microsensor is mainly composed of a silicon-on-insulator (SOI) wafer to form pressure-sensing elements, and a silicon-on-glass (SOG) cap to form vacuum encapsulation. To realize a wide range of pressure measurements, silicon islands were deployed on the device layer of the SOI wafer to enhance equivalent stiffness and structural stability of the pressure-sensitive diaphragm. Moreover, a cylindrical vacuum cavity was deployed on the SOG cap with the purpose to decrease the stresses generated during the silicon-to-glass contact during pressure measurements. The fabrication processes mainly contained photolithography, deep reactive ion etching (DRIE), chemical mechanical planarization (CMP) and anodic bonding. According to the characterization experiments, the quality factors of the resonators were higher than 15,000 with pressure sensitivities of 0.51 Hz/kPa (resonator I), −1.75 Hz/kPa (resonator II) and temperature coefficients of frequency of 1.92 Hz/°C (resonator I), 1.98 Hz/°C (resonator II). Following temperature compensation, the fitting error of the microsensor was within the range of 0.006% FS and the measurement accuracy was as high as 0.017% FS in the pressure range of 200 ~ 7000 kPa and the temperature range of −40 °C to 80 °C.
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Roozeboom, F., M. Smets, B. Kniknie, et al. "Alternative technology concepts for low-cost and high-speed 2D and 3D interconnect manufacturing." International Symposium on Microelectronics 2013, no. 1 (2013): 000001–6. http://dx.doi.org/10.4071/isom-2013-ta11.
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The current industrial process of choice for Deep Reactive Ion Etching (DRIE) of 3D features, e.g. Through-Silicon Vias (TSVs), Microelectromechanical Systems (MEMS), etc., is the Bosch process, which uses alternative SF6 etch cycles and C4F8-based sidewall passivation cycles in a time-sequenced mode. An alternative, potentially faster and more accurate process is to have wafers pass under spatially-divided reaction zones, which are individually separated by so-called N2-gas bearings ‘curtains’ of heights down to 10–20 μm. In addition, the feature sidewalls can be protected by replacing the C4F8-based sidewall passivation cycles by cycles forming chemisorbed and highly uniform passivation layers of Al2O3 or SiO2 deposited by Atomic Layer Deposition (ALD), also in a spatially-divided mode. ALD is performed either in thermal mode, or plasma-assisted mode in order to achieve near room-temperature processing. For metal filling of 3D-etched TSVs, or for deposition of 2D metal conductor lines one can use Laser-Induced Forward Transfer (LIFT) of metals. LIFT is a maskless, ‘solvent’-free deposition method, utilizing different types of pulsed lasers to deposit thin material (e.g. Cu, Au, Al, Cr) layers with μm-range resolution from a transparent carrier (ribbon) onto a close-by acceptor substrate. It is a dry, single-step, room temperature process in air, suitable for different types of interconnect fabrication, e.g. TSV filling and redistribution layers (RDL), without the use of wet chemistry.
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SONG, WOOJIN, KYUBONG JUNG, DOO-MAN CHUN, SUNG-HOON AHN, and CAROLINE SUNYONG LEE. "DEPOSITION OF Al2O3 POWDERS USING NANO-PARTICLE DEPOSITION SYSTEM." Surface Review and Letters 17, no. 02 (2010): 189–93. http://dx.doi.org/10.1142/s0218625x10013710.
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In this paper, alumina film was deposited using supersonic micronozzle in nano-particle deposition System (NPDS). Powder deposition at room temperature is important in the field of film deposition since high processing temperature can be a serious limitation for the deposition on flexible substrate. Previously, many studies have been reported on particle deposition, such as aerosol deposition method (ADM) or cold spray method. However, these deposition methods cannot be applied to various types of powders. Recently, NPDS using aluminum nozzle was designed to resolve these problems but it cannot deposit precise patterns less than 1 mm. In this study, alumina particles were deposited using Silicon-based micronozzle in NPDS. Three-dimensional silicon micronozzle was fabricated using semiconductor processing method, specifically deep reactive ion etching (DRIE) method. The silicon micronozzle fabricated by Bosch process is advantageous over the conventionally used nozzle, since the hardness of silicon is higher than that of aluminum and the lifetime can be increased. In this study, alumina nano-particles were accelerated to supersonic level at the neck of micronozzle and deposited on the substrate in a low vacuum condition. The film characteristics were evaluated using field-emission scanning electronic microscope (FE-SEM) and alpha step to measure its thickness of the deposited layer. The deposition result showed that alumina powders were successfully deposited using the fabricated micronozzle by means of NPDS.
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Bonciani, Giovanni, Gaetano Biancucci, Simona Fioravanti, Vagif Valiyev, and Antonello Binni. "Learning Micromanipulation, Part 2: Term Projects in Practice." Actuators 7, no. 3 (2018): 56. http://dx.doi.org/10.3390/act7030056.
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This paper describes the activities that have been necessary to design, fabricate, control and test some low-cost test stands independently developed by the students enrolled in the course of Micro-Nano sensors and actuators for the postgraduate course in Industrial Nanotechnologies Engineering of the University of Rome La Sapienza. The construction and use of these test stands are an essential part of teaching and learning methods whose theoretical bases have been presented in the companion paper (Part 1). Each test stand is composed of a compliant structure and a control system, which consists of a programmable control micro-card equipped with sensors and actuators. The compliant structure consists of a compliant mechanism whose geometry is achieved by scaling some previously developed silicon micromanipuators and microactuators up to the macroscale by a factor of 20. This macroscale model offered a kinesthetic tool to improve the understanding of the original microsystems and their working principles. The original silicon micromechanisms have been previously presented in the literature by the research group after design and deep reactive-ion etching (DRIE) microfabrication. Scaling from micro to macro size was quite easy because the original DRIE masks were bestowed to the students in the form of CAD files. The samples at the macroscale have been fabricated by means of recently available low-cost 3D printers after some necessary modifications of the mask geometry. The purpose of the whole work (Parts 1 and 2) was the improvement of the efficiency of an educational process in the field of microsystem science. By combining the two companion papers, concerning, respectively, the theoretical basis of the teaching methods and the students’ achievements, it is possible to conclude that, in a given class, there may be some preferred activities that are more efficient than others in terms of advancements and satisfaction.
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Du, Li Qun, Ao An Wang, Ming Zhao, and Man Cang Song. "The Fabrication of Trans-Scale Micro-Fuze Safety Device." Key Engineering Materials 609-610 (April 2014): 796–800. http://dx.doi.org/10.4028/www.scientific.net/kem.609-610.796.
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Fuze Micro-Electro-Mechanical System (MEMS) has become a popular subject in recent years. Studies have been done for the application of MEMS-based fuze safety and arm devices. The existing researches mainly focused on reducing the cost and volume of the fuze safety device. The reduction in volume allows more payloads and, thus, makes small-caliber rounds more effective and the weapon system more affordable. At present, MEMS-based fuze safety devices are fabricated mainly by using deep reactive ion etching (DRIE) or LIGA technology, and the fabrication process research on the fuze MEMS safety device is in the exploring stage. In this paper, a new trans-scale fabrication method of metal-based fuze MEMS safety device is presented based on UV-LIGA technology and the micro Wire-cut Electrical Discharge Machining (WEDM). The method consists of fabrication of micro-spring by UV-LIGA technology, the fabrication of mesoscale structure by WEDM, the micro assembly of micro spring and mesoscale structure. Because UV-LIGA technology and WEDM technology were introduced, the production cycle was shortened and the cost was reduced. The overall dimension of the micro-fuse safety device is 9.5×12.3×0.6 mm and the smallest dimension is 10μm. Besides, four problems in the fabrication process have been solved effectively, which is helpful for the fabrication of similar kinds of micro devices. The fabrication method presented in this paper provides a new option for the development of MEMS fuze.
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Yu, Faxin, Qi Zhou, Zhiyu Wang, Jiongjiong Mo, and Hua Chen. "Design and Implementation of RF Front-End Module Based on 3D Heterogenous-Integrated Wafer-Level Packaging." Electronics 10, no. 16 (2021): 1893. http://dx.doi.org/10.3390/electronics10161893.
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In this paper, a three-dimensional heterogenous-integrated (3DHI) wafer-level packaging (WLP) process is proposed, and a radio frequency (RF) front-end module with two independent ultra-high frequency (UHF) receiving channels are designed and implemented, which covers 400 MHz–600 MHz and 2050 MHz–2200 MHz respectively for unmanned aerial vehicle (UAV) applications. The module is formed by wafer-to-wafer (W2W) bonding of two high-resistivity silicon (HR-Si) interposers with embedded bare dies and through silicon via (TSV) interconnections. Double-sided deep reactive ion etching (DRIE) and conformal electroplating process are introduced to realize the high-aspect-ratio TSV connection within 290 µm-thick cap interposer. Co-plane waveguide (CPW) transmission lines are fabricated as the process control monitor (PCM), the measured insertion loss of which is less than 0.18 dB/mm at 35 GHz. The designed RF front-end module is fabricated and measured. The measured return loss and gain of each RF channel is better than 13 dB and 21 dB, and the noise figure is less than 1.5 dB. In order to evaluate the capability of the 3DHI process for multi-layer interposers, the module is re-designed and fabricated with four stacked high-resistivity silicon interposers. After W2W bonding of two pairs of interposers and wafer slicing, chip-to chip (C2C) bonding is applied to form a four-layer module with operable temperature gradient.
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Zhang, Dingyou, Sarasvathi Thangaraju, Daniel Smith, et al. "A New Type of TSV Defect Caused by BMD in Silicon Substrate." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, DPC (2014): 001506–22. http://dx.doi.org/10.4071/2014dpc-wp14.
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This paper reports on a new type of through-silicon via (TSV) defect, silicon fin defect, which was found after TSV deep-reactive-ion-etching (DRIE) process for TSV integration with front-end-of-line (FEOL) devices. One possible root cause for this defect is that the bulk micro defect (BMD) in silicon substrate serves as a micro-mask during etching and results in silicon fin defects at TSV bottom. These defects have to be eliminated as they are killer TSV defects for several reasons: (1) could serve as a weak point for isolation liner deposition; (2) could be a weak point for barrier/seed layer deposition; and (3) may cause mechanical failures during TSV backside reveal. Previously, silicon fin defects were removed by switching to a non-BMD silicon substrate for interposer application. However, for TSV integration with FEOL devices, the BMD layer serves as an intrinsic gettering layer for devices, therefore, it cannot be removed from the silicon substrate, which makes it challenging to get rid of silicon fin defects. In order to establish a non-destructive in-line detection method of the fin defects, scanning electron microscope (SEM) automatic process inspection (API) was set up to image the fin defects at the bottom of the trench. A special working point with high depth of focus (DoF) and contrast was created to obtain good top-down SEM imaging of the defects at the bottom of this high-aspect-ratio (HAR) structure. Three types of silicon substrates (A, B, and C) were used for this study to investigate the potential root cause. SEM API results show defect rates of 20%, 3.3% and 0% for substrates A, B, and C, respectively. This is in good agreement with both BMD simulation results and benchmarking data in which substrates A, B, and C had normalized BMD densities of 11.7, 5.74, and 1 cm-3, respectively, with a comparable BMD size of 80~90 nm and a denuded zone (DNZ) depth of 10~15 μm. The correlation between BMD density in a silicon substrate and silicon fin defect rate indicates that BMD is a key root cause for silicon fin defects. To eliminate silicon fin defects, an optimized DRIE process has been developed. On the same type of substrate, the DRIE process with a typical voltage bias results in a defect rate of 6.7%, while no silicon fin defect was detected out of 200 TSVs with a polynomial bias ramp to relatively higher final voltage bias during the last 15 μm etch. The hypothesis is that higher voltage bias is able to sputter away BMD and shows potential to get rid of the silicon fin defects at the TSV bottom. In summary, a capable inspection method, a preferred silicon substrate with BMD spec range, and a promising way for DRIE process optimization to eliminate the silicon fin defect at the TSV bottom have been identified and developed in this work. Detailed results and analysis, particularly the fin defect images, statistical inspection results, BMD benchmarking data, simulation results, and TSV profile with optimized process will be discussed in the paper.
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Rivers, Montgomery C., Alexander A. Trusov, Sergei A. Zotov, and Andrei M. Shkel. "Micro IMU Utilizing Folded MEMS Approach." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2010, DPC (2010): 001360–78. http://dx.doi.org/10.4071/2010dpc-wa23.
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In this paper, we propose a novel wafer-level approach for fabrication and 3-D integration of MEMS devices in miniature multi-axis assemblies of inertial, acoustic, and optical sensors. The approach is based on simultaneous fabrication of all sensors on the same substrate connected by flexible electrical interconnects, mechanical hinges and latches. A multi-axis sensor system is then obtained by folding the fabricated structures into 3-D cubes, pyramids, or other rigid shapes, and subsequently micro-welded. In the current work, we demonstrate feasibility of the folded cube approach for creation of miniature MEMS IMU with <1 cm3 volume. Design of the IMU consists of a folded cube or pyramid backbone structure with micromachined accelerometers and gyroscopes on its sidewalls. Silicon-on-insulator (SOI) wafers are used as a substrate for fabrication of both the inertial sensors and the folded backbone structure. Fabrication of the sensors consists of lithography, deep reactive ion etching (DRIE), and HF acid release of the inertial proof masses. Flexible polymer hinges connecting faces of the folded structures are defined on the same substrate and incorporate electrical interconnects. To provide rigidity to the assembled 3-D structure, interlocking silicon latches are fabricated along the edges of each sidewall, which are silicon-to-silicon welded after assembly. The approach allows for creating miniature multi-axis sensor systems without compromising performance of individual sensors. Gyroscopes integrated in the current folded cube IMU have experimentally demonstrated 3-dB bandwidth of 250 Hz and angle random walk (ARW) below 0.1 (deg/s)/rt-Hz in atmospheric pressure. Measured uncompensated temperature coefficients of gyroscope bias and scale factor were 313 (deg/h)/degC and 351ppm/degC, respectively. Accelerometers on the cube have been characterized, yielding a noise floor of 570μG/√Hz. Sensitivity of the accelerometers is measured at 40mV/G with a bandwidth of 100 Hz.
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Herrault, Florian, M. Yajima, M. Chen, C. McGuire, and A. Margomenos. "Silicon-Embedded RF Micro-Inductors for Ultra-Compact RF Subsystems." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2015, DPC (2015): 000939–57. http://dx.doi.org/10.4071/2015dpc-tp44.
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Advances in 2.5D and 3D integration technologies are enabling ultra-compact multi-chip modules. In this abstract, we present the design, fabrication, and experimental characterization of RF inductors microfabricated inside deep silicon recesses. Because silicon is often used as a substrate of packaging material for 3D integration and microelectromechanical systems (MEMS), developing microfabrication technologies to embed passive components in the unused volume of the silicon package is a promising approach to realize ultra-compact RF subsystems. Inductors and capacitors are critical in dc-bias circuits for MMICs in order to suppress low-frequency oscillations. Because it is particularly important to have these passive components as close to the MMIC as possible with minimum interconnection parasitics, silicon-embedded passives are an attractive solution. Further, silicon-embedded passives can potentially reduce the overall volume of RF subsystems when compared to modules using discrete passives. Although inductors inside the volume of silicon wafers have previously been reported, they typically operated in the 1–200 MHz frequency range, mostly featuring inductors with wide (50–100 μm) conductors and wide (50–100 μm) interconductor gaps due to fabrication limitations. We first explored process limitations to fabricate structural and electrical features inside 75 to 100-μm-deep silicon cavities. The cavities were etched into the silicon using deep reactive ion etching. Inside these recesses, we demonstrated the fabrication of thin (0.2 μm) and thick (5 μm) gold patterns with 3 μm resolution using lift-off and electroplating processes, respectively. The lift-off process used an image reversal technique, and the plated gold conductors were fabricated through a 6.5-μm-thick photoresist mold. The feature sizes ranged from 3 to 50 μm. For photoresist exposure, an i-line Canon stepper was utilized, and configured specifically to focus at the bottom of the cavities, a key process requirement to achieve high-resolution features. These microfabrication results enabled the design of high-performance RF inductors, which will be discussed in the next section. In addition, we demonstrated the fabrication of 30-μm-deep 3-μm-diameter silicon-etched features inside these cavities, a stepping stone towards achieving high-capacitance-density integrated trench capacitors embedded inside silicon cavities. The silicon-embedded RF inductors were microfabricated on 500-μm-thick high-resistivity (ρ > 20,000 Ω.cm) silicon wafers. First, 75-μm-deep cavities were etched using DRIE. Various two-port coplanar waveguide (CPW) inductor designs were microfabricated. The inductor microfabrication relied on sputtered titanium/gold seed layers, thick AZ4620 photoresist molds, and three 5-μm-thick electroplated gold layers stacked on top of each other to define the inductor conductor and connections. By using a combination of three electroplated layers, high-power-handling low-loss inductors were fabricated. Measurements were performed on a RF probe station, with on-wafer calibration structures. The losses associated with the CPW launchers were de-embedded prior to inductor measurements, and inductor quality factor greater than 40 was measured on various inductors with inductance of approximately 1 nH, and self-resonant frequency at 30 GHz. These results were in agreement with models performed using SONNET simulation package, and are comparable with than that of inductors fabricated on planar silicon wafers.
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Zhang, Congchun, Chunsheng Yang, and Duifu Ding. "Deep reactive ion etching of PMMA." Applied Surface Science 227, no. 1-4 (2004): 139–43. http://dx.doi.org/10.1016/j.apsusc.2003.11.050.
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Woo, Bryan W. K., Shannon C. Gott, Ryan A. Peck, Dong Yan, Mathias W. Rommelfanger, and Masaru P. Rao. "Ultrahigh Resolution Titanium Deep Reactive Ion Etching." ACS Applied Materials & Interfaces 9, no. 23 (2017): 20161–68. http://dx.doi.org/10.1021/acsami.6b16518.
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Tanaka, S., K. Rajanna, T. Abe, and M. Esashi. "Deep reactive ion etching of silicon carbide." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 19, no. 6 (2001): 2173. http://dx.doi.org/10.1116/1.1418401.
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Golovanov, Anton V., Vitaly S. Bormashov, Nikolay V. Luparev, et al. "Diamond Microstructuring by Deep Anisotropic Reactive Ion Etching." physica status solidi (a) 215, no. 22 (2018): 1800273. http://dx.doi.org/10.1002/pssa.201800273.
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