Relevant bibliographies by topics / Neutral-point voltage

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  1. Journal articles
  2. Dissertations / Theses
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  4. Conference papers

Academic literature on the topic 'Neutral-point voltage'

Author: Grafiati
Published: 4 June 2021
Last updated: 6 September 2023

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Journal articles on the topic "Neutral-point voltage"

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Gong, Bo, Shanmei Cheng, and Yi Qin. "Simple three-level neutral point voltage balance control strategy based on SVPWM." Archives of Electrical Engineering 62, no. 1 (2013): 15–23. http://dx.doi.org/10.2478/aee-2013-0002.

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Abstract The unbalance of the neutral point voltage is an inherent problem of three-level neutral-point-clamped (NPC) inverter, the effect of neutral point voltage balancing which is caused by voltage vector is analyzed, and the relationship of the voltage offset and neutral point voltage is studied in this paper. This paper proposes a novel neutral point balance strategy for three-level NPC inverter based on space vector pulse width modulation (SVPWM). A voltage offset is added to the modulation wave, and a closed-loop neutral point voltage balance control system is designed. In the control system, the dwelling time of synthesis voltage vectors for SVPWM is varied to solve the problem of the unbalance of the neutral point voltage, the sequence of the voltage vectors maintains unchanging. Simulation and experimental results show the neutral point voltage balancing control strategy based on SVPWM is effective.
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Wu, Xinmi, Yu Zhang, and Jiawen Yang. "Neutral-Point Voltage Balancing Method for Three-Phase Three-Level Dual-Active-Bridge Converters." Energies 15, no. 17 (2022): 6463. http://dx.doi.org/10.3390/en15176463.

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Three-phase three-level dual-active-bridge (3L-DAB3) converters are a potential topology for high-voltage and high-power applications. Neutral-point voltage balancing is a complex and important issue for three-level (3L) circuits. Compared with the single-phase 3L dual-active-bridge converter, the self-balancing capability of the 3L-DAB3 is limited. To guarantee the reliability of the converter, a neutral-point voltage balancing method for the 3L-DAB3 is proposed in this paper. First, the neutral-point voltage balancing principle of the 3L-DAB3 is analyzed. Then, the relationship between the duty ratio adjustment and injected neutral-point charge is described. In order to guarantee accurate neutral-point voltage balance, the proposed balancing method adopts a sign-hysteresis control with a dead zone. The dead zone is responsible for whether the duty ratio adjustment is activated, and the sign-hysteresis control guarantees a correct adjustment direction. The proposed neutral-point voltage balancing method only needs to sample the capacitor voltages, thus avoiding a complex parameter design and making it easy to implement. The transmission power of the converter is not affected during the adjustment process. The proposed balancing method has a rapid response speed and does not have problems with respect to stability. Finally, experiments were conducted on a 3.6 kW laboratory prototype. The validity and performance of the proposed neutral-point voltage balancing method were verified on the basis of the simulation and experimental results.
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Chen, Guo, Chunyang Gong, Jun Bao, Lihua Zhu, and Zhixin Wang. "Compensation-Voltage-Injection-Based Neutral-Point Voltage Fluctuation Suppression Method for NPC Converters." Energies 16, no. 11 (2023): 4409. http://dx.doi.org/10.3390/en16114409.

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Three-level neutral-point clamped (NPC) inverters are widely used in the new energy power generation, motor drive, and many other occasions. However, the neutral-point voltage imbalance of an NPC inverter will affect the output of the inverter system, and the control of the neutral point voltage has become a popular research topic. In this paper, a compensation-voltage-injection-based neutral-point voltage balancing method is proposed. During the switching cycle, the average value model of the neutral-point current under different voltage vectors is applied to calculate the value of the compensation voltage that needs to be injected. The self-balance of the neutral-point voltage based on a switching cycle is realized, and the influence of modulation ratio and power factor on equalization ability is discussed. A MATLAB/Simulink simulation model and a small power prototype are established to verify the effectiveness of the method, and the simulation and experimental results show that the proposed method can effectively suppress the neutral-point voltage fluctuation in a wide range of modulation ratios and power factors.
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Guo, Yujing, and Junhuai Zhang. "Modulation Technique Design of An Improved Zero Common Mode Voltage (CMV)." Journal of Physics: Conference Series 2563, no. 1 (2023): 012020. http://dx.doi.org/10.1088/1742-6596/2563/1/012020.

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Abstract Voltage imbalance of neutral-point and CMV are hot issues in the research of three-level inverters. This paper first introduces the three-level topology of the neutral-point clamped (NPC) inverter. Aiming to eliminate CMV of three-level NPC and balance the voltage of the neutral point simultaneously, a virtual space vector pulse modulation (VSVPWM) strategy is proposed. Virtual voltage vectors of this strategy are composed of 3 medium vectors. The voltage of the neutral point is balanced since the average current of the neutral point is 0. Therefore, the balance index is introduced to redefine virtual voltage vectors, so the voltage of the neutral point can recover quickly when the capacitors’ voltage of the dc-link is imbalanced.
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Zhang, Maosong, Ying Cui, Qunjing Wang, et al. "A Study on Neutral-Point Potential in Three-Level NPC Converters." Energies 12, no. 17 (2019): 3367. http://dx.doi.org/10.3390/en12173367.

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This paper proposes an accurate mathematical model of three-level neutral-point-clamped (NPC) converters that can accurately represent the midpoint potential drift of the DC link with parameter perturbation. The mathematical relationships between the fluctuation in neutral-point voltage, the parametric perturbation, and the capacitance error are obtained as mathematical expressions in this model. The expressions can be used to quantitatively analyze the reason for the neutral-point voltage imbalance and balancing effect based on a zero-sequence voltage injection. The injected zero-sequence voltage, which can be used to balance the DC-side voltages with the combined action of active current, can be easily obtained from the proposed model. A balancing control under four-quadrant operation modes is proposed by considering the active current to verify the effectiveness of this model. Both the simulation and experiment results validate the excellent performance of the proposed model compared to the conventional model.
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Wu, Ming, Zhenhao Song, Zhipeng Lv, Kai Zhou, and Qi Cui. "A Method for the Simultaneous Suppression of DC Capacitor Fluctuations and Common-Mode Voltage in a Five-Level NPC/H Bridge Inverter." Energies 12, no. 5 (2019): 779. http://dx.doi.org/10.3390/en12050779.

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To suppress the direct current (DC) capacitor voltage fluctuations and the common-mode voltage (CMV) in a three-phase, five-level, neutral-point-clamped (NPC)/H-bridge inverter, this paper analyzes the influence of all voltage vectors on the neutral point potential of each phase under different pulse mappings in detail with an explanation of the CMV distribution. Then, based on the traditional space vector pulse width modulation (SVPWM) algorithm, a dual-pulse-mapping algorithm is proposed to suppress the DC capacitor fluctuations and the CMV simultaneously. In the algorithm, the reference voltage synthesis selects the voltage vector that has the smallest CMV value as the priority. In addition, the two kinds of pulse mappings that have opposite effects on the neutral point potential are switched to output. At the same time, regulating factors are introduced to adjust the working time of each voltage vector under the two pulse mappings; then, the capacitor voltages can be balanced. Both the simulation and experiment demonstrate the algorithm’s effectiveness.
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Celanovic, N., and D. Boroyevich. "A comprehensive study of neutral-point voltage balancing problem in three-level neutral-point-clamped voltage source PWM inverters." IEEE Transactions on Power Electronics 15, no. 2 (2000): 242–49. http://dx.doi.org/10.1109/63.838096.

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Liu, Yan, Xu Wang, and Yan Xing. "Research on SVPWM Method and its Neutral Point Potential Control." Advanced Engineering Forum 2-3 (December 2011): 39–42. http://dx.doi.org/10.4028/www.scientific.net/aef.2-3.39.

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Neutral-point potential unbalance is an inherent problem of Neutral-point-clamped three-level PWM rectifiers. If the problem of neutral point can’t be controlled appropriately, the harm of input current will increase, and even the dc-link capacitor and switches will be destroyed. Thus domestic and foreign experts have done lots of research on the balance control of Neutral-point-clamed and put forward many effective control methods. This paper proposes a novel SVPWM strategy for the three-level neutral-point-clamped voltage source inverter, based on the particular disposition of all the redundant voltage vectors. The new modulation approach shows superior performance for the harmonic voltage and the control of neutral-point potential compared to the popular eight-stage centered SVPWM and realizes the balancing control of inverter neutral-point potential by modifying redundant small vectors pairs’ distribution factor accurately, only requiring the information of dc-link capacitor voltages and three-phase load currents, which is convenient to apply and is compatible of digital computer realization. The feasibility of the proposed control approach has been verified via simulation and experiment results. In the strategy of software control, domestic and foreign scholars propose numerous neutral point potential control schemes. When carrier modulation is used, the balance control is achieved by injecting zero-sequence component into the three-phase modulated wave. When space vector modulation methods are adopted, they can be divided into three categories: passive control, hysteresis control and active control. there is also a new algorithm based on the intrinsic relationship between SVPWMs for two—level inverters and three．1evel inverters．a novel SVPWM control algorithm is proposed for three．1evel．The dwell time of voltage vector for three-level inverter can be acquired from counterpart for two-level inverter by using a linear transformation．Aiming to analysis the output PWM sequence of three-level inverter, a novel classification standard of voltage vector is proposed．Based on evaluating the PWM sequences, a novel PWM sequence is given，that can reduce the total harmonics distortion of inverter output.
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Barros, J. Dionísio, Luis Rocha, and J. Fernando Silva. "Backstepping Predictive Control of Hybrid Microgrids Interconnected by Neutral Point Clamped Converters." Electronics 10, no. 10 (2021): 1210. http://dx.doi.org/10.3390/electronics10101210.

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In this work, DC and AC parts of hybrid microgrids are interconnected by a neutral point clamped—NPC converter controlled using a new backstepping predictive (BP) method. The NPC converter is controlled to operate in the DC microgrid voltage control mode or in the AC microgrid power control mode. The novel backstepping predictive controller is designed using the dq state space dynamic model of the NPC converter connected to the hybrid microgrid. The designed BP controller regulates the DC voltage or AC injected power, balances the capacitor voltages, controls the AC currents, and enforces the near unity power factor. Simulation (MATLAB/Simulink) and experimental (laboratory prototype) results show that the converter can regulate the DC voltage in the DC microgrid interconnection point, by adjusting the AC power conversion to compensate variations on the loads or on the distributed renewable energy sources in the DC microgrid. AC currents are sinusoidal with low harmonic distortion. The obtained BP controller is faster at balancing capacitor voltages than PWM (pulse width modulation) control with carrier offset. The fast AC power response allows the converter to be used as a primary frequency regulator of the AC microgrid. This research is appropriate for power and voltage control in hybrid microgrids with renewable energy.
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Jun, Eun-Su, Minh Hoang Nguyen, and Sangshin Kwak. "Three-Phase Three-Level Neutral Point Clamped Rectifier with Predictive Control Method without Employing Weighting Factor." Applied Sciences 10, no. 15 (2020): 5149. http://dx.doi.org/10.3390/app10155149.

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A predictive control method using injected offset voltage to achieve neutral point (NP) voltage balance of three-phase three-level neutral point clamped (NP) rectifiers, without employing a weighting factor, is proposed in this study. One of the biggest problems with the three-level NP rectifiers is the dc link capacitor voltage imbalance. Therefore, it is necessary to maintain the balance of the NP voltage in addition to synthesize the three-phase sinusoidal input current by control methods. Conventional predictive control methods for the NP rectifiers have used a weighting factor in a cost function that determines the control ratio of the input currents and the capacitor voltage balance. As a result, it is burdensome to empirically redesign the weighting factor when the rectifiers’ parameter values and control conditions change. Unlike the conventional methods, the proposed approach without the weighting factor can significantly eliminate differences between two DC capacitor voltages by utilizing an offset voltage, which is generated by using the difference between the upper and lower capacitor voltages. Consequently, the proposed approach using the offset voltage injection can control the input currents and retain the balance of NP voltage. Simulation and experiments are presented to verify the correctness of the NP voltage balancing of the proposed control method.
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Dissertations / Theses on the topic "Neutral-point voltage"

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Busquets, Monge Sergio. "A novel pulsewidth modulation for the comprehensive neutral-point voltage control in the three-level three-phase neutral-point-clamped dc-ac converte." Doctoral thesis, Universitat Politècnica de Catalunya, 2006. http://hdl.handle.net/10803/6372.

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Las topologías de convertidores multinivel han recibido una atención especial durante las dos últimas décadas debido a sus notables ventajas en aplicaciones de alta potencia y media/alta tensión. En estas topologías, y comparadas con el convertidor tradicional de dos niveles, el voltaje que soporta cada dispositivo semiconductor es menor, evitando los problemas asociados con la interconexión serie de dispositivos. La distorsión armónica en la tensión de salida es también menor y la eficiencia mayor. Pero incorporan un número superior de dispositivos semiconductores y la estrategia de modulación resultante es, por tanto, más compleja.<br/>Entre estas topologías, el convertidor cc-ca de tres niveles trifásico con conexión al punto neutro del bus de cc es probablemente el más popular. La aplicación a este convertidor de técnicas de modulación convencionales causa una oscilación de la tensión del punto neutro de baja frecuencia (tres veces la frecuencia fundamental de la tensión de salida). Esta oscilación, a su vez, supone un incremento del estrés de tensión de los dispositivos y provoca la aparición de armónicos de baja frecuencia en la tensión de salida.<br/>Esta tesis presenta una nueva técnica de modulación del pulso de conducción de los dispositivos semiconductores para convertidores de tres niveles trifásicos con conexión a punto neutro, capaz de conseguir un control completo de la tensión del punto neutro con una distorsión armónica reducida en la tensión de salida alrededor de la frecuencia de conmutación. Esta nueva técnica de modulación, basada en la definición de unos vectores espaciales virtuales, garantiza el equilibrado de la tensión del punto neutro con cualquier carga (lineal o no, cualquier factor de potencia) y para todo el rango de tensión de salida, con el único requisito de que la suma de corrientes de fase sea nula.<br/>Las características de la técnica de modulación propuesta y sus beneficios con respecto a otras modulaciones se han verificado a través de simulaciones y experimentos tanto en lazo abierto como en lazo cerrado.<br>Multilevel converter topologies have received special attention during the last two decades due to their significant advantages in high-power medium- and high-voltage applications. In these topologies, and compared to the previous two-level case, the voltage across each semiconductor is reduced, avoiding the problems of the series interconnection of devices. The harmonic distortion of the output voltage is also diminished and the converter efficiency increases. But a larger number of semiconductors is needed and the modulation strategy to control them becomes more complex.<br/>Among these topologies, the three-level three-phase neutral-point-clamped voltage source inverter is probably the most popular. The application of traditional modulation techniques to this converter causes a low frequency (three times the fundamental frequency of the output voltage) oscillation of the neutral-point voltage. This, in turn, increases the voltage stress on the devices and generates low-order harmonics in the output voltage.<br/>This thesis presents a novel pulsewidth modulation for the three-level three-phase neutral-point-clamped converter, able to achieve a complete control of the neutral-point voltage while also having a low output voltage distortion at around the switching frequency. The new modulation, based on a virtual space vector concept, guarantees the balancing of the neutral-point voltage for any load (linear or nonlinear, any load power factor) over the full range of converter output voltage, the only requirement being that the addition of the output three-phase currents equals zero.<br/>The performance of this modulation approach and its benefits over other previously proposed solutions are verified through simulation and experiments in both open- and closed-loop converter configurations.
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Somogyi, Chad Alexander. "Common mode voltage mitigation strategies using PWM in neutral-point-clamped multilevel inverters." Thesis, Marquette University, 2015. http://pqdtopen.proquest.com/#viewpdf?dispub=1594317.

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<p> Over the last several decades, there has been consistent growth in the research and development of multilevel voltage-source inverter-based adjustable speed motor drives (ASDs) as a result of low cost, high reliability power semiconductors. The three-level neutral-point-clamped (NPC) ASD is a popular multilevel inverter used in low and medium voltage applications because of its ability to produce lower levels of total harmonic distortion (THD) and withstand higher voltages while preserving the rated output power compared to two-level ASDs.</p><p> As with other voltage-source inverters, three-level NPC ASDs produce common-mode voltage (CMV) that can cause motor shaft voltages, bearing currents, and excess voltage stresses on motor windings, resulting in the deterioration of motor bearings and insulation. Furthermore, the CMV and resultant currents can generate electromagnetic interference that can hinder the operation of sensitive control electronics. In this thesis, three carrier-based, three-level pulse-width-modulation (PWM) strategies were investigated to examine the levels of CMV, common-mode current, and <i>dv/dt</i> produced by the three-level NPC ASD. Additionally, the effects that each PWM strategy has on the THD in the output waveforms, as well as the total switching and conduction losses were analyzed through software simulation programs using a resistive-inductive load over a range of modulation indices. The first of the three methods, in-phase disposition sub-harmonic PWM (PD-SPWM), was verified experimentally using a laboratory-scale, 7.5 kVA three-level NPC ASD prototype.</p><p> It was determined that PD-SPWM produced the highest CMV amplitude of one-third the dc bus voltage, but the lowest values of differential-mode dv/dt, THD, and drive losses. The second strategy, phase-opposition (PO)-SPWM, reduced the CMV amplitude to one-sixth the dc bus voltage, at the cost of higher THD and drive losses and a doubling of the differential-mode dv/dt. The final strategy, zero common-mode (ZCM)-SPWM, was modified (MZCM-SPWM) to accommodate IGBT dead-time by delaying the output voltage transitions based on the polarity of the output currents and the direction of the commanded voltage transitions. The MZCM-SPWM method nearly eliminated all CMV pulses while maintaining comparable levels of THD, but produced twice the switching losses compared to PD- and PO- SPWM, and twice the differential-mode <i>dv/dt</i> compared to PD-SPWM.</p>
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Häger, Emil. "Performance Evaluation of Medium-Power Voltage Inverters." Thesis, Linköpings universitet, Elektroniska Kretsar och System, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-118568.

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Power inverters, used to convert DC power to AC, are often used in e.g. solar power applications. However, they tend to be impractically large and expensive; as such, power miniaturization is an active research area. In this thesis, several classes of modern power inverters are evaluated and compared with regards to size, efficiency and output quality in order to identify areas of potential improvement. Methods for estimation of THD, power losses and input ripple are created and verified against a simulation of a five-level neutral-point-clamped inverter with SPWM control. Finally, this design is implemented physically and is found to achieve 94.5% efficiency and 7% THD under low voltage laboratory conditions, while remaining smaller than an average textbook.
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Al, Shammeri Bashar Mohammed Flayyih. "A novel induction heating system using multilevel neutral point clamped inverter." Thesis, University of Plymouth, 2017. http://hdl.handle.net/10026.1/8305.

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This thesis investigates a novel DC/AC resonant inverter of Induction Heating (IH) system presenting a Multilevel Neutral Point Clamped (MNPCI) topology, as a new part of power supply design. The main function of the prototype is to provide a maximum and steady state power transfer from converter to the resonant load tank, by achieving zero current switching (ZCS) with selecting the best design of load tank topology, and utilizing the advantage aspects of both the Voltage Fed Inverter (VFI) and Current Fed Inverter (CFI) kinds, therefore it can considered as a hybrid-inverter (HVCFI) category . The new design benefits from series resonant inverter design through using two bulk voltage source capacitors to feed a constant voltage delivery to the MNPCI inverter with half the DC rail voltage to decrease the switching losses and mitigate the over voltage surge occurred in inverter switches during operation which may cause damage when dealing with high power systems. Besides, the design profits from the resonant load topology of parallel resonant inverter, through using the LLC resonant load tank. The design gives the advantage of having an output current gain value of about Quality Factor (Q) times the inverter current and absorbs the parasitic components. On the contrary, decreasing inverter current means decreasing the switching frequency and thus, decreasing the switching losses of the system. This aspect increases the output power, which increases the heating efficiency. In order for the proposed system to be more reliable and matches the characteristics of IH process , the prototype is modelled with a variable LLC topology instead of fixed load parameters with achieving soft switching mode of ZCS and zero voltage switching (ZVS) at all load conditions and a tiny phase shift angle between output current and voltage, which might be neglected. To achieve the goal of reducing harmonic distortion, a new harmonic control modulation is introduced, by controlling the ON switching time to obtain minimum Total Harmonic Distortion (THD) content accompanied with optimum power for heating energy.
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Rankin, Paul Edward. "Modeling and Design of a SiC Zero Common-Mode Voltage Three-Level DC/DC Converter." Thesis, Virginia Tech, 2019. http://hdl.handle.net/10919/93176.

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As wide-bandgap devices continue to experience deeper penetration in commercial applications, there are still a number of factors which make the adoption of such technologies difficult. One of the most notable issues with the application of wide-bandgap technologies is meeting existing noise requirements and regulations. Due to the faster dv/dt and di/dt of SiC devices, more noise is generated in comparison to Si IGBTs. Therefore, in order to fully experience the benefits offered by this new technology, the noise must either be filtered or mitigated by other means. A survey of various DC/DC topologies was conducted in order to find a candidate for a battery interface in a UPS system. A three-level NPC topology was explored for its potential benefit in terms of noise, efficiency, and additional features. This converter topology was modeled, simulated, and a hardware prototype constructed for evaluation within a UPS system, although its uses are not limited to such applications. A UPS system is a good example of an application with strict noise requirements which must be fulfilled according to IEC standards. Based on a newly devised mode of operation, this converter was verified to produce no common-mode voltage under ideal conditions, and was able to provide a 6 dB reduction in common-mode voltage emissions in the UPS prototype. This was done while achieving a peak efficiency in excess of 99% with the ability to provide bidirectional power flow between the UPS and battery backup. The converter was verified to operate at the rated UPS conditions of 20 kW while converting between a total DC bus voltage of 800 V and a nominal battery voltage of 540 V.<br>Master of Science<br>As material advancements allow for the creation of devices with superior electrical characteristics compared to their predecessors, there are still a number of factors which cause these devices to see limited usage in commercial applications. These devices, typically referred to as wide-bandgap devices, include silicon carbide (SiC) transistors. These SiC devices allow for much faster switching speeds, greater efficiencies, and lower system volume compared to their silicon counterparts. However, due to the faster switching of these devices, there is more electromagnetic noise generated. In many applications, this noise must be filtered or otherwise mitigated in order to meet international standards for commercial use. Consequently, new converter topologies and configurations are necessary to provide the most benefit of the new wide-bandgap devices while still meeting the strict noise requirements. A survey of topologies was conducted and the modeling, design, and testing of one topology was performed for use in an uninterruptible power supply (UPS). This converter was able to provide a noticeable reduction in noise compared to standard topologies while still achieving very high efficiency at rated conditions. This converter was also verified to provide power bidirectionally—both when the UPS is charging the battery backup, and when the battery is supplying power to the load.
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Mese, Huseyin. "Field Oriented Control Of Permanent Magnet Synchronous Motors Using Three-level Neutral-point-clamped Inverter." Master's thesis, METU, 2012. http://etd.lib.metu.edu.tr/upload/12614407/index.pdf.

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In this thesis, field oriented control of permanent magnet synchronous motors using three-level neutral-point-clamped inverter is studied. Permanent magnet synchronous motors are used in high performance drive applications. In this study, the permanent magnet synchronous motor is fed by three-level neutral-point-clamped inverter. For three-level neutral-point-clamped inverter different space vector modulation algorithms, which are reported in literature, are analyzed and compared via computer simulations. The voltage balance on dc-link capacitors is also analyzed and a software control method is implemented in conjunction with the space vector PWM modulation, utilized. Nonlinear effects such as dead-time, semiconductor voltage drop and delays in gate drive circuitries also present in neutral-point-clamped inverter. The effects of these nonlinearities are studied and a compensation method for these nonlinear effects is proposed. The theoretical results are supported with computer simulations and verified with experimental results.
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Jiao, Yang. "High Power High Frequency 3-level NPC Power Conversion System." Diss., Virginia Tech, 2015. http://hdl.handle.net/10919/56653.

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The high penetration of renewable energy and the emerging concept of micro-grid system raises challenges to the high power conversion techniques. Multilevel converter plays the key role in such applications and is studied in detail in the dissertation. The topologies and modulation techniques for multilevel converter are categorized at first by a thorough literature survey. The pros and cons for various multilevel topologies and modulation techniques are discussed. The 3-level neutral point clamped (NPC) topology is selected to build a 200kVA, 20 kHz power conversion system. The modularized phase leg building block of the converter is carefully designed to achieve low loss and stress for high frequency and high power operation. The switching characteristics for all the commutation loops of 3-level phase leg are evaluated by double pulse tests. The switching performance is optimized for loss and stress tradeoff. A detailed loss model is built for system loss distribution and loss breakdown calculation. Loss and stress for the phase leg and 3-phase system are quantified at all power factors. The space vector modulation (SVM) for 3-level NPC converter is investigated to achieve loss reduction, neutral voltage balance and noise reduction. The loss model and simulation model provides a quantitative analysis for loss and neutral voltage ripple tradeoff. An improved SVM method is proposed to reduce NP imbalance and switching loss simultaneously. This method also ensures an evenly distributed device loss in each phase leg and gives a constant system efficiency under different power factors. Based on the improved modulation strategy, a new modulation scheme is then proposed with largely reduced conduction loss and switching stress. Moreover, the device loss and stress distribution on a phase leg is more even. This scheme also features on the simplified implementation. The improved switching characteristics for the proposed method are verified by double pulse tests. Also the system loss breakdown and the phase leg loss distribution analysis shows the loss reduction and redistribution result. The harmonic filter for the grid interface converter is designed with LCL topology. A detailed inductor current ripple analysis derives the maximum inductor current ripple and the ripple distribution in a line cycle. The inverter side inductor is designed with the optimum loss and size trade-off. The grid side inductor is designed based on grid code attenuation requirement. Different damping circuits for LCL filter are evaluated in detail. The filter design is verified by both simulation and hardware experiment. The average model for the 3-level NPC converter and its equivalent circuit is derived with the consideration of damping circuit in both ABC and d-q frame. The modeling and control loop design is verified by transfer function measurement on real hardware. The control loops design is also tested and verified on real hardware. The interleaved DC/DC chopper is introduced at last. The different interleaving methods and their current ripple are analyzed in detail with the coupled and non-coupled inductor. An integrated coupled inductor based on 3-dimentional core structure is proposed to achieve high power density and provide both CM and DM impedance for the inductor current and output current.<br>Ph. D.
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Andler, Daniel [Verfasser]. "Experimental Investigation of Three-Level Active Neutral Point Clamped Voltage Source Converters using Integrated Gate-Commutated Thyristors / Daniel Andler." München : Verlag Dr. Hut, 2014. http://d-nb.info/1051550092/34.

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Andler, Osorio Daniel Andrés [Verfasser]. "Experimental Investigation of Three-Level Active Neutral Point Clamped Voltage Source Converters using Integrated Gate-Commutated Thyristors / Daniel Andler." München : Verlag Dr. Hut, 2014. http://d-nb.info/1051550092/34.

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Marzoughi, Alinaghi. "Investigating Impact of Emerging Medium-Voltage SiC MOSFETs on Medium-Voltage High-Power Applications." Diss., Virginia Tech, 2018. http://hdl.handle.net/10919/81822.

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For decades, the Silicon-based semiconductors have been the solution for power electronics applications. However, these semiconductors have approached their limits of operation in blocking voltage, working temperature and switching frequency. Due to material superiority, the relatively-new wide-bandgap semiconductors such as Silicon-Carbide (SiC) MOSFETs enable higher voltages, switching frequencies and operating temperatures when compared to Silicon technology, resulting in improved converter specifications. The current study tries to investigate the impact of emerging medium-voltage SiC MOSFETs on industrial motor drive application, where over a quarter of the total electricity in the world is being consumed. Firstly, non-commercial SiC MOSFETs at 3.3 kV and 400 A rating are characterized to enable converter design and simulation based on them. In order to feature the best performance out of the devices under test, an intelligent high-performance gate driver is designed embedding required functionalities and protections. Secondly, total of three converters are targeted for industrial motor drive application at medium-voltage and high-power range. For this purpose the cascaded H-bridge, the modular multilevel converter and the 5-L active neutral point clamped converters are designed at 4.16-, 6.9- and 13.8 kV voltage ratings and 3- and 5 MVA power ratings. Selection of different voltage and power levels is done to elucidate variation of different parameters within the converters versus operating point. Later, comparisons are done between the surveyed topologies designed at different operating points based on Si IGBTs and SiC MOSFETs. The comparison includes different aspects such as efficiency, power density, semiconductor utilization, energy stored in converter structure, fault containment, low-speed operation capability and parts count (for a measure of reliability). Having the comparisons done based on simulation data, an H-bridge cell is implemented using 3.3 kV 400 A SiC MOSFETs to evaluate validity of the conducted simulations. Finally, a novel method is proposed for series-connecting individual SiC MOSFETs to reach higher voltage devices. Considering the fact that currently the SiC MOSFETs are not commercially available at voltages higher above 1.7 kV, this will enable implementation of converters using medium-voltage SiC MOSFETs that are achieved by stacking commercially-available 1.7 kV MOSFETs. The proposed method is specifically developed for SiC MOSFETs with high dv/dt rates, while majority of the existing solutions could only work merely with slow Si-based semiconductors.<br>Ph. D.
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Book chapters on the topic "Neutral-point voltage"

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Lee, Kyo-Beum, and June-Seok Lee. "Neutral-Point Voltage Reduction." In Power Systems. Springer Singapore, 2017. http://dx.doi.org/10.1007/978-981-10-4992-7_4.

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Gauthier, Jean-Yves, and Xuefang Lin-Shi. "Voltage Boost by Neutral Point Supply of AC Machine." In Lecture Notes in Electrical Engineering. Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-37161-6_18.

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Tan, Guojun, Zongbin Ye, Yuan Li, Yaofei Han, and Wei Jing. "A Comprehensive Study of Neutral-Point-Clamped Voltage Source PWM Rectifiers." In Lecture Notes in Computer Science. Springer Berlin Heidelberg, 2010. http://dx.doi.org/10.1007/978-3-642-13498-2_94.

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Nam, Vo Xuan, Le Van Manh Giau, Nguyen Van Nho, and Tran Thanh Trang. "Neutral Point Voltage Balancing Method and the Influence of Some Parameters on Capacitor Voltage in Three-Level NPC Converter." In AETA 2013: Recent Advances in Electrical Engineering and Related Sciences. Springer Berlin Heidelberg, 2014. http://dx.doi.org/10.1007/978-3-642-41968-3_17.

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Nguyen, Dang Khoa, and Huu-Cong Vu. "Simplified Model Predictive Current Control to Balance Neutral-Point Voltage for Three-Level Sparse Four-Leg VSI." In Intelligent Systems and Networks. Springer Nature Singapore, 2023. http://dx.doi.org/10.1007/978-981-99-4725-6_21.

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Ma, Ke. "Another Groups of Thermal Optimized Modulation Methods of Three-Level Neutral-Point-Clamped Inverter Under Low Voltage Ride Through." In Research Topics in Wind Energy. Springer International Publishing, 2015. http://dx.doi.org/10.1007/978-3-319-21248-7_13.

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Pan, HouRong, and Yunfeng Zhang. "The Research of High-Voltage Auxiliary Power System Neutral Point Grounding Modes Between the Nuclear Power Plant and Conventional Fossil Fuel Power Plant." In Proceedings of The 20th Pacific Basin Nuclear Conference. Springer Singapore, 2017. http://dx.doi.org/10.1007/978-981-10-2317-0_26.

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"Minimization of Low-Frequency Neutral-Point Voltage Oscillations in NPC Converters." In Power Electronic Converters for Microgrids. John Wiley & Sons, Singapore Pte. Ltd, 2014. http://dx.doi.org/10.1002/9780470824054.ch5.

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Hakim, Denoun, Benyahia Nabil, Zaouia Mustapha, Benamrouche Nacereddine, Salah Haddad, and Sadek Ait Mamar. "Modelling and Realisation of a Three-Level PWM Inverter Using a DSP Controller to Feed an Asynchronous Machine." In Handbook of Research on Advanced Intelligent Control Engineering and Automation. IGI Global, 2015. http://dx.doi.org/10.4018/978-1-4666-7248-2.ch025.

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Multilevel inverters have seen an increasing popularity in the last few years for medium- and high-voltage applications. The most popular has been the three-level neutral clamped inverter. Multilevel inverters synthesize output voltage from more than two voltage levels. Thus, the output signal spectrum is significantly improved in comparison with the classical two-level converters. This chapter discusses modelling and control of a Neutral Point Clamped (NPC) inverter which operates with the PWM switching pattern using a DSP. The mathematical model of the NPC inverter is carried out using conversion and connection functions for an easier understanding of the system operation. Simulation results using MATLAB program are reported, and it is shown that the performances obtained for driving an asynchronous motor using this inverter are very promising. Finally, analysis of the theoretical and the experimental results is carried out in order to validate the effectiveness of the proposed control solution.
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Han, J., W. Wang, Y. Li, H. Zheng, X. Li, and Y. Shao. "Study on ACSD for a neutral-point reactor of ultra-high voltage AC." In Architectural, Energy and Information Engineering. CRC Press, 2015. http://dx.doi.org/10.1201/b19197-149.

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Conference papers on the topic "Neutral-point voltage"

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Yuan, Xibo, Jason Yon, and Phillip Mellor. "Common-mode voltage reduction in three-level neutral-point-clamped converters with neutral point voltage balance." In 2013 IEEE 22nd International Symposium on Industrial Electronics (ISIE). IEEE, 2013. http://dx.doi.org/10.1109/isie.2013.6563708.

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Anuradha, K., and Gandla Radha Krishna. "Neutral point voltage level stabilization and DC link capacitors voltage balance in neutral point clamped multilevel inverters." In 2016 11th International Conference on Industrial and Information Systems (ICIIS). IEEE, 2016. http://dx.doi.org/10.1109/iciinfs.2016.8263055.

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Yituo Li and Wenlong Qu. "Equivalent neutral point voltage control strategies in neutral-point diode-clamped three-level converter." In 2009 IEEE 6th International Power Electronics and Motion Control Conference. IEEE, 2009. http://dx.doi.org/10.1109/ipemc.2009.5157611.

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Vilera, Kaio Vinicius, Cassiano Rech, and Silvio Antonio Teston. "Analysis of Neutral-Point Voltage Balancing in Three-Ports Active Neutral-Point-Clamped Converter." In 2019 IEEE 15th Brazilian Power Electronics Conference and 5th IEEE Southern Power Electronics Conference (COBEP/SPEC). IEEE, 2019. http://dx.doi.org/10.1109/cobep/spec44138.2019.9065626.

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Jin, Bosen, and Xibo Yuan. "Control of a four-level active neutral point clamped converter with neutral point voltage balance." In 2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC 2016 - ECCE Asia). IEEE, 2016. http://dx.doi.org/10.1109/ipemc.2016.7512662.

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Celanovic, N., and D. Borojevic. "A comprehensive study of neutral-point voltage balancing problem in three-level neutral-point-clamped voltage source PWM inverters." In APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285). IEEE, 1999. http://dx.doi.org/10.1109/apec.1999.749733.

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Liu, Wenjie, Yongheng Yang, Weilin Li, Xiaobin Zhang, Oleksandr Husev, and Dmitri Vinnikov. "Common Mode Voltage Reduction and Neutral-Point Voltage Balance for Quasi-Z-Source Three-Level Neutral-Point-Clamped Inverters." In 2022 International Power Electronics Conference (IPEC-Himeji 2022- ECCE Asia). IEEE, 2022. http://dx.doi.org/10.23919/ipec-himeji2022-ecce53331.2022.9806905.

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Kim, Mina, Hwa-Pyeong Park, Seung-Yeol Oh, Daeseak Cha, Byoung-Sun Ko, and Jung-Sik Choi. "Neutral-Point Voltage Regulation of Three-Level Neutral-Point Clamped Converter for LVDC Power Distribution Application." In 2023 11th International Conference on Power Electronics and ECCE Asia (ICPE 2023 - ECCE Asia). IEEE, 2023. http://dx.doi.org/10.23919/icpe2023-ecceasia54778.2023.10213779.

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Ja-Hwi Cho, Nam-Joon Ku, Ji-Tai Han, Rae-Young Kim, and Dong-Seok Hyun. "A simple control method for neutral-point voltage oscillation reduction of three-level Neutral-Point-Clamped inverter." In IECON 2013 - 39th Annual Conference of the IEEE Industrial Electronics Society. IEEE, 2013. http://dx.doi.org/10.1109/iecon.2013.6699153.

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Lee, Tzung-Lin, and Tsung-Yu Hsieh. "A new DPWM modulation for three-level neutral point clamped inverter with assuming balanced neutral-point voltage." In 2014 IEEE Energy Conversion Congress and Exposition (ECCE). IEEE, 2014. http://dx.doi.org/10.1109/ecce.2014.6953706.

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