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Journal articles on the topic 'RF Integrated Circuits'

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1

Kim, Bruce, Sukeshwar Kannan, Anurag Gupta, and Naga Sai Evana. "Modeling and Simulation of 3D MEMS Integrated RF Circuits." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2012, DPC (2012): 002006–27. http://dx.doi.org/10.4071/2012dpc-wp35.

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Today's integrated packaging consists of analog, mixed-signal and RF circuits. These integrated packages are now available in 3-D which makes it extremely difficult to test for defects and their circuit functionalities. This paper provides 3D MEMS integrated packaging which provides self testing and calibrations to overcome process defects and out of spec circuits inside the package making the package self heal itself in case of faults and defects. We have worked on TSV based 3D packaging with MEMS switches to perform self calibrations. We developed a novel multi-tone dither test technique where the test stimulus is generated by modulating the RF carrier signal with a multi-tone signal generated on an Arbitrary Waveform Generator (AWG) with additive white Gaussian noise. We used arrays of MEMS switches to perform self testing. We have considered a low noise amplifier as the reference RF circuit which operates between 4 GHz and 6 GHz. The entire validation of the design using test technique and self-calibration of the RF circuit is automated using the calibration algorithm. The paper presents defects in TSV due to mechanical stress and thermal changes.
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2

Razavi, B. "Recent advances in RF integrated circuits." IEEE Communications Magazine 35, no. 12 (1997): 36–43. http://dx.doi.org/10.1109/35.642832.

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3

Lahbib, Imene, Mohamed Aziz Doukkali, Philippe Descamps, Patrice Gamand, Christophe Kelma, and Olivier Tesson. "Design and characterization of an integrated microwave generator for BIST applications." International Journal of Microwave and Wireless Technologies 6, no. 2 (2014): 195–200. http://dx.doi.org/10.1017/s1759078714000105.

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This paper presents a circuit architecture for a new integrated on chip test method for microwave circuits. The proposed built-in-self-test (BIST) cell targets a direct low-cost measurement technique of the gain and the 1 dB input compression point (CP1) of a K-band satellite receiver in the 18–22 GHz frequency bandwidth. A signal generator at the radiofrequency (RF) front end input of the device under test (DUT) has been integrated on the same chip. To inject this RF signal, a loopback technique has been used and the design has been accommodated for it. This paper focuses on the design of the most sensitive block of the BIST circuit, i.e. the RF signal generator. This circuit, fabricated in a SIGe:C BiCMOS process, consumes 10 mA. It presents a dynamic power range of 17 dB (−41; −24 dBm) and operates in a frequency range of 5.6 GHz (17.5; 23 GHz). This BIST circuit gives new perspectives in terms of test strategy, cost reduction, and measurement accuracy for microwave-integrated circuits and could be adapted for mm-wave circuits.
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4

Liu, A. Q., A. B. Yu, M. F. Karim, and M. Tang. "RF MEMS Switches and Integrated Switching Circuits." JSTS:Journal of Semiconductor Technology and Science 7, no. 3 (2007): 166–76. http://dx.doi.org/10.5573/jsts.2007.7.3.166.

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5

Brown, E. R. "RF-MEMS switches for reconfigurable integrated circuits." IEEE Transactions on Microwave Theory and Techniques 46, no. 11 (1998): 1868–80. http://dx.doi.org/10.1109/22.734501.

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6

Kazior, Thomas E. "Beyond CMOS: heterogeneous integration of III–V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems." Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences 372, no. 2012 (2014): 20130105. http://dx.doi.org/10.1098/rsta.2013.0105.

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Advances in silicon technology continue to revolutionize micro-/nano-electronics. However, Si cannot do everything, and devices/components based on other materials systems are required. What is the best way to integrate these dissimilar materials and to enhance the capabilities of Si, thereby continuing the micro-/nano-electronics revolution? In this paper, I review different approaches to heterogeneously integrate dissimilar materials with Si complementary metal oxide semiconductor (CMOS) technology. In particular, I summarize results on the successful integration of III–V electronic devices (InP heterojunction bipolar transistors (HBTs) and GaN high-electron-mobility transistors (HEMTs)) with Si CMOS on a common silicon-based wafer using an integration/fabrication process similar to a SiGe BiCMOS process (BiCMOS integrates bipolar junction and CMOS transistors). Our III–V BiCMOS process has been scaled to 200 mm diameter wafers for integration with scaled CMOS and used to fabricate radio-frequency (RF) and mixed signals circuits with on-chip digital control/calibration. I also show that RF microelectromechanical systems (MEMS) can be integrated onto this platform to create tunable or reconfigurable circuits. Thus, heterogeneous integration of III–V devices, MEMS and other dissimilar materials with Si CMOS enables a new class of high-performance integrated circuits that enhance the capabilities of existing systems, enable new circuit architectures and facilitate the continued proliferation of low-cost micro-/nano-electronics for a wide range of applications.
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7

Wang, A. Z. H., B. Zhao, J. A. Hutchby, M. Ostling, and S. C. Sun. "Foreword Special Issue on Integrated Circuits Technologies for RF Circuit Applications." IEEE Transactions on Electron Devices 52, no. 7 (2005): 1231–34. http://dx.doi.org/10.1109/ted.2005.852099.

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8

Chen, Ethan, and Vanessa Chen. "Statistical RF/Analog Integrated Circuit Design Using Combinatorial Randomness for Hardware Security Applications." Mathematics 8, no. 5 (2020): 829. http://dx.doi.org/10.3390/math8050829.

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While integrated circuit technologies keep scaling aggressively, analog, mixed-signal, and radio-frequency (RF) circuits encounter challenges by creating robust designs in advanced complementary metal–oxide–semiconductor (CMOS) processes with the diminishing voltage headroom. The increasing random mismatch of smaller feature sizes in leading-edge technology nodes severely limit the benefits of scaling for (RF)/analog circuits. This paper describes the details of the combinatorial randomness by statistically selecting device elements that relies on the significant growth in subsets number of combinations. The randomness can be utilized to provide post-manufacturing reconfiguration of the selectable circuit elements to achieve required specifications for ultra-low-power systems. The calibration methodology is demonstrated with an ultra-low-voltage chaos-based true random number generator (TRNG) for energy-constrained Internet of things (IoT) devices in the secure communications.
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9

Temnov, A. M. "Hybrid Monolithic Microwave Integrated Circuits RF on Diamond." Nano- i Mikrosistemnaya Tehnika 22, no. 6 (2020): 298–328. http://dx.doi.org/10.17587/nmst.22.298-328.

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10

Acar, Erka, and Sule Ozev. "Low Cost MIMO Testing for RF Integrated Circuits." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18, no. 9 (2010): 1348–56. http://dx.doi.org/10.1109/tvlsi.2009.2024018.

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11

Yamaguchi, M., K. Suezawa, Y. Takahashi, et al. "Magnetic thin-film inductors for RF-integrated circuits." Journal of Magnetism and Magnetic Materials 215-216 (June 2000): 807–10. http://dx.doi.org/10.1016/s0304-8853(00)00293-6.

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12

Tarvainen, E., H. Ronkainen, H. Kattelus, T. Riihisaari, and P. Kuivalainen. "Planar inductors on silicon for integrated RF circuits." Physica Scripta T69 (January 1, 1997): 295–97. http://dx.doi.org/10.1088/0031-8949/1997/t69/062.

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13

Sung, Guo-Ming, Chao-Kong Chung, Yu-Jen Lai, and Jin-Yu Syu. "Small-Area Radiofrequency-Energy-Harvesting Integrated Circuits for Powering Wireless Sensor Networks." Sensors 19, no. 8 (2019): 1754. http://dx.doi.org/10.3390/s19081754.

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This study presents a radiofrequency (RF)-energy-harvesting integrated circuit (IC) for powering wireless sensor networks with a wireless transmitter with an industrial, scientific, and medical (ISM) of 915 MHz. The proposed IC comprises an RF-direct current (DC) rectifier, an over-voltage protection circuit, a low-power low-dropout (LDO) voltage regulator, and a charger control circuit. In the RF-DC rectifier circuit, a six-stage Dickson voltage multiplier circuit is used to improve the received RF signal to a DC voltage by using native MOS with a small threshold voltage. The over-voltage protection circuit is used to prevent a high-voltage breakdown phenomenon from the RF front-end circuit, particularly for near-field communication. A low-power LDO regulator is designed to provide stable voltage by using zero frequency compensation and a voltage-trimming feedback. Charging current is amplified N times by using a current mirror to rapidly and stably charge a battery in the proposed charger control circuit. The obtained results revealed that the maximum power conversion efficiency of the proposed RF-energy-harvesting IC was 40.56% at an input power of −6 dBm, an output voltage of 1.5 V, and a load of 30 kΩ. A chip area of the RF-energy-harvesting IC was 0.58 × 0.49 mm2, including input/output pads, and power consumption was 42 μW.
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14

Capelle, Marie, Jérome Billoué, Patrick Poveda, and Gael Gautier. "Study of porous silicon substrates for the monolithic integration of radiofrequency circuits." International Journal of Microwave and Wireless Technologies 6, no. 1 (2013): 39–43. http://dx.doi.org/10.1017/s1759078713001050.

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The silicon/porous silicon (PS) hybrid substrate is an interesting candidate for the monolithic integration of radiofrequency (RF) circuits. Thus, passive components can be integrated on the insulating PS regions close to the active devices integrated on silicon. Regarding silicon, hybrid substrates allow the improvement of RF circuits performances. To demonstrate it, coplanar waveguides have been integrated on glass, silicon, and localized PS substrates. The characterization results show that the substrate losses are reduced with PS.
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15

Lee, T. H., and S. S. Wong. "CMOS RF integrated circuits at 5 GHz and beyond." Proceedings of the IEEE 88, no. 10 (2000): 1560–71. http://dx.doi.org/10.1109/5.888995.

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16

Manku, T., G. Beck, and E. J. Shin. "A low-voltage design technique for RF integrated circuits." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 45, no. 10 (1998): 1408–13. http://dx.doi.org/10.1109/82.728853.

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17

Zhang, Y., H. Soltner, N. Wolters, et al. "HTS rf SQUIDs with fully integrated planar tank circuits." IEEE Transactions on Appiled Superconductivity 7, no. 2 (1997): 2870–73. http://dx.doi.org/10.1109/77.621890.

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18

Gotzfried, R., F. Beisswanger, and S. Gerlach. "Design of RF integrated circuits using SiGe bipolar technology." IEEE Journal of Solid-State Circuits 33, no. 9 (1998): 1417–22. http://dx.doi.org/10.1109/4.711341.

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19

Mehr, Payam, Soroush Moallemi, Xiong Zhang, William Lepkowski, Jennifer Kitchen, and Trevor J. Thornton. "CMOS-Compatible MESFETs for High Power RF Integrated Circuits." IEEE Transactions on Semiconductor Manufacturing 32, no. 1 (2019): 14–22. http://dx.doi.org/10.1109/tsm.2018.2867449.

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20

Kim, Bruce C., Sai Evana, and Rahim Kasim. "Packaging of MEMS for Integrated RF Circuit Verifications." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2011, DPC (2011): 000926–51. http://dx.doi.org/10.4071/2011dpc-tp24.

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This paper provides development of MEMS switches and packaging of MEMS to test radio frequency circuits used in wireless products such as cell phones and network routers. We discuss fabrication of MEMS using low voltage magnetic materials and their configurations to achieve the optimum switch to test RF low noise amplifiers. We have accomplished a very unique methodology to test low noise amplifiers using built-in sellf-test technique and our MEMS switches are proposed to achieve the verification of low noise amplifiers. Furthermore, we have used MEMS switches that we developed to perform self calibration to correct for the parametric variations and faults within the deep submicron CMOS circuits. We also discuss packaging of MEMS and low noise amplifier using 3D TSV technology.
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21

Kannan, Sukeshwar, Bruce Kim, Naga Sai Evana, Anurag Gupta, and Seok-Ho Noh. "MEMS Integrated Packaging for RF Circuit Testing and Self Calibration." International Symposium on Microelectronics 2011, no. 1 (2011): 000635–40. http://dx.doi.org/10.4071/isom-2011-wa5-paper5.

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This paper presents MEMS enhanced integrated packaging which provides testing and self-calibration to identify process-related defects and out of specification circuits, thereby enabling the package to calibrate itself in case of faults and defects to designed performance levels. We have developed a novel multi-tone dither test technique where the test stimulus is generated by modulating the RF carrier signal with a multi-tone signal generated using an Arbitrary Waveform Generator (AWG) with additive white Gaussian noise. This test stimulus is provided as input to the RF circuit and peak-to-average ratio (PAR) is measured at the output. For a faulty circuit, a significant difference is observed in the value of PAR as compared to a fault-free circuit. Simulation is performed for various circuit conditions such as fault-free as well as fault-induced and their corresponding PARs are stored in the look-up table. Hardware testing is performed and the results are compared with the look-up table to verify whether the device is fault-free. In faulty circuit conditions, calibration is performed using a tuning circuit which consists of MEMS switches. The entire validation of the design using test technique and self-calibration of the RF circuit is automated using the calibration algorithm. This testing and self-calibration technique is exhaustive and efficient for present-day communication systems.
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22

Cavalcanti, Hercílio M., and Leandro Manera. "A Simulation Methodology for Wirebonds Interconnects of Radiofrequency Integrated Circuits." Journal of Integrated Circuits and Systems 10, no. 3 (2015): 181–86. http://dx.doi.org/10.29292/jics.v10i3.421.

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This work presents a methodology for the simulation of bonding wires under the circumstance when signals with RF frequencies are employed and thus, the impedances of the parasitic resistances, capacitances and inductances of these interconnections are no longer negligible. A s-parameters extraction strategy for each of the wirebonds will be shown with the help of Agilent’s EM simulator ADS resulting in a netlist in spectre which will be used in the test-bench of the designed IC to emulate the behavior of the bondwires and thus making possible a proper dimensioning and tuning of the RF chip to ensure a better performance of the encapsulated RF IC. Finally the design example of a power amplifier is proposed and some aspects of the interaction of this block with the wirebonds are studied.
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23

Altet, Josep, Enrique Barajas, Diego Mateo, et al. "BPF-Based Thermal Sensor Circuit for On-Chip Testing of RF Circuits." Sensors 21, no. 3 (2021): 805. http://dx.doi.org/10.3390/s21030805.

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A new sensor topology meant to extract figures of merit of radio-frequency analog integrated circuits (RF-ICs) was experimentally validated. Implemented in a standard 0.35 μm complementary metal-oxide-semiconductor (CMOS) technology, it comprised two blocks: a single metal-oxide-semiconductor (MOS) transistor acting as temperature transducer, which was placed near the circuit to monitor, and an active band-pass filter amplifier. For validation purposes, the temperature sensor was integrated with a tuned radio-frequency power amplifier (420 MHz) and MOS transistors acting as controllable dissipating devices. First, using the MOS dissipating devices, the performance and limitations of the different blocks that constitute the temperature sensor were characterized. Second, by using the heterodyne technique (applying two nearby tones) to the power amplifier (PA) and connecting the sensor output voltage to a low-cost AC voltmeter, the PA’s output power and its central frequency were monitored. As a result, this topology resulted in a low-cost approach, with high linearity and sensitivity, for RF-IC testing and variability monitoring.
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24

Saeed, Mohamed, Ahmed Hamed, Zhenxing Wang, Mehrdad Shaygan, Daniel Neumaier, and Renato Negra. "Graphene integrated circuits: new prospects towards receiver realisation." Nanoscale 10, no. 1 (2018): 93–99. http://dx.doi.org/10.1039/c7nr06871a.

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This work demonstrates a design approach which enables the fabrication of fully integrated radio frequency (RF) and millimetre-wave frequency direct-conversion graphene receivers by adapting the frontend architecture to exploit the state-of-the-art performance of the recently reported wafer-scale CVD metal–insulator–graphene (MIG) diodes.
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25

Caselli, Michele, Marco Ronchi, and Andrea Boni. "Power Management Circuits for Low-Power RF Energy Harvesters." Journal of Low Power Electronics and Applications 10, no. 3 (2020): 29. http://dx.doi.org/10.3390/jlpea10030029.

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The paper describes the design and implementation of power management circuits for RF energy harvesters suitable for integration in wireless sensor nodes. In particular, we report the power management circuits used to provide the voltage supply of an integrated temperature sensor with analog-to-digital converter. A DC-DC boost converter is used to transfer efficiently the energy harvested from a generic radio-frequency rectifier into a charge reservoir, whereas a linear regulator scales the voltage supply to a suitable value for a sensing and conversion circuit. Implemented in a 65 nm CMOS technology, the power management system achieves a measured overall efficiency of 20%, with an available power of 4.5 μW at the DC-DC converter input. The system can sustain a temperature measurement rate of one sample/s with an RF input power of −28 dBm, making it compatible with the power levels available in generic outdoor environments.
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26

Ngoya, Edouard. "On the Cyclostationary Noise Analysis in Large RF Integrated Circuits." IEEE Transactions on Circuits and Systems I: Regular Papers 58, no. 11 (2011): 2729–40. http://dx.doi.org/10.1109/tcsi.2011.2143070.

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27

Rabieirad, L., E. J. Martinez, and S. Mohammadi. "Mask Programmable CMOS Transistor Arrays for Wideband RF Integrated Circuits." IEEE Transactions on Microwave Theory and Techniques 57, no. 6 (2009): 1439–46. http://dx.doi.org/10.1109/tmtt.2009.2019992.

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28

Kubena, Randall L., Hung D. Nguyen, Raviv Perahia, et al. "MEMS-Based UHF Monolithic Crystal Filters for Integrated RF Circuits." Journal of Microelectromechanical Systems 25, no. 1 (2016): 118–24. http://dx.doi.org/10.1109/jmems.2015.2496251.

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29

Lee, Sang-Gug, Jin-Taek Lee, and Jeong-Ki Choi. "High-Q poly-to-poly capacitor for RF integrated circuits." Electronics Letters 37, no. 1 (2001): 25. http://dx.doi.org/10.1049/el:20010016.

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30

Bennett, H. S., R. Brederlow, J. C. Costa, et al. "Device and Technology Evolution for Si-Based RF Integrated Circuits." IEEE Transactions on Electron Devices 52, no. 7 (2005): 1235–58. http://dx.doi.org/10.1109/ted.2005.850645.

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31

CHANG, S., and H. SHIN. "A Compact Circuit Model of Five-Port Transformer Balun for CMOS RF Integrated Circuits." IEICE Transactions on Electronics E91-C, no. 10 (2008): 1709–12. http://dx.doi.org/10.1093/ietele/e91-c.10.1709.

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32

Craton, Michael, Mohd Ifwat Mohd Ghazali, Brian Wright, Kyoung Youl Park, Premjeet Chahal, and John Papapolymerou. "3D Printed Integrated Microfluidic Cooling for High Power RF Applications." International Symposium on Microelectronics 2017, no. 1 (2017): 000675–80. http://dx.doi.org/10.4071/isom-2017-poster6_098.

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Abstract This paper presents the design and fabrication of microfluidic channel integration in a plastic substrate using 3D printing. The microfluidic channels are integrated along with a copper plate which the coolant is in direct contact with. To demonstrate the design, a diode intended for switched power supplies is integrated onto the copper plate and its performance characterized. 3D printing or additive manufacturing (AM) allows for fast prototyping of such package designs and can be readily adopted in the fabrication of RF circuits. This paper, to the best of our knowledge, for the first time will demonstrate a 3D printed integrated microfluidic channel for the cooling of electronic circuits. Details of design, fabrication and characterization are presented.
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33

Shen, S. C., D. Becher, Z. Fan, D. Caruth, and Milton Feng. "Development of Broadband Low Actuation Voltage RF MEM Switches." Active and Passive Electronic Components 25, no. 1 (2002): 97–111. http://dx.doi.org/10.1080/08827510211282.

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Low insertion loss, high isolation RF MEM switches have been thought of as one of the most attractive devices for space-based reconfigurable antenna and integrated circuit applications. Many RF MEMS switch topologies have been reported and they all show superior RF characteristics compared to semiconductor-based counterparts. At the University of Illinois, we developed state-of-the-art broadband low-voltage RF MEM switches using cantilever and hinged topologies. We demonstrated promisingsub-10volts operation for both switch topologies.The switches have an insertion loss of less than 0:1 dB, and an isolation of better than 25 dB over the frequency range from 0.25 to 40 GHz. The RF Model of the MEM switch was also established. The low voltage RF MEM switches will provide a solution for low voltage and highly linear switching methods for the next generation of broadband RF, microwave, and millimeter-wave circuits.
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34

Mesadri, Conrado K., Aziz Doukkali, Philippe Descamps, and Christophe Kelma. "A new methodology for optimal RF DFT sensor design." International Journal of Microwave and Wireless Technologies 4, no. 5 (2012): 515–21. http://dx.doi.org/10.1017/s1759078712000499.

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In this paper, a new methodology to compare the robustness of sensor structures employed in radiofrequency design for test (RF DFT) architectures for RF integrated circuits (ICs) is proposed. First, the yield loss and defect level of the test technique is evaluated using a statistical model of the Circuit under Test (obtained through non-parametric statistics and copula theory). Then, by carrying out the dispersion analysis of the sensor architecture, a figure of merit is established. This methodology reduces the number of iterations in the design flow of RF DFT sensors and makes it possible to evaluate process dispersion. The case study is a SiGe:C BiCMOS LNA tested by a single-probe measurement.
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35

KER, Ming-Dou, and Yuan-Wen HSIAO. "Impedance-Isolation Technique for ESD Protection Design in RF Integrated Circuits." IEICE Transactions on Electronics E92-C, no. 3 (2009): 341–51. http://dx.doi.org/10.1587/transele.e92.c.341.

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36

Sorkhabi, Samin Ebrahim, and Lihong Zhang. "Automated topology synthesis of analog and RF integrated circuits: A survey." Integration 56 (January 2017): 128–38. http://dx.doi.org/10.1016/j.vlsi.2016.10.017.

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37

Ker, Ming-Dou, and Chyh-Yih Chang. "ESD protection design for CMOS RF integrated circuits using polysilicon diodes." Microelectronics Reliability 42, no. 6 (2002): 863–72. http://dx.doi.org/10.1016/s0026-2714(02)00049-5.

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38

Mateo, D., J. Altet, and E. Aldrete-Vidrio. "Electrical characterization of analogue and RF integrated circuits by thermal measurements." Microelectronics Journal 38, no. 2 (2007): 151–56. http://dx.doi.org/10.1016/j.mejo.2006.08.003.

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39

Tian, Yang, Nan Li, Hong Wang, Xiu Ping Li, and Kok Yan Lee. "Right-Angled Microcoaxial Bends for Si-Based RF/Microwave Integrated Circuits." IEEE Transactions on Components, Packaging and Manufacturing Technology 6, no. 2 (2016): 290–97. http://dx.doi.org/10.1109/tcpmt.2015.2513066.

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40

El-Desouki, Munir M., Samar M. Abdelsayed, M. Jamal Deen, Natalia K. Nikolova, and Yaser M. Haddara. "The Impact of On-Chip Interconnections on CMOS RF Integrated Circuits." IEEE Transactions on Electron Devices 56, no. 9 (2009): 1882–90. http://dx.doi.org/10.1109/ted.2009.2026194.

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41

Feng, H. G., R. Y. Zhan, G. Chen, Q. Wu, and Albert Z. Wang. "Electrostatic Discharge Protection for RF Integrated Circuits: New ESD Design Challenges." Analog Integrated Circuits and Signal Processing 39, no. 1 (2004): 5–19. http://dx.doi.org/10.1023/b:alog.0000016640.31641.a2.

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42

Xu, Kaikai, Kingsley A. Ogudo, Jean-Luc Polleux, et al. "Light Emitting Devices in Si CMOS and RF Bipolar Integrated Circuits." LEUKOS 12, no. 4 (2016): 203–12. http://dx.doi.org/10.1080/15502724.2015.1134333.

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43

Ronan, M. T., K. L. Lee, P. Corredoura, and J. G. Judkins. "Gallium arsenide digital integrated circuits for controlling SLAC CW-RF systems." IEEE Transactions on Nuclear Science 36, no. 1 (1989): 662–64. http://dx.doi.org/10.1109/23.34522.

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44

Liaperdos, John, Angela Arapoyanni, and Yiorgos Tsiatouhas. "State reduction for efficient digital calibration of analog/RF integrated circuits." Analog Integrated Circuits and Signal Processing 90, no. 1 (2016): 65–79. http://dx.doi.org/10.1007/s10470-016-0880-4.

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45

Ayllon, Natanael, Juan-Mari Collantes, Aitziber Anakabe, Geoffroy Soubercaze-Pun, Stephane Forestier, and Dominique Langrez. "Joint RF and large-signal stability optimization of MMIC power combining amplifiers." International Journal of Microwave and Wireless Technologies 5, no. 6 (2013): 683–88. http://dx.doi.org/10.1017/s1759078713000767.

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In this paper, authors report on an enhanced approach for the design of monolithic microwave integrated circuit (MMIC) power combining amplifiers. Commonly used techniques for the stabilization of such circuits are empirical and too conservative. This leads very often to a non-desired degradation of the radio frequency (RF) performances that are inherent to the physical properties of such stabilization networks at the fundamental frequency of operation. The methodology proposed here is based on the use of large-signal optimization processes that combine RF and stability analyses from the early stages of the design. This approach results in an improvement of the RF performances while sufficient stability margins are preserved. The optimization procedure is explained on a Ku-band MMIC power amplifier for space-borne communications.
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46

AGARWAL, BIPUL, RAJASEKHAR PULLELA, UDDALAK BHATTACHARYA, et al. "ULTRAHIGH fmax AlInAs/GaInAs TRANSFERRED-SUBSTRATE HETEROJUNCTION BIPOLAR TRANSISTORS FOR INTEGRATED CIRCUITS APPLICATIONS." International Journal of High Speed Electronics and Systems 09, no. 02 (1998): 643–70. http://dx.doi.org/10.1142/s0129156498000270.

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Transferred-substrate heterojunction bipolar transistors (HBTs) have demonstrated very high bandwidths and are potential candidates for very high speed integrated circuit (IC) applications. The transferred-substrate process permits fabrication of narrow and aligned emitter-base and collector-base junctions, reducing the collector-base capacitance and increasing the device f max . Unlike conventional double-mesa HBTs, transferred-substrate HBTs can be scaled to submicron dimensions with a consequent increase in bandwidth. This paper introduces the concept of transferred-substrate HBTs. Fabrication process in the AlInAs/GaInAs material system is presented, followed by DC and RF performance. A demonstration IC is shown along with some integrated circuits in development.
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47

Lysenko, Igor, Alexey Tkachenko, Elena Sherova, and Alexander Nikitin. "Analytical Approach in the Development of RF MEMS Switches." Electronics 7, no. 12 (2018): 415. http://dx.doi.org/10.3390/electronics7120415.

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Currently, the technology of microelectromechanical systems is widely used in the development of high-frequency and ultrahigh-frequency devices. The most important requirements for modern and advanced devices of the ultra-high-frequency range are the reduction of weight and size characteristics, power consumption with an increase in their functionality, operating frequency and level of integration. Radio frequency microelectromechanical switches are developed using the technology of the manufacture of CMOS-integrated circuits. Integrated radio frequency control circuits require low control voltages, the high ratio of losses to the isolation in the open and closed condition, high performance and reliability. This review is devoted to the analytical approach based on the knowledge of materials, basic performance indices and mechanisms of failure, which can be used in the development of radio-frequency microelectromechanical switches.
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48

Oppermann, Martin, and Ralf Rieger. "RF Modules (Tx–Rx) with Multifunctional MMICs." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2017, NOR (2017): 1–5. http://dx.doi.org/10.4071/2017-nor-oppermann.

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Abstract Next generation RF sensor modules for multifunction active electronically steered antenna (AESA) systems will need a combination of different operating modes, such as radar, electronic warfare (EW) functionalities and communications/datalinks within the same antenna frontend. They typically operate in C-Band, X-Band and Ku-Band and imply a bandwidth requirement of more than 10 GHz. For the realisation of modern active electronically steered antennas, the transmit/receive (T/R) modules have to match strict geometry demands. A major challenge for these future multifunction RF sensor modules is dictated by the half-wavelength antenna grid spacing, that limits the physical channel width to < 12 mm or even less, depending on the highest frequency of operation with accordant beam pointing requirements. A promising solution to overcome these geometry demands is the reduction of the total monolithic microwave integrated circuit (MMIC) chip area, achieved by integrating individual RF functionalities, which are commonly achieved through individual integrated circuits (ICs), into new multifunctional (MFC) MMICs. Various concepts, some of them already implemented, towards next generation RF sensor modules will be discussed and explained in this work.
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49

Soref, Richard. "Reconfigurable Integrated Optoelectronics." Advances in OptoElectronics 2011 (May 4, 2011): 1–15. http://dx.doi.org/10.1155/2011/627802.

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Integrated optics today is based upon chips of Si and InP. The future of this chip industry is probably contained in the thrust towards optoelectronic integrated circuits (OEICs) and photonic integrated circuits (PICs) manufactured in a high-volume foundry. We believe that reconfigurable OEICs and PICs, known as ROEICs and RPICs, constitute the ultimate embodiment of integrated photonics. This paper shows that any ROEIC-on-a-chip can be decomposed into photonic modules, some of them fixed and some of them changeable in function. Reconfiguration is provided by electrical control signals to the electro-optical building blocks. We illustrate these modules in detail and discuss 3D ROEIC chips for the highest-performance signal processing. We present examples of our module theory for RPIC optical lattice filters already constructed, and we propose new ROEICs for directed optical logic, large-scale matrix switching, and 2D beamsteering of a phased-array microwave antenna. In general, large-scale-integrated ROEICs will enable significant applications in computing, quantum computing, communications, learning, imaging, telepresence, sensing, RF/microwave photonics, information storage, cryptography, and data mining.
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Castagnola, Juan L., Fortunato C. Dualibe, Agustín M. Laprovitta, and Hugo García-Vázquez. "A Novel Design and Optimization Approach for Low Noise Amplifiers (LNA) Based on MOST Scattering Parameters and the gm/ID Ratio." Electronics 9, no. 5 (2020): 785. http://dx.doi.org/10.3390/electronics9050785.

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This work presents a new design methodology for radio frequency (RF) integrated circuits based on a unified analysis of the scattering parameters of the circuit and the gm/ID ratio of the involved transistors. Since the scattering parameters of the circuits are parameterized by means of the physical characteristics of transistors, designers can optimize transistor size and biasing to comply with the circuit specifications given in terms of S-parameters. A complete design of a cascode low noise amplifier (LNA) in MOS 65 nm technology is taken as a case study in order to validate the approach. In addition, this methodology permits the identification of the best trade-off between the minimum noise figure and the maximum gain for the LNA in a very simple way.
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