Bibliografías temáticas / Hardware isolation

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Literatura académica sobre el tema "Hardware isolation"

Autor: Grafiati
Publicado: 7 de septiembre de 2024
Última modificación: 31 de julio de 2025

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Artículos de revistas sobre el tema "Hardware isolation"

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Shang, Ming. "A New Hardware Isolation Architecture." Applied Mechanics and Materials 530-531 (February 2014): 631–36. http://dx.doi.org/10.4028/www.scientific.net/amm.530-531.631.

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Virtual systems are usually attacked due to the vulnerabilities in the hypervisor. The hypervisor cannot solve this because its code size is too big to implement totally right. This paper proposed a new hardware-software architecture based on hardware isolation, which adds a new component in CPU to provide hard-level isolation. Even when the malicious code gets the highest software privilege, it cannot break into another domain from current domain. This paper also gives the implementation of the booting, memory isolation, scheduling, interrupt handling and inter-domain communication.
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Hu, Nianhang, Mengmei Ye, and Sheng Wei. "Surviving Information Leakage Hardware Trojan Attacks Using Hardware Isolation." IEEE Transactions on Emerging Topics in Computing 7, no. 2 (2019): 253–61. http://dx.doi.org/10.1109/tetc.2017.2648739.

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Hooker, Sara. "The hardware lottery." Communications of the ACM 64, no. 12 (2021): 58–65. http://dx.doi.org/10.1145/3467017.

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Kaplan, David. "Hardware VM Isolation in the Cloud." Queue 21, no. 4 (2023): 49–67. http://dx.doi.org/10.1145/3623392.

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Confidential computing is a security model that fits well with the public cloud. It enables customers to rent VMs while enjoying hardware-based isolation that ensures that a cloud provider cannot purposefully or accidentally see or corrupt their data. SEV-SNP was the first commercially available x86 technology to offer VM isolation for the cloud and is deployed in Microsoft Azure, AWS, and Google Cloud. As confidential computing technologies such as SEV-SNP develop, confidential computing is likely to simply become the default trust model for the cloud.
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Kaplan, David. "Hardware VM Isolation in the Cloud." Communications of the ACM 67, no. 1 (2023): 54–59. http://dx.doi.org/10.1145/3624576.

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Zeng, Qiang Hong, Shi Jian Zhu, Jing Jun Lou, and Shui Qing Xie. "Hardware Design for Active Vibration Isolation Controller." Advanced Materials Research 211-212 (February 2011): 1061–65. http://dx.doi.org/10.4028/www.scientific.net/amr.211-212.1061.

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The active vibration control system are described in this paper, and the controller was designed for the active control system, the controller is based on ARM Cortex M3 microcontroller core, ICP series acceleration sensor is use for signal acquisition module, the A / D converter module was designed based on ADS1158 chip, the D/ A converter module was designed based on DAC8564 chip. The controller has the characteristics of high speed and versatility.
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Chen, Sui, Lu Peng, and Samuel Irving. "Accelerating GPU Hardware Transactional Memory with Snapshot Isolation." ACM SIGARCH Computer Architecture News 45, no. 2 (2017): 282–94. http://dx.doi.org/10.1145/3140659.3080204.

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Omar, Hamza, and Omer Khan. "PRISM." ACM Transactions on Architecture and Code Optimization 18, no. 3 (2021): 1–25. http://dx.doi.org/10.1145/3450523.

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Multicores increasingly deploy safety-critical parallel applications that demand resiliency against soft-errors to satisfy the safety standards. However, protection against these errors is challenging due to complex communication and data access protocols that aggressively share on-chip hardware resources. Research has explored various temporal and spatial redundancy-based resiliency schemes that provide multicores with high soft-error coverage. However, redundant execution incurs performance overheads due to interference effects induced by aggressive resource sharing. Moreover, these schemes
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Cho, Yeongpil. "Fine-Grained Isolation to Protect Data against In-Process Attacks on AArch64." Electronics 9, no. 2 (2020): 236. http://dx.doi.org/10.3390/electronics9020236.

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In-process attacks are a new class of attacks that circumvent protection schemes centered around inter-process isolation. Against these attacks, researchers have proposed fine-grained data isolation schemes that can protect sensitive data from malicious accesses even during the same process. Their proposals based on salient hardware features, such as ARM® processor architecture’s domain protection, are quite successful, but it cannot be applied to a specific architecture, namely AArch64, as this does not provide the same hardware features. In this paper, therefore, we present Sealer, a fine-gr
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Verghese, Ben, Anoop Gupta, and Mendel Rosenblum. "Performance isolation." ACM SIGOPS Operating Systems Review 32, no. 5 (1998): 181–92. http://dx.doi.org/10.1145/384265.291044.

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Tesis sobre el tema "Hardware isolation"

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Vilanova, García Lluís. "Code-Centric Domain Isolation : a hardware/software co-design for efficient program isolation." Doctoral thesis, Universitat Politècnica de Catalunya, 2016. http://hdl.handle.net/10803/385746.

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Current software systems contain a multitude of software components: from simple libraries to complex plugins and services. System security and resiliency depends on being able to isolate individual components onto separate domains. Conventional systems impose large performance and programmability overheads when isolating components. Importantly, when performance and isolation are at stake, performance often takes precedence at the expense of security and reliability. These performance and programmability overheads are rooted at the co-evolution of conventional architectures and OSs, which e
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Goonasekera, Nuwan Abhayawardena. "Program-level support for protecting an application from untrustworthy components." Thesis, Queensland University of Technology, 2012. https://eprints.qut.edu.au/60851/1/Nuwan_Goonasekera_Thesis.pdf.

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Many software applications extend their functionality by dynamically loading executable components into their allocated address space. Such components, exemplified by browser plugins and other software add-ons, not only enable reusability, but also promote programming simplicity, as they reside in the same address space as their host application, supporting easy sharing of complex data structures and pointers. However, such components are also often of unknown provenance and quality and may be riddled with accidental bugs or, in some cases, deliberately malicious code. Statistics show th
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Maisuradze, Giorgi [Verfasser], and Christian [Akademischer Betreuer] Rossow. "Assessing the security of hardware-assisted isolation techniques / Giorgi Maisuradze ; Betreuer: Christian Rossow." Saarbrücken : Saarländische Universitäts- und Landesbibliothek, 2019. http://d-nb.info/120658873X/34.

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Behrens, Diogo. "Error isolation in distributed systems." Doctoral thesis, Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2016. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-203428.

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In distributed systems, if a hardware fault corrupts the state of a process, this error might propagate as a corrupt message and contaminate other processes in the system, causing severe outages. Recently, state corruptions of this nature have been observed surprisingly often in large computer populations, e.g., in large-scale data centers. Moreover, since the resilience of processors is expected to decline in the near future, the likelihood of state corruptions will increase even further. In this work, we argue that preventing the propagation of state corruption should be a first-class requi
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Behrens, Diogo, Marco Serafini, Sergei Arnautov, Flavio Junqueira, and Christof Fetzer. "Scalable error isolation for distributed systems: modeling, correctness proofs, and additional experiments." Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2016. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-203622.

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Behrens, Diogo, Marco Serafini, Sergei Arnautov, Flavio Junqueira, and Christof Fetzer. "Scalable error isolation for distributed systems: modeling, correctness proofs, and additional experiments." Technische Universität Dresden, 2015. https://tud.qucosa.de/id/qucosa%3A29539.

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Sensaoui, Abderrahmane. "Etude et implémentation de mécanismes de protection d'exécution d'applications embarquées." Thesis, Université Grenoble Alpes, 2020. http://www.theses.fr/2020GRALM002.

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En considérant la vitesse avec laquelle la technologie des systèmes embarqués progresse, il n’est pas étonnant que le nombre des attaques des systèmes soit en nette augmentation. De nombreuses applications sont développées rapidement et sont écrites avec un langage bas niveau pour suivre le rythme avec lequel progresse l’industrie des systèmes embarqués. Souvent, ces applications contiennent beaucoup de bugs. Certains bugs peuvent être exploités pour pénétrer un système et exécuter un code malveillant. Aujourd’hui, la revue de code peut s’avérer très coûteuse vu la taille des codes développés.
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Ducasse, Quentin. "Sécurisation matérielle de la compilation à la volée des machines virtuelles langage." Electronic Thesis or Diss., Brest, École nationale supérieure de techniques avancées Bretagne, 2024. http://www.theses.fr/2024ENTA0003.

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Les machines virtuelles langage (VM) sont l’environnement d’exécution des langages de haut niveau les plus répandus. Elles permettent une portabilité du code applicatif et la gestion automatique de la mémoire. Leur large diffusion couplée à l’exécution de tâches de bas niveau les rendent intéressantes pour les attaquants. Les solutions purement logicielles entraînent souvent une perte de performance incompatible avec la compilation just-in-time (JIT). Des solutions accélérées matériellement sont ajoutées dans des processeurs commerciaux pour concilier des garanties de sécurité fortes avec la p
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Wang, Shuo. "Control of a Uni-Axial Magnetorheological Vibration Isolator." University of Toledo / OhioLINK, 2011. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1302200947.

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Benhani, El mehdi. "Sécurité des systèmes sur puce complexes hétérogènes." Thesis, Lyon, 2020. http://www.theses.fr/2020LYSES016.

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La thèse étudie la sécurité de la technologie ARM TrustZone dans le cadre des SoCs complexes hétérogènes. La thèse présente des attaques matérielles qui touchent des éléments de l’architecture des SoCs et elle présente aussi des stratégies de contremesure<br>The thesis studies the security of the ARM TrustZone technology in the context of complex heterogeneous SoCs. The thesis presents hardware attacks that affect elements of the SoCs architecture and it also presents countermeasure strategies
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Libros sobre el tema "Hardware isolation"

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Patterson, Christopher B. Open World Empire. NYU Press, 2020. http://dx.doi.org/10.18574/nyu/9781479802043.001.0001.

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Video games vastly outpace all other entertainment media in revenue and in global reach. On the surface, games do not appear ideological, nor are they categorized as national products, yet their very existence has been conditioned upon the spread of militarized technology, the exploitation of already existing labor and racial hierarchies in their manufacture, and the utopian promises of digital technology. Like literature and film before them, video games have become the main artistic expression of empire today and thus form an understanding for how war and imperial violence proceed under the
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Capítulos de libros sobre el tema "Hardware isolation"

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Passaretti, Daniele, Felix Boehm, Martin Wilhelm, and Thilo Pionteck. "Hardware Isolation Support for Low-Cost SoC-FPGAs." In Architecture of Computing Systems. Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-21867-5_10.

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Zhang, Kening, Ronald F. DeMara, and Carthik A. Sharma. "Consensus-Based Evaluation for Fault Isolation and On-line Evolutionary Regeneration." In Evolvable Systems: From Biology to Hardware. Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11549703_2.

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Ye, Mengmei, Myra B. Cohen, Witawas Srisa-an, and Sheng Wei. "EvoIsolator: Evolving Program Slices for Hardware Isolation Based Security." In Search-Based Software Engineering. Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-99241-9_24.

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Dowsley, Rafael, Jörn Müuller-Quade, and Tobias Nilges. "Weakening the Isolation Assumption of Tamper-Proof Hardware Tokens." In Lecture Notes in Computer Science. Springer International Publishing, 2015. http://dx.doi.org/10.1007/978-3-319-17470-9_12.

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Ding, Baozeng, Fufeng Yao, Yanjun Wu, and Yeping He. "Improving Flask Implementation Using Hardware Assisted In-VM Isolation." In IFIP Advances in Information and Communication Technology. Springer Berlin Heidelberg, 2012. http://dx.doi.org/10.1007/978-3-642-30436-1_10.

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Tople, Shruti, Soyeon Park, Min Suk Kang, and Prateek Saxena. "VeriCount: Verifiable Resource Accounting Using Hardware and Software Isolation." In Applied Cryptography and Network Security. Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-93387-0_34.

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Shi, Bin, Lei Cui, Bo Li, Xudong Liu, Zhiyu Hao, and Haiying Shen. "ShadowMonitor: An Effective In-VM Monitoring Framework with Hardware-Enforced Isolation." In Research in Attacks, Intrusions, and Defenses. Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-030-00470-5_31.

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Dreimann, Marcel Lütke, Jan Mühlig, Michael Müller, Olaf Spinczyk, and Jens Teubner. "MxKernel: A Bare-Metal Runtime System for Database Operations on Heterogeneous Many-Core Hardware." In Scalable Data Management for Future Hardware. Springer Nature Switzerland, 2025. https://doi.org/10.1007/978-3-031-74097-8_5.

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Abstract Large-scale data processing forms the core of modern online services, such as social media and e-commerce, calling for an ever-increasing performance with predictable service quality. Even though emerging hardware platforms can deliver the required performance, actually harnessing it and guaranteeing a certain service quality is still a challenge for application and system software developers. We argue that the major hindrance for applications and system software alike lies in the design of today’s system software architecture. The thread abstraction, for example, hides hardware chara
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Wang, Zhuoyue, Zhiqiang Wang, Jinyang Zhao, and Yaping Chi. "PCCP: A Private Container Cloud Platform Supporting Domestic Hardware and Software." In Proceeding of 2021 International Conference on Wireless Communications, Networking and Applications. Springer Nature Singapore, 2022. http://dx.doi.org/10.1007/978-981-19-2456-9_41.

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AbstractWith the widespread use of container cloud, the security issue is becoming more and more critical. While dealing with common security threats in cloud platforms and traditional data centres, there are some new security issues and challenges in the container cloud platform. For example, there are significant challenges in network isolation and resource management. This paper proposes a private container cloud platform PCCP based on Docker supporting domestic software and hardware to solve these security problems. This paper introduces the system architecture and functional architecture
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Yuan, Shenghao, Frédéric Besson, Jean-Pierre Talpin, Samuel Hym, Koen Zandberg, and Emmanuel Baccelli. "End-to-End Mechanized Proof of an eBPF Virtual Machine for Micro-controllers." In Computer Aided Verification. Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-13188-2_15.

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AbstractRIOT is a micro-kernel dedicated to IoT applications that adopts eBPF (extended Berkeley Packet Filters) to implement so-called femto-containers. As micro-controllers rarely feature hardware memory protection, the isolation of eBPF virtual machines (VM) is critical to ensure system integrity against potentially malicious programs. This paper shows how to directly derive, within the Coq proof assistant, the verified C implementation of an eBPF virtual machine from a Gallina specification. Leveraging the formal semantics of the CompCert C compiler, we obtain an end-to-end theorem stating
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Actas de conferencias sobre el tema "Hardware isolation"

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Unterguggenberger, Martin, David Schrammel, Lukas Maar, Lukas Lamster, Vedad Hadžić, and Stefan Mangard. "Cryptographic Least Privilege Enforcement for Scalable Memory Isolation." In 2025 IEEE International Symposium on Hardware Oriented Security and Trust (HOST). IEEE, 2025. https://doi.org/10.1109/host64725.2025.11050045.

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Aviram, Ady, Marija Trifunovic, Victor Zayas, Anoop Mokha, and Stanley Low. "Recommended Design Criteria and Implementation Strategies for Seismic Isolation." In IABSE Congress, San José 2024: Beyond Structural Engineering in a Changing World. International Association for Bridge and Structural Engineering (IABSE), 2024. https://doi.org/10.2749/sanjose.2024.0471.

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&lt;p&gt;Based on proven successful performance of select seismically isolated building and infrastructure projects under moderate to severe earthquakes around the world, the present paper provides a series of recommended design criteria and special considerations targeting the Continued Functionality of seismically isolated structures. The recommendations offered by the authors for building structures include inter-story drift limits, floor spectral acceleration limits, spectral response modification factors, and other key design parameters for the protected structure, targeting enhanced stru
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Lee, Sukho, and Kristofor Dickson. "Lock-in Amplifier Applications for Fault Isolation." In ISTFA 2024. ASM International, 2024. http://dx.doi.org/10.31399/asm.cp.istfa2024p0377.

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Abstract This paper describes how lock-in amplifiers and boxcar averaging can overcome limitations in conventional fault isolation techniques for microelectronic testing. Our approach achieves superior results compared to traditional spectrum analyzer methods through three key applications. First, we measure the signal-to-noise ratio of individual pulses during laser voltage tracing (LVT) across varying pulse widths. Second, we leverage enhanced LVT imaging to improve computer-aided design to stage alignment and laser voltage probe placement—a crucial advancement for analyzing compressed scan
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Gurram, Mani Rupak, Pk Mithun Kumar, and Fathi Amsaad. "Isolation Forest Based TinyML for Detecting Hardware Trojans on FPGA in Real Time." In 2024 IEEE Physical Assurance and Inspection of Electronics (PAINE). IEEE, 2024. https://doi.org/10.1109/paine62042.2024.10792760.

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Sampath, Amrutha, Kristofor Dickson, George W. Lange, Carey Wu, and Keith A. Serrels. "Evaluation of the Analyzability of Complex Secure Intellectual Property Using Fault Isolation Techniques versus the Hardware Security Threat They Pose." In ISTFA 2024. ASM International, 2024. http://dx.doi.org/10.31399/asm.cp.istfa2024p0385.

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Abstract Secure edge devices and the need for hardware security are of paramount importance due to the growing demand for cybersecurity. Hardware security has been strengthened using complex architecture to provide uncompromisable security and prevent malicious cybersecurity attacks. To prevent unauthorized access using even the most advanced failure analysis (FA) techniques, the Hardware Security Module (HSM) implements cryptographic algorithms and data obfuscation using many raw combinational logic and state machines. When a newly taped-out device fails to operate or fails to come out of its
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Endrinal, Lesly, Rakesh Kinger, Wilson Pradeep, et al. "Solving Complex Electrical Fault Isolation Challenges with Innovative DFT Strategies." In ISTFA 2024. ASM International, 2024. http://dx.doi.org/10.31399/asm.cp.istfa2024p0125.

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Abstract As System-on-a-Chip (SoC) continues to increase in complexity, multiple functionalities are being integrated into one integrated circuit (IC). This requires optimization of Design-for-Testability (DFT) strategies to minimize test time while still ensuring full test coverage of the entire chip. It has led to the widespread adoption of Tessent Streaming Scan Network (SSN) architecture on advanced technology nodes. Unlike traditional scan architectures that send data directly to the scan chains, SSN breaks down the data into packets and optimizes the delivery of these packets to allow ef
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Flor, Alexander, and Jeffrey S. Javier. "Addressing the Cost and Execution Challenges of Scan Chain Testing and Failure Analysis of Complex IC’s." In ISTFA 2024. ASM International, 2024. http://dx.doi.org/10.31399/asm.cp.istfa2024p0074.

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Abstract Analyzing scan chain failures is challenging without dedicated test hardware. Traditional solutions like ATE testers and compact diagnosis tools have significant drawbacks: they're expensive, require complex hardware customization and proprietary software licenses, and need substantial lab space. This paper presents a cost-effective alternative: a portable, flexible, and fully customizable bench-top scan chain testing system that easily integrates with fault isolation tools. Using an off-the-shelf embedded development tool, we replicated the complete scan chain testing process—from pa
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Karunanithi, Arun, Joseph Caroselli, Winston Gao, and Aaron Liao. "Enhancing Soft Defect Localization with Software Automated Intelligent Laser Scanning (SAILS)." In ISTFA 2024. ASM International, 2024. http://dx.doi.org/10.31399/asm.cp.istfa2024p0035.

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Abstract Soft defect localization (SDL) is a fault isolation (FI) technique used to root cause device marginalities and/or defects. The variety of test modes and their marginalities that can be solved with SDL is increasing as we find new ways to utilize this technique to our needs. However, SDL analysis can be time consuming if the test times are slow since millions of test executions are needed to get a statistically significant result. To solve this problem, we propose an improvement named software automated intelligent laser scanning (SAILS) to modulate laser dwell time on the fly. This so
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Ekberg, Jan-Erik. "Hardware Isolation for Trusted Execution." In CCS'16: 2016 ACM SIGSAC Conference on Computer and Communications Security. ACM, 2016. http://dx.doi.org/10.1145/2994459.2994460.

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Song, Chengyu, Hyungon Moon, Monjur Alam, et al. "HDFI: Hardware-Assisted Data-Flow Isolation." In 2016 IEEE Symposium on Security and Privacy (SP). IEEE, 2016. http://dx.doi.org/10.1109/sp.2016.9.

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Informes sobre el tema "Hardware isolation"

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Author, Not Given. Characteristics of spent fuel, high-level waste, and other radioactive wastes which may require long-term isolation: Appendix 2E, Physical descriptions of LWR nonfuel assembly hardware, Appendix 2F, User's guide to the LWR nonfuel assembly data base. Office of Scientific and Technical Information (OSTI), 1987. http://dx.doi.org/10.2172/5294562.

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Johnson, Derek, and Nigel Clark. PR-746-22204-R01 Review of Technologies to Enable In-situ Valve Service to Reduce Methane Emissions. Pipeline Research Council International, Inc. (PRCI), 2024. http://dx.doi.org/10.55274/r0000058.

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Leaking gas industry valve stem seals are recognized as a substantial source of atmospheric methane, which is a greenhouse gas. Newly proposed regulations include methane alongside volatile organic compound emissions, with leak detection and repair requirements. If a leak is identified a first attempt at repair must occur no later than five calendar days after identification, or else be justifiably delayed. The objective of this report is to review valve technology and methods used to address in-situ valve stem leak repair that offers an economical solution with reduced service disruption. A w
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Wu, Yingjie, Selim Gunay, and Khalid Mosalam. Hybrid Simulations for the Seismic Evaluation of Resilient Highway Bridge Systems. Pacific Earthquake Engineering Research Center, University of California, Berkeley, CA, 2020. http://dx.doi.org/10.55461/ytgv8834.

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Bridges often serve as key links in local and national transportation networks. Bridge closures can result in severe costs, not only in the form of repair or replacement, but also in the form of economic losses related to medium- and long-term interruption of businesses and disruption to surrounding communities. In addition, continuous functionality of bridges is very important after any seismic event for emergency response and recovery purposes. Considering the importance of these structures, the associated structural design philosophy is shifting from collapse prevention to maintaining funct
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