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Tesis sobre el tema "Hardware Security"

Autor: Grafiati

Publicado: 4 de junio de 2021

Última modificación: 25 de julio de 2025

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1

Kalibjian, Jeff. "Securing Telemetry Post Processing Applications with Hardware Based Security." International Foundation for Telemetering, 2004. http://hdl.handle.net/10150/605052.

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International Telemetering Conference Proceedings / October 18-21, 2004 / Town & Country Resort, San Diego, California<br>The use of hardware security for telemetry in satellites utilized for intelligence and defense applications is well known. Less common is the use of hardware security in ground-based computers hosting applications that post process telemetry data. Analysis reveals vulnerabilities in software only security solutions that can result in the compromise of telemetry data housed on ground-based computer systems. Such systems maybe made less susceptible to compromise with the use

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2

Chakraborty, Rajat Subhra. "Hardware Security through Design Obfuscation." Cleveland, Ohio : Case Western Reserve University, 2010. http://rave.ohiolink.edu/etdc/view?acc_num=case1270133481.

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Thesis (Doctor of Philosophy)--Case Western Reserve University, 2010<br>Department of EECS - Computer Engineering Title from PDF (viewed on 2010-05-25) Includes abstract Includes bibliographical references and appendices Available online via the OhioLINK ETD Center

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3

Tselekounis, Ioannis. "Cryptographic techniques for hardware security." Thesis, University of Edinburgh, 2018. http://hdl.handle.net/1842/33148.

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Traditionally, cryptographic algorithms are designed under the so-called black-box model, which considers adversaries that receive black-box access to the hardware implementation. Although a "black-box" treatment covers a wide range of attacks, it fails to capture reality adequately, as real-world adversaries can exploit physical properties of the implementation, mounting attacks that enable unexpected, non-black-box access, to the components of the cryptographic system. This type of attacks is widely known as physical attacks, and has proven to be a significant threat to the real-world securi

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4

Edmison, Joshua Nathaniel. "Hardware Architectures for Software Security." Diss., Virginia Tech, 2006. http://hdl.handle.net/10919/29244.

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The need for hardware-based software protection stems primarily from the increasing value of software coupled with the inability to trust software that utilizes or manages shared resources. By correctly utilizing security functions in hardware, trust can be removed from software. Existing hardware-based software protection solutions generally suffer from utilization of trusted software, lack of implementation, and/or extreme measures such as processor redesign. In contrast, the research outlined in this document proposes that substantial, hardware-based software protection can be achieved,

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5

Leonhard, Julian. "Analog hardware security and trust." Electronic Thesis or Diss., Sorbonne université, 2021. http://www.theses.fr/2021SORUS246.

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La mondialisation et la spécialisation de la chaîne d'approvisionnement des circuits intégrés (CI) ont conduit les entreprises de semi-conducteurs à partager leur précieuse propriété intellectuelle (PI) avec de nombreuses parties pour les faire fabriquer, tester, etc. En conséquence, les PI et les CI sensibles sont exposés à des parties potentiellement malveillantes, ce qui entraîne de graves menaces de piratage telles que la contrefaçon ou la retro ingénierie. Dans cette thèse, nous développons des méthodes pour sécuriser les IP/CI analogiques et mixtes contre les menaces de piratage dans la

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6

Bilzor, Michael B. "Defining and enforcing hardware security requirements." Monterey, California. Naval Postgraduate School, 2011. http://hdl.handle.net/10945/10741.

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Security in computing systems to date has focused mostly on software. In this research, we explore the application and enforceability of well-defined security requirements in hardware designs. The principal threats to hardware systems demonstrated in the academic literature to date involve some type of subversion, often called a Hardware Trojan or malicious inclusion. Detecting these has proved very difficult. We demonstrate a method whereby the dynamic enforcement of a processor's security requirements can be used to detect the presence of some of these malicious inclusions. Although ther

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7

Sekar, Sanjana. "Logic Encryption Methods for Hardware Security." University of Cincinnati / OhioLINK, 2017. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1505124923353686.

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8

Xue, Hao. "Hardware Security and VLSI Design Optimization." Wright State University / OhioLINK, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=wright1546466777397815.

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9

Valea, Emanuele. "Security Techniques for Test Infrastructures." Thesis, Montpellier, 2020. http://www.theses.fr/2020MONTS042.

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Les infrastructures de test sont essentielles pour l'industrie moderne des circuits intégrés. La nécessité de détecter les défauts de fabrication et de prévenir les défaillances des systèmes sur le terrain, rend leur présence inévitable dans chaque circuit intégré et ses sous-modules. Malheureusement, les infrastructures de test représentent également une menace pour la sécurité en raison de la contrôlabilité et de l'observabilité accrues qu'elles offrent généralement sur les circuits internes. Dans cette thèse, nous présentons une analyse complète des menaces existantes et des contre-mesures

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10

Wenhua, Qi, Zhang Qishan, and Liu Hailong. "RESEARCH OF SECURITY HARDWARE IN PKI SYSTEM." International Foundation for Telemetering, 2003. http://hdl.handle.net/10150/606688.

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International Telemetering Conference Proceedings / October 20-23, 2003 / Riviera Hotel and Convention Center, Las Vegas, Nevada<br>Security hardware based on asymmetric algorithm is the key component of Public Key Infrastructure (PKI), which decides the safety and performance of system. Security device in server or client have some common functions. We designed the client token and cryptographic server to improve the performance of PKI, and got obvious effect.

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11

Zhang, Ning. "Attack and Defense with Hardware-Aided Security." Diss., Virginia Tech, 2016. http://hdl.handle.net/10919/72855.

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Riding on recent advances in computing and networking, our society is now experiencing the evolution into the age of information. While the development of these technologies brings great value to our daily life, the lucrative reward from cyber-crimes has also attracted criminals. As computing continues to play an increasing role in the society, security has become a pressing issue. Failures in computing systems could result in loss of infrastructure or human life, as demonstrated in both academic research and production environment. With the continuing widespread of malicious software and new

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12

Ma, Yao. "Quantum Hardware Security and Near-term Applications." Electronic Thesis or Diss., Sorbonne université, 2023. https://accesdistant.sorbonne-universite.fr/login?url=https://theses-intra.sorbonne-universite.fr/2023SORUS500.pdf.

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Les primitives de sécurité matérielle sont des composants et des mécanismes fondamentaux basés sur le matériel et utilisés pour améliorer la sécurité des systèmes informatiques modernes en général. Ces primitives fournissent des éléments de base pour la mise en œuvre des fonctions de sécurité et la protection contre les menaces afin de garantir l'intégrité, la confidentialité et la disponibilité des informations et des ressources. Avec le développement à grande vitesse de l'informatique quantique et du traitement de l'information, la construction de primitives de sécurité matérielle avec des s

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13

Yao, Håkansson Jonathan, and Niklas Rosencrantz. "Formal Verification of Hardware Peripheral with Security Property." Thesis, KTH, Skolan för datavetenskap och kommunikation (CSC), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-209807.

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One problem with computers is that the operating system automatically trusts any externallyconnected peripheral. This can result in abuse when a peripheral technically can violate the security model because the peripheral is trusted. Because of that the security is an important issue to look at.The aim of our project is to see in which cases hardware peripherals can be trusted. We built amodel of the universal asynchronous transmitter/receiver (UART), a model of the main memory(RAM) and a model of a DMA controller. We analysed interaction between hardware peripherals,user processes and the mai

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14

Li, Huiyun. "Security evaluation at design time for cryptographic hardware." Thesis, University of Cambridge, 2006. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.613888.

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15

Müelich, Sven [Verfasser]. "Channel coding for hardware-intrinsic security / Sven Müelich." Ulm : Universität Ulm, 2019. http://d-nb.info/119830989X/34.

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16

Letan, Thomas. "Specifying and Verifying Hardware-based Security Enforcement Mechanisms." Thesis, CentraleSupélec, 2018. http://www.theses.fr/2018CSUP0002.

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Dans ces travaux de thèse, nous nous intéressons à une classe de stratégies d'application de politiques de sécurité que nous appelons HSE, pour Hardware-based Security Enforcement. Dans ce contexte, un ou plusieurs composants logiciels de confiance contraignent l'exécution du reste de la pile logicielle avec le concours de la plate-forme matérielle sous-jacente afin d'assurer le respect d'une politique de sécurité donnée. Pour qu'un mécanisme HSE contraigne effectivement l'exécution de logiciels arbitraires, il est nécessaire que la plate-forme matérielle et les composants logiciels de confian

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17

Mustapa, Muslim. "PUF based FPGAs for Hardware Security and Trust." University of Toledo / OhioLINK, 2015. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1436361629.

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18

Markettos, Athanasios Theodore. "Active electromagnetic attacks on secure hardware." Thesis, University of Cambridge, 2011. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.609203.

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19

TAKALOO, HADIS. "Design and Implementation of Two Hardware Silicon Prototypes for Cryptography and Hardware Security Applications." Doctoral thesis, Università di Siena, 2020. http://hdl.handle.net/11365/1107236.

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This thesis reports the main research results that I achieved during my PhD program at the Department of Information Engineering and Mathematics of the University of Siena, Italy. The purpose of my research was to study and design lightweight crypto-hardware silicon Integrated Circuits (ICs) based on non-linear dynamical systems for hardware security and cryptographic applications. The objectives of this work were ambitious, since the goal was facing the design of silicon True Random Bit Generators (TRBGs) and Physically Unclonable Functions (PUFs) with new methods and multidisciplinary appro

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20

Shepherd, Simon John. "A distributed security architecture for large scale systems." Thesis, University of Plymouth, 1992. http://hdl.handle.net/10026.1/2143.

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This thesis describes the research leading from the conception, through development, to the practical implementation of a comprehensive security architecture for use within, and as a value-added enhancement to, the ISO Open Systems Interconnection (OSI) model. The Comprehensive Security System (CSS) is arranged basically as an Application Layer service but can allow any of the ISO recommended security facilities to be provided at any layer of the model. It is suitable as an 'add-on' service to existing arrangements or can be fully integrated into new applications. For large scale, distributed

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21

Basak, Abhishek. "INFRASTRUCTURE AND PRIMITIVES FOR HARDWARE SECURITY IN INTEGRATED CIRCUITS." Case Western Reserve University School of Graduate Studies / OhioLINK, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=case1458787036.

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22

Deb, Nath Atul Prasad. "Hardware-based Authentication and Security for Advanced Metering Infrastructure." University of Toledo / OhioLINK, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1470106841.

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23

Cozzi, Maxime. "Infrared Imaging for Integrated Circuit Trust and Hardware Security." Thesis, Montpellier, 2019. http://www.theses.fr/2019MONTS046.

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La généralisation des circuits intégrés et plus généralement de l'électronique à tous les secteurs d'activité humaine, nécessite d'assurer la sécurité d'un certain nombre de systèmes critiques (militaire, finance, santé, etc). Aujourd'hui, l'intégrité de ces systèmes repose sur un éventail d'attaques connues, pour lesquelles des contremesures ont été développées.Ainsi, la recherche de nouvelles attaques contribue fortement à la sécurisation des circuits électroniques. La complexité toujours croissante des circuits, permise par les progrès dans les technologies silicium, a pour conséquence l'ap

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24

Reid, Jason Frederick. "Enhancing security in distributed systems with trusted computing hardware." Thesis, Queensland University of Technology, 2007. https://eprints.qut.edu.au/16379/1/Jason_Reid_Thesis.pdf.

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The need to increase the hostile attack resilience of distributed and internet-worked computer systems is critical and pressing. This thesis contributes to concrete improvements in distributed systems trustworthiness through an enhanced understanding of a technical approach known as trusted computing hardware. Because of its physical and logical protection features, trusted computing hardware can reliably enforce a security policy in a threat model where the authorised user is untrusted or when the device is placed in a hostile environment. We present a critical analysis of vulnerabilit

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25

Reid, Jason Frederick. "Enhancing security in distributed systems with trusted computing hardware." Queensland University of Technology, 2007. http://eprints.qut.edu.au/16379/.

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The need to increase the hostile attack resilience of distributed and internet-worked computer systems is critical and pressing. This thesis contributes to concrete improvements in distributed systems trustworthiness through an enhanced understanding of a technical approach known as trusted computing hardware. Because of its physical and logical protection features, trusted computing hardware can reliably enforce a security policy in a threat model where the authorised user is untrusted or when the device is placed in a hostile environment. We present a critical analysis of vulnerabilit

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26

Fattori, A. "HARDWARE-ASSISTED VIRTUALIZATION AND ITS APPLICATIONS TO SYSTEMS SECURITY." Doctoral thesis, Università degli Studi di Milano, 2014. http://hdl.handle.net/2434/233326.

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In recent years, the number and sophistication of cybercriminals attacks has risen at an alarming pace, and this is not likely to slow down in the near future. To date, security researchers and industry proposed several countermeasures to this phenomenon, and continue to investigate new techniques, in a real arms race against miscreants. Most modern techniques to detect or prevent threats are based on dynamic analysis, that allows to observe the properties and behaviors of software while it runs. Many dynamic approaches are based on virtualization technology. Over the years, indeed,

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27

Badier, Hannah. "Transient obfuscation for HLS security : application to cloud security, birthmarking and hardware Trojan defense." Thesis, Brest, École nationale supérieure de techniques avancées Bretagne, 2021. https://tel.archives-ouvertes.fr/tel-03789700.

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La mondialisation croissante de la chaîne d'approvisionnement des semi-conducteurs, ainsi que la complexité et la diversité croissantes des flux de conception de matériel, ont entraîné une recrudescence des menaces de sécurité : risques de vol et de revente de propriété intellectuelle, de rétro-ingénierie et d'insertion de code malveillant sous la forme de chevaux de Troie pendant la fabrication et au moment de la conception ont fait l'objet d'une recherche croissante ces dernières années. Cependant, les menaces lors de la synthèse de haut niveau (HLS), où une description algorithmique est tra

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28

Kuvaiskii, Dmitrii. "Hardware-Assisted Dependable Systems." Doctoral thesis, Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2018. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-234205.

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Unpredictable hardware faults and software bugs lead to application crashes, incorrect computations, unavailability of internet services, data losses, malfunctioning components, and consequently financial losses or even death of people. In particular, faults in microprocessors (CPUs) and memory corruption bugs are among the major unresolved issues of today. CPU faults may result in benign crashes and, more problematically, in silent data corruptions that can lead to catastrophic consequences, silently propagating from component to component and finally shutting down the whole system. Similarly

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29

Huang, Sinan. "Hardware Evaluation of SHA-3 Candidates." Thesis, Virginia Tech, 2011. http://hdl.handle.net/10919/32932.

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Cryptographic hash functions are used extensively in information security, most notably in digital authentication and data integrity verification. Their performance is an important factor of the overall performance of a secure system. In 2005, some groups of cryptanalysts were making increasingly successful attacks and exploits on the cryptographic hash function, SHA-1, the most widely used hash function of the secure hashing algorithm family. Although these attacks do not work on SHA-2, the next in the series of the secure hashing algorithm family, the National Institute of Standards and Tech

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30

Patel, Krutartha Computer Science &amp Engineering Faculty of Engineering UNSW. "Hardware-software design methods for security and reliability of MPSoCs." Awarded by:University of New South Wales. Computer Science & Engineering, 2009. http://handle.unsw.edu.au/1959.4/44854.

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Security of a Multi-Processor System on Chip (MPSoC) is an emerging area of concern in embedded systems. MPSoC security is jeopardized by Code Injection attacks. Code Injection attacks, which are the most common types of software attacks, have plagued single processor systems. Design of MPSoCs must therefore incorporate security as one of the primary objectives. Code Injection attacks exploit vulnerabilities in \trusted" and legacy code. An architecture with a dedicated monitoring processor (MONITOR) is employed to simultaneously supervise the application processors on an MPSoC. The program c

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31

Skorobogatov, Sergei Petrovich. "Semi-invasive attacks : a new approach to hardware security analysis." Thesis, University of Cambridge, 2005. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.614760.

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32

Banerjee, Utsav. "Energy-efficient protocols and hardware architectures for transport layer security." Thesis, Massachusetts Institute of Technology, 2017. http://hdl.handle.net/1721.1/111861.

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Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.<br>This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.<br>Cataloged from student-submitted PDF version of thesis.<br>Includes bibliographical references (pages 99-104).<br>The Internet of Things (IoT) has introduced a vision of an Internet where computing and sensing devices are interconnected. Digitally connected devices are encroaching on every aspect of our lives, including our hom

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33

Wan, Shengye. "Hardware-Assisted Security Mechanisms On Arm-Based Multi-Core Processors." W&M ScholarWorks, 2020. https://scholarworks.wm.edu/etd/1616444331.

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During the last decade, Trusted Execution Environment (TEE) provided by ARM TrustZone had become one of the most popular techniques to build security on mobile devices. On a TrustZone-enabled system, the software can execute in either Secure World (trusted) and Normal World (untrusted). Meanwhile, along with the expeditious development of TrustZone technology, the security of TEE is also challenged by dealing with more and more on-board hardware and in-TEE applications. In this dissertation, we explicitly study the security of ARM TrustZone technology with the latest ARM architecture in three

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34

Babecki, Christopher. "A Memory-Array Centric Reconfigurable Hardware Accelerator for Security Applications." Case Western Reserve University School of Graduate Studies / OhioLINK, 2015. http://rave.ohiolink.edu/etdc/view?acc_num=case1427381331.

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35

Boraten, Travis Henry. "Hardware Security Threat and Mitigation Techniques for Network-on-Chips." Ohio University / OhioLINK, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1596031630118173.

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36

Maji, Saurav. "Energy-efficient protocol and hardware for security of implantable devices." Thesis, Massachusetts Institute of Technology, 2019. https://hdl.handle.net/1721.1/122701.

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This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.<br>Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2019<br>Cataloged from student-submitted PDF version of thesis.<br>Includes bibliographical references (pages 77-83).<br>Modern-day bio-electronics has truly revolutionized monitoring, diagnosis, and treatment of disease. The continued development of microelectronic has fueled the development of implantable and wearable devices by enabli

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37

Drzevitzky, Stephanie [Verfasser], Marco Akademischer Betreuer] Platzner, and Uwe [Akademischer Betreuer] [Kastens. "Proof-carrying hardware : a novel approach to reconfigurable hardware security / Stephanie Drzevitzky. Betreuer: Marco Platzner ; Uwe Kastens." Paderborn : Universitätsbibliothek, 2012. http://d-nb.info/1036891348/34.

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38

Hoffmann, Max [Verfasser], Christof [Gutachter] Paar, and Ingrid [Gutachter] Verbauwhede. "Security and subvertability of modern hardware : a journey through selected layers of hardware security / Max Hoffmann ; Gutachter: Christof Paar, Ingrid Verbauwhede ; Fakultät für Elektrotechnik und Informationstechnik." Bochum : Ruhr-Universität Bochum, 2020. http://d-nb.info/1223175952/34.

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39

Lu, Qi Charles. "Active tamper-detector hardware mechanism and FPGA implementation /." Diss., Online access via UMI:, 2006.

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40

Dinh, Tien Tuan Anh. "Trustworthy infrastructure for Peer-to-Peer applications using hardware based security." Thesis, University of Birmingham, 2010. http://etheses.bham.ac.uk//id/eprint/1015/.

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Peer-to-Peer (P2P) infrastructure has been used for designing many large-scale distributed systems. Structured P2P, in particular, has received a greater amount of research attention. Having trust in such the P2P environments can help mitigate many problems including security, because peers can choose to interact with the ones that are deemed trustworthy. However, there exists numerous hurdles that need to be overcome before a reliable trust system can be implemented for P2P. This thesis seeks to improve the existing reputation metrics and feedback mechanisms which are important components of

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41

Pundir, Nitin K. Pundir. "Design of a Hardware Security PUF Immune to Machine Learning Attacks." University of Toledo / OhioLINK, 2017. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1513009797455883.

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42

Azhar, Mahmood Javed. "Duty-Cycle Based Physical Unclonable Functions (PUFs) for Hardware Security Applications." Thesis, University of South Florida, 2019. http://pqdtopen.proquest.com/#viewpdf?dispub=10980455.

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<p> Duty cycle and frequency are important characteristics of periodic signals that are exploited to develop a variety of application circuits in IC design. Controlling the duty cycle and frequency provides a method to develop adaptable circuits for a variety of applications. These applications range from stable on-chip clock generation circuits, on-chip voltage regulation circuits, and Physical unclonable functions for hardware security applications. Ring oscillator circuits that are developed with CMOS inverter circuits provide a simple, versatile flexible method to generated periodic signal

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43

Azhar, Mahmood Javed. "Duty-Cycle Based Physical Unclonable Functions (PUFs) for Hardware Security Applications." Scholar Commons, 2018. https://scholarcommons.usf.edu/etd/7470.

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Duty cycle and frequency are important characteristics of periodic signals that are exploited to develop a variety of application circuits in IC design. Controlling the duty cycle and frequency provides a method to develop adaptable circuits for a variety of applications. These applications range from stable on-chip clock generation circuits, on-chip voltage regulation circuits, and Physical unclonable functions for hardware security applications. Ring oscillator circuits that are developed with CMOS inverter circuits provide a simple, versatile fle

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44

Challa, Rohith Prasad. "SR Flip-Flop Based Physically Unclonable Function (PUF) for Hardware Security." Scholar Commons, 2018. https://scholarcommons.usf.edu/etd/7669.

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Physically Unclonable Functions (PUFs) are now widely being used to uniquely identify Integrated Circuits (ICs). In this work, we propose a novel Set-Reset (SR) Flip-flop based PUF design. For a NAND gate based SR flip-flop, the input condition S (Set) = 1 and R (Reset) = 1 must be avoided as it is an inconsistent condition. When S=R=1 is applied followed by S=R=0, then the outputs Q and Q' undergo race condition and depending on the delays of the NAND gates in the feedback path, the output Q can settle at either 0 or 1. Because of process variations in an IC, the NAND delays are statistic

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45

Fießler, Andreas Christoph Kurt. "Hybrid Hardware/Software Architectures for Network Packet Processing in Security Applications." Doctoral thesis, Humboldt-Universität zu Berlin, 2019. http://dx.doi.org/10.18452/20023.

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Die Menge an in Computernetzwerken verarbeiteten Daten steigt stetig, was Netzwerkgeräte wie Switches, Bridges, Router und Firewalls vor Herausfordungen stellt. Die Performance der verbreiteten, CPU/softwarebasierten Ansätze für die Implementierung dieser Aufgaben ist durch den inhärenten Overhead in der sequentiellen Datenverarbeitung limitiert, weshalb solche Funktionalitäten vermehrt auf dedizierten Hardwarebausteinen realisiert werden. Diese bieten eine schnelle, parallele Verarbeitung mit niedriger Latenz, sind allerdings aufwendiger in der Entwicklung und weniger flexibel. Nicht jede

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46

Portella, Rodrigo. "Balancing energy, security and circuit area in lightweight cryptographic hardware design." Thesis, Paris Sciences et Lettres (ComUE), 2016. http://www.theses.fr/2016PSLEE036/document.

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Cette thèse aborde la conception et les contremesures permettant d'améliorer le calcul cryptographique matériel léger. Parce que la cryptographie (et la cryptanalyse) sont de nos jours de plus en plus omniprésentes dans notre vie quotidienne, il est crucial que les nouveaux systèmes développés soient suffisamment robustes pour faire face à la quantité croissante de données de traitement sans compromettre la sécurité globale. Ce travail aborde de nombreux sujets liés aux implémentations cryptographiques légères. Les principales contributions de cette thèse sont : - Un nouveau système d'accéléra

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47

Vaslin, Romain. "Hardware core for off-chip memory security management in embedded system." Lorient, 2008. http://www.theses.fr/2008LORIS119.

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Nous proposons une architecture matérielle sécurisée du démarrage du système en passant par l'exécution des applications jusqu'à sa mise àjour sur le terrain. Une nouvelle technique afin de garantir la confidentialité et l'intégrité des données en mémoires est présentée et évaluée dans un premier temp L'architecture proposée est alors étendue avec de nouvelles fonctionnalités qui permettent de gérer à la volée le niveau de sécurité spécifique à la donnée. Ceci ayant pour but de minimiser au maximum les coûts engendrés par la sécurité et notamment la surface, la performance, la consommation mém

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Vlach, Jiří. "Zabezpečovací ústředna - hardware." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2010. http://www.nusl.cz/ntk/nusl-218368.

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This work deals with the design and realization of a modular security central unit's hardware positioned in familial houses. As an operating component of the central unit is used Module Rabbit 3365 with an integrated Ethernet interface. Based on user's requirements and general requirements for electronic security system, circuit diagrams of the central unit's motherboard and power supply with a function of backup power supply are designed. The work also includes layout of a keyboard and LCD display. Printed circuit boards are designed, produced and assembled. The device is set to work. The las

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Johnston, B. A. "Investigation of methods for secure transmission of digital data at high speed." Thesis, University of Hertfordshire, 1987. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.377565.

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Hoque, Tamzidul. "Ring Oscillator Based Hardware Trojan Detection." University of Toledo / OhioLINK, 2015. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1430413190.

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