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1

Andaloussi, Issam y Moulay Brahim Sedra. "A design of sequential reversible circuits by reversible gates". International Journal of Engineering & Technology 9, n.º 2 (18 de abril de 2020): 397. http://dx.doi.org/10.14419/ijet.v9i2.30451.

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Reversible logic has become increasingly important in the design of low power CMOS circuits, quantum computing and nanotechnology. In this article we work on recent sequential circuits namely RS Flip Flop JK Flop Flip Flop Flop Flip Flop Master Slave Flip Flop using some reversible gates FG (Feyman Gate), FRG (Fredkin Gate), NG (New Gate) , PG (Peres Gate), BJN (New BJN Gate), while modifying them to obtain new circuits keeping their same functionality and increasing their performances.
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2

Surya Ali, Septian. "Trainer Gerbang Logika Digital Berbasis Arduino Mega 2560". JASEE Journal of Application and Science on Electrical Engineering 1, n.º 02 (28 de febrero de 2021): 47–62. http://dx.doi.org/10.31328/jasee.v1i02.13.

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Materi Rangkaian Digital merupakan komponen penting yang perlu di pelajari oleh mahasiswa Teknik Elektro karena di dunia elekronik tidak luput dari yang namanya Rangkaian Digital. Untuk memudahkan hal tersebut maka peneitian ini dengan menggunakan mikrokontrol Arduino Mega 2560 dapat membuat modul praktikum yang simpel dan mudah di pahami. masukan yang dihasilkan adalah dengan menggerakkan posisi toggle switch dan untuk indikator keluaran adalah lampu led, dan pengujian gerbang logika dilakukan dengan beberapa cara yaitu pengujian rangkaian kombinasional gerbang logika AND, OR, NOT, NAND, NOR, XOR, dan XNOR, masing-masing di uji dari 2 input 1 output, 3 input 1 output dan 4 input 1 output. Dan rangkaian sekuensial RS Flip-Flop, D Flip-Flop, T Flip-Flop, JK Flip-Flop, hasil pengujian yang diperoleh, masing-masing rangkaian kombinasional sudah sesuai dengan tabel kebenaran gerbang logika.
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3

Yao, Mao Qun, Li Bin Zhang y Han Neng Ye. "BiCMOS Flip-Flop Design Based on NPN-NPN Feedback Driver Circuits". Advanced Materials Research 712-715 (junio de 2013): 1826–29. http://dx.doi.org/10.4028/www.scientific.net/amr.712-715.1826.

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based on the analyzing the characteristic of BiCMOS circuits and theory of transmission voltage-switches, we proposed a general structure of binary BiCMOS circuit based on NPN-NPN feedback driver circuit. Then we designed binary BiCMOS master-slave JK flip-flop circuit and transmission gate D flip-flop circuit base on the general structure of NPN-NPN feedback driver circuit. With using HSPICE simulation, the results show that the circuits have the correct logical function. The proposed driver circuits can be used in the design of BiCMOS sequential circuits.
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4

Jin, Fang, Hengchang Rao, Zhi Zhao, Junlei Song, Wenqin Mo, Yajuan Hui y Kaifeng Dong. "Skyrmion-based JK flip–flop with a wedge-shaped circular track". Japanese Journal of Applied Physics 59, n.º 1 (1 de enero de 2020): 010907. http://dx.doi.org/10.7567/1347-4065/ab6507.

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5

Lin, Mi y Ling-ling Sun. "A novel ternary JK flip-flop using the resonant tunneling diode literal circuit". Journal of Zhejiang University SCIENCE C 13, n.º 12 (diciembre de 2012): 944–50. http://dx.doi.org/10.1631/jzus.c1200214.

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6

Zhang, Yongqiang, Guangjun Xie y Hongjun Lv. "Dual-edge triggered JK flip-flop with comprehensive analysis in quantum-dot cellular automata". Journal of Engineering 2018, n.º 7 (1 de julio de 2018): 354–59. http://dx.doi.org/10.1049/joe.2018.0138.

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7

Angizi, Shaahin, Samira Sayedsalehi, Arman Roohi, Nader Bagherzadeh y Keivan Navi. "Design and Verification of New n-Bit Quantum-Dot Synchronous Counters Using Majority Function-Based JK Flip-Flops". Journal of Circuits, Systems and Computers 24, n.º 10 (25 de octubre de 2015): 1550153. http://dx.doi.org/10.1142/s0218126615501534.

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Quantum-dot Cellular Automata (QCA) is an attractive nanoelectronics paradigm which is widely advocated as a possible replacement of conventional CMOS technology. Designing memory cells is a very interesting field of research in QCA domain. In this paper, we are going to propose novel nanotechnology-compatible designs based on the majority gate structures. In the first step, this objective is accomplished by QCA implementation of two well-organized JK flip-flop designs and in the second step; synchronous counters with different sizes are presented as an application. To evaluate functional correctness of the proposed designs and compare with state-of-the-art, QCADesigner tool is employed.
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8

Mandal, Sumana, Dhoumendra Mandal, Mrinal Kanti Mandal y Sisir Kumar Garai. "Design of frequency-encoded data-based optical master-slave-JK flip-flop using polarization switch". Optical Engineering 56, n.º 6 (14 de junio de 2017): 066105. http://dx.doi.org/10.1117/1.oe.56.6.066105.

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9

Pandey, Shraddha, Sonali Singh y Subodh Wairya. "Designing an Efficient Approach for JK and T Flip-Flop with Power Dissipation Analysis Using QCA". International Journal of VLSI Design & Communication Systems 7, n.º 3 (30 de junio de 2016): 29–48. http://dx.doi.org/10.5121/vlsic.2016.7303.

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10

Srivastava, Ashok. "N-MOS JK master/slave flip flop design for use in high speed control and counting applications". Microelectronics Reliability 26, n.º 2 (enero de 1986): 265–69. http://dx.doi.org/10.1016/0026-2714(86)90722-5.

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11

Keivanian, Farshid, Ali Yekta y Nasser Mehrshad. "Optimization Of Jk Flip Flop Layout With Minimal Average Power Of Consumption Based On Acor, Fuzzy-acor, GA, And Fuzzy-GA". Journal of Mathematics and Computer Science 14, n.º 01 (15 de enero de 2015): 1–15. http://dx.doi.org/10.22436/jmcs.014.01.01.

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12

Rao, Vartika y Sanjoy Mandal. "Modeling and analysis of all-optical 2-bit and 4-bit synchronous up counter using silicon waveguide based all-optical JK flip-flop in Z domain". Optik 228 (febrero de 2021): 166173. http://dx.doi.org/10.1016/j.ijleo.2020.166173.

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13

"Compact QCA based JK Flip-Flop for Digital System". International Journal of Innovative Technology and Exploring Engineering 8, n.º 12 (10 de octubre de 2019): 3182–85. http://dx.doi.org/10.35940/ijitee.l3074.1081219.

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Considering the roadmap of silicon, the high rate of shrinkage in dimensions of typical MOS circuits, genuine difficulties endanger this innovation. A quantum-dot cellular automaton (QCA) is an outstanding and conceivable answer for substitution of CMOS technology. Sequential circuits contain combinational circuits and memory elements which store binary information. Latches and Flip-flop circuits are the basic components of computerized circuits, along these lines. The area and energy of the sequential circuits has to be minimal for speed applications. Traditional implementation of JK flip-flop circuits requires more cells and consumes more energy. This paper proposes a compact and low energy JK Flip-flop, designed in CAD tool, QCADesigner. Analysis of energy was performed using the CAD tool, QCADesigner-E. The experimental results obtained in the proposed paper demonstrate the reduction in the cell count which in turn brings down the complexity of the circuit when compared to the reference QCA based JK Flip-flop circuits and it also shows a reduction in energy and area.
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14

Ogunlere Samson. "Implementation of an Alternative High Performance Flip Flop to JK Flip Flop". International Journal of Engineering Research and V8, n.º 01 (3 de febrero de 2019). http://dx.doi.org/10.17577/ijertv8is010077.

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15

Rushdi, Ali Muhammad Ali y Fares Ahmad Muhammad Ghaleb. "Novel Characterizations of the JK Bistables (Flip Flops)". Journal of Engineering Research and Reports, 3 de abril de 2019, 1–20. http://dx.doi.org/10.9734/jerr/2019/v4i316903.

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The JK flip flop is a flexible type of bistable elements that has extensive uses in digital electronics and control circuits. It is usually described by its characteristic equation or next-state table (used for analysis purposes) and its excitation table (used for synthesis purposes). This paper explores a variety of novel characterizations of JK flip flops. First, equational and implicational descriptions are presented, and methods of logic deduction are utilized to produce complete statements of all propositions that are true for a general JK flip flop. Next, methods of Boolean-equation solving are employed to find all possible ways to express the excitations in terms of the present state and next state. The concept of Boolean quotient is used to impose certain requirements so as to find particularly useful expressions of the excitations. Relations of JK flip flops to other types of flip flops are also explored. This paper is expected to provide an immediate pedagogical benefit, and to help facilitate the analysis and synthesis of sequential digital circuits.
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16

"Designing of Counters using JK Flip-Flop in Quantum Dot Cellular Automata". International Journal of Engineering and Advanced Technology 9, n.º 1S6 (31 de diciembre de 2019): 150–53. http://dx.doi.org/10.35940/ijeat.a1029.1291s619.

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In the post-CMOS condition an enormous development was played by the qca progress. As the CMOS improvement has a scaling tangle in focal nanometer drives, the best choice for CMOS progress was a quantum-spot cell automata progress. It has the combined thought of quantum mechanics &cell automata. QCA (quantum bit cell automata) was a quantum wonder that gives another computational stage to structure electronic circuits using quantum contacts &move information at nano level as a substitution of standard CMOS based movement. In standard CMOS improvement, transistors are used to make any robotized circuit yet in QCA, qca cells are used to make moved circuits &wire. In this paper, we proposed the breeze around counters using JK flip-flop. 2-piece &4-piece counters are executed using the QCA Technology. The perspective was filtered through &the solace of the circuit was surrendered by using QCA sketcher contraption.
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17

Law, Foo Kui, M. Rakib Uddin, Angie Teo Chen Chen y Bikash Nakarmi. "Positive edge-triggered JK flip-flop using silicon-based micro-ring resonator". Optical and Quantum Electronics 52, n.º 6 (junio de 2020). http://dx.doi.org/10.1007/s11082-020-02432-3.

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