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Artículos de revistas sobre el tema "Supply rejection"

Autor: Grafiati

Publicado: 4 de junio de 2021

Última modificación: 12 de febrero de 2022

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1

Li, Zheng Da y Lin Xie. "One Kind of Band-Gap Voltage Reference Source with Piecewise High-Order Temperature Compensation and Power Supply Rejection Ratio". Applied Mechanics and Materials 644-650 (septiembre de 2014): 3575–78. http://dx.doi.org/10.4028/www.scientific.net/amm.644-650.3575.

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This paper designed a new band-gap voltage reference circuit with two-stage temperature compensation.It realizes non-linear temperature compensation by using NMOS-pipe leakage current and increases the power supply rejection ratio of the band-gap voltage reference source by introducing negative feedback between the operational amplifier and the power supply. What is more, the paper simulates the band-gap voltage reference source based on CSMC 0.5μm CMOS technique. The result as follow: the band-gap voltage reference source has the temperature coefficient of 8.2ppm/oC among-40-120oC with the supply voltage of 3V, the low-frequency power supply rejection ratio is 83dBat 27oC and the power supply rejection ratio is 71dB in 1KHz, the output voltage regulation is 1.05mV/V in the supply voltage range from 2.4V to 5V.

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2

Steyaert, M. S. J. y W. M. C. Sansen. "Power supply rejection ratio in operational transconductance amplifiers". IEEE Transactions on Circuits and Systems 37, n.º 9 (1990): 1077–84. http://dx.doi.org/10.1109/31.57596.

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3

Pankratz, Erik J. y Edgar Sanchez-Sinencio. "Multiloop High-Power-Supply-Rejection Quadrature Ring Oscillator". IEEE Journal of Solid-State Circuits 47, n.º 9 (septiembre de 2012): 2033–48. http://dx.doi.org/10.1109/jssc.2012.2193517.

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4

Magara, Yasumoto, Takako Aizawa, Shouichi Kunikane, Masaki Itoh, Minoru Kohki, Mutuo Kawasaki y Hiroshi Takeuti. "The behavior of inorganic constituents and disinfection by products in reverse osmosis water desalination process". Water Science and Technology 34, n.º 9 (1 de noviembre de 1996): 141–48. http://dx.doi.org/10.2166/wst.1996.0196.

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The countries and regions which suffer from the shortage of fresh water resources have developed sea and brackish water desalination plants to supply drinking water. The desalination process has usually been designed from the rejection ratio of salt to meet the level of soluble residue, chloride concentration for drinking purposes. The Japanese government revised the drinking water quality standards to enhance an appropriate drinking water quality management for many hazardous micro-pollutants in drinking water. Since there has not been sufficient studyies on the performance of R.O. desalination processes on micro hazardous constituents, the authors carried out a pilot plant study and field study of several desalination plants for the public water supply. Most of the constituents of R.O. filtrate meets the drinking water quality standard under the design and operational condition that to attain 99% of the salt rejection. However, Langlier's index, boron and bromoform produced different figures from other inorganic constituents and organic micro pollutants. The rejection ratio of boron ranged only from 43 to 78%. Although the rejectio ratio of boron can be improved by increasing the driving pressure and by adjusting pH, the filtrate cannot meet the drinking water quality standard. Chlorination in the R.O. desalination process produces bromoform that can be removed by the R.O. membrane. However, bromide ion in the filtrate can enhance the formation of disinfection byproducts, if the filtrate is mixed with fresh water, in the distribution system of the public water supply.

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5

Kim, Youngil y Sangsun Lee. "H/V linear regulator with enhanced power supply rejection". IEICE Electronics Express 11, n.º 3 (2014): 20140012. http://dx.doi.org/10.1587/elex.11.20140012.

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6

Stauth, J. T. y S. R. Sanders. "Power Supply Rejection for RF Amplifiers: Theory and Measurements". IEEE Transactions on Microwave Theory and Techniques 55, n.º 10 (octubre de 2007): 2043–52. http://dx.doi.org/10.1109/tmtt.2007.905486.

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7

BRINSON, M. E. y D. J. FAULKNER. "Measurement and modelling of operational amplifier power supply rejection". International Journal of Electronics 78, n.º 4 (abril de 1995): 667–78. http://dx.doi.org/10.1080/00207219508926200.

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8

Vijay Mythry, Sarin y D. Jackuline Moni. "A 76db 828nv/√Hz Low Noise Bio Signal OTA For Neural Signal Recording Applications". International Journal of Engineering & Technology 7, n.º 3.3 (21 de junio de 2018): 48. http://dx.doi.org/10.14419/ijet.v7i3.3.14484.

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The low frequency, low amplitude biomedical signals which created a tremendous demand amongst clinicians and neuroscience researchers are to be amplified in the range of millihertz to kilohertz by rejecting the dc offsets. This research article presents a Bio Signal OTA (Bio-OTA) with 76dB gain, 828nV/ 16Hz"> noise and 390nW power is designed in 90nm CMOS process and also a brief survey on the different types of OTAs used for neuro recording applications is discussed. The Wilson current mirror is used to design 1volt Bio-OTA. The Common mode rejection ratio (CMRR) is obtained as 75dB, power supply rejection ratio (PSRR) is above 88dB and gain bandwidth product (GBW) is 223MHz.

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9

Javed, Khurram y Jeongjin Roh. "LDO regulator with high power supply rejection at 10 MHz". IEICE Electronics Express 13, n.º 24 (2016): 20160665. http://dx.doi.org/10.1587/elex.13.20160665.

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10

Boor, Steven E. "Electret microphone buffer circuit with significantly enhanced power supply rejection". Journal of the Acoustical Society of America 128, n.º 5 (2010): 3265. http://dx.doi.org/10.1121/1.3525296.

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11

Zhang, Si Min. "IC Design of the Band-Gap Reference and the Triangular Waveform Generator of Class D Audio Amplifier". Applied Mechanics and Materials 511-512 (febrero de 2014): 757–63. http://dx.doi.org/10.4028/www.scientific.net/amm.511-512.757.

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Class D audio amplifier can extend battery life for its small cubage and high efficiency. In connection with the advantages of Class D audio amplifier, a class D audio amplifier with high efficiency and low distortion is designed in this paper. A negative feedback is established to improve the linearity of the amplifier and power supply ripple rejection ratio. Minimizing the distortion of the system requires high-speed sampling. High-speed comparator is designed to meet this requirement. Moreover, the work requires that the chip has a band-gap reference with low temperature coefficient and high power supply rejection ratio.

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12

Ibrahim, Oladimeji, Nor Zaihar B. Yahaya y Nordin Saad. "PID Controller Response to Set-Point Change in DC-DC Converter Control". International Journal of Power Electronics and Drive Systems (IJPEDS) 7, n.º 2 (1 de junio de 2016): 294. http://dx.doi.org/10.11591/ijpeds.v7.i2.pp294-302.

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Power converter operations and efficiency is affected by variation in supply voltage, loads current, circuit elements, ageing and temperature. To meet the objective of tight voltage regulation, power converters circuit module and the control unit must be robust to reject disturbances arising from supply, load variation and changes in circuit elements. PID controller has been the most widely used in power converter control. This paper presents studies of robustness of PID controller tuning methods to step changes in the set point and disturbance rejection in power converter control. A DC-DC boost converter was modelled using averaged state-space mothod and PID controllers were designed with five different tuning methods. The study reveals the transient response and disturbance rejection capability of each tuning methods for their suitability in power supply design applications.

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13

Nallusamy, S., A. M. Muhammad Umarmukdhar y R. Suganthini Rekha. "A Proposed Supply Chain Model for Productivity Enhancement in Medium Scale Foundry Industries". International Journal of Engineering Research in Africa 20 (octubre de 2015): 248–58. http://dx.doi.org/10.4028/www.scientific.net/jera.20.248.

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In global competitive atmosphere, foundry industries are needed to perform efficiently with minimum percentage of rejections there by reducing cost of manufacturing. Foundries are using state of art processes with the involvement of experienced and knowledgeable people but the experience and knowledge needs to be transformed for the growth of the industries. Some foundries are working in a trial and error mode and get their work done. Many foundries have very less control on the rejections since they are in critical need of meeting production targets and they ignore the rejections and recover the castings. They need to have an efficient quality control aspiring for defects free castings with minimum production cost. Strategic decision makers need extensive models to guide them for efficient decision making that increases their profitability of the entire chain. The noval idea of this research is to investigate the various defects of cast iron foundry and suggest remedies for the defects in a day to day activity and propose a supply chain model to present the necessity of quality in a medium scale industry of cast iron foundry under different delay conditions, rejection rates and also various other factors. The results of the proposed model have been discussed and confirmed based on the original results of an industry. This research is also inspects the relationship between supply chain processes and quality as a key role in supply chain management.

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14

SLAMTI, Anass, Youness MEHDAOUI, Driss CHENOUNI y Zakia LAKHLIAI. "A sub-1V high PSRR OpAmp based β-multiplier CMOS bandgap voltage reference with resistive division". Indonesian Journal of Electrical Engineering and Computer Science 15, n.º 1 (1 de julio de 2019): 155. http://dx.doi.org/10.11591/ijeecs.v15.i1.pp155-167.

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<span lang="EN-US">A sub-1V opamp based β-multiplier CMOS bandgap voltage reference (BGVR) with high power supply rejection ratio (PSRR) and low temperature coefficient (TC) is proposed in this paper. A current mode regulator scheme is inserted to isolate the supply voltage of the operational amplifier (opamp) and the supply voltage of the BGVR core from the supply voltage source in order to reduce ripple sensitivity and to achieve a high PSRR. The proposed circuit is designed and simulated in 0.18-μm standard CMOS technology. The proposed voltage reference delivers an output voltage of 634.6mV at 27°C. Tthe measurement temperature coefficient is 22,3ppm/°C over temperature range -40°C to 140°C, power supply rejection ratio is -93dB at 10kHz and -71dB at 1MHz and a line regulation of 104μV/V is achieved over supply voltage range 1.2V to 1.8V. The layout area of the proposed circuit is 0.0337mm<sup>2</sup>. The proposed sub-1V bandgap voltage reference can be used as an internal voltage reference in low power LDO regulators and switching regulators.</span>

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15

Li, Dawei, Dongsheng Liu, Xuecheng Zou, Ke Yao, Chaojian Kang y Huarong Zeng. "A Low-Cost RFID Regulator Insensitive to Temperature and Supply Voltage Variations". Journal of Circuits, Systems and Computers 26, n.º 10 (28 de marzo de 2017): 1750153. http://dx.doi.org/10.1142/s0218126617501535.

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A low-cost regulator insensitive to temperature and supply voltage variations for power management units of Radio Frequency Identification (RFID) tag chips and other batteryless devices is proposed in this paper. The commonly used regulator has poor temperature rejection ratio (TRR) and poor voltage rejection ratio (VRR). By using combination resistors and long channel transistors, the bias and regulator circuits are improved over temperature variations. A power supply rejection (PSR) enhancement branch is also added to suppress the supply noise and stabilize the bias current. The regulator is designed and fabricated in the HJTC 0.25[Formula: see text][Formula: see text]m CMOS technology. Simulation results show that this regulator achieves 0.044[Formula: see text]mV/[Formula: see text]C TRR when temperature varies from [Formula: see text]C to 70[Formula: see text]C and 1.1[Formula: see text]mV/V VRR while the supply voltage of the regulator ranges from 4 to 12[Formula: see text]V. The PSR is nearly [Formula: see text]100[Formula: see text]dB at DC. The area of this regulator is 0.102[Formula: see text]mm2 including the bias circuit. The measurement results meet simulation results well and this regulator is successfully applied in HF passive tag chips within voltage deviations of [Formula: see text] of 2.5[Formula: see text]V.

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16

Wu, Hongbing y Hongxia Liu. "An Improved Bandgap Reference with Curvature-Compensated and High Power Supply Rejection". Journal of Circuits, Systems and Computers 25, n.º 11 (14 de agosto de 2016): 1650147. http://dx.doi.org/10.1142/s0218126616501474.

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This paper presents a bandgap reference (BGR) with the characteristics of curvature-compensation and high power supply rejection ratio (PSRR). To achieve a better performance, the base current of BJT is injected to a small segment of resistor string to flatten the temperature variation, and a pre-regulator of the power supply is implemented to improve the PSRR. The circuits, designed in 0.18[Formula: see text][Formula: see text]m BCD technology, exhibit an average voltage of 1.212[Formula: see text]V with temperature coefficient of 2.0[Formula: see text]ppm/[Formula: see text] in the range from [Formula: see text] to 110[Formula: see text] at typical condition, and a power supply rejection ratio of [Formula: see text][Formula: see text]dB at low frequency. After 4-bit trimming, Monte Carlo simulation results show that the proposed design gets an accuracy of 0.29%, with a variation of [Formula: see text][Formula: see text]mV. The active design area is 160[Formula: see text][Formula: see text]m, and the power supply current is about 8.2[Formula: see text][Formula: see text]A.

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17

Liu, Shubin, Zhangming Zhu, Huaxi Gu y Yintang Yang. "A low-jitter pulsewidth control loop with high supply noise rejection". IEICE Electronics Express 10, n.º 18 (2013): 20130619. http://dx.doi.org/10.1587/elex.10.20130619.

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18

Jang, Ho-Joon, Yong-Seong Roh, Young-Jin Moon, Jeong-Pyo Park y Chang-Sik Yoo. "Low Drop-Out (LDO) Voltage Regulator with Improved Power Supply Rejection". JSTS:Journal of Semiconductor Technology and Science 12, n.º 3 (30 de septiembre de 2012): 313–19. http://dx.doi.org/10.5573/jsts.2012.12.3.313.

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19

JOO, Soyeon, Jintae KIM y SoYoung KIM. "Power-Supply Rejection Model Analysis of Capacitor-Less LDO Regulator Designs". IEICE Transactions on Electronics E100.C, n.º 5 (2017): 504–12. http://dx.doi.org/10.1587/transele.e100.c.504.

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20

Yun, Seong Jin, Jeong Seok Kim, Taikyeong Ted Jeong y Yong Sin Kim. "A Capacitor-less Low Dropout Regulator for Enhanced Power Supply Rejection". IEIE Transactions on Smart Processing and Computing 4, n.º 3 (30 de junio de 2015): 152–57. http://dx.doi.org/10.5573/ieiespc.2015.4.3.152.

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21

Skouri, K., I. Konstantaras, A. G. Lagodimos y S. Papachristos. "An EOQ model with backorders and rejection of defective supply batches". International Journal of Production Economics 155 (septiembre de 2014): 148–54. http://dx.doi.org/10.1016/j.ijpe.2013.11.017.

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22

Gruber, Jonathan y Jeffrey D. Kubik. "Disability insurance rejection rates and the labor supply of older workers". Journal of Public Economics 64, n.º 1 (abril de 1997): 1–23. http://dx.doi.org/10.1016/s0047-2727(96)01590-3.

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23

Patel, Amit P. y Gabriel A. Rincon-Mora. "High Power-Supply-Rejection (PSR) Current-Mode Low-Dropout (LDO) Regulator". IEEE Transactions on Circuits and Systems II: Express Briefs 57, n.º 11 (noviembre de 2010): 868–73. http://dx.doi.org/10.1109/tcsii.2010.2068110.

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24

Scott, Alex, Chris Parker y Christopher W. Craighead. "Service Refusals in Supply Chains: Drivers and Deterrents of Freight Rejection". Transportation Science 51, n.º 4 (noviembre de 2017): 1086–101. http://dx.doi.org/10.1287/trsc.2016.0677.

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25

Yin, Shu Jun, Xue Ren Li y Ji Geng Luo. "Design of Electrostatic Precipitator Power System Based on Auto Disturbance Rejection Controller". Advanced Materials Research 846-847 (noviembre de 2013): 190–94. http://dx.doi.org/10.4028/www.scientific.net/amr.846-847.190.

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The paper designs a three-phase high voltage power supply system based on active disturbance rejection controller which make single-chip microcomputer ATmega128 as the main control chip and the system improve the stability and control precision of dust removing power. Engineering practice shows that, the DC power supply system has the advantages of convenient operation, high work efficiency, system stability.

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26

El Mehdi, Boujamaa, Frederick Mailly, Laurent Latorre y Pascal Nouet. "Improvement of Power Supply Rejection Ratio in Wheatstone-bridge based piezoresistive MEMS". Analog Integrated Circuits and Signal Processing 71, n.º 1 (10 de agosto de 2010): 1–9. http://dx.doi.org/10.1007/s10470-010-9504-6.

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27

Lu, Yan, Yipeng Wang, Quan Pan, Wing-Hung Ki y C. Patrick Yue. "A Fully-Integrated Low-Dropout Regulator With Full-Spectrum Power Supply Rejection". IEEE Transactions on Circuits and Systems I: Regular Papers 62, n.º 3 (marzo de 2015): 707–16. http://dx.doi.org/10.1109/tcsi.2014.2380644.

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28

Lavalle-Aviles, Fernando, Joselyn Torres y Edgar Sanchez-Sinencio. "A High Power Supply Rejection and Fast Settling Time Capacitor-Less LDO". IEEE Transactions on Power Electronics 34, n.º 1 (enero de 2019): 474–84. http://dx.doi.org/10.1109/tpel.2018.2826922.

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29

Reverter, F. y R. Pallas-Areny. "Experimental analysis of power supply interference rejection in commercial quasi-digital sensors". IEEE Sensors Journal 5, n.º 5 (octubre de 2005): 1075–81. http://dx.doi.org/10.1109/jsen.2005.845195.

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30

Ghosh, Riddhi, Paolo Seri, Robert E. Hebner y Gian Carlo Montanari. "Noise Rejection and Detection of Partial Discharges Under Repetitive Impulse Supply Voltage". IEEE Transactions on Industrial Electronics 67, n.º 5 (mayo de 2020): 4144–51. http://dx.doi.org/10.1109/tie.2019.2921281.

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31

Cai, Guigang, Yan Lu, Chenchang Zhan y Rui P. Martins. "A Fully Integrated FVF LDO With Enhanced Full-Spectrum Power Supply Rejection". IEEE Transactions on Power Electronics 36, n.º 4 (abril de 2021): 4326–37. http://dx.doi.org/10.1109/tpel.2020.3024595.

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32

Chang, Yi Tsun, Yu Da Shiau, Po Chun Wu, Ren Hao Xue y Po Yu Cheng. "LDO of High Power Supply Rejection with Two-Stage Error Amplifiers and Buffer Compensation". Advanced Materials Research 989-994 (julio de 2014): 3236–39. http://dx.doi.org/10.4028/www.scientific.net/amr.989-994.3236.

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This study develops a low dropout regulator linear regulator, characterized by a high power supply rejection ratio using ultra-low output resistance buffer and two-stage error amplifiers. The high power supply rejection is based on a closed-loop LDO regulator. The ultra-low output resistance buffer achieves ultra-low output impedance with dual shunt feedback loops, subsequently improving load and line regulations, as well as the transient response for low voltage applications. The proposed LDO regulator linear regulator functions under an input voltage of 1.8~3V, and the output voltage can be maintained at around 1.27V. Moreover, its output voltage is independent of input voltage. The proposed regulator is applicable to light-emitting diode driver integrated circuits. The layout chip area of the LDO linear regulator is 21.5μm × 42.6μm.

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33

Gyaang, Raymond, Dong-Ho Lee y Jusung Kim. "Analysis and Design of Harmonic Rejection Low Noise Amplifier with an Embedded Notch Filter". Electronics 9, n.º 4 (31 de marzo de 2020): 596. http://dx.doi.org/10.3390/electronics9040596.

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This paper presents the analysis and design of the harmonic rejection (HR) low-noise amplifier (LNA) with the fully passive source degeneration notch filter. The proposed HR LNA provides the rejection for the strong harmonics ( 3 r d ) of the local oscillator (LO) frequencies, where the HR mixer does not provide sufficient HR performance. The proposed 3 r d harmonic notch filter modulates the source degeneration factor and the impedance matching performance thereafter. This effect further helps the blocking of the harmonic signal. The proposed LNA provides 11 dB gain at the fundamental frequency (2.1 GHz) while rejecting the 3rd harmonic component by 37 dBc. Compared to the conventional LNA, the 3rd harmonic notch performance is improved by 23 dB. Additionally, the LNA achieves a minimum noise figure of 3.1 dB, third order input intercept point ( I I P 3 ) of 0.5 dBm, input reflection (S 11 ) below −10 dB from 1.8 GHz–2.3 GHz operational frequency range, and consumed 19 mW of power from a 1.2 V supply.

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34

Liu, Xiao Wei, Bing Jun Lv, Peng Fei Wang, Liang Yin y Na Xu. "A Curvature-Compensated, High Power Supply Rejection CMOS Bandgap Reference for MEMS Micro-Accelerometer". Key Engineering Materials 483 (junio de 2011): 481–86. http://dx.doi.org/10.4028/www.scientific.net/kem.483.481.

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The reference is an important part in the accelerometer system. With the development of science and technology, the request of the performance of accelerometers is increasingly higher and the precision of reference directly affects the performance of accelerometers. Therefore, a reference voltage applicable to accelerometers is presented based on the analysis of basic principles of conventional bandgap reference (BGR) in this paper. A high-order curvature compensation technique, which uses a temperature dependent resistor ratio generated by a high poly resistor and a nwell resistor, effectively serves to reduce temperature coefficient of proposed reference voltage circuit and to a large extent improve its performance. To achieve a high power supply rejection ratio (PSRR) over a broad frequency range, a pre-regulator is introduced to remain the supply voltage of the core circuit of BGR relatively independent of the global supply voltage. The proposed circuitry is designed in standard 2.0μm CMOS process. The simulated result shows that the average temperature coefficient is less than 2ppm/°C in the temperature range from -40 to 120°C. The improvement on temperature coefficient (TC) is about 10 times reduction compared to the conventional approach. And the PSR at DC frequency and 1kHz achieves -107 and -71dB respectively at 9.0V supply voltage.

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35

AL-Qaysi, Hayder Khaleel, Musaab Mohammed Jasim y Siraj Manhal Hameed. "Design of very low-voltages and high-performance CMOS gate-driven operational amplifier". Indonesian Journal of Electrical Engineering and Computer Science 20, n.º 2 (1 de noviembre de 2020): 670. http://dx.doi.org/10.11591/ijeecs.v20.i2.pp670-679.

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This paper presents the description and analysis of the design and HSPICE-based simulation results of very low-voltages (LVs) power supplies and high-performance specifications CMOS gate-driven (GD) operational amplifier (Op-Amp) circuit. The very LVs CMOS GD Op-Amp circuit designed using 90nm CMOS technology parameters and the folded cascode (FC) technique employed in the differential input stage. The HSPICE simulation results demonstrate that the overall gain is 73.1dB, the unity gain bandwidth is 14.9MHz, the phase margin is , the total power dissipation is 0.91mW, the output voltage swing is from 0.95V to 1V, the common-mode rejection ratio is dB, the equivalent input-referred noise voltage is 50.94 at 1MHz, the positive slew rate is 11.37 , the negative slew rate is 11.39 , the settling time is 137 , the positive power-supply rejection ratio is 74.2dB, and the negative power-supply rejection ratio is 80.1dB. The comparisons of simulation results at 1V and 0.814V power supplies’ voltages of the very LVs CMOS GD Op-Amp circuit demonstrate that the circuit functions with perfect performance specifications, and it is suitable for many considerable applications intended for very LVs CMOS Op-Amp circuits.

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36

Colton, Clark K. "Implantable Biohybrid Artificial Organs". Cell Transplantation 4, n.º 4 (julio de 1995): 415–36. http://dx.doi.org/10.1177/096368979500400413.

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Biohybrid artificial organs encompass all devices which substitute for an organ or tissue function and incorporate both synthetic materials and living cells. This review concerns implantable immunoisolation devices in which the tissue is protected from immune rejection by enclosure within a semipermeable membrane. Two critical areas are discussed in detail: (i) Device design and performance as it relates to maintenance of cell viability and function. Attention is focussed on oxygen supply limitation and how it is affected by tissue density and the development of materials that induce neovascularization at the host tissue-membrane interface; and (ii) Protection from immune rejection. Our current knowledge of the mechanisms that may be operative in immune rejection in the presence of a semipermeable membrane barrier is limited. Nonetheless, recent studies shed light on the role played by membrane properties in preventing immune rejection, and many studies demonstrate substantial progress towards clinically useful implantable immunoisolation devices.

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37

Womer, Karl L., Mohamed H. Sayegh y Hugh Auchincloss. "Involvement of the direct and indirect pathways of allorecognition in tolerance induction". Philosophical Transactions of the Royal Society of London. Series B: Biological Sciences 356, n.º 1409 (29 de mayo de 2001): 639–47. http://dx.doi.org/10.1098/rstb.2001.0843.

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It is generally accepted that there are two pathways of allorecognition, direct and indirect, that together contribute to allograft rejection. Although it has been suggested that the direct pathway predominates during early acute rejection and that the indirect pathway provides a continuous supply of alloantigen responsible for chronic rejection, the true relative contribution of each pathway to the overall rejection process is still not entirely known. It is clear, however, that any strategies designed to achieve the ultimate goal in transplantation, the induction of tolerance, will need to take into account both pathways. This review seeks to explore the involvement of the direct and indirect pathways of allorecognition on a mechanistic level as it relates to the induction of tolerance. A brief historical perspective is included for each pathway as well as a comprehensive review of the mechanisms felt to be active during tolerance induction.

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38

Colton, C. K. y E. S. Avgoustiniatos. "Bioengineering in Development of the Hybrid Artificial Pancreas". Journal of Biomechanical Engineering 113, n.º 2 (1 de mayo de 1991): 152–70. http://dx.doi.org/10.1115/1.2891229.

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The hybrid artificial pancreas for treatment of diabetes consists of insulin-secreting pancreatic tissue which is surrounded by a membrane that protects the tissue from rejection by the immune system following implantation. In this paper, we review the alternative therapeutic approaches for diabetes under study and then discuss the technical requirements that must be met by a hybrid device useful to humans. Previous work on intravascular and extravascular immunoisolation devices is reviewed from the standpoint of these requirements, and three critical unresolved issues are discussed: biocompatibility, oxygen supply limitations, and prevention of immune rejection.

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39

Jin, J., X. P. Yu, J. J. Zhou y T. T. Yan. "Gigahertz range injection locked frequency dividers with band-width enhancement and supply rejection". Electronics Letters 44, n.º 17 (2008): 999. http://dx.doi.org/10.1049/el:20081025.

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40

Coulot, T., E. Rouat, J. M. Fournier, E. Lauga y F. Hasbani. "High power supply rejection low-dropout regulator for ultra-low-power radiofrequency functions". Electronics Letters 47, n.º 20 (2011): 1117. http://dx.doi.org/10.1049/el.2011.1772.

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41

Wen, Shon-Hang, Chien-Ming Chen, Cheng-Chung Yang, Chieh-Hung Chen, Jia-Feng Jiang, Keng-Jan Hsiao y Cheng-Yu Chien. "A Load-Adaptive Class-G Headphone Amplifier With Supply-Rejection Bandwidth Enhancement Technique". IEEE Journal of Solid-State Circuits 51, n.º 10 (octubre de 2016): 2241–51. http://dx.doi.org/10.1109/jssc.2016.2581802.

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42

Sun, Jie y Jianhui Wu. "A 12-bit 350 MS/s Single-Channel Pipeline ADC with 75 dB SFDR in 0.18 μm BiCMOS". Journal of Circuits, Systems and Computers 28, n.º 03 (24 de febrero de 2019): 1950044. http://dx.doi.org/10.1142/s0218126619500440.

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A 12-bit 350[Formula: see text]MS/s ADC with 75[Formula: see text]dB SFDR fabricated in 0.18[Formula: see text][Formula: see text]m SiGe BiCMOS process is presented. To improve the power efficiency, the ADC employs a novel residue amplifier (RA) by exploiting the hetero-junction bipolar transistor (HBT). We also propose a fast comparator to save time for the residue settling of pipeline stages. A fully integrated reference buffer with “negative bootstrap power” (NBP) is proposed to improve both high power supply rejection ratio (PSRR) and ground supply rejection ratio (GSRR). A bandgap reference (BGR) with ultra-low leakage current start-up loop is also presented. The measured results show that with Nyquist input, the SFDR achieves 75[Formula: see text]dB and 63[Formula: see text]dB SNDR up to 350[Formula: see text]MS/s and consumes 180[Formula: see text]mW (only ADC core) with 580[Formula: see text]fj/cov Waldon FOM.

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43

Brands, Raina A. y Isabel Fernandez-Mateo. "Leaning Out: How Negative Recruitment Experiences Shape Women’s Decisions to Compete for Executive Roles". Administrative Science Quarterly 62, n.º 3 (15 de diciembre de 2016): 405–42. http://dx.doi.org/10.1177/0001839216682728.

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This paper proposes that gender differences in responses to recruitment rejections contribute to women’s underrepresentation in top management. We theorize and show that women are less likely than men to consider another job with a prospective employer that has rejected them in the past. Because of women’s status as a negatively stereotyped minority in senior roles, recruitment rejection triggers uncertainty about their general belonging in the executive domain, which in turn leads women to place greater weight than men on fair treatment and negatively affects their perceptions of the fairness of the treatment they receive. This dual process makes women less inclined than men to apply again to a firm that has rejected them. We test our theory with three studies: a field study using longitudinal archival data from an executive search firm, a survey of executives, and an experiment using executive respondents testing the effects of rejection on willingness to apply to a firm for another position. The results have implications for theory and practice regarding gender inequality at the labor market’s upper echelons, highlighting that women’s supply-side decisions to “lean out” of competition for senior roles must be understood in light of their previous experiences with employers’ demand-side practices. Given the sequential nature of executive selection processes, rejection-driven differences in the willingness to compete in a given round would affect the proportion of available women in subsequent selection rounds, contributing to a cumulative gender disadvantage and thus possibly increasing gender inequality over time.

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44

Manikandan, P. y B. Bindu. "High-PSR Capacitorless LDO with Adaptive Circuit for Varying Loads". Journal of Circuits, Systems and Computers 29, n.º 11 (30 de enero de 2020): 2050178. http://dx.doi.org/10.1142/s0218126620501789.

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A capacitorless low-drop-out (LDO) regulator with an NMOS pass transistor-based adaptive network to achieve high and constant power-supply rejection (PSR) for varying loads is presented. The proposed LDO does not require an external capacitor making it suitable for System-on-Chip (SoC) applications. The low-frequency PSR of the LDO varies with load current as the transconductance and output conductance of the power transistor depend on the load current. The proposed LDO is capable of maintaining a constant and high PSR for varying loads by using an adaptive network. The NMOS pass transistor in the adaptive network tracks the power-supply noise through the power transistor and bypasses this noise current through it to the ground. This helps to avoid the flow of this noise current through the load and thus the circuit can achieve high and constant PSR for varying loads. The LDO with adaptive network achieves very high power-supply rejections of [Formula: see text][Formula: see text]dB at low frequencies and [Formula: see text][Formula: see text]dB at 1[Formula: see text]MHz, for a load current of 4[Formula: see text]mA. This LDO is implemented in 0.18-[Formula: see text]m CMOS technology and consumes 1.35-mW quiescent power over the range of 1–10[Formula: see text]mA of the load current.

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45

Zawawi, Ruhaifi Bin Abdullah, Wajahat H. Abbasi, Seung-Hwan Kim, Hojong Choi y Jungsuk Kim. "Wide-Supply-Voltage-Range CMOS Bandgap Reference for In Vivo Wireless Power Telemetry". Energies 13, n.º 11 (10 de junio de 2020): 2986. http://dx.doi.org/10.3390/en13112986.

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The robustness of the reference circuit in a wide range of supply voltages is crucial in implanted devices. Conventional reference circuits have demonstrated a weak performance over wide supply ranges. Channel-length modulation in the transistors causes the circuit to be sensitive to power supply variation. To solve this inherent problem, this paper proposes a new output-voltage-line-regulation controller circuit. When a variation occurs in the power supply, the controller promptly responds to the supply deviation and removes unwanted current in the output path of the reference circuit. The proposed circuit was implemented in a 0.35-μm SK Hynix CMOS standard process. The experimental results demonstrated that the proposed reference circuit could generate a reference voltage of 0.895 V under a power supply voltage of 3.3 V, line regulation of 1.85 mV/V in the supply range of 2.3 to 5 V, maximum power supply rejection ratio (PSRR) of −54 dB, and temperature coefficient of 11.9 ppm/°C in the temperature range of 25 to 100 °C.

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46

SHI, L. F., X. MA, G. H. QIN, L. Y. CHENG y X. Q. LAI. "A WIDE SUPPLY RANGE BANDGAP VOLTAGE REFERENCE WITH CURVATURE COMPENSATION". Journal of Circuits, Systems and Computers 22, n.º 01 (enero de 2013): 1250068. http://dx.doi.org/10.1142/s0218126612500685.

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For the requirement of power management controller chips, a wide supply range bandgap voltage reference circuit is presented. The preregulated circuit based on the regulation characteristic of zener diode extends the supply range and increases power supply rejection ratio (PSRR). Compensated by the base-emitter voltage (V BE ) linearization technique, the temperature stability of the bandgap circuit is improved further. The proposed circuit is implemented in a 0.4 μm bipolar CMOS DMOS (BCD) process and Spice simulation has been done for validation. The results of simulation and test show that the supply range of this circuit can reach 7.2 V to 40 V and 159 μV/V of supply voltage dependence; the temperature coefficient is just 3.5 ppm/°C over a wide temperature of -40°C to 125°C and PSRR is up to -94 dB at 1 kHz. For the perfective performance, this circuit can be used in wide temperature and wide supply range integrated circuit design.

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47

Sun, Ye Chao, Zhuo Lei Huang y Wei Bing Wang. "A Bandgap Reference without Passive Components Based on Standard CMOS". Applied Mechanics and Materials 475-476 (diciembre de 2013): 1679–84. http://dx.doi.org/10.4028/www.scientific.net/amm.475-476.1679.

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A bandgap reference without passive components based on standard CMOS is proposed. Using an improved inverse-function technique without any curvature-compensated techniques, two reference voltages are got in different temperature ranges. One is 1.56V with a temperature coefficient of 9.2ppm/°C in the range [0, 14 °C at 3.3V supply voltage, and the other is 1.546V with 47ppm/°C in [-25, 15 °C at 3.3V. Its PSRR (power supply rejection ratio) is below-60dB at 10kHz, and it is quite suitable for integration in processing circuits of MEMS (micro-electro-mechanical systems) devices.

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48

Liu, Xin y Peiyi Liu. "Research on ripple rejection of DC power supply based on dual pulse width modulation". IOP Conference Series: Earth and Environmental Science 81 (agosto de 2017): 012176. http://dx.doi.org/10.1088/1755-1315/81/1/012176.

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49

Montanari, Gian Carlo, Paolo Seri, Riddhi Ghosh y Leonardo Cirioni. "Noise rejection and partial discharge source identification in insulation system under DC voltage supply". IEEE Transactions on Dielectrics and Electrical Insulation 26, n.º 6 (diciembre de 2019): 1894–902. http://dx.doi.org/10.1109/tdei.2019.008210.

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50

Blakiewicz, G. "Frequency compensation for two-stage operational amplifiers with improved power supply rejection ratio characteristic". IET Circuits, Devices & Systems 4, n.º 5 (2010): 458. http://dx.doi.org/10.1049/iet-cds.2010.0059.

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