Tesis sobre el tema "Veriflex"
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Wildmoser, Martin. "Verified proof carrying code". [S.l.] : [s.n.], 2006. http://deposit.ddb.de/cgi-bin/dokserv?idn=980401208.
Texto completoKlein, Gerwin. "Verified Java bytecode verification". [S.l. : s.n.], 2003. http://deposit.ddb.de/cgi-bin/dokserv?idn=967128749.
Texto completoBujila, Razvan y Johan Kuru. "OMSI Test Suite verifier development". Thesis, Linköpings universitet, Institutionen för teknik och naturvetenskap, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-96266.
Texto completoSpiwack, Arnaud. "Verified computing in homological algebra". Palaiseau, Ecole polytechnique, 2011. http://pastel.archives-ouvertes.fr/docs/00/60/58/36/PDF/thesis.spiwack.pdf.
Texto completoThe object of this thesis is the study of the ability of the Coq system to mix proofs and programs in practice. Our approach consists in implementing part of the program Kenzo, a computer algebra tool for homological algebra under some constraint. We want to be able to read the program as a proof with a computational content, these proofs much compute efficiently, and we try to avoid duplication of proofs or part thereof. We show, first, how the requirement of efficiency leads to revise some aspects of traditional mathematics. We propose a suitable categorical abstraction, both for clarity and to avoid duplications. This abstraction, though different from what is customary in mathematics, allow to formulate the constructs of homological algebra in a style much like that of Kenzo. We propose, then, modifications to the Coq programm. A first one to make proofs more convenient, by allowing the use of more fine grain tactics which are often necessary when dependent types are common. The second modification to leverage the arithmetical abilities of the processor to compute more efficiently on integers. Finally, we propose some leads to improve both sharing and clarity of the proofs. Unfortunately, they push the system beyond its limits. Hence, we show that Coq is not always up to its promises and that theoretical works will be necessary to understand how these limits can be relaxed
Boehm, Peter. "Incremental modelling for verified communication architectures". Thesis, University of Oxford, 2011. http://ora.ox.ac.uk/objects/uuid:ec6c9e06-7395-4af4-b961-b2ed837fda89.
Texto completoKatz, Theodore(Theodore Robert). "Verified compilation of abstract network policies". Thesis, Massachusetts Institute of Technology, 2019. https://hdl.handle.net/1721.1/123032.
Texto completoThesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2019
Cataloged from student-submitted PDF version of thesis.
Includes bibliographical references (pages 67-68).
Configuring large networks can be very complex. A network administrator typically has a set of high-level policies in mind when creating a network configuration, but implementing the configuration onto existing hardware often requires specifying many low-level details. As a result, configuring a network is currently a very error-prone process, and misconfigurations resulting in network outages and security vulnerabilities occur frequently in practice. We present a formally verified compiler from high-level network policies to low-level executable routing rules, to simplify the process of correctly conguring networks and enforcing network policies.
by Theodore Katz.
M. Eng.
M.Eng. Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science
Adcock, Bruce M. "Working Towards the Verified Software Process". The Ohio State University, 2010. http://rave.ohiolink.edu/etdc/view?acc_num=osu1293463269.
Texto completoPerna, Juan Ignacio. "A verified compiler for Handel-C". Thesis, University of York, 2010. http://etheses.whiterose.ac.uk/585/.
Texto completoOwny, Hassan Badry Mohamed el. "Verified solution of parametric interval linear systems". [S.l.] : [s.n.], 2007. http://deposit.ddb.de/cgi-bin/dokserv?idn=985111623.
Texto completoThaler, Justin R. "Practical Verified Computation with Streaming Interactive Proofs". Thesis, Harvard University, 2013. http://dissertations.umi.com/gsas.harvard:11086.
Texto completoEngineering and Applied Sciences
Dalvandi, Mohammad Sadegh. "Developing verified sequential programs with Event-B". Thesis, University of Southampton, 2018. https://eprints.soton.ac.uk/422225/.
Texto completoRamseyer, Jennifer. "Implementing a verified FTP client and server". Thesis, Massachusetts Institute of Technology, 2016. http://hdl.handle.net/1721.1/105966.
Texto completoThis electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Cataloged from student-submitted PDF version of thesis.
Includes bibliographical references (pages 54-56).
I present my implementation of an FTP: File Transfer Protocol system with GRASShopper. GRASShopper is a program verifier that ensures that programs are memory safe. I wrote an FTP client and server in SPL, the GRASShopper programming language. SPL integrates the program logic's pre- and post- conditions, along with loop invariants, into the language, so that programs that compile in GRASShopper are proven correct. Because of that, my client and server are guaranteed to be secure and correct. I am supervised by Professor Martin Rinard and Dr. Damien Zufferey, a post-doctoral researcher in Professor Rinard's laboratory.
by Jennifer Ramseyer.
M. Eng.
Jourdan, Jacques-Henri. "Verasco : a Formally Verified C Static Analyzer". Sorbonne Paris Cité, 2016. http://www.theses.fr/2016USPCC021.
Texto completoIn order to develop safer software for critical applications, some static analyzers aim at establishing, with mathematical certitude, the absence of some classes of bug in the input program. A possible limit to this approach is the possibility of a soundness bug in the static analyzer itself, which would nullify the guarantees it is supposed to deliver. In this thesis, we propose to establish formal guarantees on the static analyzer itself: we present the design, implementation and proof of soundness using Coq of Verasco, a formally verified static analyzer based on abstract interpretation handling most of the ISO C99 language, including IEEE754 floating-point arithmetic (except recursion and dynamic memory allocation). Verasco aims at establishing the absence of erroneous behavior of the given programs. It enjoys a modular extendable architecture with several abstract domains and well-specified interfaces. We present the abstract iterator of Verasco, its handling of bounded machine arithmetic, its interval abstract domain, its symbolic abstract domain and its abstract domain of octagons. Verasco led to the development of new techniques for implementing data structure with sharing in Coq
Ibraev, Suiunbek. "A new parallel method for verified global optimization". [S.l.] : [s.n.], 2001. http://deposit.ddb.de/cgi-bin/dokserv?idn=963452304.
Texto completoGreen, Alexander S. "Towards a formally verified functional quantum programming language". Thesis, University of Nottingham, 2010. http://eprints.nottingham.ac.uk/11457/.
Texto completoZhang, Nan. "Generating verified access control policies through model-checking". Thesis, University of Birmingham, 2005. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.433707.
Texto completoKonradi, Alexander V. "Performance optimization of the VDFS verified file system". Thesis, Massachusetts Institute of Technology, 2017. http://hdl.handle.net/1721.1/113179.
Texto completoCataloged from PDF version of thesis.
Includes bibliographical references (pages 51-54).
Formal verification of software has become a powerful tool for creating software systems and proving their correctness. While such systems provide strong guarantees about their behavior, they frequently exhibit poor performance relative to their unverified counterparts. Verified file systems are not excepted, and their poor performance limits their utility. These limitations, however, are not intrinsic to verification techniques, but are the result of designing for proofs, not performance. This thesis proposes a design for large files and in-memory caches that are amenable both to a high-performance implementation and proofs of correctness. It then describes their usage in VDFS, a verified high-performance file system with deferred durability guarantees. The evaluation of VDFS' performance shows that these additions measurably improve performance over previous verified file systems, and make VDFS competitive with unverified file system implementations. This thesis contributes implementation techniques for large files and in-memory caches that can be applied to increase performance of verified systems..
by Alexander V. Konradi.
M. Eng.
M.Eng. Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science
Mason, George. "Safe reinforcement learning using formally verified abstract policies". Thesis, University of York, 2018. http://etheses.whiterose.ac.uk/22450/.
Texto completoCline, Jacquelyn Fern. "The implementation of a subset data dictionary verifier". Thesis, Kansas State University, 1985. http://hdl.handle.net/2097/9829.
Texto completoGross, Jason S. "An extensible framework for synthesizing efficient, verified parsers". Thesis, Massachusetts Institute of Technology, 2015. http://hdl.handle.net/1721.1/101581.
Texto completoCataloged from PDF version of thesis.
Includes bibliographical references (pages 73-75).
Parsers have a long history in computer science. This thesis proposes a novel approach to synthesizing efficient, verified parsers by refinement, and presents a demonstration of this approach in the Fiat framework by synthesizing a parser for arithmetic expressions. The benefits of this framework may include more flexibility in the parsers that can be described, more control over the low-level details when necessary for performance, and automatic or mostly automatic correctness proofs.
by Jason S. Gross.
S.M.
Kolberg, Mariana Luderitz. "Parallel self-verified solver for dense linear systems". Pontifícia Universidade Católica do Rio Grande do Sul, 2009. http://hdl.handle.net/10923/1600.
Texto completoThis thesis presents a free, fast, reliable and accurate solver for point and interval dense linear systems. The idea was to implement a solver for dense linear systems using a verified method, interval arithmetic and directed roundings based on MPI communication primitives associated to optimized libraries, aiming to provide both self-verification and speed-up at the same time. A first parallel implementation was developed using the C-XSC library. However, the CXSC parallel method did not achieve the expected overall performance since the solver was not 100% parallelized due to its implementation properties (special variables and optimal scalar product). C-XSC did not seem to be the most efficient tool for time critical applications, consequently we proposed and implemented a new sequential verified solver for dense linear systems for point and interval input data using both infimum-supremum and midpoint-radius arithmetic based on highly optimized libraries (BLAS/ LAPACK). Performance tests showed that the midpointradius algorithm needs approximately the same time to solve a linear system with point or interval input data, while the infimum-supremum algorithm needs much more time for interval data. Considering that, midpoint-radius arithmetic was the natural choice for the next step of this work: the parallel implementation. We then developed a new parallel verified solver for point and interval dense linear systems using midpoint-radius arithmetic, directed roundings and optimized libraries (PBLAS/ ScaLAPACK). The performance results showed that it was possible to achieve very good speed-ups in a wide range of processor numbers for large matrix dimensions for both point and interval input data. In order to overcome the memory limitation imposed by the generation of the whole matrix in one processor, we decided to generate sub-matrices of the input matrix individually on each available node, allowing a better use of the global memory. These modifications made it possible to solve dense systems with up to 100 000 dimension. In addition to that, in order to investigate the portability of the proposed solution, during this thesis, tests were performed using 3 different clusters in Germany (ALiCEnext, XC1 and IC1) with distinct configurations presenting significant results, indicating that the parallel solver scales well even for very large dense systems over many processors. Further investigations were done in two directions: study of the use of dedicated threads to speed up the solver of dense linear systems on shared memory, specially dual-core processors and the use of the ideas presented in this thesis to speed-up the C-XSC library.
Esta tese apresenta uma ferramenta de resolução de sistemas lineares densos pontuais e intervalares. As principais características desta ferramenta são rapidez, confiabilidade e precisão. Esta ferramenta é baseada em um método de resolução de sistemas densos verificado usando arredondamentos direcionados e aritmética intervalar associados a bibliotecas otimizadas e primitivas MPI para prover resultados confiáveis e alto desempenho. A primeira versão paralela foi desenvolvida usando a biblioteca C-XSC. Esta versão não alcançou o desempenho global esperado uma vez que não foi paralelizada totalmente devido a particularidades do C-XSC (variáveis especiais e produto escalar ótimo). Como o C-XSC não se mostrou eficiente para aplicações de grande porte, foi proposta e implementada uma nova versão seqüencial para sistemas lineares densos usando tanto a aritmética de ínfimo e supremo como a aritmética de ponto médio e raio, baseada nas bibliotecas BLAS e LAPACK. Testes de desempenho mostraram que o algoritmo que implementa a aritmética de ponto médio e raio possui um desempenho melhor do que o algoritmo que implementa a aritmética de ínfimo e supremo. Considerando este resultado, a aritmética de ponto médio e raio foi escolhida para a próxima etapa: a implementação paralela. Uma versão paralela para solução de sistemas lineares pontuais e intervalares densos foi então desenvolvida utilizando a aritmética de ponto médio e raio, arredondamentos direcionados e as bibliotecas otimizadas PBLAS e ScaLAPACK. Os resultados mostraram que foi possível alcançar um bom desempenho utilizando um número de processadores variado e proporcionando considerável aceleração na obtenção dos resultados para diferentes tamanhos de matrizes (pontuais e intervalares).A fim de superar as limitações impostas pelo uso da memória na geração de toda a matriz em um só processador, uma nova versão foi implementada. Esta versão gera as sub-matrizes da matriz principal em cada processador, permitindo uma melhor utilização da memória global disponibilizada pelo Cluster. Estas alterações tornaram possível resolver sistemas densos de dimensão 100 000. Para investigar a portabilidade da solução proposta, os testes foram realizados em 3 Clusters diferentes na Alemanha (ALiCEnext, XC1 e IC1). Cada um destes Clusters possui configurações distintas e apresentaram resultados significativos, indicando que a versão paralela possui uma boa escalabilidade para sistemas lineares muito grandes usando um número variado de processadores. Outros estudos foram realizados em duas direções. O primeiro diz respeito ao uso de threads dedicadas para aumentar o desempenho da solução de sistemas lineares usando memória compartilhada (em especial para processadores dual-core). Também foi estudada a utilização dessas idéias para aumentar o desempenho da solução usando C-XSC.
Anderson, Kai. "Use of Verified Twitter Accounts During Crisis Events". DigitalCommons@USU, 2018. https://digitalcommons.usu.edu/etd/7075.
Texto completoHarrison, Paul Michael. "Experimentally verified reduced models of neocortical pyramidal cells". Thesis, University of Warwick, 2014. http://wrap.warwick.ac.uk/69126/.
Texto completoBelgiovine, Mauro. "Advanced industrial OCR using Autoencoders". Master's thesis, Alma Mater Studiorum - Università di Bologna, 2017. http://amslaurea.unibo.it/13807/.
Texto completoSyrko, Ariel. "Development and evaluation of a framework for semi-automated formalization of automotive requirements". Thesis, Blekinge Tekniska Högskola, Institutionen för tillämpad signalbehandling, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:bth-11644.
Texto completoBauer, David Allen. "Preserving privacy with user-controlled sharing of verified information". Diss., Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/31676.
Texto completoCommittee Chair: Blough, Douglas; Committee Member: Ahamad, Mustaque; Committee Member: Liu, Ling; Committee Member: Riley, George; Committee Member: Yalamanchili, Sudha. Part of the SMARTech Electronic Thesis and Dissertation Collection.
Doyon, Stéphane. "On the security of Java, the Java bytecode verifier". Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1999. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape7/PQDD_0004/MQ41890.pdf.
Texto completoLarsson, Erik y Carl Svensson. "El Gamal Mix-Nets and Implementation of a Verifier". Thesis, KTH, Skolan för datavetenskap och kommunikation (CSC), 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-142608.
Texto completoBaird, Mark E. "Towards a verified mechanistic model of plankton population dynamics". Thesis, University of Warwick, 1999. http://wrap.warwick.ac.uk/1123/.
Texto completoKriener, Jael Elisabeth. "Towards a verified determinacy analysis for Prolog including cut". Thesis, University of Kent, 2014. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.655653.
Texto completoLu, Weiyun. "Formally Verified Code Obfuscation in the Coq Proof Assistant". Thesis, Université d'Ottawa / University of Ottawa, 2019. http://hdl.handle.net/10393/39994.
Texto completoZinzindohoué-Marsaudon, Jean-Karim. "Secure, fast and verified cryptographic applications : a scalable approach". Thesis, Paris Sciences et Lettres (ComUE), 2018. http://www.theses.fr/2018PSLEE052/document.
Texto completoThe security of Internet applications relies crucially on the secure design and robust implementations of cryptographic algorithms and protocols. This thesis presents a new, scalable and extensible approach for verifying state-of-the-art bignum algorithms, found in popular cryptographic implementations. Our code and proofs are written in F∗, a proof-oriented language which offers a very rich and expressive type system. The natural way of writing and verifying higher-order functional code in F∗ prioritizes code sharing and proof composition, but this results in low performance for cryptographic code. We propose a new language, Low∗, a fragment of F∗ which can be seen as a shallow embedding of C in F∗ and safely compiled to C code. Nonetheless, Low∗ retains the full expressiveness and verification power of the F∗ system, at the specification and proof level. We use Low∗ to implement cryptographic code, incorporating state-of-the-art optimizations from existing C libraries. We use F∗ to verify this code for functional correctness, memory safety and secret in- dependence. We present HACL∗, a full-fledged and fully verified cryptographic library which boasts performance on par, if not better, with the reference C code. Several algorithms from HACL∗ are now part of NSS, Mozilla’s cryptographic library, notably used in the Firefox web browser and the Red Hat operating system. Eventually, we apply our techniques to miTLS, a verified implementation of the Transport Layer Security protocol. We show how they extend to cryptographic proofs, state-machine implementations and message parsing verification
Schumacher, Kash Tucker. "What is the value of a Health Verified Program". Thesis, Kansas State University, 2011. http://hdl.handle.net/2097/11930.
Texto completoDepartment of Agricultural Economics
Ted C. Schroeder
The beef cattle industry is one of the last industries in production agriculture that is not heavily integrated. Therefore each segment of the industry is constantly looking for opportunities to increase the value of their cattle. In recent years, one of those opportunities available to cow-calf producers was verification of certain production practices (i.e. Age and Source, Natural, and Non-Hormone Treated). The value flows from the consumer to the cow-calf producer. The packers need these verified cattle to fill export contracts therefore they are willing to pay a premium for these types of cattle. The objective of the thesis was to determine the value of a Health Verified Program (HPV) to feedlot operators. HPV is not required to export beef like other verified programs, but it does verify the procedures that a group of calves has received from the previous owner. Since the feedlot is a deciding factor of value for HPV, feedlot managers were asked from across the United States not only what value they place on HPV but other questions that could be beneficial to others involved in the beef cattle industry. Regression models were used along with a correlation analysis to determine value. There is value to a health verified program along with other procedures that are available to cow-calf producers. Individual producers need to determine which verifications and procedures are economical and efficient for their individual operations with all factors considered.
Setoaba, Mabule. "A comparative study between Altman Z-Score and verifier". Diss., University of Pretoria, 2017. http://hdl.handle.net/2263/59769.
Texto completoMini Dissertation (MBA)--University of Pretoria, 2017.
zk2017
Gordon Institute of Business Science (GIBS)
MBA
Unrestricted
Visser, Schalk W. J. (Schalk Willem Jacobus). "Data capturing system using cellular phone, verified against propagation models". Thesis, Stellenbosch : University of Stellenbosch, 2004. http://hdl.handle.net/10019.1/16462.
Texto completoENGLISH ABSTRACT: Data capturing equipment are an expensive part of testing the coverage of a deployed or planned wireless service. This thesis presents the development of such a data capturing system that make use of 1800MHz GSM base stations as transmitters and a mobile phone connected to a laptop as receiver. The measurements taken, are then verified against know propagation models. Datavaslegging toerusting wat gebruik word om die dekking van draadlose stelsels te toets is baie duur en moeilik bekombaar. Hierdie tesis beskryf die ontwikkeling van so ’n datavaslegger wat baie goedkoper is en maklik gebruik kan word. Dit maak gebruik van ’n sellulêr foon en GPS gekoppel aan ’n skootrekenaar, wat die ontvanger is. Cell C basis staties word gebruik as die senders. Die data wat gemeet is word dan geverifieer deur gebruik te maak van bestaande radio frekwensie voortplanting modelle.
Steenson, Leo V. "Experimentally verified model predictive control of a hover-capable AUV". Thesis, University of Southampton, 2013. https://eprints.soton.ac.uk/355697/.
Texto completoBaklanova, Nadezhda. "Formally verified analysis of resource sharing conflicts in multithreaded Java". Toulouse 3, 2014. http://thesesups.ups-tlse.fr/2498/.
Texto completoMultithreaded real-time systems become widespread nowadays. Correctness is critical for real-time applications but it is difficult to ensure by usual methods like testing. Formal verification helps to find possible errors. One kind of errors are resource sharing conflicts which lead to data corruption. A common solution is exclusive locking which can lead to unpredictable delays in execution or even deadlocks in the worst case. Program verification is often done by model checking. A popular model checking formalism for real-time programs are timed automata. It allows to verify certain timing properties in a model of a program and to find a sequence of actions which lead to an error. There exist effective verification algorithms for timed automata which are implemented in widely used model checking tools. We have developed a tool for static analysis of multithreaded Java programs which finds possible resource sharing conflicts. Java programs are annotated with timing information, and a model of the program is built based on the annotations. The model is a system of timed automata which is verified by the Uppaal model checker, and possible resource sharing conflicts are found. A case study has been developed to illustrate the approach. The analysis is complete: whenever a resource sharing conflict occurs in a Java program, it is detected by the our analysis. The abstract model may also output "false positive" warnings which do not correspond to a reachable configuration in the source Java program. In order to make sure that the abstraction of Java programs to timed automata is correct, we have formalized the translation is the Isabelle proof assistant. We have proved that the translation preserve correspondence between a program and its model. For this, we have developed a formal semantics both of multithreaded Java with annotations and of timed automata. The proofs show that the model simulates the behavior of the source Java program. This means that each semantic step made in the Java code has a corresponding sequence of steps in the model which has the same effect on the state, i. E. Variable values, time or locked objects. The verified code for translation is generated from the formalized translation using the Isabelle code generator. Then our tool uses the verified code to generate a model of a Java program
Rodriguez-Velez, Ayshka Elise. "Power Mobility Sensor Data Collection Verified through Standardized Pediatric Assessments". UNF Digital Commons, 2018. https://digitalcommons.unf.edu/etd/828.
Texto completoSt-Martin, Michel. "A Verified Algorithm for Detecting Conflicts in XACML Access Control Rules". Thèse, Université d'Ottawa / University of Ottawa, 2012. http://hdl.handle.net/10393/20539.
Texto completoMavalankar, Vikram. "Extensions and an explanation module for the iRODS rule oriented verifier". Connect to a 24 p. preview or request complete full text in PDF format. Access restricted to UC campuses, 2008. http://wwwlib.umi.com/cr/ucsd/fullcit?p1447797.
Texto completoTitle from first page of PDF file (viewed February 5, 2008). Available via ProQuest Digital Dissertations. Includes bibliographical references (p. 65-66).
Hölle, Stefan [Verfasser]. "Numerical MMATh Verified essential algorithms for solving differential equations / Stefan Hölle". Konstanz : KOPS Universität Konstanz, 2019. http://d-nb.info/1203067925/34.
Texto completoBailey, J. S. L. "Experimentally verified fluid loading models for slender horizontal cylinders in waves". Thesis, University of Sussex, 2000. http://sro.sussex.ac.uk/id/eprint/737/.
Texto completoIoannidis, Eleftherios Ioannis. "Extracting and optimizing low-level bytecode from high-level verified Coq". Thesis, Massachusetts Institute of Technology, 2019. https://hdl.handle.net/1721.1/121675.
Texto completoThesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2019
Cataloged from student-submitted PDF version of thesis.
Includes bibliographical references (pages 51-53).
This document is an MEng thesis presenting MCQC, a compiler for extracting verified systems programs to low-level assembly, with no Runtime or Garbage Collection requirements and an emphasis on performance. MCQC targets the Gallina functional language used in the Coq proof assistant. MCQC translates pure and recursive functions into C++17, while compiling monadic effectful functions to imperative C++ system calls. With a series of memory and performance optimizations, MCQC combines verifiability with memory and runtime performance. By handling effectful and pure functions MCQC can generate executable code directly from Gallina and link it with trusted code, reducing the effort of implementing and executing verified systems.
by Eleftherios Ioannidis.
M. Eng.
M.Eng. Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science
Merten, Samuel A. "A Verified Program for the Enumeration of All Maximal Independent Sets". Ohio University / OhioLINK, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1479829000576398.
Texto completoHoltzhauzen, G. T. D. (Gerhardus Theodoris Daniel). "Modeling business turnaround strategies using verifier determinants from early warning signs theory". Thesis, University of Pretoria, 2011. http://hdl.handle.net/2263/28693.
Texto completo- Identify and theoretically define early warning sign “verifier determinants”
- To design and include “verifier determinants” as an integral part of a turnaround plan that supports corrective action.
- Research the current formal turnaround practices, which are applied in the United States of America, Canada, Australia, Africa and informal practices evident in South Africa. These findings are aligned to include the changes in the applicable South African legislation.
- Design and propose a framework for use by turnaround practitioners and entrepreneurs alike (conforming to new legislation).
- Identify which “verifier determinants” will confirm the early warning and apply this outcome to the design of a reliable turnaround framework, acceptable to all creditors and financial institutions.
- The final objective is to contribute to the South African entrepreneurial, turnaround body of knowledge, and future formal studies in this academically ill-represented field.
- Through comprehensive literature research to identify and theoretically define “verifier determinants” that confirm the early warning sign and causes. Apply in depth interviews to identify the use of verifier determinants by specialist turnaround practitioners.
- Confirm the actual use and value of the verifier determinants by experts and practitioners during turnarounds, Design and include “verifier determinants” as an integral part of a turnaround framework that supports rehabilitation of the business.
- Compare the formal turnaround practices, which are applied in other jurisdictions such as the United States of America, Canada, Australia, Africa will be investigated.
- Adapt the framework cognisant of Chapter six of the companies Act, Act 71 of 2008 requirements and recommend to formal and informal turnaround practices relevant in South Africa.
- business triage
- verifier determinant
- turnaround framework, introducing the constructs “business triage” and “verifier determinant” a timeline schedule for executing the rescue process
Thesis (PhD)--University of Pretoria, 2011.
Business Management
unrestricted
Zrinzo, L. "MRI guided and MRI verified deep brain stimulation : accuracy, safety and efficacy". Thesis, University College London (University of London), 2011. http://discovery.ucl.ac.uk/1325642/.
Texto completoNguyen, Hong Diep. "Efficient algorithms for verified scientific computing : Numerical linear algebra using interval arithmetic". Phd thesis, Ecole normale supérieure de lyon - ENS LYON, 2011. http://tel.archives-ouvertes.fr/tel-00680352.
Texto completoLeitner, Florian. "Evaluation of the Matlab Simulink Design Verifier versus the model checker SPIN". [S.l. : s.n.], 2008. http://nbn-resolving.de/urn:nbn:de:bsz:352-opus-61257.
Texto completoDibley, James. "A development method for deriving reusable concurrent programs from verified CSP models". Thesis, Rhodes University, 2019. http://hdl.handle.net/10962/72329.
Texto completoWagner, Gerd. "Vivid Agents: How They Deliberate, How they React, How They Are Verified". Universität Leipzig, 1996. https://ul.qucosa.de/id/qucosa%3A34510.
Texto completo