Thèses sur le sujet « Buck converter »
Créez une référence correcte selon les styles APA, MLA, Chicago, Harvard et plusieurs autres
Consultez les 50 meilleures thèses pour votre recherche sur le sujet « Buck converter ».
À côté de chaque source dans la liste de références il y a un bouton « Ajouter à la bibliographie ». Cliquez sur ce bouton, et nous générerons automatiquement la référence bibliographique pour la source choisie selon votre style de citation préféré : APA, MLA, Harvard, Vancouver, Chicago, etc.
Vous pouvez aussi télécharger le texte intégral de la publication scolaire au format pdf et consulter son résumé en ligne lorsque ces informations sont inclues dans les métadonnées.
Parcourez les thèses sur diverses disciplines et organisez correctement votre bibliographie.
Rahman, Muhammad Saad. « Buck Converter Design Issues ». Thesis, Linköping University, Department of Electrical Engineering, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-9713.
Texte intégralSwitch Mode Power Supplies are very important components in present day electronics and have continued to thrive and grow over the past 25 years. This thesis looks inside how the SMPS have evolved over the passage of years with special emphasis to the Synchronous Buck Converter. It also discusses why there is a strong potential to further the study related to designs based around a Synchronous Buck Converter for portable applications. The main objective of the thesis is to look into the controller design for minimizing size, enhancing efficiency and reliability of power converters in portable electronic equipment such as mobile phones and PDAs. The thesis aims to achieve this using a 90 nm process with an input voltage of 1.55V and an output of 1V with a power dissipation of 200mW.
Olivar, Gerard. « Chaos in the buck converter ». Doctoral thesis, Universitat Politècnica de Catalunya, 1997. http://hdl.handle.net/10803/5841.
Texte intégralEl capítulo 2 resume la información básica sobre convertidores conmutados de corriente contínua, y también sobre qué tipo de comportamiento cabe esperar de un sistema dinámico no lineal. Se discuten las referencias más relevantes sobre circuitos no lineales, y en concreto, las que atañen a circuitos caóticos en electrónica de potencia.
Los sistemas de ecuaciones diferenciales lineales a trozos con dos topologías se introducen en el capítulo 3. Como caso particular, se dan las ecuaciones que rigen la dinámica del convertidor buck con control PWM, y se establecen algunas propiedades básicas de las soluciones. La técnica general para obtener órbitas periódicas se particulariza para las soluciones T-periódicas y 2T-periódicas, y se establecen resultados para algunos tipos específicos de las nT-periódicas.
En el capítulo 4 se detalla el análisis de la aplicación estroboscópica. Este capítulo está orientado geométricamente, aunque el cálculo numérico es también imprescindible para obtener resultados específicos. Se halla también una región de atrapamiento para el sistema, en la cual se encuentra una aplicación de tipo horseshoe. La herramienta principal de este capítulo es la continuidad de la aplicación de Poincaré asociada, que permite deducir analíticamente como se transforman las diferentes regiones del espacio de fases.
El capítulo 5 está dedicado a las bifurcaciones secundarias halladas conjuntamente con el atractor principal. En este capítulo, el cálculo numérico es esencial para hallar los diagramas de bifurcaciones, las variedades invariantes y las cuencas de atracción. Como las soluciones son conocidas analíticamente a trozos, los algoritmos se benefician de ello en rapidez y sencillez. Se encuentran bifurcaciones suaves y no suaves. Se dan también expresiones exactas para los multiplicadores característicos, lo cual representa una gran ventaja cuando se calculan las bifurcaciones.
El capítulo 6 se aparta ligeramente del espíritu general de la tesis. En lugar de describir el comportamiento caótico del sistema, se sugieren algunos métodos de control de caos y se simulan éstos para comprobar si producen los efectos deseados. En concreto, se dan tres opciones: primero, se concreta el método OGY para las ecuaciones del convertidor buck ; segundo, se sugieren varios esquemas de control de realimentación con retardos, y tercero, se propone un método de control de lazo abierto. El control del comportamiento caótico en este circuito es importante, puesto que reduce el rizado de salida y por tanto, amplia el rango operacional del convertidor.
Algunas sugerencias para seguir el estudio de estos sistemas dinámicos se dan en el capítulo 7. Algunas simulaciones se han hecho con una versión suavizada del sistema de ecuaciones diferenciales con el software standard AUTO. También se proponen aproximaciones de la aplicación de Poincaré, que pueden proporcionar un tratamiento más analítico y simulaciones más rápidas.
Cazzell, Gregory A. « Output Impedance in PWM Buck Converter ». Wright State University / OhioLINK, 2009. http://rave.ohiolink.edu/etdc/view?acc_num=wright1247006982.
Texte intégralChadha, Ankit. « Tapped-Inductor Buck DC-DC Converter ». Wright State University / OhioLINK, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=wright1578488939749599.
Texte intégralBarbagallo, Mariano. « HV Interleaved Multiphase DcDc Buck-Boost Converter ». Master's thesis, Alma Mater Studiorum - Università di Bologna, 2017.
Trouver le texte intégralYang, Shun. « Modelling and control of a Buck converter ». Thesis, Blekinge Tekniska Högskola, Sektionen för ingenjörsvetenskap, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:bth-2207.
Texte intégral+46-762795822
DI, LORENZO ROBERTO. « DC-DC Buck Converter For Automotive Applications ». Doctoral thesis, Università degli Studi di Milano-Bicocca, 2021. http://hdl.handle.net/10281/301996.
Texte intégralThe advent of the power MOSFET ranks as one of the most significant developments in power electronics in recent years. While the vertical devices which appeared in the late seventies looked set to find an important place in the market, particularly in the area of high-frequency power conversion, the overall dominance of the power bipolar transistor did not seem seriously threatened. However, when the more easily manufacturable vertical DMOS devices appeared in volume in 1978, the scene was set for a revolution. The power MOSFET rapidly achieved a reputation for being forgiving and easy to design with, but universal acceptance was delayed by its relatively high cost. The automotive electronics operating from car battery experiences transient voltages such as cold-cranking and load dump which can range from 4.5V to >30V. In addition, the new technologies such as start-stop, increase the frequency of such transients and operational requirements of electronic devices. This requires o-battery power ICs to withstand harsh operating conditions and reliably provide power to the whole vehicle. As an example, the air condition, front/back car lights are supposed to keep their functionality during start-stop induced cranking conditions. This requirement can be efficiently and reliably fulfilled from DC-DC converters. The automotive industry is rapidly switching from filament lamps to new systems (LED) for front/back lighting as they perform better in terms of energy efficiency than the conventional ones. However, due to the electrical characteristics of these systems present in a car cannot be powered directly from the automotive battery. They require specialized driving circuits which can respond to the changing needs of the loads as their electrical properties change while maintaining the uniform current. DC-DC converters other the easiest way to power such the load with a constant current. As result Buck, Boost, Buck-Boost DC-DC converters for automotive applications are of great interest for the automotive industry. In particular, not addressed so far are monolithic solutions in Smart Power technologies. Smart Power technologies allow integrating power transistor, control logic and diagnostic on a single chip (SOC – System On Chip). Because high yield requirements they involve only highly mature, well-experienced processing steps. Because of low-cost requirements, a reduced mask sequence is used, leading normally to two interconnecting levels (polysilicon and metal). In this thesis, it has been designed a DC-DC converter for automotive applications. The first chapter of this document is aimed to serve as an introduction to the reader for all the work descriptions along with the report. We need a high voltage technology to design an integrated DC-DC converter. Here, I will use smart power technology, this technology permits to create high side power switch with low resistance.
Pierleoni, Enrico. « Analisi e progetto del Z-Source Buck Converter ». Bachelor's thesis, Alma Mater Studiorum - Università di Bologna, 2018. http://amslaurea.unibo.it/16305/.
Texte intégralKilic, Umit Erdem. « Design Of Buck Converter For Educational Test Bench ». Master's thesis, METU, 2007. http://etd.lib.metu.edu.tr/upload/2/12608153/index.pdf.
Texte intégralWhitney, Jonas Alan. « Alternative topologies for the low-voltage buck converter ». Thesis, Massachusetts Institute of Technology, 2018. http://hdl.handle.net/1721.1/119559.
Texte intégralThis electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Cataloged from student-submitted PDF version of thesis.
Includes bibliographical references (pages 145-146).
In this thesis, investigative work on and development of alternative topologies for the buck converter for low voltage dc dc conversion was performed. The three level buck, Resonant Switch Capacitor (ResSC), and Cuk-Buck2 were selected to be studied further based on the fact that they contain few components and were discovered in this work to have the possibility of operating at fixed frequency while smoothly regulating output voltage over the entire conversion ratio of 0 to 1. All three use a capacitive storage element in addition to a small inductance/s, so it was believed this may allow for efficiency or density improvements due to the excellent energy storage capability of MLCCs. New control methods were developed in order to operate the ResSC and Cuk-Buck2 at fixed frequency over the entire output range. New work was done to in order to achieve flying capacitor balancing in the ResSC and Cuk-Buck2, practical for future implementation in a monolithic converter. Simulated efficiency and other characteristics of the three converters are compared. Prototypes were built and used to confirm functionality of the new control schemes and balancing methods..
by Jonas Alan Whitney.
M. Eng.
Qiu, Yang. « High-Frequency Modeling and Analyses for Buck and Multiphase Buck Converters ». Diss., Virginia Tech, 2005. http://hdl.handle.net/10919/29804.
Texte intégralPh. D.
Cheng, Shuang. « Two-Phase Buck Converter Optimize by Echo State Network ». Thesis, Virginia Tech, 2019. http://hdl.handle.net/10919/87439.
Texte intégralMaster of Science
Buck converter is a power converter which drops high input voltage into a low output voltage in high efficiency. With this characteristic, it has been used in a great number of applications. Most of the buck converter optimized the maximum load to increase the efficiency, however, it will also increase the power consumption of the buck converter. For this reason, we propose a novel way of designing the two-phase buck converter optimize with Echo State Network(ESN). The inspiration of neural network is derived from the biological brain, similar with a human brain, the neural network also have self-learning ability. Reservoir computing is one kind of neural network, it can save more time on computing data and increase the efficiency at the same time. Compare with normal two-phase buck converter, the purposed two-phase buck converter optimize with ESN can increase the efficiency and also decrease the running time.
Forster, Andrew E. « Energy Harvesting From Exercise Machines : Buck-Boost Converter Design ». DigitalCommons@CalPoly, 2017. https://digitalcommons.calpoly.edu/theses/1702.
Texte intégralQuerol, Borràs Jorge. « MCU Controlled DC-DC Buck/Boost Converter for Supercapacitors ». Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-101205.
Texte intégralDetta arbete är inriktat på DC till DC konvertering, vad är en viktig funktion för att möjliggöra användningen av superkondensatorer för lagring av energi. En teoretisk studie och jämförelse av metoder, algoritmer och tekniker för program styrs DC-DC omvandlare har använts för att utveckla ett system vad som kan stega upp eller ner en DC variabel spänning och omvandla det till ett stabilt tillstånd spänning. Som ett resultat av en ny kontroll teori bygger på Bang-Bang kontroll har utvecklats med en ARM LPC1768 processor. Det genomfördes för att lösa de kommersiella omformare problemen eftersom de inte kan arbeta med superkondensatorer på grund av deras låga inre motstånd. Resultatet är en anordning vilken kan tillhandahålla en programmerbar spänning mellan 4,5 V och 25 V, kan hårdvaran att stödja upp till 6 A och det är möjligt att styra operativsystemet ström som flyter genom omvandlaren. Den kan användas med de superkondensatorer, såsom visas i detta arbete, men den kan också användas som en allmän plattform för spänning och energiomvandling. Dessutom har hårdvara möjlighet att arbeta med smarta nät via ethernet-uttag, solpaneler med MPPT algoritmer och äntligen, hantera energi mellan olika typer av DC spänningskällor och enheter.
Alghamdi, Mohammad. « A spurious-free switching buck converter for portable applications ». Thesis, McGill University, 2012. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=107737.
Texte intégralLes convertisseurs Buck DC–DC sont indispensables afin de maximi le temps de veille ainsi que la durée de vie de la batterie des appareils électroniques portatifs. Dans un environnement portatif, selon le mode actif ou de veille de l'appareil, les conditions de charge varient fortement de niveau lourd vers le niveau léger de charge. Ce type d'appareil fonctionne la plupart du temps en mode veille. Dans un tel environnement, le spectre sortant de convertisseurs Buck DC–DC doit être sans parasite (c'est-à-dire avoir un contenu tonal faible), pour permettre d'alimenter les circuits sensibles comme les circuits intégrés dans les systèmes de la communication mobile.Parmi les différentes architectures de convertisseur Buck, les convertisseurs de commutation ont la meilleure efficacité de transformation de puissance, sur une gamme plus étendue de taux de transformation. L'accroissement de la fréquence de la commutation du convertisseur Buck, permet l'utilisation de composants hors-puce compacts ainsi que l'amélioration de l'intégrabilité du convertisseur. Cependant, l'exploitation à une fréquence élevée de commutation, augmente les pertes de commutation et réduit également l'efficacité de la transformation de la puissance surtout à des charges légères. Le but final de la conception d'un convertisseur Buck de commutation est de résoudre le conflit entre le fonctionnement à une fréquence élevée de commutation et une transformation de la puissance efficace, tout en conservant une tension de sortie régulée avec un contenu tonal faible.Cette thèse propose un convertisseur Buck de commutation sans parasite avec une efficacité améliorée pour des charges légères en vue d'une utilisation dans les appareils électroniques portables sensibles au bruit. Le convertisseur proposé réalise un faible bruit sortant en utilisant un contrôleur modulateur delta-sigma. L'efficacité à charge légère est augmentée par: 1) le changement de la fréquence de la commutation du convertisseur Buck (i.e. la fréquence d'échantillonnage du contrôleur modulateur delta-sigma) selon le courant de charge; 2) le passage du mode de la conduction continue (MCC) au mode de la conduction discontinue (MCD) pour les charges légères; et 3) l'utilisation d'un nouveau circuit de détection de courant à faible puissance. Le modulateur delta-sigma est conçu avec une architecture d'entrée par anticipation (input-feedforward) qui permet le changement de la fréquence de commutation de contrôleur, sans perturber la stabilité de la boucle de rétroaction du convertisseur Buck et également la reduction du courant de mise en veille du contrôleur.Le convertisseur Buck de commutation proposé a été fabriqué dans un procédé de CMOS numérique de 0.13-µm avec une fréquence maximale de commutation de 10 MHz. Ce qui permet l'utilisation des composants hors-puce compacts. Les résultats mesurés montrent que ce convertisseur Buck atteint une sortie sans parasite avec un seuil de bruit inférieur à 60 dBm et une ondulation de tension au dessous de 70 mV à travers la gamme complète du charge (2 mA à 800mA). Par ailleurs, il atteint une efficacité de puissance de plus de 70% sur cette gamme, avec une efficacité de pointe de 95,12%.
Luc, Brian R. « Digitally Controlled Zero-Voltage-Switching Quasi-Resonant Buck Converter ». DigitalCommons@CalPoly, 2015. https://digitalcommons.calpoly.edu/theses/1346.
Texte intégralPIDUTTI, ALBINO. « High Frequency Buck Converter for Automotive Current Source Applications ». Doctoral thesis, Università degli Studi di Milano-Bicocca, 2023. https://hdl.handle.net/10281/404716.
Texte intégralThis work was carried out in cooperation between Infineon and the University of Milan Bicocca, the aim being to develop the core of a DC-DC Buck Converter with a high switching frequency. Switching converters offer a simple and efficient way to power electronic loads. In addition, DC-DC power supplies make it possible to effectively meet many safety requirements of modern automobiles. For example, it is absolutely necessary that emergency lights, headlights and brake lights maintain their functionality under all conditions, especially during cold starting, when the battery voltage reaches very low values (even 4V). But under certain conditions they experience voltages even above 30V. DC-DC power supplies are well suited to large and sudden variations in supply voltage, and in addition to their relative simplicity they combine high efficiency, values of over 90%. Increasing the switching frequency reduces the size of reactive components linearly, allowing smaller PCBs and consequently lower costs. BCD technologies allow power transistors, control logic and diagnostics to be integrated on a single chip (SOC - System On Chip). In this research, three Buck converters were developed that operate at three different frequencies 1MHz, 4MHz and 10MHz with an output current of 3A. Of the buck converters available on the market, only the best performing ones have switching frequencies of 2.0-2.5MHz and load currents of 2-2.5A. Since the target of 10MHz with a load current of 3A is very aggressive, a Buck converter architecture was adopted that minimises the transition time of electrical signals, and a new driver topology had to be developed that is much faster and more powerful than the solutions adopted so far (patent pending). At the time of writing, 1 MHz and 4 MHz devices are being deployed. The wafers are scheduled for release in February 2023. The third Buck converter (10 MHz) is pending deployment. Four patent proposals were submitted during this doctoral work.
Wu, Meng-Ru, et 吳孟儒. « Design of Buck Converter and Boost Converter Circuits ». Thesis, 2014. http://ndltd.ncl.edu.tw/handle/76356060833285963689.
Texte intégral國立勤益科技大學
電子工程系
102
This paper propose a voltage conversion circuit with feedback control to achieve the buck and boost converters' output stability. In the PWM control circuit, we use TL494 to determine the duty cycle with pulse width modulation(PWM), and design feedback architecture with optical coupler, the feedback signal is supplied to the PWM control circuit, in order to achieve the goal of a stable output. Circuit design proposed in this study, through the experiment of line regulation and load regulation is proved to achieve stable voltage output.
« Chaos in the buck converter ». Universitat Politècnica de Catalunya, 1997. http://www.tesisenxarxa.net/TDX-0921104-170716/.
Texte intégralChiang, Ping-hsing, et 江泙興. « BUCK CONVERTER WITH SOFT START ». Thesis, 2007. http://ndltd.ncl.edu.tw/handle/u229vt.
Texte intégral大同大學
電機工程學系(所)
95
A bulk DC-DC converter with soft start has been designed and simulated with TSMC 0.35µm CMOS models. The overall circuit is designed based on a current-mode PWM controlled converter proposed by Lee and Mok [1]. In addition, a soft-start circuit is added to avoid the instant surging current breaking down the circuit. Simulation results show that this converter with on-chip current sensor can operate from 300 kHz to 1 MHz with supply voltage from 3 to 5 V suitable for battery supply applications. The output ripple voltage is about 20 mV with a 10-µF off-chip capacitor and 4.7-µH off-chip inductor. The maximum power efficiency is 94% at load current 200mA and supply voltage 3V. The line and load regulations are 0.24mV/mA and 73.6mV/V, respectively. With a soft-start circuit, the peak inductor current at power-on is reduced from 1.14A to 749mA for an output of 1.8V. It proves that the circuit of the soft start is effective.
Tseng, Po-Hsiang, et 曾博祥. « Two-Switch PCCM Buck Converter ». Thesis, 2015. http://ndltd.ncl.edu.tw/handle/23327193030934007585.
Texte intégral國立臺灣海洋大學
電機工程學系
103
In this thesis, we consider the design and simulation of a pseudo-continuous conduction mode (PCCM) buck converter. Two switches are used to implement the PCCM operation.Simulation results verify the beneifit of the used PCCM buck converter.
Cheng, Yu-Sung, et 鄭育松. « CMOS Integrated Buck Voltage Converter ». Thesis, 2010. http://ndltd.ncl.edu.tw/handle/85998319352058519420.
Texte intégral龍華科技大學
電子工程研究所
98
In this thesis, a series of DC voltage regulators, such as Bandgap reference (BGR), Low dropout regulator (LDO) and DC-DC Buck Converter are developed. The BGR circuit is a low sensitivity to temperature and supply voltage. To increase the performances, an nMOS arrangement folded operational transconductance amplifier is developed for the BGR circuit. In addition, a small size, low cost and low ripple output voltage LDO regulator is introduced. Finally, in order to increase operating time of the battery powered devices, a high efficiency, high noise rejection Buck DC-DC Converter is also introduced. The LDO circuit consists of an error amplifier, buffer and feedback circuit, while the DC-DC Buck Converter circuit is composed of a frequency compensation circuit, PWM control circuit, non-overlapping circuit and pMOS power transistor. In the power converter, the PWM circuit included a ramp generator, a clock generator, a comparator, a clock generator and a flip-flop circuit. The clock generator provided a fixed frequency for the PWM controlled circuit. This PWM circuit generates a fixed-frequency and has a wide range controlled duty. In this thesis, the proposed circuit, had simulated with TSMC 0.35μm 2P4M models, and had implemented with TSMC 0.35μm 2P4M process. The measurement results show that the output voltage of the LDO and DC-DC Buck Converter Operating voltage are ranging 2V to 5V and the output voltage is 1.8V. The maximum efficiency of DC converter is over 90 %.
Mao, Yi-Kai, et 毛奕凱. « A Novel Buck-Boost Converter ». Thesis, 2012. http://ndltd.ncl.edu.tw/handle/49500212731889419464.
Texte intégral崑山科技大學
電機工程研究所
100
Power electronics has been widely used in a variety of high-power products, including power heat control, lighting control, electric machinery control, power converters and HVDC systems, etc., so it’s important how to keep the conversion efficiency of the converter in the process of transformation. This thesis will explain how the hard switching high efficiency DC to DC Novel Buck-Boost Converter to choose the parts, making the converter have good effciency in CCM and DCM situation. The article includes the experimental results of control analysis, constitution of circuit and the input voltage 36V convert to the high voltage output 60V. In addition, the circuit control of A Novel Buck-Boost Converter can be used to the other converters, like buck-boost converter, boost converter and the flyback converter…ect. Also in circuit design, complete the circuit simulate wave with the Ispice, then to complete the measured results with the circuit combination reference data. This Novel Buck - Boost Converter, which not only save the size of the circuit converter, and it can be able to complete a buck-boost mode without LDO. Finally, according to the operating of the converter, the parameters of the calculation with the computer and circuit implementation, confirmed that this circuit can achieve a hard and fast switching characteristics and high conversion efficiency of more than 90%.
Shieh, Shang-Yu, et 謝尚祐. « Ripple Based Hysteresis Buck Converter ». Thesis, 2012. http://ndltd.ncl.edu.tw/handle/34438279793619388670.
Texte intégral國立臺灣大學
電子工程學研究所
100
In recent years, portable devices involve several integrated chips with different functionality into the same printed-circuit-board (PCB) for achieving various functions. It needs a highly integrated power management module to reduce the volume and weight in order to keep up with the trend of compact size. Unfortunately, the off-chip inductor and capacitors for the high-efficiency switch-mode DC-DC converters occupy the large PCB area. That results in the extra manufacture cost and the problem for system-on-a-chip (SoC) integration. In other words, a highly integrated power management module is necessary for achieving high performance and small footprint area in today’s power management design. This paper proposes a ripple based technique hysteresis buck converter, this circuit have better regulation and fast transient response than before. Furthermore, this circuit uses the P compensator to remove the use of the compensation capacitor instead of the conventional PI compensator . However, owing to the change of the compensation method, the load regulation performance should be compensated. Thus, the dynamic dc current scaling is proposed in this paper to enhancement the load regulation performance. In the ch5, the whole measurement results are presented.
Babu, Myneni Sukesh. « Modelling and Controller Design of Isolated Buck(Fly-buck) converter ». Thesis, 2018. http://ethesis.nitrkl.ac.in/9749/1/2018_MT_216EE5310_MSBabu_Modelling.pdf.
Texte intégralEachempatti, Haritha. « Single Inductor Dual Output Buck Converter ». 2009. http://hdl.handle.net/1969.1/ETD-TAMU-2009-05-708.
Texte intégralWu, Tsai-Ning, et 吳在寧. « Driver IC Implementation of Buck Converter ». Thesis, 2005. http://ndltd.ncl.edu.tw/handle/09995784468144326716.
Texte intégral大葉大學
資訊工程學系碩士班
93
In recent years, the CMOS integrated circuits technology has been successfully applied to many systems. In order to provide enough power for portable devices, the low voltage and low power circuits would be the trend for current CMOS IC design. Pulse-Width Modulation (PWM) techniques have been widely used in power electronic products. The design and implementation of a DC-DC buck converter for low supply voltage electronic system is presented in this paper. With high power conversion efficiency, this design can be applied to portable electronic products such as mobile phone, digital camera, PDA, etc. This chip is fabricated with TSMC 0.35μm 2P4M 3.3V Mixed Signal CMOS technology through CIC. The size of this chip is 343.7μm x 325μm. The design contents of this paper include: introduction, development and motivation in recent research, principle and structure, circuit, simulation and result, conclusion and references. This paper will provide a survey of related literature and discuss the distinct phenomena in different modulation regions. Simulation results and experimental results will be provided to verify the performance of the proposed strategies.
Chiu, Wei-che, et 邱偉哲. « An Eight-phase Buck Converter Design ». Thesis, 2007. http://ndltd.ncl.edu.tw/handle/43718328561982383327.
Texte intégral國立臺灣科技大學
電機工程系
96
The thesis presents a multiphase buck converter design. Multi-phase buck converters have the characteristics of high power density, high currents, accurate voltage output, and fast transient-response. Therefore, it is suitable to supply power to a new generation of central processing units. A 1V eight-phase buck converter is implemented with a 12V input and a 120A load. It was simulated utilizing IsSpice to check its feasibility. The eight-phase buck converter consists of a circuit of PWM signal control power switch and a power stage. Circuit of PWM signal control switch combines the Richtek- RT9245A as a four-phase control IC and a phase shift circuit with CD4011 in series. The power stage consists of eight buck converters.
Yang, Huang-Ping, et 楊煌平. « A Novel Bidirectional Buck-Boost Converter ». Thesis, 2016. http://ndltd.ncl.edu.tw/handle/32498712593487382486.
Texte intégral崑山科技大學
電機工程研究所
104
Lead-acid batteries widely used in various applications, such as automotive power system, telecom power supply uninterruptible power system, and so on. However, charge the battery after the electric energy finished is used. The main aim of this thesis is to 120V high-voltage battery and a low voltage 12V supplemental power. Accordingly, a novel bidirectional Buck-Boost converter is proposed in this thesis. In the proposed a novel bidirectional Buck-Boost converter bears the advantages such as simpler circuit structures, lighter weight, smaller volume, as well as lower cost. In addition, can be used to the other converters, like boost converter, buck converter and the flyback converter…ect. The article includes the experimental results of control analysis, constitution of circuit. Also in circuit design, complete the circuit simulate wave with the IsSpice, then to complete the measured results with the circuit combination reference data. Finally, accomplish a novel bidirectional Buck-Boost converter according to the operating of the converter, the parameters of the calculation with the computer and circuit implementation, confirmed that this circuit can achieve a hard and fast switching characteristics and high conversion efficiency of more than 85%.
Huang, Bi-Lun, et 黃弼侖. « Soft-Switching Bidirectional Buck-Boost Converter ». Thesis, 2016. http://ndltd.ncl.edu.tw/handle/70084250569148931050.
Texte intégral崑山科技大學
電機工程研究所
104
The switches of conventional converters are almost hard-switching types, which cause a sudden wave-rise on voltage and current whenever the switch is under the condition of on or off. Also, the switch may be damaged easily when often used, which leads to switch loss, low efficiency, and the rise of switch component stress. In this research, the soft-switching bidirectional buck-boost converter suggests advantages of simple construction, low weight, small volume, and low cost. Additionally, it can be adopted to other converter devices such as buck converters and boost convers. The researchers gave clear explanations toward the circuit on its theory of operational characteristics, and an analysis has been made over the circuit modes. In addition, before designing the circuits, auxiliary soft-ware IsSpice was employed to analyze the simulation waveforms of the converter mentioned above. The referential readings from the simulation waveforms were then applied to complete the actual circuits and test results. After the completion of the soft-switching bidirectional buck-boost converter, its related waveforms were measured and compared with the simulated ones for their accuracy. The result reveals that the efficiency of the circuits can be as high as 94%.
Lin, Mu-jhih, et 林睦植. « Energy-recovery Schemes for Buck Converter ». Thesis, 2007. http://ndltd.ncl.edu.tw/handle/19532782794120444995.
Texte intégral國立成功大學
電機工程學系碩博士班
95
This thesis presents the buck converter with energy-recovery scheme by use of isolated coupled-inductor or center-tapped Coupled-inductor. The buck converter is one of the most popular circuit topologies for the step-down application, especially, in the area of high load current applications with highly dynamic loads. In order to obtain fast transient response and less output-voltage spike, the small inductance value or a large output capacitor is used in buck converter. The small inductance results in a major output-voltage ripple. Moreover, a large capacitor causes increased cost and bulk for buck converter. Therefore, this thesis proposes the buck converter with energy-recovery schemes to improve the full-to-low load transient response and reduce output-voltage spike. The configuration of proposed circuits is very simple and the capacity of the output capacitor can be minimized. Finally, the experimental results validate the advantages of the proposed circuits with fast transient response, less output-voltage ripple and low output-voltage spike.
Chen, Wei-I., et 陳偉毅. « Feedback Compensation Design for Buck Converter ». Thesis, 2013. http://ndltd.ncl.edu.tw/handle/00823423124645890861.
Texte intégral國立中央大學
電機工程學系在職專班
101
In the application of DC power converter system, the most important requirement is to provide a stable output and to have fast transient response to the loads. The design of feedback compensation loop becomes an important part in power converter system design. Current feedback compensation design is based on operational amplify to form a feeback circuit loop network that can compensate amplitude and phase of system. Buck converter is one of the well-used types in application currently. In this thesis, Buck convert will be used to explor the circuit realization of feedback compensation loop and analyze the application of most kinds of compensation circuits. The work will be start from theory analysis, which includes model establishment and transfer function generation, and then followed by circuit design and realization. All the workable circuits will be verified by MATLAB and PSIM simulation tool. The result will provide the guideline for designing feedback compensation loop. In the last part of the thesis, a specifically new designed circuit will be introduced to improve and optimize the original compensation circuits for the requirement of a system with multi-power supplies, and to optimize remote control function. It will be combined into original designed compensation circuits to provide an optimized feedback control to enhance the stability of system.
Fan, Chen-Chang, et 范振章. « An Adaptive On-Time Controlled Buck Converter & ; A Hysteresis-Current-Controlled Buck Converter and A Continuous-Time Delta-Sigma Boost Converter ». Thesis, 2017. http://ndltd.ncl.edu.tw/handle/7d7nvw.
Texte intégral國立臺北科技大學
電子工程系研究所
105
The thesis proposes three DC-DC converters. The first proposed converter is a ripple-based buck converter with phase-frequency-locked (PFL) and adaptive on-time (AOT) techniques. Its principal controlled loop contains an output voltage feedback path and a phase-frequency-locked path. The PFL loop comprises an AOT controller to accelerate the transient time and lock the switching frequency. The chip size is 1.538 mm2. The input voltage ranges between 3V and 3.6V and the output voltage ranges are between 1V and 2.6V. The peak efficiency is 90.52% at 300mA load current. In order to reduce the output noise, the thesis proposes the second converter, a low-noise boost-converter using continuous-time (CT) delta-sigma technique with a fast transient path. The chip size is 1.932 mm2. Its input voltage ranges are from 0.9 V to 1.5 V and its output voltage is 3.3 V. The maximum efficiency is 89.57% at 50 mA load current. The third proposed converter is a hysteresis-current-controlled buck converter with a new active inductor current sensing scheme. Its controlled circuit speeds up the transient time by limiting the inductor current switching in the hysteresis region. The chip size is 1.634 mm2. The input voltage ranges are from 3 V to 3.6 V and the output voltage ranges are from 1 V to 2.5 V. The maximum efficiency is 94.54%. All of the proposed chips in the thesis are implemented with TSMC 0.35-μm 2P4M CMOS process.
LIN, JIA-MING, et 林佳銘. « Buck Converter with Active-Current-Sensing Techniques and Hysteretic-Voltage-Controlled Buck Converter with Pseudo-Current-Sensing Techniques ». Thesis, 2019. http://ndltd.ncl.edu.tw/handle/t6xmfj.
Texte intégral國立臺北科技大學
電子工程系
107
In the first converter, the active-current-sensing technique is used to sense the inductor current, which can reduce the glitch caused by switching. The proposed circuit not only performs with fast transient response time, but also improves the conversion efficiency. The first converter is implemented with TSMC 0.35-µm COMS process. The chip area is roughly 1.488×1.433 mm2, the input voltage is 3.3 V,and the output voltage varies from 1.0 V to 2.5 V, When the output voltage is 2.5 V and the output current is 200 mA, the highest efficiency is 87.2%. The second converter of the paper is the hysteretic-voltage-controlled buck converter with pseudo-current-sensing technique. This architecture of the proposed circuit is simple and easy to design. Compared with traditional converter circuit, the proposed comments are faster transient response, more stability, and reduce power consumption. TSMC CMOS 0.35-µm process is used to design converters. The chip area is 1.500×1.373 mm2, the input voltage is 3.3 V, and the output voltage ranges from 1.0 V to 2.5 V. When the output voltage is 2.5 V and the output current is 250 mA, the peak efficiency is roughly 90.6%.
Chen, Chih-Chiang, et 陳志強. « Hysteresis-Current-Controlled Buck/ Buck-Boost Converter Using Active Current Sensing Circuit ». Thesis, 2006. http://ndltd.ncl.edu.tw/handle/7q3egk.
Texte intégral國立臺北科技大學
電腦與通訊研究所
94
In this thesis, We design a new active current sensing circuit and apply this technology fo hysteresis-current-controlled buck/buck-boost converter using active current sensing circuit for portable applications. In the proposed DC-DC converter, the key building blocks includes power MOS, Voltage-current conversion circuit, hysteresis-current comparator, driving circuit, non-overlapping circuit and current sensing circuit. The current sensing circuit can fully sense the inductor current and be used to construct buck/buck-boost converter. The hysteresis-current-controlled can be worked in parallel. The proposed circuits have been designed with TSMC 0.35um DPQM CMOS processes. The experimental results show that the buck/ buck-boost converter works well with the following features: the maximum inductor current up to 750mA; the input voltage range is 3~6V; the output voltage range from 0.45 to input voltage-0.4V; the maximum power efficiency up to 93.6%.
Huang, Yan-Hsun, et 黃彥勳. « Interleaved Buck Converter with Soft-Switching Feature ». Thesis, 2012. http://ndltd.ncl.edu.tw/handle/y73uz9.
Texte intégral國立東華大學
電機工程學系
100
Because of the progress of chip manufacturing technique, the transistor count inside one single CPU increases a lot, which elevates the current necessity of the chip. In order to reduce the power consumption in CPU, the supplied voltage has to be lower down. Therefore, to power CPUs, the voltage regulation modules should be featured with high current output capability at reduced voltage. The purpose of this thesis is to propose a soft-switching interleaved buck converter, which is able to provide high current at reduced output voltage. This converter is composed of several parallel-connected basic buck converter cells, associated with auxiliary capacitors. All the active switches can be soft-switched off to minimize their turn-off switching loss. Besides, synchronous rectification technique is applied to alleviate the conduction loss, which diodes might be suffered at especially high current condition. This is helpful for raising converter efficiency and power density. All the converter cells are designed with the same specification to facilitate the converter’s steady-state analysis and design. At last, a laboratory prototype circuit is built to verify the theory. The experimental results illustrate convincible agreement to theoretical analyses. The highest converter efficiency achieved is 92.5%.
Huang, Chien-Chung, et 黃建中. « BIPOLAR SYNCHRONOUS DC-DC BUCK CONVERTER DESIGN ». Thesis, 2009. http://ndltd.ncl.edu.tw/handle/97013166298125170114.
Texte intégral大同大學
電機工程學系(所)
97
A DC-DC synchronous buck converter with soft start has been designed and simulated with 40V bipolar process. The overall circuit is designed based on a voltage-mode PWM controlled converter. The input voltage range is from +4.3V to +20V. Simulation results show that this converter with on-chip current sensor can operate at 200 kHz. The current limit is implemented by sensing the voltage drop across the bottom N-MOSFET RDS (ON). The soft start function is used to prevent large inrush currents upon power-up. The internal thermal protection circuit can protect the system when the temperatures exceed 150°C.
Huang, Tang-Yu, et 黃堂祐. « A High Efficiency Dual-Mode Buck Converter ». Thesis, 2007. http://ndltd.ncl.edu.tw/handle/02993659578494616844.
Texte intégral國立臺灣海洋大學
電機工程學系
95
Abstract A high efficiency DC to DC buck converter is designed in this thesis. The high conversion efficiency converter can effectively prolong the portable products using time. The buck converter can switch between different modulation modes according to different load current conditions. With this arrangement, the converter can reach high efficiency under different load conditions. The converter can switch between pulse width modulation mode and pulse frequency modulation mode for heavy load and light load conditions, respectively. Dead-time control circuit and zero current detector are also used to avoid excess current consumption. A soft start operation is designed to avoid the damage of the transient large current at the start up. The switching circuit usually has electromagnetic interference problem. In the thesis, a simple and low power consumption modulation circuit is proposed to spread the switching frequencies. This chip is fabricated with TSMC 0.35μm 2P4M 3.3V/5V Mixed Signal CMOS technology.
Hsu, Wen-Tsung, et 胥文宗. « Nonlinear Analysis of TL494-Based Buck Converter ». Thesis, 2006. http://ndltd.ncl.edu.tw/handle/78763339325116441467.
Texte intégral國立交通大學
電機學院碩士在職專班電機與控制組
94
In this thesis, the commercial TL494 PWM IC is used to design and implement the buck converter for studying the nonlinear characteristics of PWM-controlled power circuits. Applying the sampled-data approach, the mathematical model is constructed to analyze the instability dymanics of buck converter. The major goal of this thesis is to study the possible bifurcation phenomena operated in buck converters while the different system parameters vary. Moreover, the bifurcation conditions and the parameter spaces of the system equilibrium points are analyzed and estimated by the numerical simulations and the experimental demonstrations. Via the Isspice simulations, the system stability is studied and the bifurcation diagrams are depicted for the TL494-based buck converter. Finally, the bifurcation phenomena are demonstrated by implimenting the experiments of the practical circuit. According to the analysis results of this thesis, it is observed that the bifurcation behaviors might occur in the operations of the Continuous current Conduction Mode (CCM) and Discontinuous current Conduction Mode (DCM) of the PWM power circuits proposed. The bifurcation diagrams also reveal that the system dynamics might undergo the period-doubling bifurcation as the different system parameters are changed, and possibly enter into the chaos phenomenon. Furthermore, the nonlinear analysis of system dynamics is helpful to understand the stability conditions and domains which will provide the valuable reference to improve the performance of buck converter.
« Digitally Controlled Average Current Mode Buck Converter ». Master's thesis, 2011. http://hdl.handle.net/2286/R.I.14481.
Texte intégralDissertation/Thesis
M.S. Electrical Engineering 2011
LEE, HSIANG-LUNG, et 李湘龍. « The Frequency Response Analysis of Buck Converter ». Thesis, 2008. http://ndltd.ncl.edu.tw/handle/44849144664763351425.
Texte intégral大葉大學
電機工程學系碩士在職專班
96
Recently the energy question was more serious, when the electric power, the petroleum and non-renewable was in danger. When it became international society economy problem. The power of development solar energy resource become economical development question. The switch loss of the resonant converter is lower than traditional switch converter, and the technique of zero-voltage-switch is more effective in reducing the temperature of active switch. Finally , we will compare the case of switch with the resonant type and traditional type
Sui, Jay, et 隋杰. « Output Voltage Regulation of Twin-buck Converter ». Thesis, 2011. http://ndltd.ncl.edu.tw/handle/44689191941678257222.
Texte intégral國立中山大學
電機工程學系研究所
100
The purpose of this thesis is to design and implement a linear quadratic optimal controller for a twin-buck converter with zero-voltage-transition (ZVT). The controller calculates duty ratio every cycle based on voltage and current feedback, as well as estimates the time instances when the synchronous rectification power switch current is zero. These time instances are crucial for ZVT operation. Via frequency modulation, the controller is designed to automatically regulate the output voltage to a desired value under load and voltage source variation. Simulations indicate that the proposed control design works. The controller is implemented using a Field Programmable Gate Array (FPGA). The experimental results match the simulations, which further verifies the applicability of the proposed voltage regulation strategy.
Liao, Hsiao-Yun, et 廖筱耘. « A Digital-Intensive DC-DC Buck Converter ». Thesis, 2013. http://ndltd.ncl.edu.tw/handle/32051473247626262572.
Texte intégral國立暨南國際大學
電機工程學系
102
In recent years, integrated circuit process technology improved, circuit density increases, and circuit function powerful. The improving of process technology decreases the operation voltage of circuit. Meanwhile, the portable electronic products are popular today. So, low power consumption and high power efficiency are the primary consideration when designing portable electronic products. To increase the endurance of these portable electronic products, these circuits must operate in a low voltage and low current to reduce the power consumption. In this paper, a full-digital bulk converter controller is proposed. First, using VCO as a comparison circuit. The result of this circuit will not be affected by temperature or process. It is worth to mention that PWS circuit can meet the requirement under the different voltage. Based on the proposed architecture and techniques, an output voltage range between 0.9v~1.8v, load current range between 100mA~500mA digital control bulk converter circuit is realized. In TSMC 0.18-μm 1P6M CMOS process, simulation results show that the circuit in the load current of 100 mA the efficiency up to 86.3% ~ 88.76%, the load current of 500 mA the efficiency up to 91.5% ~ 94.5%.
陳嘉銘. « A Novel Square Complementary Isolated Buck Converter ». Thesis, 2011. http://ndltd.ncl.edu.tw/handle/31066533122849260512.
Texte intégral明新科技大學
電機工程研究所
99
This thesis presents a novel square complementary isolated buck converter, which is composed of one forward converter, one half-bridge converter, and one LC filter. By using transformers, both forward and half-bridge converters translate the input DC voltage supply to two isolated square-waved voltage sources. Then these two isolated square voltage sources are kept in series to form one DC voltage. The LC filter is used to remove the noise of the DC voltage, and then we obtain a steady output voltage. The circuit presented in this paper can reduce the output ripples which are induced by light loading, lower the on/off switching frequency, and decrease the circuit transient response effect of one LC filter, so it is one easily controllable isolated DC-DC buck converter with high stability and low cost. This thesis has provided some circuit simulations and will implement the circuit emulation to confirm the proposed method.
LIU, CHEN-YUEH, et 劉振岳. « Design of Smart Programmable Buck-Boost Converter ». Thesis, 2019. http://ndltd.ncl.edu.tw/handle/9q6438.
Texte intégral國立雲林科技大學
電子工程系
108
With the change of times, the speed of technological progress is changing rapidly, and the utilization rate of Internet of Things devices is increasing year by year. At present, the wireless sensing nodes installed outdoors usually have both energy collection and storage devices, thereby reducing reliance on the transmission lines to increase the elasticity of the device environment. In order to provide the power supply for such devices and to manage the charge and discharge of the battery at the same time, the multi-input-multi-output (MIMO) power management IC is often used in the system. Therefore, this thesis proposes the use of 0.18-μm CMOS power management IC, combined with advanced RISC Machine (ARM) implementation, in a mixed signal design with the cell-based ARM processor circuit synthesis, and the required analog circuit is completed using full-custom and integrated into the digital circuit on the same chip. The proposed CDL-PWM can save power and area, compared with the previous design, it can save 31.1% of power at D=50% and 65.3% power when D=0%. The imbedded microprocessor circuit also achieves A) program-controlled output to save the cost of redesigning the circuit, B) simultaneously processing sensing information without the need for additional computing units, and C) scanning the operating frequency to achieve maximum conversion efficiency. The smart programmable buck-boost converter is implemented based on TSMC 180 nm Mixed Signal RF General Purpose Process (T18). System simulation can achieve both a stable 1.8V battery voltage and 0.7 to 1.2V programmable voltage at the same time at input range of 0.9 to 3.3V, with a maximum efficiency of 85%.
FANG, YU-TENG, et 方有騰. « Buck Converter Dual Output with Tapped Inductor ». Thesis, 2019. http://ndltd.ncl.edu.tw/handle/5hqq33.
Texte intégral國立臺灣科技大學
電子工程系
107
This thesis proposes a dual-output voltage mode buck with a tapped inductor. The general single-inductor multi-output uses a traditional inductor. The main feature of this paper is to extend the duty cycle of the tapped inductor to achieve a larger step-down ratio, and to extend the responsibility. The extend cycle reduces the peak current of the upper power stage switch to improve the switching loss, operates the inductor current in continuous conduction mode, and uses phase sequence scheme to suppress the cross regulation phenomenon. This thesis is implemented in the TMSC 0.35 m 2P4M 3.3/5 V mixed-signal CMOS process. The wafer area of the wafer containing PADs is 1.7×3.342 mm2. The input voltage is 5 V, the output voltage is 1.8 V and 1.2 V respectively, the output load range is 50-400 mA, the external power stage tapped inductance is 4.7 H, the turns ratio is 1.5, and the output capacitance is 10 F. The simulation results have a cross-regulated voltage of 0.125-0.175 mV/mA. The maximum efficiency of the converter is 92.3% for each of the two outputs of 100 mA, and the lowest efficiency is 89% for each of the two outputs of 400 mA.
Sahu, Gyana Ranjan, Rohit Dash et Bimal Prasad Behera. « Design and Implementation of ZCS BUCK Converter ». Thesis, 2010. http://ethesis.nitrkl.ac.in/1656/1/Design_and_Implementation_of_ZCS_BUCK_CONVERTER.pdf.
Texte intégralLiu, An, et 劉安. « Design of Charge-Pump Boost Converter and Flying-Capacitor Buck-Boost Converter ». Thesis, 2014. http://ndltd.ncl.edu.tw/handle/tyyrj5.
Texte intégral國立臺北科技大學
電腦與通訊研究所
102
In this first part of this thesis, a new continuous conduction mode (CCM) low-ripple high-efficiency charge-pump boost converter is presented. Its components include a double voltage charge pump and a low pass LC filter. The voltage boost ratio of the positive low-ripple output voltage of the proposed converter is (1+D) where D is the duty cycle of the control switching signal waveform. Since the energy storage inductor is connected to the power source and the load at all times, the proposed converter always operates in CCM, the transient responses are fast, and the current stress on the output capacitor is reduced and the output voltage ripple is small. In this paper, the operation principles of the CCM low-ripple high-efficiency charge-pump boost converter are described in detail. Its circuitry is designed and implemented with a TSMC 0.35µm CMOS processes whose operation frequency is 1MHz. The circuitry is simple and the power conversion efficiency is up to 90.95%, and the transient response is only 7µs. In this second part of this thesis, a fast transient response flying-capacitor buck-boost converter is proposed to improve the efficiency of conventional switched-capacitor converters. The voltage boost ratio of the proposed converter is 2D, where D is the duty cycle of the switching signal waveform. The behavior of the proposed converter is similar to a conventional synchronous-rectified buck converter, thus the stability of the system is very high. It has positive output voltage, which is different from the negative output voltage of a conventional buck–boost converter. Furthermore, the proposed structure utilizes pseudo-current dynamic acceleration techniques to achieve fast transient response when load changes between heavy load and light load. The switching frequency of the proposed converter is 1 MHz for 3.3V input and 1.0V-4.5V output range application. Experiment results show that the proposed scheme improves the transient response to within 2μs and the total power conversion efficiency can be as high as 89.66%. The proposed converter has been realized by a 2P4M CMOS chip by 0.35μm fabrication process with total chip size of about 1.5 mm × 1.5 mm, PADs included.
Chen, Fan-Ning, et 陳梵寧. « Quasi-Resonant Buck Converter with Fuzzy PID Controller ». Thesis, 2015. http://ndltd.ncl.edu.tw/handle/7m594f.
Texte intégral國立臺灣海洋大學
電機工程學系
103
The paper presents a Quasi-Resonant Buck Converter with Fuzzy PID Controller. In tradition, the buck converter is the hard switching, so the switching does quasi-resonant, then the switching will be the soft switching. The paper presents a Quasi-Resonant Zero Current Switching to reduce the switching loss. Then the Quasi-Resonant Buck Converter through the Fuzzy PID Controller improves output voltage. Its output voltage can quickly reach to steady voltage stage. The paper is a input voltage of 48V and output voltage of 12V of buck converter, and simulate Quasi-Resonant Buck Converter, Quasi-Resonant Buck Converter with PID Controller and Quasi-Resonant Buck Converter with Fuzzy PID Controller compares its output voltage. And they use Matlab/Simulink to simulate the circuit. From simulation result, the Quasi-Resonant Buck Converter with Fuzzy PID Controller is more quickly then the others to achieves steady voltage stage.
HSU, CHIH-HAO, et 許智豪. « Study on High Efficiency Synchronous Rectifier Buck Converter ». Thesis, 2017. http://ndltd.ncl.edu.tw/handle/69gpb5.
Texte intégral明新科技大學
電機工程系碩士在職專班
105
In recent years, with rapid growth of electronic portable devices, high performance and small size of power converter becomes more and more important. This thesis is focused on the design and implementation of a synchronous rectifier buck converter with current mode control. This synchronous rectifier buck converter has low output ripple and fast transient response when load current is suddenly changed. It also has high conversion efficiency that is suitable for portable electronic applications. Finally, experimental results of different Inductance are discussed. For VIN=12V/VOUT=3.3V, the line regulation and load regulation are 1.25mV/V and 10mV/A respectively. For VIN=12V/VOUT=5.0V, the line regulation and load regulation are 2.5mV/V and 23mV/A respectively. The conversion efficiency of synchronous rectifier buck converter is up to 94.5%.