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Littérature scientifique sur le sujet « Countermeasure against Side-Channel Attacks »

Auteur : Grafiati

Publié le 4 juin 2021

Mis à jour le 10 février 2022

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Articles de revues sur le sujet "Countermeasure against Side-Channel Attacks"

Jayasinghe, Darshana, Aleksandar Ignjatovic, Roshan Ragel, Jude Angelo Ambrose, and Sri Parameswaran. "QuadSeal: Quadruple Balancing to Mitigate Power Analysis Attacks with Variability Effects and Electromagnetic Fault Injection Attacks." ACM Transactions on Design Automation of Electronic Systems 26, no. 5 (2021): 1–36. http://dx.doi.org/10.1145/3443706.

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Side channel analysis attacks employ the emanated side channel information to deduce the secret keys from cryptographic implementations by analyzing the power traces during execution or scrutinizing faulty outputs. To be effective, a countermeasure must remove or conceal as many as possible side channels. However, many of the countermeasures against side channel attacks are applied independently. In this article, the authors present a novel countermeasure (referred to as QuadSeal ) against Power Analysis Attacks and Electromagentic Fault Injection Attacks (FIAs), which is an extension of the w

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An, Soojung, Suhri Kim, Sunghyun Jin, HanBit Kim, and HeeSeok Kim. "Single Trace Side Channel Analysis on NTRU Implementation." Applied Sciences 8, no. 11 (2018): 2014. http://dx.doi.org/10.3390/app8112014.

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As researches on the quantum computer have progressed immensely, interests in post-quantum cryptography have greatly increased. NTRU is one of the well-known algorithms due to its practical key sizes and fast performance along with the resistance against the quantum adversary. Although NTRU has withstood various algebraic attacks, its side-channel resistance must also be considered for secure implementation. In this paper, we proposed the first single trace attack on NTRU. Previous side-channel attacks on NTRU used numerous power traces, which increase the attack complexity and limit the targe

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Sridhar, K. P. "Countermeasure against Side Channel Power Attacks in Cryptography Devices." Indian Journal of Science and Technology 7, is4 (2014): 15–20. http://dx.doi.org/10.17485/ijst/2014/v7sp4.7.

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Yao, Jian Bo, and Tao Zhang. "Insert Random Time-Delay Defense High Order Side-Channel Attack." Advanced Engineering Forum 6-7 (September 2012): 169–74. http://dx.doi.org/10.4028/www.scientific.net/aef.6-7.169.

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Side-channel attack is a non destructive physical attacks method. The current cryptographic algorithms are vulnerable to higher-order side-channel attack. To defense high order Side-channel attack, in this paper, a new countermeasure based on inserting random delay is proposed to secure AES against higher-order side-channel attack. By inserting a redundant instruction, it is expected to reduce the correlation between the leakage and the inside operations, and thus make the statistic analysis infeasible. The simulation shows the method is efficiency.

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Das, Debayan, and Shreyas Sen. "Electromagnetic and Power Side-Channel Analysis: Advanced Attacks and Low-Overhead Generic Countermeasures through White-Box Approach." Cryptography 4, no. 4 (2020): 30. http://dx.doi.org/10.3390/cryptography4040030.

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Electromagnetic and power side-channel analysis (SCA) provides attackers a prominent tool to extract the secret key from the cryptographic engine. In this article, we present our cross-device deep learning (DL)-based side-channel attack (X-DeepSCA) which reduces the time to attack on embedded devices, thereby increasing the threat surface significantly. Consequently, with the knowledge of such advanced attacks, we performed a ground-up white-box analysis of the crypto IC to root-cause the source of the electromagnetic (EM) side-channel leakage. Equipped with the understanding that the higher-l

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Cho, Sung, Sunghyun Jin, and HeeSeok Kim. "Side-Channel Vulnerabilities of Unified Point Addition on Binary Huff Curve and Its Countermeasure." Applied Sciences 8, no. 10 (2018): 2002. http://dx.doi.org/10.3390/app8102002.

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Unified point addition for computing elliptic curve point addition and doubling is considered to be resistant to simple power analysis. Recently, new side-channel attacks, such as recovery of secret exponent by triangular trace analysis and horizontal collision correlation analysis, have been successfully applied to elliptic curve methods to investigate their resistance to side-channel attacks. These attacks turn out to be very powerful since they only require leakage of a single power consumption trace. In this paper, using these side-channel attack analyses, we introduce two vulnerabilities

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Bellizia, Davide, Riccardo Della Sala, and Giuseppe Scotti. "SC-DDPL as a Countermeasure against Static Power Side-Channel Attacks." Cryptography 5, no. 3 (2021): 16. http://dx.doi.org/10.3390/cryptography5030016.

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With the continuous scaling of CMOS technology, which has now reached the 3 nm node at production level, static power begins to dominate the power consumption of nanometer CMOS integrated circuits. A novel class of security attacks to cryptographic circuits which exploit the correlation between the static power and the secret keys was introduced more than ten years ago, and, since then, several successful key recovery experiments have been reported. These results clearly demonstrate that attacks exploiting static power (AESP) represent a serious threat for cryptographic systems implemented in

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Mukhtar, M. Asim, Maria Mushtaq, M. Khurram Bhatti, Vianney Lapotre, and Guy Gogniat. "FLUSH + PREFETCH: A countermeasure against access-driven cache-based side-channel attacks." Journal of Systems Architecture 104 (March 2020): 101698. http://dx.doi.org/10.1016/j.sysarc.2019.101698.

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Won, Yoo-Seung, Jonghyeok Lee, and Dong-Guk Han. "Side Channel Leakages Against Financial IC Card of the Republic of Korea." Applied Sciences 8, no. 11 (2018): 2258. http://dx.doi.org/10.3390/app8112258.

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Integrated circuit (IC) chip cards are commonly used in payment system applications since they can provide security and convenience simultaneously. More precisely, Europay, MasterCard, and VISA (EMV) are widely known to be well equipped with security frameworks that can defend against malicious attacks. On the other hand, there are other payment system applications at the national level. In the case of the Republic of Korea, standards for financial IC card specifications are established by the Korea Financial Telecommunications and Clearings Institute. Furthermore, security features defending

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Kaedi, S., M. Doostari, and M. B. Ghaznavi-Ghoushchi. "NEMR: A Nonequidistant DPA Attack-Proof of Modular Reduction in a CRT Implementation of RSA." Journal of Circuits, Systems and Computers 27, no. 12 (2018): 1850191. http://dx.doi.org/10.1142/s0218126618501918.

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One of the most common algorithms in a digital signature is the RSA-CRT. Several side channel attacks have been presented on the RSA-CRT’s embedded design. Such attacks are divided into two categories: attack in the modular reduction step and attack in the recombination step. The former are plaintext attacks and based on the modular reduction on equidistant data attack, which is introduced in [B. den Boer, et al., “A DPA attack against the modular reduction within a CRT implementation of RSA,” in CHES 2002]. In these attacks, instead of using random plaintext, an equidistant series of input da

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Thèses sur le sujet "Countermeasure against Side-Channel Attacks"

Patrick, Conor Persson. "Software Protection Against Fault and Side Channel Attacks." Thesis, Virginia Tech, 2017. http://hdl.handle.net/10919/78685.

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Embedded systems are increasingly ubiquitous. Many of them have security requirements such as smart cards, mobile phones, and internet connected appliances. It can be a challenge to fulfill security requirements due to the constrained nature of embedded devices. This security challenge is worsened by the possibility of implementation attacks. Despite well formulated cryptosystems being used, the underlying hardware can often undermine any security proven on paper. If a secret key is at play, an adversary has a chance of revealing it by simply looking at the power variation. Additionally,

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Kiaei, Pantea. "Architecture Support for Countermeasures against Side-Channel Analysis and Fault Attack." Thesis, Virginia Tech, 2019. http://hdl.handle.net/10919/93537.

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The cryptographic algorithms are designed to be mathematically secure; however, side-channel analysis attacks go beyond mathematics by taking measurements of the device’s electrical activity to reveal the secret data of a cipher. These attacks also go hand in hand with fault analysis techniques to disclose the secret key used in cryptographic ciphers with even fewer measurements. This is of practical concern due to the ubiquity of embedded systems that allow physical access to the adversary such as smart cards, ATMs, etc.. Researchers through the years have come up with techniques to block phy

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Perera, Kevin. "An Automatable Workflow to Analyze and Secure Integrated Circuits Against Power Analysis Attacks." Case Western Reserve University School of Graduate Studies / OhioLINK, 2017. http://rave.ohiolink.edu/etdc/view?acc_num=case1491319301653169.

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Yu, Weize. "Exploiting On-Chip Voltage Regulators as a Countermeasure Against Power Analysis Attacks." Scholar Commons, 2017. http://scholarcommons.usf.edu/etd/6986.

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Non-invasive side-channel attacks (SCA) are powerful attacks which can be used to obtain the secret key in a cryptographic circuit in feasible time without the need for expensive measurement equipment. Power analysis attacks (PAA) are a type of SCA that exploit the correlation between the leaked power consumption information and processed/stored data. Differential power analysis (DPA) and leakage power analysis (LPA) attacks are two types of PAA that exploit different characteristics of the side-channel leakage profile. DPA attacks exploit the correlation between the input data and dynamic pow

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Paglialonga, Clara [Verfasser], Sebastian [Akademischer Betreuer] Faust, and Stefan [Akademischer Betreuer] Dziembowski. "Provable Secure Countermeasures Against Side-Channel Attacks / Clara Paglialonga ; Sebastian Faust, Stefan Dziembowski." Darmstadt : Universitäts- und Landesbibliothek, 2021. http://d-nb.info/1234657783/34.

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Perin, Guilherme. "On the Resistance of RSA Countermeasures at Algorithmic, Arithmetic and Hardware Levels Against Chosen-Message, Correlation and Single-Execution Side-Channel Attacks." Thesis, Montpellier 2, 2014. http://www.theses.fr/2014MON20039/document.

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De nos jours, les concepteurs de dispositifs cryptographiques doivent non seulement mettre en œuvre des algorithmes robustes, mais ils doivent également s'assurer qu'il n'y ait pas de fuites d'informations à travers plusieurs canaux latéraux lors de l'exécution d'un algorithme. En effet, si ce n'est pas le cas, les implémentations cryptographiques, tant symétriques qu'asymétriques, seront vulnérables aux attaques par canaux auxiliaires. Pour les algorithmes à clé publique tels que le RSA, l'opération principale que doit être rendue robuste est l'exponentiation modulaire sur un anneau fini. Les

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Wen, David M. Eng (David Y. ). Massachusetts Institute of Technology. "Defending against side-channel attacks : DynamoREA." Thesis, Massachusetts Institute of Technology, 2011. http://hdl.handle.net/1721.1/76992.

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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.<br>Cataloged from PDF version of thesis.<br>Includes bibliographical references (p. 67-68).<br>Modern computer architectures are prone to leak information about their applications through side-channels caused by micro-architectural side-effects. Through these side-channels, attackers can launch timing attacks by observing how long an application takes to execute and using this timing information to exfiltrate secrets from the application. Timing attacks are dangerous because the

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Moukarzel, Michael Antoine. "Understanding and Countermeasures against IoT Physical Side Channel Leakage." Digital WPI, 2019. https://digitalcommons.wpi.edu/etd-dissertations/522.

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With the proliferation of cheap bulk SSD storage and better batteries in the last few years we are experiencing an explosion in the number of Internet of Things (IoT) devices flooding the market, smartphone connected point-of-sale devices (e.g. Square), home monitoring devices (e.g. NEST), fitness monitoring devices (e.g. Fitbit), and smart-watches. With new IoT devices come new security threats that have yet to be adequately evaluated. We propose uLeech, a new embedded trusted platform module for next-generation power scavenging devices. Such power scavenging devices are already w

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Chabrier, Thomas. "Arithmetic recodings for ECC cryptoprocessors with protections against side-channel attacks." Phd thesis, Université Rennes 1, 2013. http://tel.archives-ouvertes.fr/tel-00910879.

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This PhD thesis focuses on the study, the hardware design, the theoretical and practical validation, and eventually the comparison of different arithmetic operators for cryptosystems based on elliptic curves (ECC). Provided solutions must be robust against some side-channel attacks, and efficient at a hardware level (execution speed and area). In the case of ECC, we want to protect the secret key, a large integer, used in the scalar multiplication. Our protection methods use representations of numbers, and behaviour of algorithms to make more difficult some attacks. For instance, we randomly c

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Green, Marc. "Implicit Cache Lockdown on ARM: An Accidental Countermeasure to Cache-Timing Attacks." Digital WPI, 2017. https://digitalcommons.wpi.edu/etd-theses/119.

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As Moore`s law continues to reduce the cost of computation at an exponential rate, embedded computing capabilities spread to ever-expanding application scenarios, such as smartphones, the Internet of Things, and automation, among many others. This trend has naturally caused the underlying technology to evolve and has introduced increasingly complex microarchitectures into embedded processors in attempts to optimize for performance. While other microarchitectures, like those used in personal computers, have been extensively studied, there has been relatively less research done on embedded micro

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Chapitres de livres sur le sujet "Countermeasure against Side-Channel Attacks"

Bhasin, Shivam, Sylvain Guilley, Laurent Sauvage, and Jean-Luc Danger. "Unrolling Cryptographic Circuits: A Simple Countermeasure Against Side-Channel Attacks." In Topics in Cryptology - CT-RSA 2010. Springer Berlin Heidelberg, 2010. http://dx.doi.org/10.1007/978-3-642-11925-5_14.

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Mansouri, Shohreh Sharif, and Elena Dubrova. "An Architectural Countermeasure against Power Analysis Attacks for FSR-Based Stream Ciphers." In Constructive Side-Channel Analysis and Secure Design. Springer Berlin Heidelberg, 2012. http://dx.doi.org/10.1007/978-3-642-29912-4_5.

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Eldib, Hassan, and Chao Wang. "Synthesis of Masking Countermeasures against Side Channel Attacks." In Computer Aided Verification. Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-08867-9_8.

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Ahn, MahnKi, JaeCheol Ha, HoonJae Lee, and SangJae Moon. "A Random M-ary Method Based Countermeasure against Side Channel Attacks." In Computational Science and Its Applications — ICCSA 2003. Springer Berlin Heidelberg, 2003. http://dx.doi.org/10.1007/3-540-44843-8_36.

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Okeya, Katsuyuki, and Tsuyoshi Takagi. "A More Flexible Countermeasure against Side Channel Attacks Using Window Method." In Lecture Notes in Computer Science. Springer Berlin Heidelberg, 2003. http://dx.doi.org/10.1007/978-3-540-45238-6_31.

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Fernandes Medeiros, Stephane. "The Schedulability of AES as a Countermeasure against Side Channel Attacks." In Security, Privacy, and Applied Cryptography Engineering. Springer Berlin Heidelberg, 2012. http://dx.doi.org/10.1007/978-3-642-34416-9_2.

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Kim, Taesung, Sungjun Ahn, Seungkwang Lee, and Dooho Choi. "Function Masking: A New Countermeasure Against Side Channel Attack." In Information Security Applications. Springer International Publishing, 2015. http://dx.doi.org/10.1007/978-3-319-15087-1_26.

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Barbu, Guillaume, and Alberto Battistello. "Analysis of a Code-Based Countermeasure Against Side-Channel and Fault Attacks." In Information Security Theory and Practice. Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-45931-8_10.

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Okeya, Katsuyuki, Tsuyoshi Takagi, and Camille Vuillaume. "On the Exact Flexibility of the Flexible Countermeasure Against Side Channel Attacks." In Information Security and Privacy. Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-27800-9_40.

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Barron, John, Todd R. Andel, and Yong Kim. "Dynamic Architectural Countermeasure to Protect RSA against Side Channel Power Analysis Attacks." In Information Systems, Technology and Management. Springer Berlin Heidelberg, 2012. http://dx.doi.org/10.1007/978-3-642-29166-1_33.

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Actes de conférences sur le sujet "Countermeasure against Side-Channel Attacks"

Luo, Yanhui, Aijiao Cui, Gang Qu, and Huawei Li. "A new countermeasure against scan-based side-channel attacks." In 2016 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2016. http://dx.doi.org/10.1109/iscas.2016.7538900.

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Zooker, David, Matan Elkoni, Or Ohev Shalom, et al. "Temporal Power Redistribution as a Countermeasure against Side-Channel Attacks." In 2020 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2020. http://dx.doi.org/10.1109/iscas45731.2020.9180478.

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Ahlawat, Satyadev, Darshit Vaghani, Naveen Bazard, and Virendra Singh. "Using MISR as Countermeasure Against Scan-Based Side-Channel Attacks." In 2018 IEEE East-West Design & Test Symposium (EWDTS). IEEE, 2018. http://dx.doi.org/10.1109/ewdts.2018.8524752.

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Jayasinghe, Darshana, Aleksandar Ignjatovic, Jude Angelo Ambrose, Roshan Ragel, and Sri Parameswaran. "QuadSeal: Quadruple algorithmic symmetrizing countermeasure against power based side-channel attacks." In 2015 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES). IEEE, 2015. http://dx.doi.org/10.1109/cases.2015.7324539.

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Aljuffri, Abdullah, Cezar Reinbrecht, Said Hamdioui, and Mottaqiallah Taouil. "Multi-Bit Blinding: A Countermeasure for RSA Against Side Channel Attacks." In 2021 IEEE 39th VLSI Test Symposium (VTS). IEEE, 2021. http://dx.doi.org/10.1109/vts50974.2021.9441035.

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Yu, Weize, Orhun Aras Uzun, and Selçuk Köse. "Leveraging on-chip voltage regulators as a countermeasure against side-channel attacks." In DAC '15: The 52nd Annual Design Automation Conference 2015. ACM, 2015. http://dx.doi.org/10.1145/2744769.2744866.

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Nozaki, Yusuke, and Masaya Yoshikawa. "Countermeasure of Lightweight Physical Unclonable Function Against Side-Channel Attack." In 2019 Cybersecurity and Cyberforensics Conference (CCC). IEEE, 2019. http://dx.doi.org/10.1109/ccc.2019.00-13.

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Wang, Chenguang, Ming Yan, Yici Cai, Qiang Zhou, and Jianlei Yang. "Power Profile Equalizer: A Lightweight Countermeasure against Side-Channel Attack." In 2017 IEEE 35th International Conference on Computer Design (ICCD). IEEE, 2017. http://dx.doi.org/10.1109/iccd.2017.54.

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Barthe, Lyonel, Pascal Benoit, and Lionel Torres. "Investigation of a Masking Countermeasure against Side-Channel Attacks for RISC-based Processor Architectures." In 2010 International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2010. http://dx.doi.org/10.1109/fpl.2010.35.

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Kordi, Farshideh, Hamed Hosseintalaee, and Ali Jahanian. "Cost-Effective and Practical Countermeasure against the Template Side Channel Attack." In 2020 17th International ISC Conference on Information Security and Cryptology (ISCISC). IEEE, 2020. http://dx.doi.org/10.1109/iscisc51277.2020.9261918.

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