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Thèses sur le sujet « Linear integrated circuits »

Auteur : Grafiati

Publié le 4 juin 2021

Mis à jour le 1 août 2024

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1

Devarayanadurg, Giri V. "Test selection and fault simulation for analog integrated circuits /." Thesis, Connect to this title online; UW restricted, 2001. http://hdl.handle.net/1773/6040.

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2

Zhang, Yue. "A fourth order current-mode sigma-delta modulator /." free to MU campus, to others for purchase, 1997. http://wwwlib.umi.com/cr/mo/fullcit?p9841350.

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3

Mantooth, Homer Alan. "Higher level modeling of analog integrated circuits." Diss., Georgia Institute of Technology, 1990. http://hdl.handle.net/1853/14951.

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4

Bhattacharya, Sambuddha. "Template-driven parasitic-aware optimization of analog/RF IC layouts /." Thesis, Connect to this title online; UW restricted, 2005. http://hdl.handle.net/1773/6121.

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5

Natarajan, Ekanathan Palamadai. "KLU--a high performance sparse linear solver for circuit simulation problems." [Gainesville, Fla.] : University of Florida, 2005. http://purl.fcla.edu/fcla/etd/UFE0011721.

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6

Lui, Siu-hong. "Analog circuit design by nonconvex polynomial optimization two design examples /." Click to view the E-thesis via HKUTO, 2007. http://sunzi.lib.hku.hk/HKUTO/record/B39557418.

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7

Li, Harry W. "A noniterative DC analysis program for analog integrated circuits." Diss., Georgia Institute of Technology, 1992. http://hdl.handle.net/1853/15977.

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8

Hum, Herbert Hing-Jing. "A linear unification processor /." Thesis, McGill University, 1987. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=63790.

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9

Jangkrajarng, Nuttorn. "Analog/RF VLSI layout generation : layout retargeting via symbolic template /." Thesis, Connect to this title online; UW restricted, 2006. http://hdl.handle.net/1773/6084.

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10

Thomsen, Axel. "High speed high accuracy signal processing with parallel analog circuits." Diss., Georgia Institute of Technology, 1992. http://hdl.handle.net/1853/13846.

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11

Baskaya, Ismail Faik. "Physical design automation for large scale field programmable analog arrays." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/31810.

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Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2010.<br>Committee Chair: David V Anderson; Committee Co-Chair: Sung Kyu Lim; Committee Member: Aaron Lanterman; Committee Member: Abhijit Chatterjee; Committee Member: Daniel Foty; Committee Member: Paul Hasler. Part of the SMARTech Electronic Thesis and Dissertation Collection.

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12

Guimarães, Homero Luz. "Uma arquitetura de processamento paralelo para implementação de um trigger nível zero para instrumentação nuclear." [s.n.], 2013. http://repositorio.unicamp.br/jspui/handle/REPOSIP/260880.

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Orientador: José Antonio Siqueira Dias<br>Tese (doutorado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação<br>Made available in DSpace on 2018-08-22T02:05:02Z (GMT). No. of bitstreams: 1 Guimaraes_HomeroLuz_D.pdf: 8320554 bytes, checksum: cbec86ea8c9ee3ad275baa5f37860192 (MD5) Previous issue date: 2013<br>Resumo: Os experimentos em Física de alta energia tem se beneficiado enormemente do progresso alcançado na área de Microeletrônica, pois isto tem proporcionado a criação de detectores mais acurados e circuitos de processamento de sinais analógico/digita

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13

Bridges, Seth. "Low-power visual pattern classification in analog VLSI /." Thesis, Connect to this title online; UW restricted, 2006. http://hdl.handle.net/1773/6984.

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14

Lui, Siu-hong, and 呂小康. "Analog circuit design by nonconvex polynomial optimization: two design examples." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2007. http://hub.hku.hk/bib/B39557418.

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15

Shana'a, Osama K. "Circuit Implementation of a High-speed Continuous-time Current-mode Field Programmable Analog Array (FPAA)." PDXScholar, 1996. https://pdxscholar.library.pdx.edu/open_access_etds/5103.

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The growing interest in programmable analog circuits has led to the development of Field Programmable Analog Arrays (FPAAs). An FPAA consists of: 1) a programmable cell that can be reconfigured to perform several analog functions. 2) an architecture that interconnects a number of copies of the programmable cell. In this thesis, the full monolithic circuit implementation of the analog part of the programmable cell is presented. Chapter I gives an introduction to the idea of FPAA and introduces the FPAA architecture and the cell block diagram. Chapter II deals with the design and verification of

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16

CARLSON, GERRARD MERRILL. "THE QUALITY OF SYNTHESIZED SPEECH USING LINEAR PREDICTIVE CODING ON FINITE WORDLENGTH INTEGRATED CIRCUITS." Diss., The University of Arizona, 1985. http://hdl.handle.net/10150/188024.

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This paper studies the quality of synthetic speech produced by integrated circuit (IC) hardware using fixed-point arithmetic and Linear Predictive Coding (LPC). A theoretical model explaining the combined effects of finite wordlength and parametric model order is developed. This model is used to predict the results obtained in the experimental phase of this study. In the experimental phase, selected model utterances are synthesized under finite wordlength constraints using LPC parameters. The synthetic speech is evaluated in terms of the log area ratios which define objective speech quality as

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17

Zhang, Mingyang 1981. "Macromodeling and simulation of linear components characterized by measured parameters." Thesis, McGill University, 2008. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=112589.

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Recently, microelectronics designs have reached extremely high operating frequencies as well as very small die and package sizes. This has made signal integrity an important bottleneck in the design process, and resulted in the inclusion of signal integrity simulation in the computer aided design flow. However, such simulations are often difficult because in many cases it is impossible to derive analytical models for certain passive elements, and the only available data are frequency-domain measurements or full-wave simulations. Furthermore, at such high frequencies these components are distri

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18

Manney, Sanjay (Sanjay Leela) Carleton University Dissertation Engineering Electrical. "Transient analysis of nonuniform high-speed interconnects." Ottawa, 1992.

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19

Schaeffer, Ben. "Synthesis of Linear Reversible Circuits and EXOR-AND-based Circuits for Incompletely Specified Multi-Output Functions." PDXScholar, 2017. https://pdxscholar.library.pdx.edu/open_access_etds/3783.

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At this time the synthesis of reversible circuits for quantum computing is an active area of research. In the most restrictive quantum computing models there are no ancilla lines and the quantum cost, or latency, of performing a reversible form of the AND gate, or Toffoli gate, increases exponentially with the number of input variables. In contrast, the quantum cost of performing any combination of reversible EXOR gates, or CNOT gates, on n input variables requires at most O(n2/log2n) gates. It was under these conditions that EXOR-AND-EXOR, or EPOE, synthesis was developed. In this work, the G

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20

Schaeffer, Ben. "Computer Aided Design of Permutation, Linear, and Affine-Linear Reversible Circuits in the General and Linear Nearest-Neighbor Models." Thesis, Portland State University, 2013. http://pqdtopen.proquest.com/#viewpdf?dispub=1541050.

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<p> With the probable end of Moore's Law in the near future, and with advances in nanotechnology, new forms of computing are likely to become available. Reversible computing is one of these possible future technologies, and it employs reversible circuits. Reversible circuits in a classical form have the potential for lower power consumption than existing technology, and in a quantum form permit new types of encryption and computation. </p><p> One fundamental challenge in synthesizing the most general type of reversible circuit is that the storage space for fully specifying input-output desc

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21

Digvadekar, Ashish A. "A sub 1 V bandgap reference circuit /." Online version of thesis, 2005. https://ritdml.rit.edu/dspace/handle/1850/2595.

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22

Murty, Anjali. "Highly linear, rail-to-rail ICMR, low voltage CMOS operational amplifer." Thesis, Georgia Institute of Technology, 1998. http://hdl.handle.net/1853/14884.

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23

Petre, Csaba. "Sim2spice a tool for compiling simulink designs on FPAA and applications to neuromorphic circuits /." Thesis, Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/31820.

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Thesis (M. S.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2010.<br>Committee Chair: Paul Hasler; Committee Member: Christopher Rozell; Committee Member: David Anderson. Part of the SMARTech Electronic Thesis and Dissertation Collection.

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24

Subramanian, Shyam. "Methods for synthesis of multiple-input translinear element networks." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2007. http://hdl.handle.net/1853/22591.

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Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2008.<br>Committee Chair: Anderson, David; Committee Member: Habetler, Thomas; Committee Member: Hasler, Paul; Committee Member: McClellan, James; Committee Member: Minch, Bradley.

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25

Wu, Pan. "The Design of High-Frequency Continuous-Time Integrated Analog Signal Processing Circuits." PDXScholar, 1993. https://pdxscholar.library.pdx.edu/open_access_etds/1162.

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High-performance, high-frequency operational transconductance amplifiers (OTAs) are very important elements in the design of high-frequency continuous-time integrated analog signal processing circuits, because resistors, inductors, integrators, mutators, buffers, multipliers, and filters can be built by OTAs and capacitors. The critical considerations for OTA design are linearity, tuning, frequency response, output impedance, power supply rejection (PSR) and common-mode rejection (CMR). For linearity considerations, two different methods are proposed. One uses cross-coupled pairs (CMOS or NMOS

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26

Chan, kwong Fu. "Large-signal characterization/modeling and linearization techniques for RF power amplifiers /." View abstract or full-text, 2004. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202004%20CHANK.

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27

Liu, Zhi-Hong. "Mixed-signal testing of integrated analog circuits and modules." Ohio : Ohio University, 1999. http://www.ohiolink.edu/etd/view.cgi?ohiou1181174339.

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28

Asibal, Romeo Lim. "Limitations of high speed sigma-delta A/D converter in GaAs technology." Diss., Georgia Institute of Technology, 1991. http://hdl.handle.net/1853/15445.

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29

Zhang, Zheng, and 张政. "Passivity assessment and model order reduction for linear time-invariant descriptor systems in VLSI circuit simulation." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2010. http://hub.hku.hk/bib/B44909056.

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The Best MPhil Thesis in the Faculties of Dentistry, Engineering, Medicine and Science (University of Hong Kong), Li Ka Shing Prize,2009-2010<br>published_or_final_version<br>Electrical and Electronic Engineering<br>Master<br>Master of Philosophy

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30

Ko, Yus. "Design and optimization of 5GHz CMOS power amplifiers with the differential load-pull techniques." [Gainesville, Fla.] : University of Florida, 2005. http://purl.fcla.edu/fcla/etd/UFE0013036.

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31

Lo, Ernest Sze-Yuen. "Differential OFDM with iterative detection and signal space diversity for broadband wireless communication /." View Abstract or Full-Text, 2002. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202002%20LO.

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Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2002.<br>Includes bibliographical references (leaves 67-69). Also available in electronic version. Access restricted to campus users.

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32

Twigg, Christopher M. "Floating Gate Based Large-Scale Field-Programmable Analog Arrays for Analog Signal Processing." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/11601.

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Large-scale reconfigurable and programmable analog devices provide a new option for prototyping and synthesizing analog circuits for analog signal processing and beyond. Field-programmable analog arrays (FPAAs) built upon floating gate transistor technologies provide the analog reconfigurability and programmability density required for large-scale devices on a single integrated circuit (IC). A wide variety of synthesized circuits, such as OTA followers, band-pass filters, and capacitively coupled summation/difference circuits, were measured to demonstrate the flexibility of FPAAs. Three gen

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33

Grover, Samir. "Solving layout compaction and wire-balancing problem using linear programming on the Monsoon multiprocessor." Thesis, Connect to online version, 1995. http://0-wwwlib.umi.com.mercury.concordia.ca/cr/concordia/fullcit?pMQ90885.

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34

Yu, Chi Sun. "Effectiveness of parallel diode linearizers on bipolar junction transistor and its use in dynamic linearization /." access full-text access abstract and table of contents, 2009. http://libweb.cityu.edu.hk/cgi-bin/ezdb/thesis.pl?phd-ee-b23749362f.pdf.

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Thesis (Ph.D.)--City University of Hong Kong, 2009.<br>"Submitted to Department of Electronic Engineering in partial fulfillment of the requirements for the degree of Doctor of Philosophy." Includes bibliographical references (leaves 129-134)

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35

Xiong, Zhijie. "Radio Frequency Low Noise and High Q Integrated Filters in Digital CMOS Processes." Diss., Georgia Institute of Technology, 2004. http://hdl.handle.net/1853/5043.

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Radio Frequency Low Noise and High Q Integrated Filters in Digital CMOS Processes Zhijie Xiong 149 pages Directed by Dr. Phillip E. Allen Presented in this work is a novel design technique for CMOS integration of RF high Q integrated filters using positive feedback and current mode approach. Two circuits are designed in this work: a 100MHz low-noise and high Q bandpass filter suited for an FM radio front-end, and a 2.4GHz low-noise and high-Q bandpass filter suited for a Bluetooth front-end. Current-mode approach and positive feedback design techniques are successfully used in the design o

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36

Omer, Mohammad. "Towards harmonious coexistence : linear and nonlinear techniques for interference management in RFICs." Diss., Georgia Institute of Technology, 2013. http://hdl.handle.net/1853/51938.

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This thesis has sought to provide another look at RF interference at the fundamental level. While previous interference control and regulation methods have existed in the literature, they were more focused on preventing the interference from happening. On the contrary, we have taken a different approach of correcting the interference once it has happened. This allows the transmitters to be more nonlinear, passive filter design to be eased, and receivers to be aware of interference problems. Under this unifying theme of building intelligent radios where receivers are more cognizant of the trans

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37

U, Seng-Pan. "Tecnicas de interpolacao em filtros multiritmo com condensadores comutados para Interfaces Analogicas com filtragem de alta-frequencia = Multirate Switched-Capacitor interpolation techniques for very high-frequency Analog Front-End filtering." Thesis, University of Macau, 2002. http://umaclib3.umac.mo/record=b1873496.

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38

Qureshi, Muhammad Shakeel. "Integrated front-end analog circuits for mems sensors in ultrasound imaging and optical grating based microphone." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/29613.

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Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009.<br>Committee Chair: Hasler, Paul; Committee Co-Chair: Degertekin, Levent; Committee Member: Anderson, David; Committee Member: Ayazi, Farrokh; Committee Member: Brand, Oliver; Committee Member: Hesketh, Peter. Part of the SMARTech Electronic Thesis and Dissertation Collection.

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39

Park, Yunseo. "Direct Conversion RF Front-End Implementation for Ultra-Wideband (UWB) and GSM/WCDMA Dual-Band Applications in Silicon-Based Technologies." Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/7563.

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This dissertation focuses on wideband circuit design and implementation issues up to 10GHz based on the direct conversion architecture in the CMOS and SiGe BiCMOS technologies. The dissertation consists of two parts: One, implementation of a RF front-end receiver for an ultra-wideband system and, two, implementation of a local oscillation (LO) signal for a GSM/WCDMA multiband application. For emerging ultra-wideband (UWB) applications, the key active components in the RF front-end receiver were designed and implemented in 0.18um SiGe BiCMOS process. The design of LNA, which is the critical cir

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40

Killens, Jacob. "Utilizing standard CMOS process floating gate devices for analog design." Master's thesis, Mississippi State : Mississippi State University, 2001. http://library.msstate.edu/etd/show.asp?etd=etd-04092001-110957.

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41

Belkadi, Djilali. "Contribution à la modélisation et à la simulation des circuits intégrés analogiques : application aux systèmes échantillonnés et aux circuits linéaires de haute fréquence." Grenoble INPG, 1997. http://www.theses.fr/1997INPG0062.

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Ce travail est une contribution a la modelisation et la simulation temporelle des circuits integres analogiques. Suite au besoin de la conception descendante et aux limites de la simulation electrique, la conception sur differents niveaux d'abstraction est devenue necessaire. Puisque les circuits integres analogiques sont divers, nous en avons choisi deux types : les systemes echantillonnes et les circuits lineaires de haute frequence. Dans le premier genre, une methode de simulation est proposee. Elle est basee sur la linearisation du circuit par phase d'horloge et la resolution analytique de

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42

Sengupta, Susanta. "Technology-independent CMOS op amp in minimum channel length." Diss., Available online, Georgia Institute of Technology, 2004:, 2004. http://etd.gatech.edu/theses/available/etd-07092004-101204/unrestricted/sengupta%5Fsusanta%5F200407%5Fphd.pdf.

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Thesis (Ph. D.)--School of Electrical and Computer Engineering, Georgia Institute of Technology, 2005. Directed by Phillip Allen.<br>Morley, Thomas, Committee Member ; Leach, Marshall, Committee Member ; Ayazi, Farrokh, Committee Member ; Rincon-Mora, Gabriel, Committee Member ; Allen, Phillip, Committee Chair. Includes bibliographical references.

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43

Srirattana, Nuttapong. "High-Efficiency Linear RF Power Amplifiers Development." Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/6899.

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Next generation mobile communication systems require the use of linear RF power amplifier for higher data transmission rates. However, linear RF power amplifiers are inherently inefficient and usually require additional circuits or further system adjustments for better efficiency. This dissertation focuses on the development of new efficiency enhancement schemes for linear RF power amplifiers. The multistage Doherty amplifier technique is proposed to improve the performance of linear RF power amplifiers operated in a low power level. This technique advances the original Doherty amplifier sche

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44

Gray, Jordan D. "Large scale reconfigurable analog system design enabled through floating-gate transistors." Diss., Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/34660.

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This work is concerned with the implementation and implication of non-volatile charge storage on VLSI system design. To that end, the floating-gate pFET (fg-pFET) is considered in the context of large-scale arrays. The programming of the element in an efficient and predictable way is essential to the implementation of these systems, and is thus explored. The overhead of the control circuitry for the fg-pFET, a key scalability issue, is examined. A light-weight, trend-accurate model is absolutely necessary for VLSI system design and simulation, and is also provided. Finally, several reconfigura

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45

Wei, He Gong. "High speed power/area optimized multi-bit/cycle SAR ADCs." Thesis, University of Macau, 2011. http://umaclib3.umac.mo/record=b2489844.

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46

Voigtmann, Steffen. "General linear methods for integrated circuit design." Doctoral thesis, Berlin Logos-Verl, 2006. http://deposit.d-nb.de/cgi-bin/dokserv?id=2850248&prov=M&dok_var=1&dok_ext=htm.

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47

Evans, Peter Sidney Albert. "Transient response testing of linear components within mixed-signal systems." Thesis, University of Huddersfield, 1994. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.239743.

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48

Coimbra, Ricardo Pureza. "Geração de tensão de referencia e sinal de sensoriamento termico usando transistores MOS em forte inversão." [s.n.], 2009. http://repositorio.unicamp.br/jspui/handle/REPOSIP/262029.

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Orientador: Carlos Alberto dos Reis Filho<br>Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação<br>Made available in DSpace on 2018-08-14T00:43:32Z (GMT). No. of bitstreams: 1 Coimbra_RicardoPureza_M.pdf: 4991793 bytes, checksum: 2b5fb9293ae9abe4c248964485ff74e3 (MD5) Previous issue date: 2009<br>Resumo: Fontes de referência de tensão e sensores de temperatura são blocos extensivamente utilizados em sistemas microeletrônicos. Como alternativa à aplicação de estruturas consolidadas, mas protegidas por acordos de propriedade intelectual

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49

Khoshniat, Ali. "A Linearly and Circularly Polarized Active Integrated Antenna." DigitalCommons@USU, 2011. https://digitalcommons.usu.edu/etd/881.

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This thesis work presents a new harmonic suppression technique for microstrip patch antennas. Harmonic suppression in active integrated antennas is known as an effective method to improve the efficiency of amplifiers in transmitter side. In the proposed design, the antenna works as the radiating element and, at the same time, as the tuning load for the amplifier circuit that is directly matched to the antenna. The proposed active antenna architecture is easy to fabricate and is symmetric, so it can be conveniently mass-produced and designed to have circular polarization, which is preferred in

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50

Guimarães, Gabriel Teófilo Neves. "CMOS linear RF power amplifier with fully integrated power combining transformer." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2017. http://hdl.handle.net/10183/169084.

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Este trabalho apresenta o projeto de um amplificador de potência (PA) de rádio-frequência (RF) linear em tecnologia complementar metal-oxido silício (CMOS). Nele são analisados os desafios encontrados no projeto de PAs CMOS assim como soluções encontradas no estado-da-arte. Um destes desafios apresentados pela tecnologia é a baixa tensão de alimentação e passivos com alta perda, o que limita a potência de saída e a eficiência possível de ser atingida com métodos tradicionais de projeto de PA e suas redes de transformação de impedância. Este problema é solucionado através do uso de redes de com

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