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Articles de revues sur le sujet « Neuromorphic chips »

Auteur : Grafiati

Publié le 7 juin 2025

Mis à jour le 2 août 2025

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1

Koch, C., and B. Mathur. "Neuromorphic vision chips." IEEE Spectrum 33, no. 5 (1996): 38–46. http://dx.doi.org/10.1109/6.490055.

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Chiang, C. T., and C. Y. Wu. "Implantable neuromorphic vision chips." Electronics Letters 40, no. 6 (2004): 361. http://dx.doi.org/10.1049/el:20040269.

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Greengard, Samuel. "Neuromorphic chips take shape." Communications of the ACM 63, no. 8 (2020): 9–11. http://dx.doi.org/10.1145/3403960.

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Fan, Luwei. "Research Progress of Neuromorphic Chips." Applied and Computational Engineering 125, no. 1 (2025): 1–7. https://doi.org/10.54254/2755-2721/2025.19928.

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The increasing amount of data in the era of artificial intelligence imposes higher demands on the computational power of neural networks, and in order to fulfill this demand, there is a pressing need to overcome the limitations imposed by the von Neumann architecture's memory wall. Memristors, with their characteristics, are considered the optimal electronic devices for implementing neuromorphic computing. Therefore, in order to better utilize memristors for the design and research of neuromorphic chips, this paper summarizes and comparatively analyzes the memristor characteristics, the RRAM b

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Satnam Singh, Ishita Sabharwal, Shweta Kushwaha, Dr. Shilpi Jain, and Dr. Madhur Jain. "Enhancing Human-Machine Interaction: Leveraging Neuromorphic Chips for Adaptive Learning and Control in Neural Prosthetics and Artificial Intelligence." International Journal of Scientific Research in Computer Science, Engineering and Information Technology 10, no. 6 (2024): 933–40. http://dx.doi.org/10.32628/cseit241061135.

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This paper examines the integration of neuromorphic chips, AI, and neural prostheses to enhance human-machine interaction. Neuromorphic chips, modelled after the brain's neural architecture, enable efficient learning, adaptive behaviour, and energy-efficient processing in AI systems and prostheses. These chips improve pattern recognition, adaptive control, and integration with the human nervous system. In neural prostheses, they promise seamless brain-computer interfaces (BCI) to restore mobility for paralyzed individuals and enable precise control of devices for people with severe disabilitie

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Merolla, Paul A., John V. Arthur, Bertram E. Shi, and Kwabena A. Boahen. "Expandable Networks for Neuromorphic Chips." IEEE Transactions on Circuits and Systems I: Regular Papers 54, no. 2 (2007): 301–11. http://dx.doi.org/10.1109/tcsi.2006.887474.

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Andreeva, N. V., V. V. Luchinin, E. A. Ryndin, et al. "Neuromorphic Memristive Chips: Design and Technology." Nano- i Mikrosistemnaya Tehnika 23, no. 6 (2021): 285–94. http://dx.doi.org/10.17587/nmst.23.285-294.

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Memristive neuromorphic chips exploit a prospective class of novel functional materials (memristors) to deploy a new architecture of spiking neural networks for developing basic blocks of brain-like systems. Memristor-based neuromorphic hardware solutions for multi-agent systems are considered as challenges in frontier areas of chip design for fast and energy-efficient computing. As functional materials, metal oxide thin films with resistive switching and memory effects (memristive structures) are recognized as a potential elemental base for new components of neuromorphic engineering, enabling

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Kurshan, Eren, Hai Li, Mingoo Seok, and Yuan Xie. "A Case for 3D Integrated System Design for Neuromorphic Computing and AI Applications." International Journal of Semantic Computing 14, no. 04 (2020): 457–75. http://dx.doi.org/10.1142/s1793351x20500063.

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Over the last decade, artificial intelligence (AI) has found many applications areas in the society. As AI solutions have become more sophistication and the use cases grew, they highlighted the need to address performance and energy efficiency challenges faced during the implementation process. To address these challenges, there has been growing interest in neuromorphic chips. Neuromorphic computing relies on non von Neumann architectures as well as novel devices, circuits and manufacturing technologies to mimic the human brain. Among such technologies, three-dimensional (3D) integration is an

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Sinicin, Alexey M. "OVERVIEW OF NEUROMORPHIC CHIPS FOR ARTIFICIAL INTELLIGENCE SYSTEMS." EKONOMIKA I UPRAVLENIE: PROBLEMY, RESHENIYA 9/9, no. 150 (2024): 85–94. http://dx.doi.org/10.36871/ek.up.p.r.2024.09.09.012.

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Neuromorphic chips are innovative computing architectures inspired by the principles of biological neural networks and promise to revolutionize the way we build energy-efficient, high-perfor-mance artificial intelligence (AI) systems. These chips offer a new way of processing data based on paral-lelism, event-driven control, and adaptive learning, which can significantly improve performance at low power consumption. This article discusses the main architectural features of neuromorphic chips, their types and areas of application, and analyzes current challenges and development prospects. The a

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Hampiholi, Narayan. "Revolutionizing AI and Computing the Neuromorphic Engineering Paradigm in Neuromorphic Chips." International Journal of Computer Trends and Technology 71, no. 1 (2024): 92–98. http://dx.doi.org/10.14445/22312803/ijctt-v72i1p115.

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Tyler, Neil. "Tempo Targets Low-Power Chips for AI Applications." New Electronics 52, no. 13 (2019): 7. http://dx.doi.org/10.12968/s0047-9624(22)61557-8.

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Andreeva, N. V., V. V. Luchinin, E. A. Ryndin, et al. "Architecture and Technology of Neuromorphic Memristive Chips." Nanobiotechnology Reports 17, S1 (2022): S72—S79. http://dx.doi.org/10.1134/s2635167622070035.

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Li, Er-Ping, Hanzhi Ma, Manareldeen Ahmed, et al. "An Electromagnetic Perspective of Artificial Intelligence Neuromorphic Chips." Electromagnetic Science 1, no. 3 (2023): 1–18. http://dx.doi.org/10.23919/emsci.2023.0015.

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Khajooei Nejad, Arash, Mohammad (Behdad) Jamshidi, and Shahriar B. Shokouhi. "Implementing Tensor-Organized Memory for Message Retrieval Purposes in Neuromorphic Chips." Computers 12, no. 10 (2023): 189. http://dx.doi.org/10.3390/computers12100189.

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This paper introduces Tensor-Organized Memory (TOM), a novel neuromorphic architecture inspired by the human brain’s structural and functional principles. Utilizing spike-timing-dependent plasticity (STDP) and Hebbian rules, TOM exhibits cognitive behaviors similar to the human brain. Compared to conventional architectures using a simplified leaky integrate-and-fire (LIF) neuron model, TOM showcases robust performance, even in noisy conditions. TOM’s adaptability and unique organizational structure, rooted in the Columnar-Organized Memory (COM) framework, position it as a transformative digita

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Merolla, Paul A., John V. Arthur, Bertram E. Shi, and Kwabena A. Boahen. "Corrections to “Expandable Networks for Neuromorphic Chips”." IEEE Transactions on Circuits and Systems I: Regular Papers 54, no. 4 (2007): 925–26. http://dx.doi.org/10.1109/tcsi.2007.895131.

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Qu, Jingwei. "Conventional Von Neumann and Neuromorphic Architecture of AI Chips." Highlights in Science, Engineering and Technology 103 (June 26, 2024): 138–43. http://dx.doi.org/10.54097/gwgea042.

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In the background of the shortage of computing power in the training AI field, the current solutions and future outlooks will be shown if they tackle this dilemma. From the continuation of the traditional computer structure, Von Neumann structure, the three types of AI chips GPU, FPGA, and ASIC will be introduced and state their developments and drawbacks. Besides, a brand new solution gaining inspiration from our brain will also be discussed and introduce the fundamental electronic component to accomplish the goal. The principle of how a nerve fires will also be illustrated and based on this

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Liu, Te-Yuan, Ata Mahjoubfar, Daniel Prusinski, and Luis Stevens. "Neuromorphic computing for content-based image retrieval." PLOS ONE 17, no. 4 (2022): e0264364. http://dx.doi.org/10.1371/journal.pone.0264364.

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Neuromorphic computing mimics the neural activity of the brain through emulating spiking neural networks. In numerous machine learning tasks, neuromorphic chips are expected to provide superior solutions in terms of cost and power efficiency. Here, we explore the application of Loihi, a neuromorphic computing chip developed by Intel, for the computer vision task of image retrieval. We evaluated the functionalities and the performance metrics that are critical in content-based visual search and recommender systems using deep-learning embeddings. Our results show that the neuromorphic solution i

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Zaved Md Akib. "Neuromorphic computing: Bridging AI and electronics." International Journal of Science and Research Archive 15, no. 1 (2025): 1485–87. https://doi.org/10.30574/ijsra.2025.15.1.1137.

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Neuromorphic computing represents a transformative approach to integrating artificial intelligence (AI) with electronics, drawing inspiration from the human brain’s architecture. By designing chips with artificial neurons and synapses, such as Intel’s Loihi, neuromorphic systems enable energy-efficient, event-driven processing and real-time adaptability, unlike traditional CPUs and GPUs. These systems leverage spiking neural networks (SNNs) and innovations like Geoffrey Hinton’s Forward-Forward Algorithm to mirror biological learning, offering a synergy of hardware and software that enhances A

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Al Abdul Wahid, Seham, Arghavan Asad, and Farah Mohammadi. "A Survey on Neuromorphic Architectures for Running Artificial Intelligence Algorithms." Electronics 13, no. 15 (2024): 2963. http://dx.doi.org/10.3390/electronics13152963.

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Neuromorphic computing, a brain-inspired non-Von Neumann computing system, addresses the challenges posed by the Moore’s law memory wall phenomenon. It has the capability to enhance performance while maintaining power efficiency. Neuromorphic chip architecture requirements vary depending on the application and optimising it for large-scale applications remains a challenge. Neuromorphic chips are programmed using spiking neural networks which provide them with important properties such as parallelism, asynchronism, and on-device learning. Widely used spiking neuron models include the Hodgkin–Hu

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Pham, Martin Do, Amedeo D’Angiulli, Maryam Mehri Dehnavi, and Robin Chhabra. "From Brain Models to Robotic Embodied Cognition: How Does Biological Plausibility Inform Neuromorphic Systems?" Brain Sciences 13, no. 9 (2023): 1316. http://dx.doi.org/10.3390/brainsci13091316.

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We examine the challenging “marriage” between computational efficiency and biological plausibility—A crucial node in the domain of spiking neural networks at the intersection of neuroscience, artificial intelligence, and robotics. Through a transdisciplinary review, we retrace the historical and most recent constraining influences that these parallel fields have exerted on descriptive analysis of the brain, construction of predictive brain models, and ultimately, the embodiment of neural networks in an enacted robotic agent. We study models of Spiking Neural Networks (SNN) as the central means

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Boahen, K. A. "Point-to-point connectivity between neuromorphic chips using address events." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 47, no. 5 (2000): 416–34. http://dx.doi.org/10.1109/82.842110.

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Lee, Matthew Kay Fei, Yingnan Cui, Thannirmalai Somu, et al. "A System-Level Simulator for RRAM-Based Neuromorphic Computing Chips." ACM Transactions on Architecture and Code Optimization 15, no. 4 (2019): 1–24. http://dx.doi.org/10.1145/3291054.

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Ferreira de Lima, Thomas, Bhavin J. Shastri, Alexander N. Tait, Mitchell A. Nahmias, and Paul R. Prucnal. "Progress in neuromorphic photonics." Nanophotonics 6, no. 3 (2017): 577–99. http://dx.doi.org/10.1515/nanoph-2016-0139.

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AbstractAs society’s appetite for information continues to grow, so does our need to process this information with increasing speed and versatility. Many believe that the one-size-fits-all solution of digital electronics is becoming a limiting factor in certain areas such as data links, cognitive radio, and ultrafast control. Analog photonic devices have found relatively simple signal processing niches where electronics can no longer provide sufficient speed and reconfigurability. Recently, the landscape for commercially manufacturable photonic chips has been changing rapidly and now promises

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Lan, Shuqiong, Jinkui Si, Wangying Xu, Lan Yang, Jierui Lin, and Chen Wu. "Ternary Heterojunction Synaptic Transistors Based on Perovskite Quantum Dots." Nanomaterials 15, no. 9 (2025): 688. https://doi.org/10.3390/nano15090688.

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The traditional von Neumann architecture encounters significant limitations in computational efficiency and energy consumption, driving the development of neuromorphic devices. The optoelectronic synaptic device serves as a fundamental hardware foundation for the realization of neuromorphic computing and plays a pivotal role in the development of neuromorphic chips. This study develops a ternary heterojunction synaptic transistor based on perovskite quantum dots to tackle the critical challenge of synaptic weight modulation in organic synaptic devices. Compared to binary heterojunction synapti

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Partzsch, Johannes, Christian Mayr, Massimiliano Giulioni, et al. "Mean Field Approach for Configuring Population Dynamics on a Biohybrid Neuromorphic System." Journal of Signal Processing Systems 92, no. 11 (2020): 1303–21. http://dx.doi.org/10.1007/s11265-020-01556-9.

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Abstract Real-time coupling of cell cultures to neuromorphic circuits necessitates a neuromorphic network that replicates biological behaviour both on a per-neuron and on a population basis, with a network size comparable to the culture. We present a large neuromorphic system composed of 9 chips, with overall 2880 neurons and 144M conductance-based synapses. As they are realized in a robust switched-capacitor fashion, individual neurons and synapses can be configured to replicate with high fidelity a wide range of biologically realistic behaviour. In contrast to other exploration/heuristics-ba

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Ozalevli, E., and C. M. Higgins. "Reconfigurable biologically inspired visual motion systems using modular neuromorphic VLSI chips." IEEE Transactions on Circuits and Systems I: Regular Papers 52, no. 1 (2005): 79–92. http://dx.doi.org/10.1109/tcsi.2004.838307.

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Fan, Xuemeng, and Yishu Zhang. "Foreword to the Special Issue on Deep Learning and Neuromorphic Chips." Applied Sciences 12, no. 21 (2022): 11189. http://dx.doi.org/10.3390/app122111189.

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With the advent of the Internet of Things and the era of big data, the ability of machine data processing to reach the level of human brain cognition and learning is an important goal in the field of Internet information technology, including cloud computing, data mining, machine learning, and artificial intelligence (AI) [...]

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Chen, Guang, Jian Cao, Chenglong Zou, et al. "PAIBoard: A Neuromorphic Computing Platform for Hybrid Neural Networks in Robot Dog Application." Electronics 13, no. 18 (2024): 3619. http://dx.doi.org/10.3390/electronics13183619.

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Hybrid neural networks (HNNs), integrating the strengths of artificial neural networks (ANNs) and spiking neural networks (SNNs), provide a promising solution towards generic artificial intelligence. There is a prevailing trend towards designing unified SNN-ANN paradigm neuromorphic computing chips to support HNNs, but developing platforms to advance neuromorphic computing systems is equally essential. This paper presents the PAIBoard platform, which is designed to facilitate the implementation of HNNs. The platform comprises three main components: the upper computer, the communication module,

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K, Padmaja. "Design and Simulation of Op-Amp Based Neuron Circuit." International Journal for Research in Applied Science and Engineering Technology 10, no. 7 (2022): 4204–8. http://dx.doi.org/10.22214/ijraset.2022.45943.

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Abstract: Combining CMOS analog spike neurons with memory synapses, neuromorphic chips can provide massively parallel processing and density of neural networks, providing a promising solution for brain inspired computing. This work demonstrates a leaky integral firing neuron design that implements current integral and synaptic driven dualmode operation, and crossbar resistance synaptic enabled in situ learning with a single op amp. The proposed design was implemented with 0.18 μm CMOS technology.

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Grübl, Andreas, Sebastian Billaudelle, Benjamin Cramer, Vitali Karasenko, and Johannes Schemmel. "Verification and Design Methods for the BrainScaleS Neuromorphic Hardware System." Journal of Signal Processing Systems 92, no. 11 (2020): 1277–92. http://dx.doi.org/10.1007/s11265-020-01558-7.

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Abstract This paper presents verification and implementation methods that have been developed for the design of the BrainScaleS-2 65 nm ASICs. The 2nd generation BrainScaleS chips are mixed-signal devices with tight coupling between full-custom analog neuromorphic circuits and two general purpose microprocessors (PPU) with SIMD extension for on-chip learning and plasticity. Simulation methods for automated analysis and pre-tapeout calibration of the highly parameterizable analog neuron and synapse circuits and for hardware-software co-development of the digital logic and software stack are pre

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Chen, Qi, Yue Zhou, Weiwei Xiong, et al. "Complementary memtransistors for neuromorphic computing: How, what and why." Journal of Semiconductors 45, no. 6 (2024): 061701. http://dx.doi.org/10.1088/1674-4926/23120051.

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Abstract Memtransistors in which the source−drain channel conductance can be nonvolatilely manipulated through the gate signals have emerged as promising components for implementing neuromorphic computing. On the other side, it is known that the complementary metal-oxide-semiconductor (CMOS) field effect transistors have played the fundamental role in the modern integrated circuit technology. Therefore, will complementary memtransistors (CMT) also play such a role in the future neuromorphic circuits and chips? In this review, various types of materials and physical mechanisms for constructing

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Kang, Minseon, Yongseok Lee, and Moonju Park. "Energy Efficiency of Machine Learning in Embedded Systems Using Neuromorphic Hardware." Electronics 9, no. 7 (2020): 1069. http://dx.doi.org/10.3390/electronics9071069.

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Recently, the application of machine learning on embedded systems has drawn interest in both the research community and industry because embedded systems located at the edge can produce a faster response and reduce network load. However, software implementation of neural networks on Central Processing Units (CPUs) is considered infeasible in embedded systems due to limited power supply. To accelerate AI processing, the many-core Graphics Processing Unit (GPU) has been a preferred device to the CPU. However, its energy efficiency is not still considered to be good enough for embedded systems. A

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Bhat, Pranava. "Analysis of Neuromorphic Computing Systems and its Applications in Machine Learning." International Journal for Research in Applied Science and Engineering Technology 9, no. VI (2021): 5309–12. http://dx.doi.org/10.22214/ijraset.2021.35601.

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The domain of engineering has always taken inspiration from the biological world. Understanding the functionalities of the human brain is one of the key areas of interest over time and has caused many advancements in the field of computing systems. The computational capability per unit power per unit volume of the human brain exceeds the current best supercomputers. Mimicking the physics of computations used by the nervous system and the brain can bring a paradigm shift to the computing systems. The concept of bridging computing and neural systems can be termed as neuromorphic computing and it

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Xiong, Shan, Xue Liang, Xiangjun Xing, and Yan Zhou. "Physical neural network using skyrmion-based spin torque nano-oscillators." Journal of Physics: Conference Series 2803, no. 1 (2024): 012044. http://dx.doi.org/10.1088/1742-6596/2803/1/012044.

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Abstract Due to physical limitations on the miniaturization of traditional electronic devices, architectures based on emerging principles have become the focus of current research to meet the needs of rapidly developing information technologies in the post-Moore era. Neuromorphic devices hold huge potential for use in future artificial intelligence (AI) chips beyond conventional architectures. Benefiting from a wealth of nonlinear dynamic characteristics of spin torque nano-oscillators (STNOs), studies of neuromorphic computations and their applications based on STNOs are attracting growing at

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Vogelstein, R. Jacob, Udayan Mallik, Eugenio Culurciello, Gert Cauwenberghs, and Ralph Etienne-Cummings. "A Multichip Neuromorphic System for Spike-Based Visual Information Processing." Neural Computation 19, no. 9 (2007): 2281–300. http://dx.doi.org/10.1162/neco.2007.19.9.2281.

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We present a multichip, mixed-signal VLSI system for spike-based vision processing. The system consists of an 80 × 60 pixel neuromorphic retina and a 4800 neuron silicon cortex with 4,194,304 synapses. Its functionality is illustrated with experimental data on multiple components of an attention-based hierarchical model of cortical object recognition, including feature coding, salience detection, and foveation. This model exploits arbitrary and reconfigurable connectivity between cells in the multichip architecture, achieved by asynchronously routing neural spike events within and between chip

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Gao, Zhan, Yan Wang, Ziyu Lv, et al. "Ferroelectric coupling for dual-mode non-filamentary memristors." Applied Physics Reviews 9, no. 2 (2022): 021417. http://dx.doi.org/10.1063/5.0087624.

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Memristive devices and systems have emerged as powerful technologies to fuel neuromorphic chips. However, the traditional two-terminal memristor still suffers from nonideal device characteristics, raising challenges for its further application in versatile biomimetic emulation for neuromorphic computing owing to insufficient control of filament forming for filamentary-type cells and a transport barrier for interfacial switching cells. Here, we propose three-terminal memristors with a top-gate field-effect geometry by employing a ferroelectric material, poly(vinylidene fluoride–trifluoroethylen

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Gnilenko, Alexey. "HARDWARE IMPLEMENTATION DESIGN OF A SPIKING NEURON." System technologies 1, no. 132 (2021): 116–23. http://dx.doi.org/10.34185/1562-9945-1-132-2021-10.

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The hardware implementation of an artificial neuron is the key problem of the design of neuromorphic chips which are new promising architectural solutions for massively parallel computing. In this paper an analog neuron circuit design is presented to be used as a building element of spiking neuron networks. The design of the neuron is performed at the transistor level based on Leaky Integrate-and-Fire neuron implementation model. The neuron is simulated using EDA tool to verify the design. Signal waveforms at key nodes of the neuron are obtained and neuron functionality is demonstrated.

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Jing, Zhizhi. "The history of neuromorphic computing and its application on recognition systems." Applied and Computational Engineering 6, no. 1 (2023): 86–92. http://dx.doi.org/10.54254/2755-2721/6/20230733.

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Since the invention of the memristive device with a nano-scale footprint, a lot of scholars have started to focus on the area of recognition systems based on the Complementary Metal-Oxide Semiconductor chips (CMOS) integrated with memristive devices. This papers goal is to compare and analyze the advantage and disadvantage on the near research on the cognitive machine. Start with the construction of a simple dynamic model of neurons in Section 2, the history of the development of the recognitive machine is introduced in Section 3. Section 4 focusing on the comparison and analysis of researches

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Arfan, Ghani, Dowrick Thomas, and J. McDaid Liam. "OSPEN: an open source platform for emulating neuromorphic hardware." International Journal of Reconfigurable and Embedded Systems (IJRES) 12, no. 1 (2023): 1–8. https://doi.org/10.11591/ijres.v12.i1.pp1-8.

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This paper demonstrates a framework that entails a bottom-up approach to accelerate research, development, and verification of neuro-inspired sensing devices for real-life applications. Previous work in neuromorphic engineering mostly considered application-specific designs which is a strong limitation for researchers to develop novel applications and emulate the true behaviour of neuro-inspired systems. Hence to enable the fully parallel brain-like computations, this paper proposes a methodology where a spiking neuron model was emulated in software and electronic circuits were then implemente

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Neftci, Emre Ozgur, Bryan Toth, Giacomo Indiveri, and Henry D. I. Abarbanel. "Dynamic State and Parameter Estimation Applied to Neuromorphic Systems." Neural Computation 24, no. 7 (2012): 1669–94. http://dx.doi.org/10.1162/neco_a_00293.

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Neuroscientists often propose detailed computational models to probe the properties of the neural systems they study. With the advent of neuromorphic engineering, there is an increasing number of hardware electronic analogs of biological neural systems being proposed as well. However, for both biological and hardware systems, it is often difficult to estimate the parameters of the model so that they are meaningful to the experimental system under study, especially when these models involve a large number of states and parameters that cannot be simultaneously measured. We have developed a proce

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Wang, Lei, Shiqing Sun, Jianhui Zhao, et al. "HfO2:Gd-based ferroelectric memristor as bio-synapse emulators." Applied Physics Letters 121, no. 25 (2022): 253502. http://dx.doi.org/10.1063/5.0101026.

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In this work, a memristor device with Pd/HfO2:Gd/La0.67Sr0.33MnO3/SrTiO3/Si was prepared, and its synaptic behavior was investigated. The memristor shows excellent performance in I–V loops and ferroelectric properties. Through polarization, the conductance modulation of the memristor is achieved by the reversal of the ferroelectric domain. In addition, we simulate biological synapses and synaptic plasticities such as spike-timing-dependent plasticity, paired-pulse facilitation, and an excitatory postsynaptic current. These results lay the foundation for the development of synaptic functions in

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Bag, Sankar Prasad, Suyoung Lee, Jaeyoon Song, and Jinsink Kim. "Hydrogel-Gated FETs in Neuromorphic Computing to Mimic Biological Signal: A Review." Biosensors 14, no. 3 (2024): 150. http://dx.doi.org/10.3390/bios14030150.

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Hydrogel-gated synaptic transistors offer unique advantages, including biocompatibility, tunable electrical properties, being biodegradable, and having an ability to mimic biological synaptic plasticity. For processing massive data with ultralow power consumption due to high parallelism and human brain-like processing abilities, synaptic transistors have been widely considered for replacing von Neumann architecture-based traditional computers due to the parting of memory and control units. The crucial components mimic the complex biological signal, synaptic, and sensing systems. Hydrogel, as a

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Khajooei, Arash, Mohammad (Behdad) Jamshidi, and Shahriar B. Shokouhi. "A Super-Efficient TinyML Processor for the Edge Metaverse." Information 14, no. 4 (2023): 235. http://dx.doi.org/10.3390/info14040235.

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Although the Metaverse is becoming a popular technology in many aspects of our lives, there are some drawbacks to its implementation on clouds, including long latency, security concerns, and centralized infrastructures. Therefore, designing scalable Metaverse platforms on the edge layer can be a practical solution. Nevertheless, the realization of these edge-powered Metaverse ecosystems without high-performance intelligent edge devices is almost impossible. Neuromorphic engineering, which employs brain-inspired cognitive architectures to implement neuromorphic chips and Tiny Machine Learning (

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Agrawal, Vishakha. "Moore’s Law & The AI Compute Bottleneck." International Scientific Journal of Engineering and Management 04, no. 01 (2025): 1–8. https://doi.org/10.55041/isjem02229.

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Abstract—Moore’s Law, the prediction that transistor density on integrated circuits would double approximately every two years, has been the driving force behind advancements in computing for decades. However, as semiconductor fabrication approaches the physical limits of silicon, the traditional scaling benefits of Moore’s Law are diminishing. Simultaneously, the demand for AI compute has surged, leading to an unprecedented need for high-performance chips. This paper explores the decline of Moore’s law, the resulting AI compute bottleneck, and poten- tial technological breakthroughs that coul

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Chen, Liangliang, Zhongyuan Ma, Kangmin Leng, et al. "Artificial Synapse Consisted of TiSbTe/SiCx:H Memristor with Ultra-high Uniformity for Neuromorphic Computing." Nanomaterials 12, no. 12 (2022): 2110. http://dx.doi.org/10.3390/nano12122110.

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To enable a-SiCx:H-based memristors to be integrated into brain-inspired chips, and to efficiently deal with the massive and diverse data, high switching uniformity of the a-SiC0.11:H memristor is urgently needed. In this study, we introduced a TiSbTe layer into an a-SiC0.11:H memristor, and successfully observed the ultra-high uniformity of the TiSbTe/a-SiC0.11:H memristor device. Compared with the a-SiC0.11:H memristor, the cycle-to-cycle coefficient of variation in the high resistance state and the low resistance state of TiSbTe/a-SiC0.11:H memristors was reduced by 92.5% and 66.4%, respect

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Pastur-Romay, Lucas, Francisco Cedrón, Alejandro Pazos, and Ana Porto-Pazos. "Deep Artificial Neural Networks and Neuromorphic Chips for Big Data Analysis: Pharmaceutical and Bioinformatics Applications." International Journal of Molecular Sciences 17, no. 8 (2016): 1313. http://dx.doi.org/10.3390/ijms17081313.

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Liu, Hao, Mingjiang Wang, Longxin Yao, and Ming Liu. "Hardware Implementation of an Approximate Simplified Piecewise Linear Spiking Neuron." Electronics 12, no. 12 (2023): 2628. http://dx.doi.org/10.3390/electronics12122628.

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Artificial intelligence has revolutionized image and speech recognition, but the neural network fitting method has limitations. Neuromorphic chips that mimic biological neurons can better simulate the brain’s information processing mechanism. As the basic computing component of the new neuromorphic network, the new neural computing unit’s design and implementation have important significance; however, complex dynamical features come with a high computational cost: approximate computing has unique advantages, in terms of optimizing the computational cost of neural networks, which can solve this

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Wu, Nanjian. "Neuromorphic vision chips." Science China Information Sciences 61, no. 6 (2018). http://dx.doi.org/10.1007/s11432-017-9303-0.

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Duan, Xuegang, Zelin Cao, Kaikai Gao, et al. "Memristor‐Based Neuromorphic Chips." Advanced Materials, January 2, 2024. http://dx.doi.org/10.1002/adma.202310704.

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AbstractIn the era of information, characterized by an exponential growth in data volume and an escalating level of data abstraction, there has been a substantial focus on brain‐like chips, which are known for their robust processing power and energy‐efficient operation. Memristors are widely acknowledged as the optimal electronic devices for the realization of neuromorphic computing, due to their innate ability to emulate the interconnection and information transfer processes witnessed among neurons. This review paper focuses on memristor‐based neuromorphic chips, which provide an extensive d

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Kulshrestha, Sanatan. "Neuromorphic Chips Defence Applications." SSRN Electronic Journal, 2016. http://dx.doi.org/10.2139/ssrn.2773015.

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