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Littérature scientifique sur le sujet « STT-MTJ »

Auteur : Grafiati

Publié le 1 mars 2025

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Articles de revues sur le sujet "STT-MTJ"

Jangra, Payal, et Manoj Duhan. « Design and analysis of Voltage-Gated Spin-Orbit Torque (VgSOT) Magnetic Tunnel Junction based Non-Volatile Flip Flop design for Low Energy Applications ». Journal of Integrated Circuits and Systems 19, n^o 1 (15 mars 2024) : 1–12. http://dx.doi.org/10.29292/jics.v19i1.743.

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In this paper, a Voltage-gated Spin-Orbit Torque based non-volatile flip-flop design has been discussed. Theflip-flop consists of a conventional CMOS master latch used in normal operations, and a VgSOT-MTJ basedslave latch has been considered for interim data saving during power-gating. The current circuit uses the samewrite current to write data into two magnetic tunnel junctions, saving 50% of storing energy. The proposedNVFF circuit has been simulated using Cadence Virtuoso 45nm. The performance parameters like energyconsumption and delay during restore and store operations of VgSOT-MTJ based NVFF circuit have beenanalyzed in this paper and compared with SOT-MTJ based and STT-MTJ based NVFF circuits. Simulationresults show that for the switching delay, VgSOT-MTJ based NVFF performs 40% and 58% better than SOT-MTJ NVFF and STT-MTJ based NVFFs, respectively during storing mode and 83% and 88% better than SOT-MTJ and STT-MTJ based NVFFs during restoring mode. In terms of energy consumption, during storingmode, VgSOT-MTJ based NVFF consumes 84% less energy than SOT-MTJ NVFF and 90 % less energy thanSTT-MTJ based NVFFs. During restoring mode, VgSOT-MTJ based NVFF consumes 70% and 80% lessenergy than SOT-MTJ NVFF and STT-MTJ, respectively.

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Bu, Kai, Hai Jun Liu, Hui Xu et Zhao Lin Sun. « Large Capacity Cache Design Based on Emerging Non-Volatile Memory ». Applied Mechanics and Materials 513-517 (février 2014) : 918–21. http://dx.doi.org/10.4028/www.scientific.net/amm.513-517.918.

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A triple-level-cell (TLC) STT-RAM architecture was proposed basing on parallel MLC MTJ and serial MLC MTJ. A TLC STT-RAM cell can store three bit which will offer higher capacity density compared with SLC STT-RAM. The write process is also analyzed that it contains three types of basic states transitions. Through mapping soft, medium and hard domains to three individual cache lines, the access to soft lines can perform as accessing SLC STT-RAM-based cache. The amount of three-step operations is also much reduced. .

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Rao, Dr G. Anantha, et Gopi Kommuju. « A NOVEL LOW POWER ALU DESIGNED BY USING HYBRID STT-MTJ/CMOS CIRCUIT ». INTERANTIONAL JOURNAL OF SCIENTIFIC RESEARCH IN ENGINEERING AND MANAGEMENT 07, n^o 12 (21 décembre 2023) : 1–13. http://dx.doi.org/10.55041/ijsrem27641.

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The rise in power dissipation when the technology descends into the deep submicron zone is one of the main issues for CMOS technology due to its non-volatility, high speed, high endurance, CMOS compatibility, and primarily the low power dissipation. magnetic tunnel junction (MTJ) working on Spin transfer torque (STT). Switching mechanism is recognized as one of the most promising spintronic devices for post-CMOS era. This device can provide solutions for the issues posed by existing CMOS technology. We have put out a brand-new hybrid STT- MTJ/CMOS circuit-based logic-in-memory (LIM) P- magnetic arithmetic logic unit (P-MALU) design.. The behavior of P-MALU designs in terms of power dissipation is then studied using Monte-Carlo(MC) simulation, which incorporates process and mismatch variations for CMOS and extracted parameters of MTJ . The P-MALU circuit has also been expanded to provide 4-bit arithmetic operations. Electrical simulations are run to ensure the design's operation. Keywords— MTJ , Spintronics , non-volatility, Switching mechanism ,STT-MTJ, logic in memory, p-magnetic arithematic unit, monte- carlo simulation

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Tankwal, Piyush, Vikas Nehra, Sanjay Prajapati et Brajesh Kumar Kaushik. « Performance analysis of differential spin hall effect (DSHE)-MRAM-based logic gates ». Circuit World 45, n^o 4 (4 novembre 2019) : 300–310. http://dx.doi.org/10.1108/cw-04-2019-0036.

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Purpose The purpose of this paper is to analyze and compare the characteristics of hybrid conventional complementary metal oxide semiconductor/magnetic tunnel junction (CMOS/MTJ) logic gates based on spin transfer torque (STT) and differential spin Hall effect (DSHE) magnetic random access memory (MRAM). Design/methodology/approach Spintronics technology can be used as an alternative to CMOS technology as it is having comparatively low power dissipation, non-volatility, high density and high endurance. MTJ is the basic spin based device that stores data in form of electron spin instead of charge. Two mechanisms, namely, STT and SHE, are used to switch the magnetization of MTJ. Findings It is observed that the power consumption in DSHE based logic gates is 95.6% less than the STT based gates. DSHE-based write circuit consumes only 5.28 fJ energy per bit. Originality/value This paper describes how the DSHE-MRAM is more effective for implementing logic circuits in comparison to STT-MRAM.

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Vatajelu, Elena Ioana, et Giorgio Di Natale. « High-Entropy STT-MTJ-Based TRNG ». IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27, n^o 2 (février 2019) : 491–95. http://dx.doi.org/10.1109/tvlsi.2018.2879439.

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Xu, Zihan, Chengen Yang, Manqing Mao, Ketul B. Sutaria, Chaitali Chakrabarti et Yu Cao. « Compact modeling of STT-MTJ devices ». Solid-State Electronics 102 (décembre 2014) : 76–81. http://dx.doi.org/10.1016/j.sse.2014.06.003.

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Chiou, Kuan-Ru, Jenq-Wei Chen et Son-Hsien Chen. « Spin-Transfer Torques in One-Dimensional Magnetic Tunneling Junctions of Lateral Structures ». SPIN 09, n^o 01 (mars 2019) : 1950003. http://dx.doi.org/10.1142/s2010324719500036.

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Recent study in [C. C. Lin, Y. F. Gao, A. V. Penumatcha, V. Q. Diep, J. Appenzeller and Z. H. Chen, Acs Nano 8, 3807 (2014)], showed that the spin-transfer torque (STT) is enhanced by the asymmetry in a graphene lateral spin-valve structure. This lateral structure or geometry can be modeled by a four-terminal magnetic tunneling junction (MTJ) as opposite to the conventional two-terminal MTJ. In this paper, using the nonequilibrium Green’s function formalism (NEGF), we compare the anti-damping components of the STT in a similar nonconventional lateral one-dimensional MTJ with that in the conventional MTJ. We find that the lateral geometry renders enhanced anti-damping torques compared with the conventional one, provided that the barrier energy, the scattering length and the magnetization angle are in a certain parameter region. We also identify this parameter region in the presence of dephasing. The enhancement of the anti-damping torques declines when the scattering region is longer. For the four-terminal MTJ of larger scattering length, the dephasing can expedite the anti-damping torque.

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Barla, Prashanth, Hemalatha Shivarama, Ganesan Deepa et Ujjwal Ujjwal. « Design and Assessment of Hybrid MTJ/CMOS Circuits for In-Memory-Computation ». Journal of Low Power Electronics and Applications 14, n^o 1 (6 janvier 2024) : 3. http://dx.doi.org/10.3390/jlpea14010003.

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Hybrid magnetic tunnel junction/complementary metal oxide semiconductor (MTJ/CMOS) circuits based on in-memory-computation (IMC) architecture is considered as the next-generation candidate for the digital integrated circuits. However, the energy consumption during the MTJ write process is a matter of concern in these hybrid circuits. In this regard, we have developed a novel write circuit for the contemporary three-terminal perpendicular-MTJs that works on the voltage-gated spin orbit torque (VG+SOT) switching mechanism to store the information in hybrid circuits for IMC architecture. Investigation of the novel write circuit reveals a remarkable reduction in the total energy consumption (and energy delay product) of 92.59% (95.81) and 92.28% (42.03%) than the conventional spin transfer torque (STT) and spin-Hall effect assisted STT (SHE+STT) write circuits, respectively. Further, we have developed all the hybrid logic gates followed by nonvolatile full adders (NV-FAs) using VG+SOT, STT, and SHE+STT MTJs. Simulation results show that with the VG+SOT NOR-OR, NAND-AND, XNOR-XOR, and NV-FA circuits, the reduction in the total power dissipation is 5.35% (4.27%), 5.62% (3.2%), 3.51% (2.02%), and 4.46% (2.93%) compared to STT (SHE+STT) MTJs respectively.

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Pushp, Aakash, Timothy Phung, Charles Rettner, Brian P. Hughes, See-Hun Yang et Stuart S. P. Parkin. « Giant thermal spin-torque–assisted magnetic tunnel junction switching ». Proceedings of the National Academy of Sciences 112, n^o 21 (13 mai 2015) : 6585–90. http://dx.doi.org/10.1073/pnas.1507084112.

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Spin-polarized charge currents induce magnetic tunnel junction (MTJ) switching by virtue of spin-transfer torque (STT). Recently, by taking advantage of the spin-dependent thermoelectric properties of magnetic materials, novel means of generating spin currents from temperature gradients, and their associated thermal-spin torques (TSTs), have been proposed, but so far these TSTs have not been large enough to influence MTJ switching. Here we demonstrate significant TSTs in MTJs by generating large temperature gradients across ultrathin MgO tunnel barriers that considerably affect the switching fields of the MTJ. We attribute the origin of the TST to an asymmetry of the tunneling conductance across the zero-bias voltage of the MTJ. Remarkably, we estimate through magneto-Seebeck voltage measurements that the charge currents that would be generated due to the temperature gradient would give rise to STT that is a thousand times too small to account for the changes in switching fields that we observe.

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Sugii, Toshihiro, Yoshihisa Iba, Masaki Aoki, Hideyuki Noshiro, Kouji Tsunoda, Akiyoshi Hatada, Masaaki Nakabayashi, Yuuichi Yamazaki, Atsushi Takahashi et Chikako Yoshida. « Integration of STT-MRAMs for Embedded Cache Memories ». Advances in Science and Technology 95 (octobre 2014) : 146–49. http://dx.doi.org/10.4028/www.scientific.net/ast.95.146.

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We report the current status of our development of spin-transfer torque magnetic RAMs (STT-MRAMs) and their integration with the back-end-of-line (BEOL) process to replace conventional embedded SRAM cache memories. Our MRAM technology features a top-pinned, perpendicular magnetic tunnel junction (MTJ) and a highly reliable MTJ for a cache memory. We could obtain a higher density cache memory than that with conventional SRAMs with our STT-MRAMs, and leakage free characteristics, as well as unlimited write and read cycling times and 10-year time-dependent dielectric breakdown (TDDB) characteristics. They were integrated into Cu interconnects with 300 mm facilities. We also discuss variations in MTJ pattern sizes that are very important for memory applications from the viewpoint of high density embedded cache memories.

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Thèses sur le sujet "STT-MTJ"

Nicolas, Hugo. « Développement de magnétomètres intégrés à base de jonctions tunnel magnétiques à couple de transfert de spin ». Electronic Thesis or Diss., Strasbourg, 2024. https://publication-theses.unistra.fr/restreint/theses_doctorat/2024/NICOLAS_Hugo_2024_ED269.pdf.

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Cette thèse présente l'utilisation de STT-MTJs perpendiculaires, développées initialement pour les MRAMs, en tant que capteurs magnétiques intégrés. Les MRAMs basées sur des MTJs utilisent généralement l'effet STT pour modifier l'orientation de l'aimantation d'une couche ferromagnétique douce en appliquant une forte tension aux bornes de la MTJ. Cela conduit à un changement de résistance permettant de placer la MTJ dans deux états distincts, parallèle et antiparallèle. Cependant, la tension nécessaire pour provoquer le retournement de l'aimantation de la couche douce dépend du champ magnétique externe. En utilisant cette propriété, nous explorons une nouvelle application des STT-MTJs qui consiste à les utiliser comme capteurs magnétique présentant des avantages significatifs par rapport aux capteurs à effet Hall et magnétorésistifs. Leurs dimensions nanométriques ainsi que leurs bandes passantes élevées permettent le développement de nouvelles applications
This thesis presents the use of perpendicular STT-MTJs, originally developed for MRAMs, as integrated magnetic sensors. MRAMs based on MTJs are often using the STT effect to change the orientation of the magnetization of a soft ferromagnetic layer by applying a strong voltage across the junction. This leads to a change of resistance allowing the MTJ to be set in two different resistive states called parallel and antiparallel. However, the energy required to flip the magnetization of the free layer from one state to the other is not only related to the voltage applied to the junction but also to the external magnetic field. Using this property, this work investigates a new application of STT-MTJs, which consists of using it as a magnetic sensor. These sensing elements have significant advantages compared to currently available Hall effect and magnetoresistive sensors. Hence, their nanometric dimensions as well as high bandwidth allow the development of new applications

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Das, Jayita. « Auxiliary Roles in STT-MRAM Memory ». Scholar Commons, 2014. https://scholarcommons.usf.edu/etd/5613.

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Computer memories now play a key role in our everyday life given the increase in the number of connected smart devices and wearables. Recently post-CMOS memory technologies are gaining significant research attention along with the regular ones. Spin Transfer Torque Magnetoresistive RAM (STT-MRAM) is one such post-CMOS memory technology with a rapidly growing commercial interest and potential across diverse application platforms. Research has shown the ability of STT-MRAM to replace different levels of memory hierarchy as well. In brief, STT-MRAM possesses all the favorable properties of a universal memory technology. In this dissertation we have explored the roles of this emerging memory technology beyond traditional storage. The purpose is to enhance the overall performance of the application platform that STT-MRAM is a part of. The roles that we explored are computation and security. We have discussed how the intrinsic properties of STT-MRAM can be used for computation and authentication. The two properties that we are interested in are the dipolar coupling between the magnetic memory cells and the variations in the geometries of the memory cell. Our contributions here are a 22nm CMOS integrated STT-MRAM based logic-in-memory architecture and a geometric variation based STT-MRAM signature generation. In addition we have explored the device physics and the dynamics of STT-MRAM cells to propose a STT based clocking mechanism that is friendlier with the logic-in-memory setup. By investigating the logic layouts and propagation style in the architecture, we have also proposed different techniques that can improve the logic density and performance of the architecture.

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Le, Quang Tuan. « Magnetodynamics in Spin Valves and Magnetic Tunnel Junctions with Perpendicular and Tilted Anisotropies ». Doctoral thesis, KTH, Materialfysik, MF, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-191176.

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Spin-torque transfer (STT) effects have brought spintronics ever closer to practical electronic applications, such as MRAM and active broadband microwave spin-torque oscillator (STO), and have emerged as an increasingly attractive field of research in spin dynamics. Utilizing materials with perpendicular magnetic anisotropy (PMA) in such applications offers several great advantages such as low-current, low-field operation combined with high thermal stability. The exchange coupling that a PMA thin film exerts on an adjacent in-plane magnetic anisotropy (IMA) layer can tilt the IMA magnetization direction out of plane, thus creating a stack with an effective tilted magnetic anisotropy. The tilt angle can be engineered via both intrinsic material parameters, such as the PMA and the saturation magnetization, and extrinsic parameters, such as the layer thicknesses. STOs can be fabricated in one of a number of forms—as a nanocontact opening on a mesa from a deposited pseudospin-valve (PSV) structure, or as a nanopillar etching from magnetic tunneling junction (MTJ)—composed of highly reproducible PMA or predetermined tilted magnetic anisotropy layers. All-perpendicular CoFeB MTJ STOs showed high-frequency microwave generation with extremely high current tunability, all achieved at low applied biases. Spin-torque ferromagnetic resonance (ST-FMR) measurements and analysis revealed the bias dependence of spin-torque components, thus promise great potential for direct gate-voltage controlled STOs. In all-perpendicular PSV STOs, magnetic droplets were observed underneath the nanocontact area at a low drive current and low applied field. Furthermore, preliminary results for microwave auto-oscillation and droplet solitons were obtained from tilted-polarizer PSV STOs. These are promising and would be worth investigating in further studies of STT driven spin dynamics.
Effekter av spinnvridmoment (STT) har fört spinntroniken allt närmare praktiska elektroniska tillämpningar, såsom MRAM och den spinntroniska mikrovågsoscillatorn (STO), och har blivit ett allt mer attraktivt forskningsområde inom spinndynamik. Användning av material med vinkelrät magnetisk anisotropi (PMA) i sådana tillämpningar erbjuder flera stora fördelar, såsom låg strömförbrukning och funktion vid låga fält i kombination med hög termisk stabilitet. Den utbyteskoppling (”exchange bias”) en PMA-tunnfilm utövar på ett intilliggande skikt med magnetisk anisotropi i planet (IMA) kan få IMA-magnetiseringsriktningen att vridas ut ur planet, vilket ger en materialstack med en effektivt sett lutande magnetisk anisotropi. Lutningsvinkeln kan manipuleras med både inre materialparametrar, såsom PMA och mättningsmagnetisering, och yttre parametrar, såsom skikttjocklekarna. STO:er kan tillverkas som flera olika typer - som en nanokontaktsöppning på en s.k. mesa av en deponerad pseudospinnventilstruktur (PSV) eller som en nanotråd etsad ur en magnetisk tunnlingsövergång (MTJ) –och bestå av mycket reproducerbar PMA eller av skikt med på förhand bestämt lutning av dess magnetiska anisotropi. MTJ-STO:er av CoFeB med helt vinkelrät anisotropi visar högfrekvent mikrovågsgenerering med extremt stort frekvensomfång hos strömstyrningen, detta vid låg biasering. Mätning och analys av spinnvridmoments-ferromagnetisk resonans (ST-FMR) avslöjade ett biasberoende hos spinnvridmomentskomponenter, vilket indikerar en stor potential för direkt gate-spänningsstyrda STO:er. I helt vinkelräta PSV-STO:er observerades magnetiska droppar under nanokontaktområdet vid låg drivström och lågt pålagt fält. Dessutom erhölls preliminära resultat av mikrovågssjälvsvängning och av s.k. ”droplet solitons” hos PSV-STO:er med lutande polarisator. Dessa är lovande och skulle vara värda att undersökas i ytterligare studier av STT-driven spinndynamik.

QC 20160829

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Vojáček, Libor. « Teoretická studie magnetické anizotropie v magnetických tunelových spojích na bázi MgO ». Master's thesis, Vysoké učení technické v Brně. Fakulta strojního inženýrství, 2021. http://www.nusl.cz/ntk/nusl-443253.

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Magnetický tunelový spoj (MTJ) je spintronická součástka komerčně používaná ve vysoce citlivých čtecích hlavách pevných disků. Počínaje rokem 2007 přispěla k udržení exponenciálního nárůstu hustoty magnetického zápisu. Kromě toho se také stala stavebním kamenem rychlé, odolné, úsporné a nevolatilní magnetické paměti s přímým přístupem (MRAM). Tento nový typ polovodičové paměti, stejně jako je tomu u čtecích hlav disků, využívá tunelové spoje založené na krystalickém oxidu hořečnatém (MgO) spolu s 3d kovovými magnetickými prvky (Fe a Co). Pro zmenšení MTJ a současné udržení dlouhodobé stability paměti proti tepelným fluktuacím je zapotřebí silná magnetická anizotropie ve směru kolmém na rozhraní kov|MgO. V této práci proto nejdříve provedeme analýzu magnetokrystalické anizotropie (MCA) kubického prostorově centrovaného Fe, Co a Ni na MgO pomocí ab initio simulací. Dále bude vyvinut program pro výpočet tvarové anizotropie, která je kromě MCA velmi podstatná, neboť v součtu dávají efektivní anizotropii. Na závěr implementujeme program pro výpočet MCA na základě poruchové teorie druhého řádu. To nám umožní dát pozorované anizotropní vlastnosti do souvislosti přímo s elektronickou strukturou systému (pásovou strukturou a hustotou stavů).

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Song, Hui William. « A Spin-torque Transfer MRAM in 90nm CMOS ». Thesis, 2011. http://hdl.handle.net/1807/29628.

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This thesis presents the design and implementation of a high-speed read-access STT MRAM. The proposed design includes a 2T1MTJ cell topology, along with two different read schemes: current-based and voltage-based. Compared to the conventional read scheme with 1T1MTJ cells, the proposed design is capable of reducing the loading on the read circuit to minimize the read access time. A complete STT MRAM test chip including the proposed and the conventional schemes was fabricated in 90nm CMOS technology. The 16kb test chip's measurement results confirm a read access time of 6ns and a write access time of 10ns. The read time is 25% faster than other works of similar array size published thus far, while the write time is able to match the fastest result.

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Zbarsky, Vladyslav. « Spindynamik in Tunnelelementen mit senkrechter magnetischer Anisotropie ». Doctoral thesis, 2015. http://hdl.handle.net/11858/00-1735-0000-0022-5DB6-E.

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Chapitres de livres sur le sujet "STT-MTJ"

Kumar, Ashwani, et Manan Suri. « Optimized Programming for STT-MTJ-Based TCAM for Low-Energy Approximate Computing ». Dans Applications of Emerging Memory Technology, 159–76. Singapore : Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-13-8379-3_6.

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Liao, Y. C., et P. Kumar. « Development, Challenges, and Future Opportunities of Spintronic Memory Devices ». Dans Advanced Memory Technology, 201–22. Royal Society of Chemistry, 2023. http://dx.doi.org/10.1039/bk9781839169946-00201.

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Recently, the development of spintronic memory devices such as spin-transfer torque MRAM (STT-MRAM) has become more critical since it has been demonstrated that it can used as a last level of cache or in embedded memory applications. However, there are some technological challenges such as lowering the write current, scaling of the device cell size, reducing the resistance-area product of the MTJ, etc. In this article, we reviewed the physics and development of several spintronic memory candidates including spin–orbit torque MRAM (SOT-MRAM), voltage-controlled exchange coupling MRAM (VCEC-MRAM), and magnetoelectric MRAM (ME-MRAM). We also benchmark the write and read performances of these candidates against SRAM. Last, the future application of spintronic devices in neuromorphic computing is also discussed.

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Actes de conférences sur le sujet "STT-MTJ"

Pai, M. Y. Xuan, N. Ezaila Alias, M. L. Peng Tan, Afiq Hamzah, Yasmin Abdul Wahab et Maizan Muhamad. « Analysis of the Electrical Characteristics for Compact SPICE Modelling of STT-MTJ Device with Physical Parameters Variation ». Dans 2024 IEEE International Conference on Semiconductor Electronics (ICSE), 5–8. IEEE, 2024. http://dx.doi.org/10.1109/icse62991.2024.10681337.

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Perach, Ben, et Shahar Kvatinsky. « STT-ANGIE : Asynchronous True Random Number GEnerator Using STT-MTJ ». Dans 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 2019. http://dx.doi.org/10.23919/date.2019.8715257.

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Chong Jian Yee, Firas Odai Hatem, T. Nandha Kumar et Haider A. F. Almurib. « Compact SPICE modeling of STT-MTJ device ». Dans 2015 IEEE Student Conference on Research and Development (SCOReD). IEEE, 2015. http://dx.doi.org/10.1109/scored.2015.7449413.

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Loy, D., S. Goolaup et W. Lew. « Optimised circuit configuration for STT-MTJ logic devices ». Dans 2015 IEEE International Magnetics Conference (INTERMAG). IEEE, 2015. http://dx.doi.org/10.1109/intmag.2015.7157256.

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Xu, Zihan, Ketul B. Sutaria, Chengen Yang, Chaitali Chakrabarti et Yu Cao. « Compact modeling of STT-MTJ for SPICE simulation ». Dans ESSDERC 2013 - 43rd European Solid State Device Research Conference. IEEE, 2013. http://dx.doi.org/10.1109/essderc.2013.6818887.

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Zhou, Y., Z. Wang, X. Hao, Y. Huai, J. Zhang, D. Jung et K. Satoh. « Unipolar switching of perpendicular mtj for STT-MRAM application ». Dans 2015 IEEE International Magnetics Conference (INTERMAG). IEEE, 2015. http://dx.doi.org/10.1109/intmag.2015.7157689.

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Lokesh, B., et M. Malathi. « Full adder based reconfigurable spintronic ALU using STT-MTJ ». Dans 2013 Annual IEEE India Conference (INDICON). IEEE, 2013. http://dx.doi.org/10.1109/indcon.2013.6726101.

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Yaojun Zhang, Lu Zhang et Yiran Chen. « MLC STT-RAM design considering probabilistic and asymmetric MTJ switching ». Dans 2013 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2013. http://dx.doi.org/10.1109/iscas.2013.6571795.

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Nigam, Anurag, Kamaram Munira, Avik Ghosh, Stu Wolf, Eugene Chen et Mircea R. Stan. « Self consistent parameterized physical MTJ compact model for STT-RAM ». Dans 2010 International Semiconductor Conference (CAS 2010). IEEE, 2010. http://dx.doi.org/10.1109/smicnd.2010.5650558.

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Ziou Wang, Yiping Zhang, Canyan Zhu, Lijun Zhang, Aiming Ji et Lingfeng Mao. « STT MTJ data-aware write boost design in 28nm process ». Dans 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT). IEEE, 2016. http://dx.doi.org/10.1109/icsict.2016.7998983.

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