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Bibliographies thématiques / SystemC-AMS

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Articles de revues

Littérature scientifique sur le sujet « SystemC-AMS »

Auteur : Grafiati

Publié le 4 juin 2021

Mis à jour le 25 mai 2024

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Articles de revues sur le sujet "SystemC-AMS"

1

Ma, Kezheng, Rene Van Leuken, Maja Vidojkovic, et al. "A Precise and High Speed Charge-Pump PLL Model Based on SystemC/SystemC-AMS." International Journal of Electronics and Telecommunications 58, no. 3 (2012): 225–32. http://dx.doi.org/10.2478/v10177-012-0031-5.

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Abstract The Phase Locked Loop (PLL) has become an important part of electrical systems. When designing a PLL, an efficient and reliable simulation platform for system evaluation is needed. However, the closed loop simulation of a PLL is time consuming. To address this problem, in this paper, a new PLL model containing both digital and analog parts based on SystemC/SystemC-AMS (BETA version) is presented. Many imperfections such as Voltage Control Oscillator (VCO) noise or reference jitter are included in this model. By comparing with the Matlab model, the SystemC/SystemC-AMS model can dramatically reduce simulation time. Also, by comparing with Analog Devices ADI SimPLL simulation results, Cadence simulation results and real measurement results, the accuracy of the SystemC/SystemC-AMS model is demonstrated. The paper shows the feasibility of a unified design environment for mixed-signal modelling based on SystemC/SystemC-AMS in order to reduce the cost and design time of electrical systems.

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Alekhin, V. A. "Designing Electronic Systems Using SystemC and SystemC–AMS." Russian Technological Journal 8, no. 4 (2020): 79–95. http://dx.doi.org/10.32362/2500-316x-2020-8-4-79-95.

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Current trends in the design of electronic systems is the use of embedded systems based on systems on a chip (System-on-Chip (SoC)) or (VLSI SoC). The paper discusses the design features of electronic systems on a chip using the SystemC design and verification language. For the joint design and simulation of digital systems hardware and software, seven modeling levels are presented and discussed: executable specification, disabled functional model, temporary functional model, transaction-level model, behavioral hardware model, accurate hardware model, register transfer model. The SystemC design methodology with functional verification is presented, which reduces development time.The architecture of the SystemC language and its main components are shown. The expansion of SystemC–AMS for analog and mixed analog-digital signals and its use cases in the design of electronic systems are considered. Computing models are discussed: temporary data stream (TDF), linear signal stream (LSF) and electric linear networks (ELN). The architecture of the SystemC–AMS language standard is shown and examples of its application are given. It is shown that the design languages SystemC and SystemC–AMS are widely used by leading developers of computer-aided design systems for electronic devices.

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3

Markert, Erik, Marco Dienel, Goeran Herrmann, and Ulrich Heinkel. "SystemC-AMS Assisted Design of an Inertial Navigation System." IEEE Sensors Journal 7, no. 5 (2007): 770–77. http://dx.doi.org/10.1109/jsen.2007.894130.

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Zimmermann, Thomas, Mathias Mora, Sebastian Steinhorst, Daniel Mueller-Gritschneder, and Andreas Jossen. "Analysis of Dissipative Losses in Modular Reconfigurable Energy Storage Systems Using SystemC TLM and SystemC-AMS." ACM Transactions on Design Automation of Electronic Systems 24, no. 4 (2019): 1–33. http://dx.doi.org/10.1145/3321387.

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5

Li, Wei, Dian Zhou, Minghua Li, Binh P. Nguyen, and Xuan Zeng. "Near-Field Communication Transceiver System Modeling and Analysis Using SystemC/SystemC-AMS With the Consideration of Noise Issues." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21, no. 12 (2013): 2250–61. http://dx.doi.org/10.1109/tvlsi.2012.2231443.

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6

Markert, Erik, Marco Dienel, Goeran Herrmann, Dietmar Mueller, and Ulrich Heinkel. "Modeling of a new 2D Acceleration Sensor Array using SystemC-AMS." Journal of Physics: Conference Series 34 (April 1, 2006): 253–57. http://dx.doi.org/10.1088/1742-6596/34/1/042.

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7

Fernández, Víctor, Andrés Mena, Cédric Ben Aoun, François Pêcheux, and Luis J. Fernández. "Virtual prototyping of pressure driven microfluidic systems with SystemC-AMS extensions." Microprocessors and Microsystems 39, no. 8 (2015): 854–65. http://dx.doi.org/10.1016/j.micpro.2015.07.007.

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8

Zaidi, Yaseen, Christoph Grimm, and Jan Haase. "On Mixed Abstraction, Languages, and Simulation Approach to Refinement with SystemC AMS." EURASIP Journal on Embedded Systems 2010, no. 1 (2010): 489365. http://dx.doi.org/10.1155/2010/489365.

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9

Chen, Yukai, Sara Vinco, Daniele Jahier Pagliari, Paolo Montuschi, Enrico Macii, and Massimo Poncino. "Modeling and Simulation of Cyber-Physical Electrical Energy Systems With SystemC-AMS." IEEE Transactions on Sustainable Computing 5, no. 4 (2020): 552–67. http://dx.doi.org/10.1109/tsusc.2020.2973900.

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10

Coşkun, Kemal Çağlar, Muhammad Hassan, and Rolf Drechsler. "Equivalence Checking of System-Level and SPICE-Level Models of Linear Circuits." Chips 1, no. 1 (2022): 54–71. http://dx.doi.org/10.3390/chips1010006.

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Due to the increasing complexity of analog circuits and their integration into System-on-Chips (SoC), the analog design and verification industry would greatly benefit from an expansion of system-level methodologies using SystemC AMS. These can provide a speed increase of over 100,000× in comparison to SPICE-level simulations and allow interoperability with digital tools at the system-level. However, a key barrier to the expansion of system-level tools for analog circuits is the lack of confidence in system-level models implemented in SystemC AMS. Functional equivalence of single Laplace Transfer Function (LTF) system-level models to respective SPICE-level models was successfully demonstrated recently. However, this is clearly not sufficient, as the complex systems comprise multiple LTF modules. In this article, we go beyond single LTF models, i.e., we develop a novel graph-based methodology to formally check equivalence between complex system-level and SPICE-level representations of Single-Input Single-Output (SISO) linear analog circuits, such as High-Pass Filters (HPF). To achieve this, first, we introduce a canonical representation in the form of a Signal-Flow Graph (SFG), which is used to functionally map the two representations from separate modeling levels. This canonical representation consists of the input and output nodes and a single edge between them with an LTF as its weight. Second, we create an SFG representation with linear graph modeling for SPICE-level models, whereas for system-level models we extract an SFG from the behavioral description. We then transform the SFG representations into the canonical representation by utilizing three graph manipulation techniques, namely node removal, parallel edge unification, and reflexive edge elimination. This allows us to establish functional equivalence between complex system-level models and SPICE-level models. We demonstrate the applicability of the proposed methodology by successfully applying it to complex circuits.

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