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Tesi sul tema "DSP"

Autore: Grafiati
Pubblicato: 4 giugno 2021
Ultima modifica: 25 luglio 2025

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1

Xinyuan, Luo. "DSP Platform Benchmarking : DSP Platform Benchmarking." Thesis, Linköping University, Department of Electrical Engineering, 2009. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-19258.

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Abstract (sommario):
<p><p>Benchmarking of DSP kernel algorithms was conducted in the thesis on a DSP processor for teaching in the course TESA26 in the department of Electrical Engineering. It includes benchmarking on cycle count and memory usage. The goal of the thesis is to evaluate the quality of a single MAC DSP instruction set and provide suggestions for further improvement in instruction set architecture accordingly. The scope of the thesis is limited to benchmark the processor only based on assembly coding. The quality check of compiler is not included. The method of the benchmarking was proposed by BDTI,
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2

Torres, Matthieu. "Contribution à l'étude de l'implantation d'algorithmes de traitement de signal sur plateformes DSP-DSP et DSP-FPGA." Limoges, 2003. http://www.theses.fr/2003LIMO0037.

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Le développement d'un système embarqué se compose généralement d'une phase de développement algorithmique et d'une phase d'implantation sur la cible. Les problèmes posés lors de cette phase sont la définition d'une architecture matérielle et la migration des algorithmes sur les différents circuits mis en œuvre. Les problèmes spécifiques dégagés par ce type d'étude conditionnent fortement la conception même des algorithmes. Ce mémoire est une contribution à l'étude et à l'optimisation de l'implantation d'algorithmes de traitement du signal sur deux plateformes à base de processeurs DSP. La prem
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3

Struhelka, Michal. "DSP audio procesor pro laboratorní výuku." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2015. http://www.nusl.cz/ntk/nusl-221230.

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This project deals with the subject of laboratory preparation for low-frequency and audio electronics. It is used DSP audio processor with integrated ADCs and DACs converters ADAU1701 from Analog Devices. Also, Atmel microcontroller with a connected graphic LCD display and buttons is used for adjusting DSP. The work presents the complete instructions of the laboratory project with a model protocol.
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4

Lennartsson, Per, and Lars Nordlander. "Benchmarking a DSP processor." Thesis, Linköping University, Department of Electrical Engineering, 2002. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1491.

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<p>This Master thesis describes the benchmarking of a DSP processor. Benchmarking means measuring the performance in some way. In this report, we have focused on the number of instruction cycles needed to execute certain algorithms. The algorithms we have used in the benchmark are all very common in signal processing today. </p><p>The results we have reached in this thesis have been compared to benchmarks for other processors, performed by Berkeley Design Technology, Inc. </p><p>The algorithms were programmed in assembly code and then executed on the instruction set simulator. After that, we p
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5

Gnatyuk, Vladimir, and Christian Runesson. "A Multimedia DSP Processor Design." Thesis, Linköping University, Department of Electrical Engineering, 2004. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2269.

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<p>This Master Thesis presents the design of the core of a fixed point general purpose multimedia DSP processor (MDSP) and its instruction set. This processor employs parallel processing techniques and specialized addressing models to speed up the processing of multimedia applications. </p><p>The MDSP has a dual MAC structure with one enhanced MAC that provides a SIMD, Single Instruction Multiple Data, unit consisting of four parallel data paths that are optimized for accelerating multimedia applications. The SIMD unit performs four multimedia- oriented 16- bit operations every clock cycle. Th
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6

Nilsson, Andreas. "Debug Interface for 56000 DSP." Thesis, Linköping University, Department of Electrical Engineering, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-9196.

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<p>The scope for this thesis was to design a debug interface for a DSP (digital signal processor). The DSP is a research version of a Motorola 56000 that is designed for a project on asynchronous processor and for use in education.</p><p>The DSP and debug interface are controlled via a standard PC with RS232 interface equipped with Linux operation system.</p><p>In the project 4 blocks has been designed:</p><p>The first block can set the DSP core in debug mode or run mode. The second block sends a debug instruction to the DSP core, these debug instructions were prerequisite to the project. The
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7

Tell, Eric. "A Domain Specific DSP Processor." Thesis, Linköping University, Department of Electrical Engineering, 2001. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-980.

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<p>This thesis describes the design of a domain specific DSP processor. The thesis is divided into two parts. The first part gives some theoretical background, describes the different steps of the design process (both for DSP processors in general and for this project) and motivates the design decisions made for this processor. </p><p>The second part is a nearly complete design specification. </p><p>The intended use of the processor is as a platform for hardware acceleration units. Support for this has however not yet been implemented.</p>
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8

Maråk, Martin. "DSP for Lågeffekt Programvaredefinert Radio." Thesis, Norges teknisk-naturvitenskapelige universitet, Institutt for elektronikk og telekommunikasjon, 2011. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-14038.

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Programvaredefinert radio (SDR) er ein ny m&#229;te &#229; implementere radiosystem p&#229;. Hovudtanken er at delar av radioen som tidlegare har vore implementert med l&#229;ste analoge og digitale l&#248;ysingar skal erstattast med programvare som k&#248;yrer p&#229; ein prosessor. Dette kan forbetre mellom anna fleksibilitet, tilpassingsdyktigheit og produksjonskostnadar.Denne oppg&#229;va tek for seg ein DSP-arkitektur spesielt tilpassa l&#229;geffekt modulasjon og demodulasjon av radiosignaler med lav kompleksitet. Bluetooth er vald som d&#248;me og demodulasjonsdelen av denne er analyser
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9

Othman, Mohd Ridzal. "DSP-based active power filter." Thesis, Loughborough University, 1998. https://dspace.lboro.ac.uk/2134/6966.

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Harmonics in systems are conventionally suppressed using passive tuned filters, which have practical limitations in terms of the overall cost, size and performance, and these are particularly unsatisfactory when large number of harmonics are involved Active power filtering is an alternative approach in which the filter injects suitable compensation currents to cancel the harmonic currents, usually through the use of power electronic converters. This type of filter does not exhibit the drawbacks normally associated with its passive counterpart, and a large number of harmonics can be compensated
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10

Guido, Rodrigo Capobianco. "Spikelet: uma nova transformada wavelet aplicada ao reconhecimento digital de padrões, em tempo real, de spikes e overlaps em sinais neurofisiológicos do campo visual da mosca." Universidade de São Paulo, 2003. http://www.teses.usp.br/teses/disponiveis/76/76132/tde-11092008-172109/.

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A presente tese descreve a construção de uma nova transformada wavelet, aqui chamada de SPIKELET, que, combinada com um algoritmo proposto, é aplicada no reconhecimento computacional de padrões em spikes (picos) e spikes sobrepostos (overlaps) encontrados no sinal digitalizado correspondente às reações do neurônio H1 do cérebro de uma mosca de ordem Diptera, que é sensível aos estímulos visuais do meio externo. O algoritmo fornece, além do formato do sinal encontrado, o \'\'instante\'\' em que ele ocorreu, sendo que a implementação é feita, inclusive, em tempo-real, com o uso de um DSP.<br>Thi
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11

Øyen, Karsten. "Compensation of Loudspeaker Nonlinearities : - DSP implementation." Thesis, Norwegian University of Science and Technology, Department of Electronics and Telecommunications, 2007. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-8839.

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<p>Compensation of loudspeaker nonlinearities is investigated. A compensation system, based a loudspeaker model (a computer simulation of the real loudspeaker), is first simulated in matlab and later implemented on DSP for realtime testing. So far it is a pure feedforward system, meaning that no feedback measurement of the loudspeaker is used. Loudspeaker parameters are drifting due to temperature and aging. This reduces the performance of the compensation. To fulfil the system, an online tracking of the loudspeaker linear parameters is needed (also known as parameter identification). Previ
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12

Stengård, Jakob. "Registerallokering med PBQP för en DSP." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-48162.

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Irreguljära arkitekturer, så som Digitala Signal Processorer, utgör nya utmaningar vid konstruktionen av kompilatorer. I det här projektet undersöks PBQP, en alternativ algoritm till den traditionella grafallokeringen som ger större möjligheter att modellera komplexa begränsningar. Projektet har fokuserat på hur man modellerar alias och parrelationer i teorin, samt vad som finns implementerat i dagsläget i kompilatorramverket LLVM. Det som framkommit är att stöd för par relationer saknas i LLVM i dagslaget och därför ges några förslag på hur man skulle kunna gå till väga föra att implementera
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13

Lepenica, Nermin. "Assertion Based Verification on Senior DSP." Thesis, Linköpings universitet, Datorteknik, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-74392.

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Digital designs are often very large and complex, this makes locating and fixing a bug very hard and time consuming. Often more than half of the development time is spent on verification. Assertion based verification is a method that uses assertions that can help to improve the verification time. Simulating with assertions provides more information that can be used to locate and correct a bug. In this master thesis assertions are discussed and implemented in Senior DSP processor.
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14

Svensk, Gustav. "Bus System for Coresonic SIMT DSP." Thesis, Linköpings universitet, Datorteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-129525.

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This thesis consists of designing and implementing a bus system for a specific computersystem for MediaTek Sweden AB . The focus of the report is to show the considerations andchoices made in the design of a suitable bus system. Implementation details describe howthe system is constructed. The results show that it is possible to maintain a high bandwidthin many parts of the system if an appropriate topology is chosen. If all units in a bus systemare synchronous it is difficult to reach low latency in the communication.
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15

Winqvist, Arvid. "DSP implementation of the Cholesky factorisation." Thesis, Linköpings universitet, Datorteknik, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-110866.

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The Cholesky factorisation is an efficient tool that, when used correctly, significantlycan reduce the computational complexity in many applications. This thesiscontains an in-depth study of the factorisation, some of its applications andan implementation on the Coresonic SIMT DSP architecture.<br>Choleskyfaktoriseringen är ett effektivt verktyg som, när det används korrekt, signifikantkan minska beräkningskomplexiteten i många applikationer. Detta examensarbeteinnehåller en ingående studie av faktoriseringen, några av dess applikationersamt en implementation på Coresonic SIMT DSP architecture
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16

Peng, Sean Hsien-en. "UTDSP, a VLIW programmable DSP processor." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 2000. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape4/PQDD_0017/MQ49751.pdf.

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17

Karlsson, Rudberg Mikael. "DSP algorithms and architectures for telecommunication /." Linköping : Univ, 2001. http://www.bibl.liu.se/liupubl/disp/disp2001/tek705s.pdf.

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18

Cheng, Louis. "Efficient DSP-based active power filter." Thesis, Teesside University, 1996. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.410837.

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19

Yi, Ying. "DSP architectural synthesis tools for FPGAs." Thesis, Queen's University Belfast, 2004. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.398180.

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20

Hiers, Todd C. (Todd Christopher) 1979. "A high performance multiprocessor DSP system." Thesis, Massachusetts Institute of Technology, 2001. http://hdl.handle.net/1721.1/86714.

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Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2001.<br>Includes bibliographical references (leaves 61-62).<br>by Todd C. Hiers.<br>M.Eng.
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21

Ickes, Nathan J. (Nathan Jeffrey) 1979. "A micropower DSP for sensor applications." Thesis, Massachusetts Institute of Technology, 2008. http://hdl.handle.net/1721.1/44418.

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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.<br>Includes bibliographical references (p. 171-176).<br>Ultra-low power systems, such as wireless microsensor networks or implanted medical devices, are driving the development of processors capable of performing increasingly complicated computations using mere microwatts of power. This thesis describes the design of a micropower DSP intended for medium bandwidth microsensor applications (such as acoustic sensing and tracking) which achieves 4 MIPS performance at 40 [mu]W (10 pJ
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22

Fatadin, M. I. A. "DSP techniques for optical coherent receivers." Thesis, University College London (University of London), 2011. http://discovery.ucl.ac.uk/1306182/.

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The design of modern optical communication systems seeks a solution to the optimisation of bandwidth utilisation. Despite the inherent simplicity offered by intensity modulation direct detection (IM-DD), it is evident that this conventional binary scheme cannot fully explore in full the theoretical achievable capacity of optical systems. A lot of research activity is directing towards coherent detection techniques, already investigated in the early nineties, but then abandoned because of IM-DD cost efficiency and technological ease with erbium-doped fibre amplifiers. Coherent techniques requir
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23

Urbiš, Oldřich. "Algoritmy rozpoznávání řeči na FPGA/DSP." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2008. http://www.nusl.cz/ntk/nusl-235943.

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This master's thesis deals with design of speech recognition algorithms with consideration of target technology, which is platform combinating digital signal processing and field programmable gate array. Algorithms for speech recognition includes: feature extraction of Melfrequency cepstral coefficients, hidden Markov models and their evaluation by Viterbi algorithm.
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24

Ginsberg, Samuel Isaac. "A handheld DSP based vibration analyzer." Master's thesis, University of Cape Town, 2001. http://hdl.handle.net/11427/5215.

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This dissertation investigates the design and implementation of a hand held vibration analyzer for use on electrical rotating machinery. The analyzer gathers data from an accelerometer and can present either acceleration, velocity or displacement information. Any information can be presented to the user in either the time or frequency domain. Numerical measurements can be made on the readings and readings can be stored onto a CompactFlash memory card. The instrument features its own type of file system and data storage metaformats. Facilities exist for the instrument to upload data to a comput
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25

Gowrisankaran, Prabhakar. "Structural testbench development for DSP models." Thesis, This resource online, 1995. http://scholar.lib.vt.edu/theses/available/etd-01312009-063336/.

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26

Hrishikesh, Srinivasan. "Behavioral testbench development for DSP models." Thesis, This resource online, 1995. http://scholar.lib.vt.edu/theses/available/etd-01102009-063025/.

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27

Yücel, Fırat Çalış Hakan. "DSP tabanlı çevrimiçi durum izleme sistemi /." Isparta : SDÜ Fen Bilimleri Enstitüsü, 2008. http://tez.sdu.edu.tr/Tezler/TF01177.pdf.

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28

Gunnam, Kiran Kumar. "A DSP embedded optical naviagtion system." Thesis, Texas A&M University, 2003. http://hdl.handle.net/1969/13.

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29

Václavík, Jiří. "Aktivní výhybka reprosoustavy s využitím DSP." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2018. http://www.nusl.cz/ntk/nusl-377335.

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Semestral thesis is devoted to mapping and verification technologies for the project active loudspeaker crossover using DSP. Three way systém will use open baffle. Design of analog crossover is complex due to the need of compensating for acoustic short circuit and properties of laudspeakers.
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30

KULSOOM, FARZANA. "DSP algorithms for MIMO based Systems." Doctoral thesis, Università degli studi di Pavia, 2020. http://hdl.handle.net/11571/1325948.

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Multiple Input Multiple Output (MIMO) systems are an emerging wireless communication technology that gained popularity due to its capability to enhance spectral efficiency and reliability. Although MIMO enhances system capacity and performance, it could be challenging due to the high number of antennas at both the transmitter and receiver. It has been therefore one of the popular research areas during the last decade, meeting ever-increasing demands of data rates. Nevertheless, serving multiple terminals simultaneously is challenging due to interference among them. The main goal of this res
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31

Neubert, Tobias Baumgartl Robert. "A modular driver for DSP Hardware and Linux 2.6 Ein Modularer Treiber für DSP Hardware und Linux 2.6 /." [S.l. : s.n.], 2007.

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32

Svensson, Markus, and Thomas Österholm. "Optimization and Verification of an Integrated DSP." Thesis, Linköping University, Department of Electrical Engineering, 2008. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-15679.

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<p>There is a lot of applications for DSPs (Digital Signal Processor) in the most rapidly growing areas in the industry right now as wireless communication along with audio and video products are getting more and more popular. In this report, a DSP, developed at the division of Computer Engineering at the University of Linköping, is optimized and verified.</p><p>Register Forwarding was implemented on a general architecture level to avoiddata hazards that may arise when implementing instruction pipelining in a processor.</p><p>The very common FFT algorithm is also optimized but on instruction s
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Fagerqvist, Gustaf. "Integrering av DSP i talförstärkaren MMT-4." Thesis, Linnaeus University, School of Computer Science, Physics and Mathematics, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:lnu:diva-7955.

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<p>Att ansluta en digital signalprocessor kräver ett omfattande arbete. Innehållet i denna rapport sammanfattar teoretiska metoder för att integrera den digitala signalprocessorn ADAU1701 i talförstärkaren MMT-4, utvecklad av företaget Xena Medical. Arbetet har till största delen bestått i att finna en lämplig DSP och studera dess datamanual för att anpassa den till talförstärkaren.</p><p>Mycket av rapporten sammanfattar beräkningar av komponentvärden och anpassning av ADAU1701 för MMT-4:s behov. ADAU1701 beskrivs utifrån det så kallade <em>selfboot-</em>läget där processorn kan arbeta som fri
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Köhler, Stefan, Jan Schirok, and Rainer G. Spallek. "Rekonfigurierbare DSP-Datenpfaderweiterungen für energieeffiziente, eingebettete Prozessorkerne." Universitätsbibliothek Chemnitz, 2007. http://nbn-resolving.de/urn:nbn:de:swb:ch1-200700845.

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Die Steigerung der Verarbeitungsleistung eingebetteter Mikroprozessoren gewinnt insbesondere durch zunehmende Bedeutung audiovisueller Datenverarbeitung in Verbindung mit drahtloser Kommunikation ständig an Bedeutung. Die notwendige Performance ist jedoch durch Anwendung klassischer Techniken des Prozessorentwurfs (Pipelining, Superskalarität) nur teilweise erreichbar. In unserem Beitrag möchten wir aufzeigen, daß die erforderliche Verarbeitungsleistung durch den Einsatz dynamisch rekonfigurierbarer Datenpfade bei gleichzeitig erhöhtem Flexibilitätsgrad erreicht werden kann. Anhand von quantit
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Murugesan, Somasekar. "Benchmarking of Sleipnir DSP Processor, ePUMA Platform." Thesis, Linköpings universitet, Datorteknik, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-74080.

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Choosing a right processor for an embedded application, or designing a new pro-cessor requires us to know how it stacks up against the competition, or sellinga processor requires a credible communication about its performance to the cus-tomers, which means benchmarking of a processor is very important. They arerecognized world wide by processor vendors and customers alike as the fact-basedway to evaluate and communicate embedded processor performance. In this the-sis, the benchmarking of ePUMA multiprocessor developed by the Division ofComputer Engineering, ISY, Linköping University, Sweden wi
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36

Zhang, Meishenglan. "Power-Aware Software Development For EMCA DSP." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-215711.

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The advent of FinFET technology necessitates a shift towards early dynamic power awareness, not only for ASIC block designers but also for software engineers that develop code for those blocks. CMOS dynamic power is typically reduced by optimizing the RTL models in terms of switching activity and clock gating efficiency. There is not much to be done after a model is committed. Programmable blocks though, like the Phoenix 4 Digital Signal Processor(EMCA Ericsson Multi Core Architecture), can have a “second chance” for low power even after silicon is produced by efficient use of the software sou
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Rukchonlatee, Pichit. "A DSP-controlled limited angle torque motor." Thesis, Loughborough University, 1997. https://dspace.lboro.ac.uk/2134/27151.

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Li, Hai. "Scheduling algorithms for a multiprocessor DSP platform." Thesis, University of East Anglia, 2005. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.426340.

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39

Gutnik, Vadim. "Variable supply voltage for low power DSP." Thesis, Massachusetts Institute of Technology, 1996. http://hdl.handle.net/1721.1/36088.

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40

Tao, Morris M. (Morris Matthew) 1977. "Texas Instruments DSP Dynamic Run-Time Loader." Thesis, Massachusetts Institute of Technology, 2001. http://hdl.handle.net/1721.1/16862.

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Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2001.<br>Includes bibliographical references (leaf 41).<br>This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.<br>The increased demand in applications of Digital Signal Processors (DSP) are reaching the limits of the basic method of statically loading libraries. These statically loaded libraries are fixed to the location in memory where they can be executed. Therefore these inflexible librari
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Akhtar, M. S. "DSP electrical length calibration in satellite beamformers." Thesis, University College London (University of London), 2012. http://discovery.ucl.ac.uk/1348767/.

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This project has been constituted to exceed the sampling frequencies attained in the previous Astrium satellite communication signal processors (i.e. beamforming, null steering). Thus far these systems have been synchronous as the ADCs, DACs used, had comparatively low sample rate (i.e. less than or equal to 120 MHz) and were designed to have reset capability to resynchronise the system after power up, SEUs (single event upsets), radiation and other interference effects. Ever increasing demand for higher sampling rates requires a complex clocking scheme within the ADCs, DACs and DSPs, incorpor
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42

Wen-Li, Shih. "GDB for PAC DSP: A Debugger for DSP Processors." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0016-1303200709281955.

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Shih, Wen-Li, and 施文立. "GDB for PAC DSP: A Debugger for DSP Processors." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/72295624781149055363.

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碩士<br>國立清華大學<br>資訊工程學系<br>94<br>In nowadays, streaming data application has become more and more important since the portable devices such as PDA, and Smart Phone grew their market. To pursue the optimized balance between high performance and low power consumption for streaming data applications, many embedded systems employ programmable Digital Signal Processor (DSP) as their core component to construct a high-performance, low-power, high-flexibility, and low-cost platform. For such a platform, a developer of applications requires a convenient, friendly, and stable developing environment to d
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Ching-Hsiang, Kuo. "Evaluation of PAC DSP - Based on Typical DSP Algorithm Kernels." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0016-1303200709283996.

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Kuo, Ching-Hsiang, and 郭景翔. "Evaluation of PAC DSP – Based on Typical DSP Algorithm Kernels." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/51066952342678899925.

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碩士<br>國立清華大學<br>資訊工程學系<br>94<br>With the development of silicon technology, the need of portable multimedia and communication devices is increasing fast day by day, which dominate people’s daily life. The digital signal processing algorithm, such as video and audio codec, voice filtering, and error correction, are also changing in a fast pace. To quickly develop new products with compatibility of latest specifications and algorithm without sacrificing its efficiency, more and more portable device vendors choose DSP solution. Seeing this trend, the SoC Technology Center (STC) in ITRI, started t
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Kardonik, Michael. "DSP operating systems." 2011. http://hdl.handle.net/2152/22781.

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This report presents operating systems that are designed to run on some of today’s the most popular DSP platforms. We look at functionally that those OSes provide to users, how they compare to general market embedded OS (like VxWorks, Linux), how they fit newest DSP platforms that features multicore architecture and highly integrated SoC. We also want to understand how those OSes can be utilized to implement selected real-time scheduling approaches.<br>text
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Lin, Hung-Yueh, and 林宏曄. "Lightweight DSP Arithmetic and its Application on a Programmable DSP Core." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/72773636133324120920.

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碩士<br>國立交通大學<br>電子工程系所<br>92<br>Digital signal processing demands higher precision and enough dynamic range to improve the quality and prevent the overflow respectively. The most straightforward way to satisfy both is to use the floating-point arithmetic, where the data samples are individually represented in the exponent and the mantissa parts. Data are normalized for every operation dynamically, and therefore it provides very wide dynamic range and fixed bit-width precision in the exponential scales. However, the floating-point arithmetic needs complicated hardware to manipulate the expon
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陳承暄. "Power Measurement using DSP." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/14720258668757991936.

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碩士<br>國立彰化師範大學<br>電機工程學系<br>94<br>Currently, the usage of large loads and nonlinear loads has been increasing rapidly and it will produce harmonic distortion and other power pollution affecting the power quality. By measuring parameters of power lines such as effective voltage, current, power, and total harmonic distortion (THD), we can tell whether the power system is stable or not. In this thesis, the DSP-based power measurement is presented. The measured parameters consist of effective values and frequency of voltage and current, real power, apparent power, reactive power, power factor, and
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Sureka, Gaurav. "DSP implementation of a software-defined P25 emergency radio based on DRP technology /." 2008. http://proquest.umi.com/pqdweb?did=1654494091&sid=1&Fmt=2&clientId=10361&RQT=309&VName=PQD.

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Chauhan, Arun. "Telescoping MATLAB for DSP applications." Thesis, 2004. http://hdl.handle.net/1911/18729.

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This dissertation designs and implements a prototype MATLAB compiler for Digital Signal Processing (DSP) libraries, based on a novel approach called telescoping languages for compiling high-level languages. The thesis of this work is that it is possible to effectively and efficiently compile DSP libraries written in MATLAB using the telescoping languages approach that aims to automatically develop domain-specific application development environments based on component libraries for high performance computing. Initial studies on DSP applications demonstrated that the approach was promising. D
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