Auswahl der wissenschaftlichen Literatur zum Thema „12-bit“

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Zeitschriftenartikel zum Thema "12-bit"

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Kaur, Amandeep, Deepak Mishra, and Mukul Sarkar. "A 12-bit, 2.5-bit/Phase Column-Parallel Cyclic ADC." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27, no. 1 (2019): 248–52. http://dx.doi.org/10.1109/tvlsi.2018.2871341.

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Rout, Shasanka Sekhar, Rajesh Kumar Patjoshi, Sarmila Garnaik, and Ranjita Rout. "Comparative Analysis of Heterogeneous Adders: Evaluating Performance across 12-bit, 14-bit, and 16-bit Configurations." Journal of Information Assurance and Security 19, no. 4 (2024): 136–45. https://doi.org/10.2478/ias-2024-0010.

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Abstract Digital Signal Processing (DSP) heavily relies on repetitive addition and multiplication operations, making adders a crucial component in DSP systems. Likewise, in processor design, an efficient adder circuit is essential for optimizing compactness, achieving high speed, and minimizing power consumption, particularly when utilizing Xilinx technology. This study delves into the exploration and design of an effective adder architecture by examining various parallel, synchronous adders and proposing a novel combination. The presented research introduces heterogeneous adders composed of c
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Jayamani, Jayapramila, Noor Diyana Osman, Abdul Aziz Tajuddin, Zaker Salehi, Mohd Hanafi Ali, and Mohd Zahri Abdul Aziz. "Determination of computed tomography number of high-density materials in 12-bit, 12-bit extended and 16-bit depth for dosimetric calculation in treatment planning system." Journal of Radiotherapy in Practice 18, no. 03 (2019): 285–94. http://dx.doi.org/10.1017/s1460396919000013.

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AbstractAimThe main aim was to examine the effect of bit depth on computed tomography (CT) number for high-density materials. Analysis of the CT number for high-density materials using 16-bit scanners will extend the CT scale that currently exists for 12-bit scanners and thus will be beneficial for use in CT–electron density (ED) curve in radiotherapy treatment planning system (TPS). Implementation of this extended CT scale will compensate for tissue heterogeneity during CT–ED conversion in treatment planning.Materials and methodsAn in-house built phantom with 10 different metal samples was sc
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Neal, Brent. "Photoshop and 12-bit Digital Microscope Camera Images." Microscopy Today 12, no. 2 (2004): 24–25. http://dx.doi.org/10.1017/s1551929500051956.

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One problem facing owners of high-end digital microscope cameras and scanners is dealing with 12-bit TIFF format images. Because of a vagueness in the TIFF specification [1], some prograins do not load 12-bit TIFF images at all, or do not handle them gracefully. Unfortunately, Adobe Photoshop is one such program.A common problem with 12-bit images that do load in Photoshop is that the image appears to be totally black once loaded. This occurs when the camera stores the most significant bits of the image in the lower 12-bits of a 16-bit data space. Photoshop, when converting to its internal 16-
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Sahoo, Bibhu Datta, and Behzad Razavi. "A 12-Bit 200-MHz CMOS ADC." IEEE Journal of Solid-State Circuits 44, no. 9 (2009): 2366–80. http://dx.doi.org/10.1109/jssc.2009.2024809.

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Kolluri, M. P. V. "A 12-bit 500-ns subranging ADC." IEEE Journal of Solid-State Circuits 24, no. 6 (1989): 1498–506. http://dx.doi.org/10.1109/4.44985.

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Srivastava, Amit K., Atish Sharma, Tushar Raval, and D. Chenna Reddy. "CAMAC based 4-channel 12-bit digitizer." Journal of Physics: Conference Series 208 (February 1, 2010): 012022. http://dx.doi.org/10.1088/1742-6596/208/1/012022.

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Wells, S. C., G. J. Williamson, and S. E. Carrie. "Dithering for 12-bit true-color graphics." IEEE Computer Graphics and Applications 11, no. 5 (1991): 18–29. http://dx.doi.org/10.1109/38.90564.

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Maimunah, Siti, Amila Amila, Jon Kenedy Marpaung, Vierto Irennius Girsang, and Henny Syapitri. "KARAKTERISASI DAN SKRINING FITOKIMIA DARI TEPUNG BUAH BIT (Beta vulgaris L.)." FORTE JOURNAL 1, no. 2 (2021): 139–45. http://dx.doi.org/10.51771/fj.v1i2.141.

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Buah bit (Beta vulgaris L.) merupakan tanaman yang banyak mengandung senyawa betalain. sumber utama pewarna merah alami. Salah satu inovasi pemanfaatan buah bit yaitu pembuatan tepung bit. Tujuan penelitian ini adalah mengetahui karakterisasi dan skrining fitokimia umbi bit, serta mengetahui tingkat penerimaan umbi bit yang dijadikan tepung bit bagi para panelis. Penelitian ini merupakan eksperimental dengan menguji kandungan senyawa kimia melalui uji karakterisasi dan skrining fitokimia. Hasil penelitian menunjukkan bahwa tepung bit (Beta vulgaris L.) memiliki senyawa alkaloid, tanin, saponin
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Xin-ye, Ni, Gao Liugang, Fang Mingming, and Lin Tao. "Application of Metal Implant 16-Bit Imaging: New Technique in Radiotherapy." Technology in Cancer Research & Treatment 16, no. 2 (2016): 188–94. http://dx.doi.org/10.1177/1533034616649530.

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Objective: This study aimed to evaluate the computed tomography number and the variation of dose distribution based on 12-bit, 16-bit, and revised 16-bit images while the metal bars were inserted. Methods: The phantoms containing stainless steel, titanium alloy, and aluminum bar were scanned with computed tomography. These images were reconstructed with 12-bit and 16-bit imaging technologies. The “cupping artifacts” computed tomography value of the metal object revised by Matlab software was called the revised 16-bit image. The computed tomography values of these metal materials were analyzed.
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Dissertationen zum Thema "12-bit"

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Ricci, Luca. "Design of a 12-bit 200-MSps SAR Analog-to-Digital converter." Thesis, KTH, Skolan för elektroteknik och datavetenskap (EECS), 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-284559.

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The Successive Approximation (SAR) Analog-to-Digital converter is one of the most energy-efficient A/D converter. In this thesis, the development of a SAR ADC in a 28-nm CMOS technology based on charge redistribution is presented.The implemented SAR ADC uses a switching procedure based on a modified version of the mono- tonic switching algorithm to reduce the switching energy and area of the DAC. The DAC is a binary- weighted array of unit capacitors. A unit custom capacitor has been designed with a value of 0.8 fF to reduce the DAC energy consumption. Two comparators have been implemented, a
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Todorov, Borislav St. "Performance evaluation of 12 and 14-bit converter technology for software radio applications." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 2000. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape4/PQDD_0016/MQ57742.pdf.

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Todorov, Borislav St (Borislav Stefanov) Carleton University Dissertation Engineering Systems and Computer. "Performance evaluation of 12 and 14-bit converter technology for software radio applications." Ottawa, 2000.

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Nuytkens, Peter R. (Peter Read). "A 12-bit 500 MHz GaAs MESFET digital-to-analog converter with p+ ohmic contact isolation." Thesis, Massachusetts Institute of Technology, 1992. http://hdl.handle.net/1721.1/12760.

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Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1992.<br>Vita.<br>Includes bibliographical references (leaves 134-135).<br>by Peter R. Nuytkens.<br>M.S.
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Thomsson, Pontus, and Aghamiri Cyrus Seyed. "Design of a 16 GSps RF Sampling Resistive DAC with on-chip Voltage Regulator." Thesis, Linköpings universitet, Elektroniska Kretsar och System, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-177548.

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Wireless communication technologies continue to evolve to meet the demand for increased data throughput. To achieve higher data throughput one approach is to increase the bandwidth. One problem related to very large bandwidths is the implementation of digital-to-analog converters with sampling rates roughly in the 5 to 20 GHz range. Traditionally, current-steering data converters have been the go-to choice but their linearity suffers at higher frequencies. An alternative to the current-steering digital-to-analog converter is the voltage-mode digital-to-analog converter, which is an attractive
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Juo, Ru-Hung, and 卓儒宏. "12-bit Digital Transmitter for VDSL." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/qqzuha.

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碩士<br>國立臺北科技大學<br>電機工程系研究所<br>99<br>This thesis describes the chip implementation of a 200 MHz CMOS digital transmitter based on VDSL system specification. which is composed of a 12-bit, 200 MHz digital to analog converter, and a fully differential current-mode line driver. The digital transmitter had been fabricated with the TSMC 0.18 μm 1P6M CMOS technology. For high-speed application, the digital to analog converter adopts the switch-current mode architecture. This is a 12-bit digital-to-analog converter (DAC) is implemented with M-bit segmented, which is implemented with 3-bit binary and 9
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Sheng-YangWeng and 翁聖洋. "A 14-Bit 2GS/s and 12-Bit 4GS/s Reconfigurable DAC with Triple Modes." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/33707004393574784529.

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碩士<br>國立成功大學<br>電機工程學系<br>102<br>In this thesis, a triple-mode 14-bit 2GS/s or 12-bit 4GS/s reconfigurable current-steering digital-to-analog converter (DAC) is presented. For different DAC applications, triple mode is proposed, which means over-sampling mode, Nyquist mode, and over-Nyquist mode. The target of this work is that using a single DAC chip to fulfill all of the applications and with better performances than any state-of-the-art work. For this target, many techniques are proposed to improve the performances. In current-steering DAC design, current source mismatch is a main problem.
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Lin, Chi-shen, and 林綮紳. "A 12-bit Power Saving DAC with Clock Controller." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/7f3sus.

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碩士<br>國立中山大學<br>資訊工程學系研究所<br>102<br>In this thesis, A 12-bit 1GS/s DAC for wireless communications is proposed. In order to achieve the high performance requirements, the current-steering architecture is the most suitable and widely used in the present design. The segmented current steering architecture that comprises 8MSB’s thermometer code and 4LSB’s binary-weighted is used. In this design, a new technique of the column clock controller (CCC) is proposed to improve the DAC performance. The Column clock controller (CCC) is able to reduce the clock feed-through effect for DAC and reduce power
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Hsiao, Ming-Kai, and 蕭名開. "12-Bit low power SAR-ADC for ECG application." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/05793753502319870096.

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碩士<br>淡江大學<br>電機工程學系碩士在職專班<br>99<br>With the constant improvement on highly advanced technology nowadays, under the development of the microcomputer system, Very Large Scale Integrated circuit (VLSI) and Digital Signal Processing (DSP) influence, Analog to Digital Converter (ADC) has become a widely used application. The request for ADC specification will therefore be strict, as a result, more research will be conducted aggressively in the industrial and academic field. In order for ADC application become extensively used and correspond to the requirement of the present electronic products, fo
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LAI, CHENG-QIAN, and 賴承謙. "Ultra Low Power 12-Bit Analog-to-Digital Converter." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/yvz8sn.

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Bücher zum Thema "12-bit"

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Réunion du BIT/PECTA des planificateurs africains de l'emploi (1988 Kinshasa, Zaire). Le Défi de la planification de l'emploi en Afrique: Rapport de la réunion du BIT/PECTA des planificateurs africains de l'emploi, Kinshasa, Zaïre, 12-15 décembre 1988. Programme des emplois et des compétences techniques pour l'Afrique, 1990.

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Akan, Tarık. Anne Kafamda Bit Var: 12 Eylül Anıları. Can Yayınları, 2016.

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Publishing, Engy. Wee Bit Wicked: Blank Sheet Music - 12 Staves. Independently Published, 2019.

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MEDICINE KNIFE, THE (The Spanish Bit Saga, No 12). Domain, 1989.

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Boles, Melanie. DsPIC33/PIC24 FRM, High-Speed, 12-Bit a/d Converter. Microchip Technology Incorporated, 2014.

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Lee, Jade. PIC32 FRM Section 18. 12-Bit Pipelined Analog-Digital Converter. Microchip Technology Incorporated, 2014.

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Wecker, Dieter. Prozessorentwurf Mit VHDL: Modellierung und Synthese Eines 12-Bit-Mikroprozessors. de Gruyter GmbH, Walter, 2018.

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Pierce, Linda. Using 12-Bit ADC for Conversions, Accumulation, and Triggering Events. Microchip Technology Incorporated, 2020.

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Lee, Jade. 12-Bit High-Speed, Multiple SARs a/d Converter (ADC). Microchip Technology Incorporated, 2015.

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Jiang, Linda. 12-Bit High-Speed, Multiple SARs a/d Converter (ADC). Microchip Technology Incorporated, 2017.

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Buchteile zum Thema "12-bit"

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Rout, Shasanka Sekhar, Swagat Kumar Samantaray, and Rajesh Kumar Patjoshi. "A Comparative Implementation of 12-Bit and 14-Bit Heterogeneous Adders." In Lecture Notes in Networks and Systems. Springer Nature Switzerland, 2025. https://doi.org/10.1007/978-3-031-78928-1_7.

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Mulder, Jan, Davide Vecchi, Frank M. L. van der Goes, et al. "A 12-bit 800 MS/s Dual-Residue Pipeline ADC." In Nyquist AD Converters, Sensor Interfaces, and Robustness. Springer New York, 2012. http://dx.doi.org/10.1007/978-1-4614-4587-6_2.

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Prabhavathi, P., N. B. Mahesha, and Subodhkumar Panda. "Design of 12-Bit Cyclic Vernier Ring Time-to-Digital Converter." In Lecture Notes in Electrical Engineering. Springer India, 2013. http://dx.doi.org/10.1007/978-81-322-1524-0_18.

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Vorenkamp, Pieter, and Raf Roovers. "A 12 bit, 50 MSample/s Cascaded Folding & Interpolating ADC." In Analog Circuit Design. Springer US, 1997. http://dx.doi.org/10.1007/978-1-4757-2602-2_5.

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Kumar, Abhishek, Santosh Kumar Gupta, and Vijaya Bhadauria. "A Low Power Approach for Designing 12-Bit Current Steering DAC." In Lecture Notes in Electrical Engineering. Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-6840-4_49.

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Vinay, B. K., S. Pushpa Mala, S. Deekshitha, and M. P. Sunil. "A Design of 12-Bit Low-Power Pipelined ADC Using TIQ Technique." In Intelligent Computing and Communication. Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-1084-7_58.

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Iimori, Daisuke, Takayuki Nakatani, Shogo Katayama, et al. "12 bit 1 ps Resolution Time-to-Digital Converter for LSI Test System." In Proceedings of Eighth International Congress on Information and Communication Technology. Springer Nature Singapore, 2023. http://dx.doi.org/10.1007/978-981-99-3243-6_18.

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Kumar, Abhishek, Abhishek Sahu, Anurag Dwivedi, and Shree Prakash Tiwari. "12-Bit SAR ADC Design in SCL 180 nm for Sensor Interface Applications." In Lecture Notes in Electrical Engineering. Springer Nature Singapore, 2023. http://dx.doi.org/10.1007/978-981-99-4495-8_18.

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Vasudeva, G., and B. V. Uma. "Two-Stage Folded Resistive String 12-Bit Digital to Analog Converter Using 22-nm FINFET." In Sustainable Communication Networks and Application. Springer Singapore, 2022. http://dx.doi.org/10.1007/978-981-16-6605-6_8.

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Gustafson, John L. "Linear Solvers that Suck Less." In Every Bit Counts. Chapman and Hall/CRC, 2025. https://doi.org/10.1201/9781003466024-12.

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Konferenzberichte zum Thema "12-bit"

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Zou, Zheng, and Xiaolong Li. "A 12-Bit 10-MS/s SAR ADC with 3-Bit Redundancy Capacitors." In 2025 5th International Conference on Sensors and Information Technology (ICSI). IEEE, 2025. https://doi.org/10.1109/icsi64877.2025.11009331.

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Duan, Yuchan, Hui Xu, Jia Yu, Chao Cao, and Haijun Guo. "Research of Key Technologies for 12-bit SAR ADC." In 2024 9th International Conference on Integrated Circuits and Microsystems (ICICM). IEEE, 2024. https://doi.org/10.1109/icicm63644.2024.10814306.

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Turunen, Vesa, Tero Nieminen, Marko Kosunen, and Kari Halonen. "12-bit 2.4 GHz D/A upconverter." In 2007 European Conference on Circuit Theory and Design (ECCTD 2007). IEEE, 2007. http://dx.doi.org/10.1109/ecctd.2007.4529578.

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Weidong Yang, Ruzhang Li, Yong Liu, Yonghui Yang, and Kaicheng Li. "Investigation into the 12-bit DA converter." In 2007 7th International Conference on ASIC. IEEE, 2007. http://dx.doi.org/10.1109/icasic.2007.4415718.

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OLCAY, ECE, LIDA KOUHALVANDI, and SERCAN AYGUN. "1 5 Bit Stage 12 Bit Pipeline ADC Design with Foreground Calibration." In Sixth International Conference on Advances in Computing, Electronics and Communication - ACEC 2017. Institute of Research Engineers and Doctors, 2017. http://dx.doi.org/10.15224/978-1-63248-138-2-16.

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Tang, Honghui, Haibin Wang, Zhijian Hui, et al. "A Radiation-Hardened 12-bit SAR ADC Design." In 2018 7th International Conference on Reliability, Infocom Technologies and Optimization (Trends and Future Directions) (ICRITO). IEEE, 2018. http://dx.doi.org/10.1109/icrito.2018.8748621.

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Takayama, Ogami, Jun Honjo, and Hirose. "12 Bit/25.6M sps Subranging A/D Converter." In Conference on Precision Electromagnetic Measurements. IEEE, 1988. http://dx.doi.org/10.1109/cpem.1988.671299.

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Gueddah, N., K. Abbes, and M. Masmoudi. "Design of a low power 12-bit ADC." In Technology of Integrated Systems in Nanoscale Era (DTIS). IEEE, 2010. http://dx.doi.org/10.1109/dtis.2010.5487576.

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Xingfa Huang, Jiabin Zhang, Ruzhang Li, et al. "A poly-resistor 12-bit D/A converter." In 2008 9th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT). IEEE, 2008. http://dx.doi.org/10.1109/icsict.2008.4734956.

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Can Peng, Shuang Cui, Chao Wang, Xiao-Tian Yang, and Yu-Chun Chang. "A 12-bit cyclic ADC for image sensor." In 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT). IEEE, 2016. http://dx.doi.org/10.1109/icsict.2016.7999025.

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Berichte der Organisationen zum Thema "12-bit"

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Karnitski, Anton, Christopher Gill, Aliaksandr Zhankevich, and Dalius Baranauskas. 12-bit 32 Channel 500MSps Low Latency ADC. Office of Scientific and Technical Information (OSTI), 2017. http://dx.doi.org/10.2172/1413257.

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Kobayashi, K., A. Ogawa, S. Casner, and C. Bormann. RTP Payload Format for 12-bit DAT Audio and 20- and 24-bit Linear Sampled Audio. RFC Editor, 2002. http://dx.doi.org/10.17487/rfc3190.

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Swanson, De Los Santos, and Miller. L51539 Improved Methods for Inspecting Gas Storage Well Downhole Casing. Pipeline Research Council International, Inc. (PRCI), 1987. http://dx.doi.org/10.55274/r0010090.

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A considerable background of prior work indicates that corrosion damaged casing in gas storage wells is largely due to the development of individual corrosion pits, which occur either on the inside or outside wall of the casing. Such pits are inevitably the result of electrochemical potentials, which are established between unlike conductive materials in an electrolyte. Damage is the result of localized loss of metal, which can be assessed in terms of the size of these individual corrosion flaws. Magnetic corrosion logging has been available for at least 25 years, but has not received wide acc
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Carls, Paul. Right-wing Populism in Luxembourg During the 2024 EP Election. European Center for Populism Studies (ECPS), 2024. http://dx.doi.org/10.55271/rp0078.

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Right-wing populism in Luxembourg is largely confined to the Alternative Democratic Reform Party (Alternativ Demokratesch Reformpartei, ADR). The name is, however, a bit of a misnomer. While ideologically, the ADR maintains national–conservative positions consistent with other European right-wing populist parties, its views are not as extreme. The party retains relatively constant support, consistently gaining around 10% of the vote in national elections; in the 2023 election for the Chamber of Deputies, it gained 9.3%, while in the 2019 European Parliament election, the party gained 10%, just
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