Literatura académica sobre el tema "Electronic circuits development"

This dissertation focuses on the development of integrated circuits that employ InAs quantum well electronic devices. There are two InAs quantum well electronic devices studied in this work, the first being the pseudomorphic InAs/In₀.₅₃Ga₀.₄₇As/AlAs resonant tunneling diode (RTD) grown on an InP substrate, and the second being the InAs/AlSb HEMT. Because of there is no semi-insulating substrate near the InAs lattice constant of 6.06 Å this work develops monolithic and hybrid integration methods to realize integrated circuits. For the case of hybrid RTD circuits, a thin-film integration method was developed to integrate InAs/In₀.₅₃Ga₀.₄₇As/AlAs RTDs to prefabricated CMOS circuits, and this technique was employed to demonstrate a novel RTD-CMOS comparator. To achieve higher speed circuit operation, a next-generation RTD fabrication process was developed to minimize the parasitic capacitance associated with the thin-film hybridization process. This improved fabrication process is detailed and yield and uniformity analysis is included. Similar InP-based tunnel diodes can be integrated with InP-based HEMTs in monolithic RTD-HEMT integrated circuits, and in this work elementary microwave circuit components were characterized that co-integrate InP-based tunnel diodes with HEMTs. In the case of the InAs/AlSb HEMT, the monolithic approach grows the HEMT on a metamorphic buffer on a GaAs substrate. The semiconductor material and process development of the InAs/AlSb HEMT MMIC technology is described. The remarkable microwave and RF noise properties of the InAs/AlSb HEMT were characterized and analyzed, with special attention given to the strong effects of impact ionization in the narrow bandgap InAs channel. Results showed the extent to which impact ionization affects the small-signal gain and noise figure of the HEMT, and that these effects become less prevalent as the frequency of operation increases.

Thesis (M.S.)--Missouri University of Science and Technology, 2008.<br>Vita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed May 5, 2008) Includes bibliographical references (p. 21-22).

Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2003.<br>Includes bibliographical references (leaves 70-72). Also available in electronic version. Access restricted to campus users.

Thesis (Masters Diploma (Electrical Engineering)--Cape Technikon, Cape Town, 1988<br>The subject of this thesis is the development of ahighly ruggedised, reliable electronic circuit. The circuit is to be used for the initiation of fuze heads and to charge a capacitor for later use in apyrotechnic chain. This circuit and its associated packaging will be called the firing unit. The thesis can be broadly divided into the following facets. I. The definition study, which defines what is needed and proposed means of achieving the customer requirements. 11. The design of the electronic circuitry in the system. Ii!. The design of the packaging containing the electronics. Iv. Adaptation of environmental testing, to verify system design. V. Implementation of environmental testing. Vi. Reliability analysis. Vii. Failure analysis and the determination of the effect of the supposed failure. Actions vto vii were used as inputs to improve 11 and ill, so achieving optimum performance and safety. The whole system was designed with the overriding objective of reliability and safety of personnel and equipment.

L’objectif de cette thèse était de démontrer les potentialités du procédé technologique d’impression jet d’encre pour la fabrication de circuits numériques à base de matériaux organiques. Une première étape sur le développement d’une structure de transistor couches minces organiques (OTFTs) fabriquée par impression jet d’encre a permis d’appréhender les mécanismes d’intéraction entre les différents matériaux déposés en solution. A partir de cette étude, la structure a pu être optimisée afin d’obtenir des performances électriques uniformes et reproductibles. Les transistors en couches minces organiques ont ensuite été modélisés électriquement à l’aide d’un modèle simple (Aim-Extract, Aim-Spice). La comparaison entre caractérisations et simulations électriques ont démontré la possibilité de prédire le comportement électrique de la structure OTFT imprimée.A partir de ce modèle, des portes logiques élémentaires ont été simulées puis fabriquées par la technologie d’impression jet d’encre. Les limitations en termes de temps de réponse des circuits et de tensions d’alimentation ont ainsi pu être déterminés. Finalement, des circuits électroniques combinatoires et séquentiels plus complexes, tel que des multiplexeurs et des bascules de type D, ont été fabriqués et caractérisés. La démarche employée au cours de cette étude, à savoir, l’optimisation de la structure OTFT, la modélisation électrique et la fabrication d’un circuit électronique complet a démontré les potentialités de l’impression jet d’encre pour la réalisation d’électronique bas-coût, grande surface, entièrement additive et potentiellement flexible<br>The main objective of this study was to demonstrate the capability of inkjet printing technology to fabricate organic based digital circuits. At first, development of an Organic Thin Film Transistor structure (OTFTs) fabricated with inkjet printing technology has highlighted interaction mechanisms between materials deposited with a fully solution process. From this study, the structure has been optimized to obtain uniform and reproducible electrical performance. The organic Thin Film Transistors were then electrically modeled using a simple model (Aim-Extract, Aim-Spice). The comparison between electrical characterizations and simulations has demonstrated the possibility to predict electrical behavior of printed OTFT. From this model, elementary logic gates were simulated and then fabricated by inkjet printing technology. Time response and supply voltage of such circuit has been determined. Finally, more complex combinational and sequential electronic circuits, such as multiplexers and D-latch, were fabricated and characterized. The Experimental protocol used in this study dealing with: i) OTFT electrical optimization, ii) electrical modeling and iii) electronic circuit fabrication has demonstrated the ability of inkjet printing to reach low-cost, large area, fully additive and potentially flexible electronics