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Bibliografías temáticas / Linear integrated circuits Operational amplifiers

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Literatura académica sobre el tema "Linear integrated circuits Operational amplifiers"

Autor: Grafiati

Publicado: 4 de junio de 2021

Última modificación: 2 de febrero de 2022

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Artículos de revistas sobre el tema "Linear integrated circuits Operational amplifiers"

1

Jain, L. C. "Book Review: Operational Amplifiers and Linear Integrated Circuits:". International Journal of Electrical Engineering & Education 29, n.º 2 (abril de 1992): 162. http://dx.doi.org/10.1177/002072099202900212.

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Jantos, P., D. Grzechca y J. Rutkowski. "Evolutionary algorithms for global parametric fault diagnosis in analogue integrated circuits". Bulletin of the Polish Academy of Sciences: Technical Sciences 60, n.º 1 (1 de marzo de 2012): 133–42. http://dx.doi.org/10.2478/v10175-012-0019-4.

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Evolutionary algorithms for global parametric fault diagnosis in analogue integrated circuitsAn evolutionary method for analogue integrated circuits diagnosis is presented in this paper. The method allows for global parametric faults localization at the prototype stage of life of an analogue integrated circuit. The presented method is based on the circuit under test response base and the advanced features classification. A classifier is built with the use of evolutionary algorithms, such as differential evolution and gene expression programming. As the proposed diagnosis method might be applied at the production phase there is a method for shortening the diagnosis time suggested. An evolutionary approach has been verified with the use of several exemplary circuits - an oscillator, a band-pass filter and two operational amplifiers. A comparison of the presented algorithm and two classical methods - the linear classifier and the nearest neighborhood method - proves that the heuristic approach allows for acquiring significantly better results.

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3

Ma, Cai Hong y Hai Bo Ge. "Design and Implementation of the Chaotic Circuit Based on Integrated Operational Amplifiers". Applied Mechanics and Materials 333-335 (julio de 2013): 729–33. http://dx.doi.org/10.4028/www.scientific.net/amm.333-335.729.

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The principles and methods of chaos generation are researched using piecewise linear circuit theory. The chaos generation circuit based on integrated operational amplifiers is designed to realize chaos. Simulation results of the circuit are got using Multisim software. It indicates that using this method, the relationships and laws between chaos and various circuit element parameters can be better found out.

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4

Zhang, Xiao Feng, Fo Chang Xie, Guo Wei Yang y Wei Zhang. "The Transceiver Circuit Design of Digital Ultrasonic System". Advanced Materials Research 834-836 (octubre de 2013): 968–73. http://dx.doi.org/10.4028/www.scientific.net/amr.834-836.968.

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This paper introduces the design process of the digital ultrasonic transmission circuit: echo receiving circuit and the echo signal regulate circuit. Among them, outside 500 V DC - DC module for high voltage power input, use non-tuned type circuit design ultrasonic transmission circuit ; Select high voltage fast recovery diode FR107 design echo receiving limiter circuit; Using ultra-high speed, low noise, low distortion of the integrated operational amplifier MAX4104ESA design preamplifier circuits and the band-pass filter circuits; Using linear decibels, low noise, wide bandwidth, high gain accuracy amplifier AD603 design echo amplifying circuit. The experimental results indicate that the basic realization of the ultrasonic transceiver circuit and echo signal conditioning functions.

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Cardoso, Guilherme S., Tiago R. Balen, Marcelo S. Lubaszewski y Odair L. Gonçalez. "Reliability Analysis of 0.5μm CMOS Operational Amplifiers under TID Effects". Journal of Integrated Circuits and Systems 9, n.º 1 (28 de diciembre de 2014): 70–79. http://dx.doi.org/10.29292/jics.v9i1.390.

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Analog integrated circuits operating in radiation environments. In previous irradiation experiments performed on a switched-capacitor filter, implemented in a programmable analog array, it was observed a sudden recovery of the device performance during the irradiation, while increasing the accumulated dose. In some cases the considered performance parameters (such as the total harmonic distortion) may even be enhanced if compared to the pre-irradiation measurements, in specific accumulated dose intervals. This behavior is associated to partial inactivity windows in the internal components of the device. Spice simulations considering two complementary architectures of a simple CMOS Operational Amplifier (OpAmp) are performed, aiming to understand the origins of this effect. Results indicate that shifts on the operating point of the amplifier building blocks are responsible for the degradation and recovery of the OpAmp performance. Results also show that specific architectures, as well as, application constraints (such as the external feedback and the input signal amplitude and frequency) may result in different robustness levels related to the linear applications of the OpAmps in radiation environments.

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6

Benko, Pedro Luiz, Milene Galeti, Cleiton Fidelix Pereira, Julio Cesar Lucchi y Renato Camargo Giacomini. "Bio-Amplifier based on MOS bipolar Pseudo-Resistors: A New Approach using its non-linear characteristic". Journal of Integrated Circuits and Systems 11, n.º 2 (28 de diciembre de 2016): 132–39. http://dx.doi.org/10.29292/jics.v11i2.437.

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This paper proposes a new and refined bio-amplifier design, which associates DC offset cancellation, adequate frequency response and buffered outputs to a significant reduction of the signal recovery time. A MOS-Bipolar pseudo-resistor integrated to the feedback network of a single-stage Operational Transconductance Amplifier and the source-follower buffers give to the new topology its main advantages. This architecture makes use of the high resistance values of these pseudo-resistors to eliminate the offset DC level input preserving the low cut-off frequency, without the need of high capacitances, thereby significantly reducing the active die area, which enables its use as a front-end pre-amplifier assembled directly on the acquisition probes. The recovery time after an input voltage transitory of high-amplitude is an important characteristic of the bio-potential amplifiers due to their very low cut-off frequency. The proposed bio-amplifier utilizes the non-linear characteristics of the pseudo-resistor in the recovery time reduction. This time was evaluated and the topology presented a significant contribution in this aspect, assuming values 90% lower when compared with the same topology using a constant resistance. The new amplifier allows voltage gain of 30dB from 0.6 Hz to 2 kHz, and Total Harmonic Distortion (THD) of 0.19% for an input signal of 10Hz. This work also provides a behavioral spice model for MOS-Bipolar pseudo-resistor, which allows an accurate simulation of the linear and nonlinear pseudo-resistor characteristics, obtained through an experimental method of indirect characterization. This method is based on the transitory response from a first order RC low pass filter. The experimental characterization method is of fundamental importance, due to the absence of appropriate SPICE models that describe with precision the pseudo-resistance behavior. The circuits were manufactured by MOSIS on 8HP SiGe BiCmos Global Foundries 0.13μm technology.

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7

Carbajal-Gomez, Victor, Esteban Tlelo-Cuautle, Carlos Sanchez-Lopez y Francisco Fernandez-Fernandez. "PVT-Robust CMOS Programmable Chaotic Oscillator: Synchronization of Two 7-Scroll Attractors". Electronics 7, n.º 10 (16 de octubre de 2018): 252. http://dx.doi.org/10.3390/electronics7100252.

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Designing chaotic oscillators using complementary metal-oxide-semiconductor (CMOS) integrated circuit technology for generating multi-scroll attractors has been a challenge. That way, we introduce a current-mode piecewise-linear (PWL) function based on CMOS cells that allow programmable generation of 2–7-scroll chaotic attractors. The mathematical model of the chaotic oscillator designed herein has four coefficients and a PWL function, which can be varied to provide a high value of the maximum Lyapunov exponent. The coefficients are implemented electronically by designing operational transconductance amplifiers that allow programmability of their transconductances. Design simulations of the chaotic oscillator are provided for the 0.35 μ m CMOS technology. Post-layout and process–voltage–temperature (PVT) variation simulations demonstrate robustness of the multi-scroll chaotic attractors. Finally, we highlight the synchronization of two seven-scroll attractors in a master–slave topology by generalized Hamiltonian forms and observer approach. Simulation results show that the synchronized CMOS chaotic oscillators are robust to PVT variations and are suitable for chaotic secure communication applications.

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8

Briem, Jochen, Marco Mader, Daniel Reiter, Raul Amirpour, Markus Grözing y Manfred Berroth. "Fully integrated high quality factor <i>G</i><sub>m</sub><i>C</i> bandpass filter stage with highly linear operational transconductance amplifier". Advances in Radio Science 15 (21 de septiembre de 2017): 149–55. http://dx.doi.org/10.5194/ars-15-149-2017.

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Abstract. This paper presents an electrical, fully integrated, high quality (Q) factor GmC bandpass filter (BPF) stage for a wireless 27 MHz direct conversion receiver for a bendable sensor system-in-foil (Briem et al., 2016). The core of the BPF with a Q factor of more than 200 is an operational transconductance amplifier (OTA) with a high linearity at an input range of up to 300 mVpp, diff. The OTA's signal-to-noise-and-distortion-ratio (SNDR) of more than 80 dB in the mentioned range is achieved by stabilizing its transconductance Gm with a respective feedback loop and a source degeneration resistors RDG. The filter stage can be tuned and is tolerant to global and local process variations due to offset and common-mode feedback (CMFB) control circuits. The results are determined by periodic steady state (PSS) simulations at more than 200 global and local process variation parameter and temperature points and corner simulations. It is expected, that the parasitic elements of the layout have no significant influence on the filter behaviour. The current consumption of the whole filter stage is less than 600 µA.

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9

Stum, Zachary, Vinayak Tilak, Peter A. Losee, Emad A. Andarawis y Cheng Po Chen. "300°C Silicon Carbide Integrated Circuits". Materials Science Forum 679-680 (marzo de 2011): 730–33. http://dx.doi.org/10.4028/www.scientific.net/msf.679-680.730.

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MOSFET-based integrated circuits were fabricated on silicon carbide (SiC) substrates. SiC devices can operate at much higher temperatures than current semiconductor devices. Simple circuit components including operational amplifiers and common source amplifiers were fabricated and tested at room temperature and at 300°C. The common source amplifier displayed gain of 7.6 at room temperature and 6.8 at 300°C. The operational amplifier was tested for small signal open loop gain at 1kHz, measuring 60 dB at room temperature and 57 dB at 300°C. Stability testing was also performed at 300°C, showing very little drift at over 100 hours for the individual MOSFETs and the common source amplifier.

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10

Shaw, Brian M. "Book Review: Operational Amplifiers — Integrated and Hybrid Circuits: GEORGE B. RUTKOWSKI". International Journal of Electrical Engineering & Education 32, n.º 2 (abril de 1995): 191–92. http://dx.doi.org/10.1177/002072099503200221.

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Tesis sobre el tema "Linear integrated circuits Operational amplifiers"

1

Murty, Anjali. "Highly linear, rail-to-rail ICMR, low voltage CMOS operational amplifer". Thesis, Georgia Institute of Technology, 1998. http://hdl.handle.net/1853/14884.

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Wu, Pan. "The Design of High-Frequency Continuous-Time Integrated Analog Signal Processing Circuits". PDXScholar, 1993. https://pdxscholar.library.pdx.edu/open_access_etds/1162.

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High-performance, high-frequency operational transconductance amplifiers (OTAs) are very important elements in the design of high-frequency continuous-time integrated analog signal processing circuits, because resistors, inductors, integrators, mutators, buffers, multipliers, and filters can be built by OTAs and capacitors. The critical considerations for OTA design are linearity, tuning, frequency response, output impedance, power supply rejection (PSR) and common-mode rejection (CMR). For linearity considerations, two different methods are proposed. One uses cross-coupled pairs (CMOS or NMOS), producing OTAs with very high linearity but either the input range is relatively small or the CMR to asymmetrical inputs is poor. Another employs multiple differential pairs (current addition or subtraction), producing OTAs with high linearity over a very large input range. So, there are tradeoffs among the critical considerations. For different applications, different OTAs should be selected. For consideration of frequency response, the first reported GaAs OTA was designed for achieving very-high-frequency performance, instead of using AC compensation techniques. GaAs is one of the fastest available technologies, but it was new and less mature than silicon when we started the design in 1989. So, there were several issues, such as low output impedance, no P-channel devices, and Schottky clamp. To overcome these problems, new techniques are proposed, and the designed OTA has comparable performance to a CMOS OTA. For PSR and CMR considerations, a fully balanced circuit structure is employed with a common-mode feedback (CMF) circuit used to stabilize the DC output voltages. To reduce the interaction of the operation of CMF and tuning of OTAs, three improved versions of the CMF circuits used in operational amplifiers are proposed. With the designed OTAs, a I GHz GaAs inductor with small parasitics is designed using the proposed procedure to reduce high-frequency effects. Two CMOS high-order, high-frequency filters are designed: one in cascade structure and one in LC ladder form. Also, a 200 MHz third-order elliptic GaAs filter is designed with special consideration of very-high-frequency parasitics. All circuits were fabricated and measured. The experimental results were used to verify the designs.

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Sengupta, Susanta. "Technology-independent CMOS op amp in minimum channel length". Diss., Available online, Georgia Institute of Technology, 2004:, 2004. http://etd.gatech.edu/theses/available/etd-07092004-101204/unrestricted/sengupta%5Fsusanta%5F200407%5Fphd.pdf.

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Thesis (Ph. D.)--School of Electrical and Computer Engineering, Georgia Institute of Technology, 2005. Directed by Phillip Allen.
Morley, Thomas, Committee Member ; Leach, Marshall, Committee Member ; Ayazi, Farrokh, Committee Member ; Rincon-Mora, Gabriel, Committee Member ; Allen, Phillip, Committee Chair. Includes bibliographical references.

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4

Barclay, Duncan McL. "A design study for gallium arsenide operational transconductance amplifiers". Thesis, University of York, 1996. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.338625.

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Vora, Ashish. "A 90 dB, 85 MHz operational transconductance amplifier (OTA) using gain boosting technique /". Link to online version, 2005. https://ritdml.rit.edu/dspace/handle/1850/1319.

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Chan, kwong Fu. "Large-signal characterization/modeling and linearization techniques for RF power amplifiers /". View abstract or full-text, 2004. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202004%20CHANK.

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Loikkanen, M. (Mikko). "Design and compensation of high performance class AB amplifiers". Doctoral thesis, University of Oulu, 2010. http://urn.fi/urn:isbn:9789514261770.

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Abstract Class A and class AB operational amplifiers are an essential part of a mixed- signal chip, where they are used as active filter sub-blocks, compensators, reference current generators and voltage buffers, to name just a few of many applications. For analog circuits such as operational amplifiers a mixed-signal chip is a very unfriendly operating environment, where the power supply is often corrupted by high current switching circuits. In addition, power supply voltages for analog blocks are shrinking, because of the deployment of new battery technologies and fine line length integrated circuit processes, which can reduce the amplifier dynamic range a problem requiring supply insensitive low voltage compatible amplifier topologies and other analog blocks. The aims of this thesis were to further develop the low voltage compatible class AB amplifier topologies published earlier by other authors, to improve their bandwidth efficiency by means of re-examining two- and three-stage amplifier compensation techniques and to find solutions for enhancing the high frequency power supply noise rejection performance of class A and class AB amplifiers without degrading their signal path stability. The class AB amplifier cores presented here improve the amplifier’s power supply noise insensitivity at high frequencies and increase bandwidth efficiency when compared to the commonly used two-stage Miller compensated amplifier, enabling the construction of better buffers and more power-efficient and reliable low voltage mixed signal chips.

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8

Ko, Yus. "Design and optimization of 5GHz CMOS power amplifiers with the differential load-pull techniques". [Gainesville, Fla.] : University of Florida, 2005. http://purl.fcla.edu/fcla/etd/UFE0013036.

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Wong, Wai Yu. "Supply-independent current-mode slew rate enhancement design /". View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202006%20WONG.

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Srirattana, Nuttapong. "High-Efficiency Linear RF Power Amplifiers Development". Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/6899.

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Next generation mobile communication systems require the use of linear RF power amplifier for higher data transmission rates. However, linear RF power amplifiers are inherently inefficient and usually require additional circuits or further system adjustments for better efficiency. This dissertation focuses on the development of new efficiency enhancement schemes for linear RF power amplifiers. The multistage Doherty amplifier technique is proposed to improve the performance of linear RF power amplifiers operated in a low power level. This technique advances the original Doherty amplifier scheme by improving the efficiency at much lower power level. The proposed technique is supported by a new approach in device periphery calculation to reduce AM/AM distortion and a further improvement of linearity by the bias adaptation concept. The device periphery adjustment technique for efficiency enhancement of power amplifier integrated circuits is also proposed in this work. The concept is clearly explained together with its implementation on CMOS and SiGe RF power amplifier designs. Furthermore, linearity improvement technique using the cancellation of nonlinear terms is proposed for the CMOS power amplifier in combination with the efficiency enhancement technique. In addition to the efficiency enhancement of power amplifiers, a scalable large-signal MOSFET model using the modified BSIM3v3 approach is proposed. A new scalable substrate network model is developed to enhance the accuracy of the BSIM3v3 model in RF and microwave applications. The proposed model simplifies the modeling of substrate coupling effects in MOS transistor and provides great accuracy in both small-signal and large-signal performances.

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Libros sobre el tema "Linear integrated circuits Operational amplifiers"

1

Coughlin, Robert F. Operational amplifiers & linear integrated circuits. 5^a ed. Upper Saddle River, N.J: Prentice Hall, 1998.

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Coughlin, Robert F. Operational amplifiers & linear integrated circuits. 5^a ed. Upper Saddle River, N.J: Prentice Hall, 1998.

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Coughlin, Robert F. Operational amplifiers and linear integrated circuits. 4^a ed. Englewood Cliffs, N.J: Prentice Hall, 1991.

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Coughlin, Robert F. Operational amplifiers and linear integrated circuits. 3^a ed. Englewood Cliffs, N.J: Prentice-Hall, 1987.

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Coughlin, Robert F. Operational amplifiers and linear integrated circuits. 4^a ed. Hemel Hempstead: Prentice-Hall, 1991.

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Coughlin, Robert F. Operational amplifiers and linear integrated circuits. 3^a ed. London: Prentice-Hall International, 1987.

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7

Stanley, William D. Operational amplifiers with linear integrated circuits. 2^a ed. Columbus: Merrill Pub. Co, 1989.

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8

Operational amplifiers with linear integrated circuits. 3^a ed. New York: Merrill, 1994.

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9

Boyce, Jefferson C. Operational amplifiers and linear integrated circuits. 2^a ed. Boston: PWS-Kent Pub. Co., 1988.

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10

David, Buchla, ed. Basic operational amplifiers and linear integrated circuits. 2^a ed. Upper Saddle River, N.J: Prentice Hall, 1999.

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Capítulos de libros sobre el tema "Linear integrated circuits Operational amplifiers"

1

Greeneich, Edwin W. "Operational Amplifiers". En Analog Integrated Circuits, 157–202. Boston, MA: Springer US, 1997. http://dx.doi.org/10.1007/978-1-4615-6033-3_3.

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Selvam, K. C. "Pin Details of Integrated Circuits (ICs)". En Design of Analog Multipliers With Operational Amplifiers, 155–57. Boca Raton : Taylor & Francis, a CRC title, part of the Taylor & Francis imprint, a member of the Taylor & Francis Group, the academic division of T&F Informa, plc, 2020.: CRC Press, 2019. http://dx.doi.org/10.1201/9780429277450-11.

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Eschauzier, Rudy G. H. y Johan H. Huijsing. "Basic Frequency Compensation of Integrated Circuits". En Frequency Compensation Techniques for Low-Power Operational Amplifiers, 57–94. Boston, MA: Springer US, 1995. http://dx.doi.org/10.1007/978-1-4757-2375-5_4.

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Wu, Rong, Johan H. Huijsing y Kofi A. A. Makinwa. "Dynamic Offset Cancellation Techniques for Operational Amplifiers". En Precision Instrumentation Amplifiers and Read-Out Integrated Circuits, 21–49. New York, NY: Springer New York, 2012. http://dx.doi.org/10.1007/978-1-4614-3731-4_2.

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Renirie, W. C. M., K. J. Langen y J. H. Huijsing. "Parallel Feedforward Class-AB Control Circuits for Low-Voltage Bipolar Rail-to-Rail Output Stages of Operational Amplifiers". En Low-Voltage Low-Power Analog Integrated Circuits, 37–48. Boston, MA: Springer US, 1995. http://dx.doi.org/10.1007/978-1-4615-2283-6_4.

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"High Performance CMOS Operational Amplifiers and Operational Transconductance Amplifiers". En Signal Processing and Integrated Circuits, 337–55. Chichester, UK: John Wiley & Sons, Ltd, 2012. http://dx.doi.org/10.1002/9781119942306.ch13.

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"Two-Stage CMOS Operational Amplifiers". En Signal Processing and Integrated Circuits, 311–35. Chichester, UK: John Wiley & Sons, Ltd, 2012. http://dx.doi.org/10.1002/9781119942306.ch12.

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"LowVoltage CMOS Operational Amplifiers". En Low-Voltage/Low-Power Integrated Circuits and Systems. IEEE, 2009. http://dx.doi.org/10.1109/9780470545065.ch8.

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"Macromodeling of Integrated Circuit Operational Amplifiers". En Computer-Aided Design of Analog Integrated Circuits and Systems. IEEE, 2009. http://dx.doi.org/10.1109/9780470544310.ch42.

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"OPASYN: A Compliler for CMOS Operational Amplifiers". En Computer-Aided Design of Analog Integrated Circuits and Systems. IEEE, 2009. http://dx.doi.org/10.1109/9780470544310.ch4.

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Actas de conferencias sobre el tema "Linear integrated circuits Operational amplifiers"

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Liu, Xiaoming, Jing Jin, Dongpo Chen y Jianjun Zhou. "Operational amplifiers used in PLL charge pump circuits". En 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT). IEEE, 2010. http://dx.doi.org/10.1109/icsict.2010.5667665.

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Weng, Binbin y Guoyong Shi. "Design optimization of MOS operational amplifiers using finite difference sensitivity". En 2011 International Symposium on Integrated Circuits (ISIC). IEEE, 2011. http://dx.doi.org/10.1109/isicir.2011.6131950.

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Delgado-Pascual, Emilio, Eduardo Oreja-Gigorro, Juan Jose Sanchez-Martinez, Maria Luz Gil-Heras, Virginia Bueno-Fernandez, Antonio Bodalo-Marquez y Jesus Grajal. "Non-Linear Distortion in Ultra Wideband GaN Power Amplifiers". En 2018 13th European Microwave Integrated Circuits Conference (EuMIC). IEEE, 2018. http://dx.doi.org/10.23919/eumic.2018.8539926.

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Boyer, A. y E. Sicard. "A Case Study to Apprehend RF Susceptibility of Operational Amplifiers". En 2019 12th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo). IEEE, 2019. http://dx.doi.org/10.1109/emccompo.2019.8919918.

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Severo, Lucas C. y Alessandro Girardi. "A methodology for the automatic design of operational amplifiers including yield optimization". En 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI). IEEE, 2013. http://dx.doi.org/10.1109/sbcci.2013.6644879.

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Giannopoulos, D., S. Wong y A. Lish. "Functional-level simulation of switched-capacitor circuits with nonideal switches and operational amplifiers". En 1989 Proceedings of the IEEE Custom Integrated Circuits Conference. IEEE, 1989. http://dx.doi.org/10.1109/cicc.1989.56801.

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Ibrahim, Mahmoud A. A. y Marvin Onabajo. "Linear input range extension for low-voltage operational transconductance amplifiers in Gm-C filters". En 2017 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2017. http://dx.doi.org/10.1109/iscas.2017.8050495.

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Zhang, Ming, Guojun Liu y Xi Chen. "The stability analysis based on frequency response of integrated operational amplifier in linear low-pass filter circuit". En 2017 36th Chinese Control Conference (CCC). IEEE, 2017. http://dx.doi.org/10.23919/chicc.2017.8029013.

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Zhang, Gary, Shiaw Chang, Sunny Chen y Jing Sun. "Dual mode efficiency enhanced linear power amplifiers using a new balanced structure". En 2009 IEEE Radio Frequency Integrated Circuits Symposium (RFIC). IEEE, 2009. http://dx.doi.org/10.1109/rfic.2009.5135532.

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Prokopenko, Nikolay N., Anna V. Bugakova y Aleksandr I. Serebryakov. "The Non-Linear Differentiating Circuits of Correction of Transient Process in Differential Operational Amplifiers". En 2018 19th International Conference of Young Specialists on Micro/Nanotechnologies and Electron Devices (EDM). IEEE, 2018. http://dx.doi.org/10.1109/edm.2018.8434959.

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