Rozprawy doktorskie na temat „Approximate logics”

Providing a logical characterisation of rational agent reasoning has been a long standing challenge in artificial intelligence (AI) research. It is a challenge that is not only of interest for the construction of AI agents, but is of equal importance in the modelling of agent behaviour. The goal of this thesis is to contribute to the formalisation of agent reasoning by showing that the computational limitations of agents is a vital component of modelling rational behaviour. To achieve this aim, both motivational and formal aspects of resource-bounded agents are examined. It is a central argument of this thesis that accounting for computational limitations is critical to the success of agent reasoning, yet has received only limited attention from the broader research community. Consequently, an important contribution of this thesis is in its advancing of motivational arguments in support of the need to account for computational limitations in agent reasoning research. As a natural progression from the motivational arguments, the majority of this thesis is devoted to an examination of propositional approximate logics. These logics represent a step towards the development of resource-bounded agents, but are also applicable to other areas of automated reasoning. This thesis makes a number of contributions in mapping the space of approximate logics. In particular, it draws a connection between approximate logics and knowledge compilation, by developing an approximate knowledge compilation method based on Cadoli and Schaerf??s S-3 family of approximate logics. This method allows for the incremental compilation of a knowledge base, thus reducing the need for a costly recompilation process. Furthermore, each approximate compilation has well-defined logical properties due to its correspondence to a particular S-3 logic. Important contributions are also made in the examination of approximate logics for clausal reasoning. Clausal reasoning is of particular interest due to the efficiency of modern clausal satisfiability solvers and the related research into problem hardness. In particular, Finger's Logics of Limited Bivalence are shown to be applicable to clausal reasoning. This is subsequently shown to logically characterise the behaviour of the well-known DPLL algorithm for determining boolean satisfiability, when subjected to restricted branching.

We introduce a family of logics extending the lightweight Description Logic EL, that allows us to define concepts in an approximate way. The main idea is to use a graded membership function m, which for each individual and concept yields a number in the interval [0,1] expressing the degree to which the individual belongs to the concept. Threshold concepts C~t for ~ in {<,<=,>,>=} then collect all the individuals that belong to C with degree ~t. We further study this framework in two particular directions. First, we define a specific graded membership function deg and investigate the complexity of reasoning in the resulting Description Logic tEL(deg) w.r.t. both the empty terminology and acyclic TBoxes. Second, we show how to turn concept similarity measures into membership degree functions. It turns out that under certain conditions such functions are well-defined, and therefore induce a wide range of threshold logics. Last, we present preliminary results on the computational complexity landscape of reasoning in such a big family of threshold logics.

Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2015.<br>Cataloged from PDF version of thesis.<br>Includes bibliographical references (pages 343-350).<br>Improving program performance and resilience are long-standing goals. Traditional approaches include a variety of transformation, compilation, and runtime techniques that share the common property that the resulting program has the same semantics as the original program. However, researchers have recently proposed a variety of new techniques that set aside this traditional restriction and instead exploit opportunities to change the semantics of programs to improve performance and resilience. Techniques include skipping portions of a program's computation, selecting different implementations of program's subcomputations, executing programs on unreliable hardware, and synthesizing values to enable programs to skip or execute through otherwise fatal errors. A major barrier to the acceptance these techniques in both the broader research community and in industrial practice is the challenge that the resulting programs may exhibit behaviors that differ from that of the original program, potentially jeopardizing the program's resilience, safety, and accuracy. This thesis presents the first general programming systems for precisely verifying and reasoning about the programs that result from these techniques. This thesis presents a programming language and program logic for verifying worst-case properties of a transformed program. Specifically the framework, enables verifying that a transformed program satisfies important assertions about its safety (e.g., that it does not access invalid memory) and accuracy (e.g., that it returns a result within a bounded distance of that of the original program). This thesis also presents a programming language and automated analysis for verifying a program's quantitative reliability - the probability the transformed program returns the same result as the original program - when executed on unreliable hardware. The results of this thesis, which include programming languages, program logics, program analysis, and applications thereof, present the first steps toward reaping the benefits of changing the semantics of programs in a beneficial yet principled way.<br>by Michael James Carbin.<br>Ph. D.

"This thesis focuses on two key problems in reinforcement learning: How to design reward functions to obtain intended behaviors in autonomous systems using the learning-based control? Given complex mission specification, how to shape the reward function to achieve fast convergence and reduce sample complexity while learning the optimal policy? To answer these questions, the first part of this thesis investigates inverse reinforcement learning (IRL) method with a purpose of learning a reward function from expert demonstrations. However, existing algorithms often assume that the expert demonstrations are generated by the same reward function. Such an assumption may be invalid as one may need to aggregate data from multiple experts to obtain a sufficient set of demonstrations. In the first and the major part of the thesis, we develop a novel method, called Non-parametric Behavior Clustering IRL. This algorithm allows one to simultaneously cluster behaviors while learning their reward functions from demonstrations that are generated from more than one expert/behavior. Our approach is built upon the expectation-maximization formulation and non-parametric clustering in the IRL setting. We apply the algorithm to learn, from driving demonstrations, multiple driver behaviors (e.g., aggressive vs. evasive driving behaviors). In the second task, we study whether reinforcement learning can be used to generate complex behaviors specified in formal logic — Linear Temporal Logic (LTL). Such LTL tasks may specify temporally extended goals, safety, surveillance, and reactive behaviors in a dynamic environment. We introduce reward shaping under LTL constraints to improve the rate of convergence in learning the optimal and probably correct policies. Our approach exploits the relation between reward shaping and actor-critic methods for speeding up the convergence and, as a consequence, reducing training samples. We integrate compositional reasoning in formal methods with actor-critic reinforcement learning algorithms to initialize a heuristic value function for reward shaping. This initialization can direct the agent towards efficient planning subject to more complex behavior specifications in LTL. The investigation takes the initial step to integrate machine learning with formal methods and contributes to building highly autonomous and self-adaptive robots under complex missions."

Os avanços da indústria de semicondutores nas últimas décadas foram baseados fortemente na contínua redução de tamanho dos dispositivos CMOS fabricados. Os usos de dispositivos CMOS dependem profundamente da lógica de portas E/OU/INV. À medida que os dispositivos CMOS estão atingindo oslimites fisicos, pesquisadores aumento esforço para prolongar a vida útil da tecnologia CMOS. Também é necessário investigar dispositivos alternativos, que em muitos casos implicam no uso de operações lógicas básicas diferentes. Como as ferramentas comerciais de síntese não são capazes de manipular eficientemente estas tecnologias Esta tese de doutorado foca em produzir algoritmos eficientes para projeto de circuitos tanto em CMOS quanto em novas tecnologias, integrando estes algorithmos em fluxos de projeto. Para esta tarefa, aplicamos a técnica da composição functional, para sintetizar eficiente tanto em CMOS quanto em tecnologias emergentes. A composição funcional é uma abordagem de síntese de baixo para cima, provendo flexibilidade para implementar algoritmos com resultados ótimos ou sub-ótimos para diferentes tecnologias. A fim de investigar como a composição funcional se compara às abordagens de síntese estado-da-arte, propomos aplicar esse paradigma de síntese em seis cenários diferentes. Dois deles se concentram em circuitos baseados em CMOS e outros quatro em circuitos baseados em tecnologias emergentes. Em relação a circuitos baseados em CMOS, investigamos a composição funcional para fatoração de funções multi-saídas, aplicadas em um fluxo de resíntese. Também manipulamos funções aproximadas, a fim de sintetizar módulos de redundância tripla aproximada. No que diz respeito as tecnologias emergentes, exploramos a composição funcional através de diodos spintrônicos e outras abordagens promissoras com base em diferentes implementações de lógica: a lógica de limiar, lógica majoritária e lógica de implicação. Resultados apresentam uma melhoria considerável em relação aos métodos estadoda- arte tanto para aplicações CMOS quanto aplicações de tecnologias emergentes, demonstrando a capacidade de lidar com diferentes tecnologias e mostrando a possibilidade de melhorar tecnologias ainda não exploradas.<br>The advances in semiconductor industry over the last decades have been strongly based on continuous scaling down of dimensions in manufactured CMOS devices. The use of CMOS devices profoundly relies on AND/OR/Inverter logic. As the CMOS scaling is reaching its physical limits, researchers increase the effort to prolong the CMOS life. Also, it is necessary to investigate alternative devices, which in many cases implies the use of different basic logic operations. As the commercial synthesis tools are not able to handle these technologies efficiently, there is an opportunity to research alternative logic implementations better suited for these new devices. This thesis focuses on presenting efficient algorithms to design circuits in both CMOS and new technologies while integrating these algorithms into regular design flows. For this task, we apply the functional composition technique, to efficiently synthesize both CMOS and emerging technologies. The functional composition is a bottom-up synthesis approach, providing flexibility to implement algorithms with optimal or suboptimal results for different technologies. To investigate how the functional composition compares to the state-of-the-art synthesis methods, we propose to apply this synthesis paradigm into six different scenarios. Two of them focus on CMOS-based circuits, and other four are based on emerging technologies. Regarding CMOSbased circuits, we investigate functional composition to investigate multi-output factorization in a circuit resynthesis flow. Also, we manipulate approximate functions to synthesize approximate triple modular redundancy (ATMR) modules. Concerning emerging technologies, we explore functional composition over spin-diode circuits and other promising approaches based on different logic implementations: threshold logic, majority logic, and implication logic. Results present a considerable improvement over the state-of-the-art methods for both CMOS and emerging technologies applications, demonstrating the ability to handle different technologies and showing the possibility to improve technologies not explored yet.

Dans la plupart des activités quotidiennes, l’Homme a tendance à utiliser des connaissances imparfaites. L’imperfection se rapporte à trois volets : l’imprécision, l’incertitude et l’incomplétude. Nous thèse concerne les connaissances imprécises. En particulier, nous nous intéressons au traitement qualitatif de l’information imprécise dans les systèmes à base de connaissances. Diverses approches ont été proposées pour traiter les connaissances imprécises, en particulier, la logique floue et la logique multivalente. Les théories des ensembles flous et des multi-ensembles sont un moyen très approprié pour la représentation et la modélisation de l’imprécision.Notre travail s’inscrit dans le contexte de la logique multivalente. Celle-ci permet de représenter symboliquement des connaissances imprécises en utilisant des expressions adverbiales ordonnées du langage naturel. L’utilisation de ces degrés symboliques est plus compréhensible par les experts. Ce type de représentation de données est indépendant du type de leurs domaines de discours. Ainsi, la manipulation des connaissances abstraites ou faisant référence à des échelles numériques se fait de la même manière.Dans la littérature, le traitement de l’information imprécise repose sur une hypothèse implicite de la répartition uniforme des degrés de vérité sur une échelle de 0 à 1. Néanmoins, dans certains cas, un sous-domaine de cette échelle peut être plus informatif et peut inclure plus de termes. Dans ce cas, l’information est définie par des termes déséquilibrés, c’est-à-dire qui ne sont pas uniformément répartis et/ou symétriques par rapport à un terme milieu. Par exemple, pour l’évaluation des apprenants, il est possible de considérer un seul terme négatif F correspondant à l’échec. Quant à la réussite, elle est décrite par plusieurs valeurs de mention, i.e. D, C, B et A. Ainsi, si le terme D est le seuil de la réussite, il est considéré comme le terme milieu avec un seul terme à sa gauche et trois à sa droite. Il s’agit alors d’un ensemble non uniforme.Dans ce travail, nous nous concentrons sur l'extension de la logique multivalente au cas des ensembles non uniformes. En s'appuyant sur notre étude de l'art, nous proposons de nouvelles approches pour représenter et traiter ces ensembles de termes. Tout d'abord, nous introduisons des algorithmes qui permettent de représenter des termes non uniformes à l'aide de termes uniformes et inversement. Ensuite, nous décrivons une méthode pour utiliser des modificateurs linguistiques initialement définis pour les termes uniformes avec des ensembles de termes non uniformes. Par la suite, nous présentons une approche de raisonnement basée sur le modèle du Modus Ponens Généralisé à l'aide des Modificateurs Symboliques Généralisés. Les modèles proposés sont mis en œuvre dans un nouveau système de décision fondé sur des règles pour la reconnaissance de l'odeur de camphre. Nous développons également un outil pour le diagnostic de l'autisme infantile. Les degrés de sévérité de l'atteinte par ce trouble autistique sont représentés par l'échelle d'évaluation de l'autisme infantile (CARS). Il s'agit d'une échelle non uniforme<br>In most daily activities, humans use imprecise information derived from appreciation instead of exact measurements to make decisions. Various approaches were proposed to deal with imperfect knowledge, in particular, fuzzy logic and multi-valued logic. In this work, we treat the particular case of imprecise knowledge.Taking into account imprecise knowledge by computer systems is based on their representation by means of linguistic variables. Their values form a set of words expressing the different nuances of the treated information. For example, to judge the beauty of the Mona Lisa or the smell of a flower, it is not possible to give an exact value but an appreciation is given by a term like "beautiful" or "floral".In the literature, dealing with imprecise information relies on an implicit assumption: the distribution of terms is uniform on a scale ranging from 0 to 1. Nevertheless, in some cases, a sub-domain of this scale may be more informative and may include more terms. In this case, knowledge are represented by means of an unbalanced terms set, that is, not uniformly nor symmetrically distributed.We have noticed, in the literature, that in the context of fuzzy logic many researchers have dealt with these term sets. However, it is not the case for multi-valued logic. Thereby, in our work, we aim to establish a methodology to represent and manage this kind of data in the context of multi-valued logic. Two aspects are treated. The first one concerns the representation of terms within an unbalanced multi-set. The second deals with the treatment of such kind of imprecise knowledge, i.e. with symbolic modifiers and in reasoning process.In this work, we focus on unbalanced sets in the context of multi-valued logic. Basing on our study of art, we propose new approaches to represent and treat such term sets. First of all, we introduce algorithms that allow representing unbalanced terms within uniform ones and the inverse way. Then, we describe a method to use linguistic modifiers within unbalanced multi-sets. Afterward, we present a reasoning approach based on the Generalized Modus Ponens model using Generalized Symbolic Modifiers. The proposed models are implemented in a novel rule-based decision system for the camphor odor recognition within unbalanced multi-set. We also develop a tool for child autism diagnosis by means of unbalanced severity degrees of the Childhood Autism Rating Scale (CARS)

Cette thèse développe des techniques à base d'automates pour la vérification formelle de systèmes physiquement distribués communiquant via des canaux fiables de tailles non bornées. Chaque machine peut exécuter localement plusieurs programmes récursifs (multi-threading). Un programme récursif peut également utiliser pour ses calculs locaux des structures de données non bornées, comme des files ou des piles. Ces systèmes, utilisés en pratique, sont si puissants que tous leurs problèmes de vérification deviennent indécidables. Nous introduisons et étudions un nouveau paramètre, appelé largeur de coupe (split-width), pour l'analyse de ces systèmes. Cette largeur de coupe est définie comme le nombre minimum de scissions nécessaires pour partitioner le graphe d'une exécution en parties sur lesquelles on pourra raisonner de manière indépendante. L'analyse est ainsi réalisée avec une approche diviser pour régner. Lorsqu'on se restreint à la classe des comportements ayant une largeur de coupe bornée par une constante, on obtient des procédures de décision optimales pour divers problèmes de vérification sur ces systèmes tels que l'accessibilité, l'inclusion, etc. ainsi que pour la satisfaisabilité et le model checking par rapport à divers formalismes comme la logique monadique du second ordre, la logique dynamique propositionnelle et des logiques temporelles. On montre aussi que les comportements d'un système ont une largeur de coupe bornée si et seulement si ils ont une largeur de clique bornée. Ainsi, grâce aux résultats de Courcelle sur les graphes de degré uniformément borné, la largeur de coupe est non seulement suffisante, mais aussi nécessaire pour obtenir la décidabilité du problème de satisfaisabilité d'une formule de la logique monadique du second ordre. Nous étudions ensuite l'existence de contrôleurs distribués génériques pour nos systèmes distribués. Nous proposons plusieurs contrôleurs, certains ayant un nombre fini d'états et d'autres étant déterministes, qui assurent que les comportements du système sont des graphes ayant une largeur de coupe bornée. Un système ainsi contrôlé de manière distribuée hérite des procédures de décision optimales pour les différents problèmes de vérification lorsque la largeur de coupe est bornée. Cette classe décidable de système généralise plusieurs sous-classes décidables étudiées précédemment<br>This thesis investigates automata-theoretic techniques for the verification of physically distributed machines communicating via unbounded reliable channels. Each of these machines may run several recursive programs (multi-threading). A recursive program may also use several unbounded stack and queue data-structures for its local-computation needs. Such real-world systems are so powerful that all verification problems become undecidable. We introduce and study a new parameter called split-width for the under-approximate analysis of such systems. Split-width is the minimum number of splits required in the behaviour graphs to obtain disjoint parts which can be reasoned about independently. Thus it provides a divide-and-conquer approach for their analysis. With the parameter split-width, we obtain optimal decision procedures for various verification problems on these systems like reachability, inclusion, etc. and also for satisfiability and model checking against various logical formalisms such as monadic second-order logic, propositional dynamic logic and temporal logics. It is shown that behaviours of a system have bounded split-width if and only if they have bounded clique-width. Thus, by Courcelle's results on uniformly bounded-degree graphs, split-width is not only sufficient but also necessary to get decidability for MSO satisfiability checking. We then study the feasibility of distributed controllers for our generic distributed systems. We propose several controllers, some finite state and some deterministic, which ensure that the behaviours of the system have bounded split-width. Such a distributedly controlled system yields decidability for the various verification problems by inheriting the optimal decision procedures for split-width. These also extend or complement many known decidable subclasses of systems studied previously

Locating specific information within museum collections represents a significant challenge for collection users. Even when the collections and catalogues exist in a searchable digital format, formatting differences and the imprecise nature of the information to be searched mean that information can be recorded in a large number of different ways. This variation exists not just between different collections, but also within individual ones. This means that traditional information retrieval techniques are badly suited to the challenges of locating particular information in digital humanities collections and searching, therefore, takes an excessive amount of time and resources. This thesis focuses on a particular search problem, that of co-reference identification. This is the process of identifying when the same real world item is recorded in multiple digital locations. In this thesis, a real world example of a co-reference identification problem for digital humanities collections is identified and explored. In particular the time consuming nature of identifying co-referent records. In order to address the identified problem, this thesis presents a novel method for co-reference identification between digitised records in humanities collections. Whilst the specific focus of this thesis is co-reference identification, elements of the method described also have applications for general information retrieval. The new co-reference method uses elements from a broad range of areas including; query expansion, co-reference identification, short text semantic similarity and fuzzy logic. The new method was tested against real world collections information, the results of which suggest that, in terms of the quality of the co-referent matches found, the new co-reference identification method is at least as effective as a manual search. The number of co-referent matches found however, is higher using the new method. The approach presented here is capable of searching collections stored using differing metadata schemas. More significantly, the approach is capable of identifying potential co-reference matches despite the highly heterogeneous and syntax independent nature of the Gallery, Library Archive and Museum (GLAM) search space and the photo-history domain in particular. The most significant benefit of the new method is, however, that it requires comparatively little manual intervention. A co-reference search using it has, therefore, significantly lower person hour requirements than a manually conducted search. In addition to the overall co-reference identification method, this thesis also presents: • A novel and computationally lightweight short text semantic similarity metric. This new metric has a significantly higher throughput than the current prominent techniques but a negligible drop in accuracy. • A novel method for comparing photographic processes in the presence of variable terminology and inaccurate field information. This is the first computational approach to do so.

Spotřeba a energetická efektivita se stává jedním z nejdůležitějších parametrů při návrhu počítačových systémů, zejména kvůli omezené kapacitě napájení u zařízení napájených bateriemi a velmi vysoké spotřebě energie rostoucích datacenter a cloudové infrastruktury. Současně jsou uživatelé ochotni do určité míry tolerovat nepřesné nebo chybné výpočty v roustoucím počtu aplikací díky nedokonalostem lidských smyslů, statistické povaze výpočtů, šumu ve vstupních datech apod. Přibližné počítání, nová oblast výzkumu v počítačovém inženýrství, využívá rozvolnění požadavků na funkčnost za účelem zvýšení efektivity počítačových systémů, pokud jde o spotřebu energie, výpočetní výkon či složitost. Aplikace tolerující chyby mohou být implementovány efektivněji a stále sloužit svému účelu se stejnou nebo mírně sníženou kvalitou. Ačkoli se objevují nové metody pro návrh přibližně počítajících výpočetních systémů, je stále nedostatek automatických návrhových metod, které by nabízely velké množství kompromisních řešení dané úlohy. Konvenční metody navíc často produkují řešení, která jsou daleko od optima. Evoluční algoritmy sice přinášejí inovativní řešení složitých optimalizačních a návrhových problémů, nicméně trpí několika nedostatky, např. nízkou škálovatelností či vysokým počtem generací nutných k dosažení konkurenceschopných výsledků. Pro přibližné počítání je vhodný zejména multikriteriální návrh, což existující metody většinou nepodporují. V této práci je představen nový automatický multikriteriální paralelní evoluční algoritmus pro návrh a aproximaci digitálních obvodů. Metoda je založena na kartézském genetickém programování, pro zvýšení škálovatelnosti byla navržena nová vysoce paralelizovaná implementace. Multikriteriální návrh byl založen na principech algoritmu NSGA-II. Výkonnost implementace byla vyhodnocena na několika různých úlohách, konkrétně při návrhu (přibližně počítajících) aritmetických obvodů, Booleovských funkcích s vysokou nelinearitou či přibližných logických obvodů pro tří-modulovou redundanci. V těchto úlohách bylo dosaženo význammých zlepšení ve srovnání se současnými metodami.

This thesis investigates automata-theoretic techniques for the verification of physically distributed machines communicating via unbounded reliable channels. Each of these machines may run several recursive programs (multi-threading). A recursive program may also use several unbounded stack and queue data-structures for its local-computation needs. Such real-world systems are so powerful that all verification problems become undecidable. We introduce and study a new parameter called split-width for the under-approximate analysis of such systems. Split-width is the minimum number of splits required in the behaviour graphs to obtain disjoint parts which can be reasoned about independently. Thus it provides a divide-and-conquer approach for their analysis. With the parameter split-width, we obtain optimal decision procedures for various verification problems on these systems like reachability, inclusion, etc. and also for satisfiability and model checking against various logical formalisms such as monadic second-order logic, propositional dynamic logic and temporal logics. It is shown that behaviours of a system have bounded split-width if and only if they have bounded clique-width. Thus, by Courcelle's results on uniformly bounded-degree graphs, split-width is not only sufficient but also necessary to get decidability for MSO satisfiability checking. We then study the feasibility of distributed controllers for our generic distributed systems. We propose several controllers, some finite state and some deterministic, which ensure that the behaviours of the system have bounded split-width. Such a distributedly controlled system yields decidability for the various verification problems by inheriting the optimal decision procedures for split-width. These also extend or complement many known decidable subclasses of systems studied previously.

Rozšiřování moderních vestavěných a mobilních systémů napájených bateriemi zvyšuje požadavky na návrh těchto systémů s ohledem na příkon. Přestože moderní návrhové techniky optimalizují příkon, elektrická spotřeba těchto obvodů stále roste díky jejich složitosti. Nicméně existuje celá řada aplikací, kde nepotřebujeme získat úplně přesný výstup. Díky tomu se objevuje technika zvaná aproximativní (přibližné) počítání, která umožňuje za cenu zanesení malé chyby do výpočtu významně redukovat příkon obvodů. V práci se zaměřujeme na použití evolučních algoritmů v této oblasti. Ačkoliv již tyto algoritmy byly úspěšně použity v syntéze přesných i aproximativních obvodů, objevují se problémy škálovatelnosti - schopnosti aproximovat složité obvody. Cílem této disertační práce je ukázat, že aproximační logická syntéza založená na genetickém programování umožňuje dosáhnout vynikajícího kompromisu mezi spotřebou a chybou. Byla provedena analýza čtyř různých aplikacích na třech úrovních popisu. Pomocí kartézského genetického programování s modifikovanou reprezentací jsme snížili spotřebu malých obvodů popsaných na úrovni tranzistorů použitelných například v technologické knihovně. Dále jsme zavedli novou metodu pro aproximaci aritmetických obvodů, jako jsou sčítačky a násobičky, popsaných na úrovni hradel. S využitím metod formální verifikace navíc celý návrhový proces umožňuje garantovat stanovenou chybu aproximace. Tyto obvody byly využity pro významné snížení příkonu v neuronových sítích pro rozpoznávání obrázků a v diskrétní kosinově transformaci v HEVC kodéru. Pomocí nové chybové metriky nezávislé na rozložení vstupních dat jsme navrhli komplexní aproximativní mediánové filtry vhodné pro zpracování signálů. Disertační práce reprezentuje ucelenou metodiku pro návrh aproximativních obvodů na různých úrovních popisu, která navíc garantuje nepřekročení zadané chyby aproximace.

Artificial Neural Networks (ANNs) can be viewed as a mathematical model to simulate natural and biological systems on the basis of mimicking the information processing methods in the human brain. The capability of current ANNs only focuses on approximating arbitrary deterministic input-output mappings. However, these ANNs do not adequately represent the variability which is observed in the systems’ natural settings as well as capture the complexity of the whole system behaviour. This thesis addresses the development of a new class of neural networks called Stochastic Neural Networks (SNNs) in order to simulate internal stochastic properties of systems. Developing a suitable mathematical model for SNNs is based on canonical representation of stochastic processes or systems by means of Karhunen-Loève Theorem. Some successful real examples, such as analysis of full displacement field of wood in compression, confirm the validity of the proposed neural networks. Furthermore, analysis of internal workings of SNNs provides an in-depth view on the operation of SNNs that help to gain a better understanding of the simulation of stochastic processes by SNNs.

Ce travail porte sur l'application et l'utilisation par Jean Duns Scot de la théorie de l'indifférence de l'essence, issue du péripatétisme arabe, et se donne pour enjeu d'en comprendre le fonctionnement conceptuel. Solution conjointe aux questions de la constitution ontologique des choses, des rapports entre le langage et la réalité et du mode d'appréhension des notions générales dans l'abstraction, la théorie de l'indifférence de l'essence sert de sous-bassement à la métaphysique de Duns Scot. C'est au moyen de cette théorie qu'il est possible, comme le montre cette recherche, de relire certains grands thèmes de la métaphysique scotiste: la théorie de la nature commune et de l'haeccéité, la connaissance abstractive (cognitio abstractiva), et la théorie de la non identité formelle. Le travail tente surtout de dégager le caractère proprement méthodologique de la théorie des trois états de l'essence (triplex status essentiae), répondant à la question du statut de l'essence indifférente, à celle des prédicats d'ordre supérieur et au problème de la séparation dans l'abstraction.<br>Doctorat en Philosophie<br>info:eu-repo/semantics/nonPublished

Unification in description logics (DLs) has been introduced as a novel inference service that can be used to detect redundancies in ontologies, by finding different concepts that may potentially stand for the same intuitive notion. Together with the special case of matching, they were first investigated in detail for the DL FL0, where these problems can be reduced to solving certain language equations. In this thesis, we extend this service in two directions. In order to increase the recall of this method for finding redundancies, we introduce and investigate the notion of approximate unification, which basically finds pairs of concepts that “almost” unify, in order to account for potential small modelling errors. The meaning of “almost” is formalized using distance measures between concepts. We show that approximate unification in FL0 can be reduced to approximately solving language equations, and devise algorithms for solving the latter problem for particular distance measures. Furthermore, we make a first step towards integrating background knowledge, formulated in so-called TBoxes, by investigating the special case of matching in the presence of TBoxes of different forms. We acquire a tight complexity bound for the general case, while we prove that the problem becomes easier in a restricted setting. To achieve these bounds, we take advantage of an equivalence characterization of FL0 concepts that is based on formal languages. In addition, we incorporate TBoxes in computing concept distances. Even though our results on the approximate setting cannot deal with TBoxes yet, we prepare the framework that future research can build on. Before we journey to the technical details of the above investigations, we showcase our program in the simpler setting of the equational theory ACUI, where we are able to also combine the two extensions. In the course of studying the above problems, we make heavy use of automata theory, where we also derive novel results that could be of independent interest.

CMOS technology scaling, the process of shrinking transistor dimensions based on Moore's law, has been the thrust behind increasingly powerful integrated circuits for over half a century. As dimensions are scaled to few tens of nanometers, process and environmental variations can significantly alter transistor characteristics, thus degrading reliability and reducing performance gains in CMOS designs with technology scaling. Although design solutions proposed in recent years to improve reliability of CMOS designs are power-efficient, the performance penalty associated with these solutions further reduces performance gains with technology scaling, and hence these solutions are not well-suited for high-performance designs. This thesis proposes approximate logic circuits as a new logic synthesis paradigm for reliable, high-performance computing systems. Given a specification, an approximate logic circuit is functionally equivalent to the given specification for a "significant" portion of the input space, but has a smaller delay and power as compared to a circuit implementation of the original specification. This contributions of this thesis include (i) a general theory of approximation and efficient algorithms for automated synthesis of approximations for unrestricted random logic circuits, (ii) logic design solutions based on approximate circuits to improve reliability of designs with negligible performance penalty, and (iii) efficient decomposition algorithms based on approxiiii mate circuits to improve performance of designs during logic synthesis. This thesis concludes with other potential applications of approximate circuits and identifies. open problems in logic decomposition and approximate circuit synthesis.

碩士<br>國立臺灣大學<br>資訊管理學研究所<br>93<br>Heterogeneous Internet applications can be easily integrated when they are exported as Web Services, which use XML-based standards for service description and communication. It becomes possible to provide more sophisticated compound services by combining simpler services. This entails, among other things, the need of precise semantic description of service demands and supplies and an associated matching mechanism. Technologies under development in the Semantic Web, in particular ontology and rule definition languages, appear to meet the need perfectly. However, as exact matches may be difficult to find and often unnecessary, the matching mechanism ideally should allow certain degree of fuzziness. In this thesis, we propose an approximate matching scheme that fully exploits the expressiveness of Semantic Web''s ontology definition language OWL, which is based on Description Logic, and the inference ability that comes with the logic. To demonstrate the applicability of our scheme, we develop a prototype service matchmaker for the Trip Planner, which is a service composer for the tourism industry developed on Protege.

Energy minimization has become an ever more important concern in the design of very large scale integrated circuits (VLSI). In recent years, approximate computing, which is based on the idea of trading off computational accuracy for improved energy efficiency, has attracted significant attention. Applications that are both compute-intensive and error-tolerant are most suitable to adopt approximation strategies. This includes digital signal processing, data mining, machine learning or search algorithms. Such approximations can be achieved at several design levels, ranging from software, algorithm and architecture, down to logic or transistor levels. This dissertation investigates two research threads for the derivation of approximate digital circuits at the logic level: 1) modeling and synthesis of fundamental arithmetic building blocks; 2) automated techniques for synthesizing arbitrary approximate logic circuits under general error specifications. The first thread investigates elementary arithmetic blocks, such as adders and multipliers, which are at the core of all data processing and often consume most of the energy in a circuit. An optimal strategy is developed to reduce energy consumption in timing-starved adders under voltage over-scaling. This allows a formal demonstration that, under quadratic error measures prevalent in signal processing applications, an adder design strategy that separates the most significant bits (MSBs) from the least significant bits (LSBs) is optimal. An optimal conditional bounding (CB) logic is further proposed for the LSBs, which selectively compensates for the occurrence of errors in the MSB part. There is a rich design space of optimal adders defined by different CB solutions. The other thread considers the problem of approximate logic synthesis (ALS) in two-level form. ALS is concerned with formally synthesizing a minimum-cost approximate Boolean function, whose behavior deviates from a specified exact Boolean function in a well-constrained manner. It is established that the ALS problem un-constrained by the frequency of errors is isomorphic to a Boolean relation (BR) minimization problem, and hence can be efficiently solved by existing BR minimizers. An efficient heuristic is further developed which iteratively refines the magnitude-constrained solution to arrive at a two-level representation also satisfying error frequency constraints. To extend the two-level solution into an approach for multi-level approximate logic synthesis (MALS), Boolean network simplifications allowed by external don't cares (EXDCs) are used. The key contribution is in finding non-trivial EXDCs that can maximally approach the external BR and, when applied to the Boolean network, solve the MALS problem constrained by magnitude only. The algorithm then ensures compliance to error frequency constraints by recovering the correct outputs on the sought number of error-producing inputs while aiming to minimize the network cost increase. Experiments have demonstrated the effectiveness of the proposed techniques in deriving approximate circuits. The approximate adders can save up to 60% energy compared to exact adders for a reasonable accuracy. When used in larger systems implementing image-processing algorithms, energy savings of 40% are possible. The logic synthesis approaches generally can produce approximate Boolean functions or networks with complexity reductions ranging from 30% to 50% under small error constraints.<br>text

碩士<br>國立清華大學<br>資訊工程學系所<br>105<br>Recently, threshold logic attracts a lot of attention due to the advances of its physical implementation and the strong binding to neural networks.On the other hand, approximate computing is a new design paradigm that focuses on error-tolerant applications, e.g., machine learning or pattern recognition.In this thesis, we integrate threshold logic with approximate computing and propose a synthesis algorithm to obtain cost-efficient approximate threshold logic circuits with an error rate guarantee.We conduct experiments on a set of IWLS 2005 benchmarks.The experimental results show that the proposed algorithm can efficiently explore the approximability of each benchmark.For a 5\% error rate constraint, the circuit cost can be reduced by 22.8\% on average.

碩士<br>國立交通大學<br>資訊科學與工程研究所<br>108<br>Due to increasing complexity of hardware design and manufacturing, the designers and foundries of integrated circuits (ICs) are usually distributed worldwide. As the IC supply chain spans multiple countries, security concerns have become a major challenge to the semiconductor industry. Logic locking is a technique to protect an IC design from over-production and unauthorized use by untrusted foundries. But the conventional logic locking schemes are not secure enough when applied to approximate arithmetic circuits, since the circuits are error-tolerant. In this work, we define three crucial factors that affect the security level of logic lock-ing on approximate arithmetic circuits. Then we propose robust locking technique to in-crease the deviation value of calculation and corrupt the deep-learning applications when unauthorized users try to access the ICs. The proposed locking strategy can reach up to 2.9 times secure level in comparison with conventional locking scheme.

碩士<br>國立交通大學<br>多媒體工程研究所<br>100<br>The main idea of thesis is that by using high-level information implemented by fuzzy logic based simulated car controller. The artificial of intelligence of controller can make proper decision or reaction based on the high-level information. The high-level information obtained by sensor detecting the distance between car and track, the fuzzy system transform this information into distance from the corner and the sharpness of the corner, then the controller planning to drive with the target speed and the proper position.