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Artykuły w czasopismach na temat "Boolean Functional Synthesis"
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Pashukov, Artem. "Application of Weight-Based Sum Codes at the Synthesis of Circuits for Built-in Control by Boolean Complement Method." Automation on transport 8, no. 1 (2022): 101–14. http://dx.doi.org/10.20295/2412-9186-2022-8-1-101-114.
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This work considers the application of Boolean complement method for the organization of self-checking circuits of built-in control for the devices synthesized on being Field-Programmable Gate Arrays. Review is given for the application of Boolean complement method while using various noise-resistant codes. The example is demonstrated for control circuit synthesis with Boolean complement method. Algorithm for control system synthesis by Boolean complement method with the use of weight-based sum codes by module M is formulated. As an example, weighted codes are considered with the summation of weight categories by module M = 3 and M = 4 for these purposes. The given codes have only two control categories that simplifies their application for task solution on the design of functional diagnostics system by Boolean complement method. The comparative analysis of both codes with their use in the systems with Boolean complement has been pursued. The application of Boolean complement method on the basis of weight-based sum codes for synthesis of discrete devices has been suggested.
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Efanov, Dmitriy, and Tat'yana Pogodina. "Self-Dual Functional Gates for the Synthesis of Controllable Digital Systems." Transport automation research 9, no. 2 (2023): 205–21. http://dx.doi.org/10.20295/2412-9186-2023-9-02-205-221.
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All self-dual analogs of elementary functional gates have been considered, the use of which allows for the synthesis of self-dual circuit implementations of arbitrary Boolean functions. In this case, two synthesis methods can be used, each one based on the property of any Boolean function to be transformed into a self-dual function using one additional variable. The first method involves replacing all non-self-dual functional gates in the device structure with self-dual analogs. The second one involves obtaining a self-dual function from the original formula. The study conducted modeling of self-dual functional gates in pulse mode of operation. It has been shown that all self-dual functional gates, except for those implementing equivalence and nonequivalence functions (modulo-2 addition), are fully self-checkable with respect to stuck-at faults when checking computations based on the belonging of the generated functions to the class of self-dual Boolean functions. However, the gates that implement the mentioned functions require additional monitoring. For them, error masking occurs due to the simultaneous distortion of signals on both combinations in a pair. This feature of these self-dual functional gates should be taken into account when developing controllable self-checking digital computing devices and systems. The article provides an example of using methods for constructing self-dual circuit implementations. The obtained results can be used in the synthesis of controllable self-dual computing devices and systems.
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Rawski, Mariusz. "Application of Indexed Partition Calculus in Logic Synthesis of Boolean Functions for FPGAs." International Journal of Electronics and Telecommunications 57, no. 2 (2011): 209–16. http://dx.doi.org/10.2478/v10177-011-0029-4.
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Application of Indexed Partition Calculus in Logic Synthesis of Boolean Functions for FPGAsFunctional decomposition of Boolean functions specified by cubes proved to be very efficient. Most popular decom-position methods are based on blanket calculus. However computation complexity of blanket manipulations strongly depends on number of function's variables, which prevents them from being used for large functions of many input and output variables. In this paper a new concept of indexed partition is proposed and basic operations on indexed partitions are defined. Application of this concept to logic synthesis based on functional decomposition is also discussed. The experimental results show that algorithms based on new concept are able to deliver good quality solutions even for large functions and does it many times faster than the algorithms based on blanket calculus.
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Abdollahi, Afshin, Mehdi Saeedi, and Massoud Pedram. "Reversible logic synthesis by quantum rotation gates." Quantum Information and Computation 13, no. 9&10 (2013): 771–92. http://dx.doi.org/10.26421/qic13.9-10-3.
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A rotation-based synthesis framework for reversible logic is proposed. We develop a canonical representation based on binary decision diagrams and introduce operators to manipulate the developed representation model. Furthermore, a recursive functional bi-decomposition approach is proposed to automatically synthesize a given function. While Boolean reversible logic is particularly addressed, our framework constructs intermediate quantum states that may be in superposition, hence we combine techniques from reversible Boolean logic and quantum computation. {The proposed approach results in quadratic gate count for multiple-control Toffoli gates without ancillae, linear depth for quantum carry-ripple adder, and $O(n\log^2 n)$ size for quantum multiplexer.
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BRAHA, DAN. "Design-as-satisfiability: A new approach to automated synthesis." Artificial Intelligence for Engineering Design, Analysis and Manufacturing 15, no. 5 (2001): 385–99. http://dx.doi.org/10.1017/s0890060401155022.
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This article addresses computational synthesis systems that attempt to find a structural description that matches a set of initial functional requirements and design constraints with a finite sequence of production rules. It has been previously shown by the author that it is computationally difficult to identify a sequence of production rules that can lead to a satisficing design solution. As a result, computational synthesis, particularly with large volumes of selection information, requires effective design search procedures. Many computational synthesis systems utilize transformational search strategies. However, such search strategies are inefficient due to the combinatorial nature of the problem. In this article, the problem is approached using a completely different paradigm. The new approach encodes a design search problem as a Boolean (propositional) satisfiability problem, such that from every satisfying Boolean-valued truth assignment to the corresponding Boolean expression we efficiently can derive a solution to the original synthesis problem (along with its finite sequence of production rules). A major advantage of the proposed approach is the possibility of utilizing recently developed powerful randomized search algorithms for solving Boolean satisfiability problems, which considerably outperform the most widely used satisfiability algorithms. The new design-as-satisfiability technique provides a flexible framework for stating a variety of design constraints, and also represents properly the theory behind modern constraint-based design systems.
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Prihozhy, Anatoly A. "Synthesis of quantum circuits based on incompletely specified functions and if-decision diagrams." Journal of the Belarusian State University. Mathematics and Informatics, no. 3 (December 14, 2021): 84–97. http://dx.doi.org/10.33581/2520-6508-2021-3-84-97.
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The problem of synthesis and optimisation of logical reversible and quantum circuits from functional descriptions represented as decision diagrams is considered. It is one of the key problems being solved with the aim of creating quantum computing technology and quantum computers. A new method of stepwise transformation of the initial functional specification to a quantum circuit is proposed, which provides for the following project states: reduced ordered binary decision diagram, if-decision diagram, functional if-decision diagram, reversible circuit and quantum circuit. The novelty of the method consists in extending the Shannon and Davio expansions of a Boolean function on a single variable to the expansions of the same Boolean function on another function with obtaining decomposition products that are represented by incompletely defined Boolean functions. Uncertainty in the decomposition products gives remarkable opportunities for minimising the graph representation of the specified function. Instead of two outgoing branches of the binary diagram vertex, three outgoing branches of the if-diagram vertex are generated, which increase the level of parallelism in reversible and quantum circuits. For each transformation step, appropriate mapping rules are proposed that reduce the number of lines, gates and the depth of the reversible and quantum circuit. The comparison of new results with the results given by the known method of mapping the vertices of binary decision diagram into cascades of reversible and quantum gates shows a significant improvement in the quality of quantum circuits that are synthesised by the proposed method.
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Perkowski, Marek A., Malgorzata Chrzanowska-Jeske, Andisheh Sarabi, and Ingo Schäfer. "Multi-Level Logic Synthesis Based on Kronecker Decision Diagrams and Boolean Ternary Decision Diagrams for Incompletely Specified Functions." VLSI Design 3, no. 3-4 (1995): 301–13. http://dx.doi.org/10.1155/1995/24594.
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This paper introduces several new families of decision diagrams for multi-output Boolean functions. The introduced families include several diagrams known from literature (BDDs, FDDs) as subsets. Due to this property, these diagrams can provide a more compact representation of functions than either of the two decision diagrams. Kronecker Decision Diagrams (KDDs) with negated edges are based on three orthogonal expansions (Shannon, Positive Davio, Negative Davio) and are created here for incompletely specified Boolean functions as well. An improved efficient algorithm for the construction of KDD is presented and applied in a mapping program to ATMEL 6000 fine-grain FPGAs. Four other new families of functional decision diagrams are also presented: Pseudo KDDs, Free KDDs, Boolean Ternary DDs, and Boolean Kronecker Ternary DDs. The last two families introduce nodes with three edges and require AND, OR and EXOR gates for circuit realization. There are two variants of each of the last two families: canonical and non-canonical. While the canonical diagrams can be used as efficient general-purpose Boolean function representations, the non-canonical variants are also applicable to incompletely specified functions and create don't cares in the process of the creation of the diagram.. They lead to even more compact circuits in logic synthesis and technology mapping.
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Stojkovic, Suzana, Milena Stankovic, and Claudio Moraga. "Complexity reduction of Toffoli networks based on FDD." Facta universitatis - series: Electronics and Energetics 28, no. 2 (2015): 251–62. http://dx.doi.org/10.2298/fuee1502251s.
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Synthesis of switching functions by Toffoli gates has become a very important research topic in the last years, since Toffoli gates are used in the synthesis of reversible circuits. Early methods based on the truth-table representation of Boolean functions are applicable to functions with a relatively small number of variables. Later on, methods for synthesis by Toffoli gates based on decision diagrams (BDDs, FDDs or OKFDDs) were introduced and applied to the synthesis of both reversible and irreversible functions. This paper presents a method for the reduction of the number of lines and gates in the Toffoli gate realization of Boolean functions based on their Functional Decision Diagram (FDD) representation. Experiments show that, when the proposed reduction is used, the realization of the given function based on FDD will, on the average, be smaller in terms of the number of lines and the number of gates than the realizations based on an OKFDD, an optimal BDD or based on a FDD by using previously defined algorithms.
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Efanov, D. V., and D. V. Pivovarov. "FUNCTIONAL APPROACH TO THE SYNTHESIS OF CONCURRENT ERROR-DETECTION CIRCUIT BASED ON BOOLEAN COMPLEMENT AND USE OF "2-OUT-OF-5" CONSTANT-WEIGHT CODE." Informatika i sistemy upravleniya, no. 4 (2021): 81–94. http://dx.doi.org/10.22250/isu.2021.70.81-94.
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A method for self-checking concurrent error-detection circuit synthesis based on Boolean com-plement and "2-out-of-5" constant-weight code is described. The method is notable for using functional relationship between the signals from the working and control outputs instead of ana-lyzing the unit performance on each input. The functional dependence is established with due account to the requirements for the formation of codewords of the "2-out-of-5" code and a com-plete tester check. In addition, it considers the formation of a complete set of test combinations for transformation elements in the concurrent error-detection circuit. A method for obtaining a functional relationship between the control outputs and the operating outputs of the diagnostic object is presented. One of the options for extending the definition of the control function values is presented, as well as the functional dependence. It is noted that the number of options for ex-tending the definition of the control function values is large, which allows numerous options for synthesizing a concurrent error-detection circuit for any diagnostic object based on the described method. The use of the "2-out-of-5" code for the synthesis of concurrent error-detection circuits applying the Boolean complement method proved its effectiveness for organizing self-checking digital devices in automatics and computer technology.
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SELVARAJ, HENRY, PIOTR SAPIECHA, MARIUSZ RAWSKI, and TADEUSZ ŁUBA. "FUNCTIONAL DECOMPOSITION — THE VALUE AND IMPLICATION FOR BOTH NEURAL NETWORKS AND DIGITAL DESIGNING." International Journal of Computational Intelligence and Applications 06, no. 01 (2006): 123–38. http://dx.doi.org/10.1142/s1469026806001782.
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General functional decomposition is mainly perceived as a logic synthesis method for implementing Boolean functions into FPGA-based architectures. However it also has important applications in many other fields of modern engineering and science. In this paper, advantages of functional decomposition are demonstrated on "real life" examples. Application of decomposition-based methods in other fields of modern engineering is presented. In the case of decision tables, application of decomposition methods leads to significant benefits in the analysis process of data dependencies, especially in cases when the input decision tables are unmanageably large. Experimental results demonstrate that it can help implementing sequential machines using flip-flops or ROM memory. It also can be efficiently used as multilevel logic synthesis method for VLSI technology.