Gotowe bibliografie tematyczne / GENERATING CIRCUITS

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Gotowa bibliografia na temat „GENERATING CIRCUITS”

Autor: Grafiati

Data publikacji: 11 września 2023

Data aktualizacji: 19 lipca 2025

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Artykuły w czasopismach na temat "GENERATING CIRCUITS"

Yaman, Orhan, Tuba Sanli, and Mehmet Karakose. "A Quine-McCluskey Based Method for Generating Optimum Combinational Logic Circuits from Reversible Quantum Circuits." Journal of Artificial Intelligence and Autonomous Intelligence 01, no. 01 (2024): 139–54. https://doi.org/10.54364/jaiai.2024.1110.

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Algorithms specifically designed for quantum computers have been developed. In quantum circuits, the Feynman, Toffoli, and Fredkin gates are employed instead of traditional inputs such as AND, OR, NAND, NOR, XOR, and XNOR in combinational logic gates. The ability to convert quantum circuits into combinational logic circuits, or vice versa, is of utmost importance. This essay study (or paper) aims to demonstrates the process of deriving combinational logic circuits from reversible quantum circuits. To achieve this, the Quine-McCluskey technique was utilized along with state tables generated from the quantum circuits to obtain an optimal logic expression that serves as the basis for constructing the combinational logic circuit. The resultant obtained combinational logic circuit was implemented within the MATLAB Simulink environment, and state tables were obtained. A comparison was made between the state tables derived from the quantum circuit and the combinational circuit, yielding successful results.

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Materzok, Marek. "Generating circuits with generators." Proceedings of the ACM on Programming Languages 6, ICFP (2022): 52–79. http://dx.doi.org/10.1145/3549821.

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The most widely used languages and methods used for designing digital hardware fall into two rough categories. One of them, register transfer level (RTL), requires specifying each and every component in the designed circuit. This gives the designer full control, but burdens the designer with many trivial details. The other, the high-level synthesis (HLS) method, allows the designer to abstract the details of hardware away and focus on the problem being solved. This method however cannot be used for a class of hardware design problems because the circuit's clock is also abstracted away. We present YieldFSM, a hardware description language that uses the generator abstraction to represent clock-level timing in a digital circuit. It represents a middle ground between the RTL and HLS approaches: the abstraction level is higher than in RTL, but thanks to explicit information about clock-level timing, it can be used in applications where RTL is traditionally used. We also present the YieldFSM compiler, which uses methods developed by the functional programming community -- including continuation-passsing style translation and defunctionalization -- to translate YieldFSM programs to Mealy machines. It is implemented using Template Haskell and the Clash functional hardware description language. We show that this approach leads to short and conceptually simple hardware descriptions.

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Briggman, K. L., and W. B. Kristan. "Multifunctional Pattern-Generating Circuits." Annual Review of Neuroscience 31, no. 1 (2008): 271–94. http://dx.doi.org/10.1146/annurev.neuro.31.060407.125552.

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Strohmer, Beck, Elias Najarro, Jessica Ausborn, Rune W. Berg, and Silvia Tolu. "Sparse Firing in a Hybrid Central Pattern Generator for Spinal Motor Circuits." Neural Computation 36, no. 5 (2024): 759–80. http://dx.doi.org/10.1162/neco_a_01660.

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Abstract Central pattern generators are circuits generating rhythmic movements, such as walking. The majority of existing computational models of these circuits produce antagonistic output where all neurons within a population spike with a broad burst at about the same neuronal phase with respect to network output. However, experimental recordings reveal that many neurons within these circuits fire sparsely, sometimes as rarely as once within a cycle. Here we address the sparse neuronal firing and develop a model to replicate the behavior of individual neurons within rhythm-generating populations to increase biological plausibility and facilitate new insights into the underlying mechanisms of rhythm generation. The developed network architecture is able to produce sparse firing of individual neurons, creating a novel implementation for exploring the contribution of network architecture on rhythmic output. Furthermore, the introduction of sparse firing of individual neurons within the rhythm-generating circuits is one of the factors that allows for a broad neuronal phase representation of firing at the population level. This moves the model toward recent experimental findings of evenly distributed neuronal firing across phases among individual spinal neurons. The network is tested by methodically iterating select parameters to gain an understanding of how connectivity and the interplay of excitation and inhibition influence the output. This knowledge can be applied in future studies to implement a biologically plausible rhythm-generating circuit for testing biological hypotheses.

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Brodovskaya, Anastasia, and Jaideep Kapur. "Circuits generating secondarily generalized seizures." Epilepsy & Behavior 101 (December 2019): 106474. http://dx.doi.org/10.1016/j.yebeh.2019.106474.

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SOLIMAN, AHMED M. "GENERATION OF THIRD-ORDER QUADRATURE OSCILLATOR CIRCUITS USING NAM EXPANSION." Journal of Circuits, Systems and Computers 22, no. 07 (2013): 1350060. http://dx.doi.org/10.1142/s0218126613500606.

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A systematic synthesis procedure for generating third-order grounded passive element quadrature oscillators is given. The synthesis procedure is based on using nodal admittance matrix (NAM) expansion applied to the Y matrix of a recently reported three Op Amp third-order oscillator circuit. Four new circuits using current conveyors (CCII) are reported. In addition four more new circuits using inverting current conveyors (ICCII) are also given. Many more quadrature third-order oscillator circuits using combinations of CCII and ICCII can be obtained. Simulation results demonstrating the practicality of one of the generated circuits are included.

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Kosarev, Boris. "FERRORESONANT PROCESSES IN POWER SUPPLY SYSTEMS WITH DISTRIBUTED GENERATION." Electrical and data processing facilities and systems 18, no. 3-4 (2022): 56–64. http://dx.doi.org/10.17122/1999-5458-2022-18-3-4-56-64.

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Relevance The article is devoted to the study of the possibility of occurrence of ferroresonant processes in power supply systems with distributed generation. Ferroresonant processes cause overvoltages in electrical installations and lead to their failure. In backbone and distribution networks without distributed generation facilities, the phenomenon of ferroresonance has been studied quite deeply, effective hardware and operational measures have been developed to prevent the occurrence of ferroresonance surges in electrical installations. However, the issue of the occurrence of ferroresonant processes in power supply systems with distributed generation, which is a promising direction in the development of the energy sector, seems to be little studied. Aim of research The main aim of the research is to investigate circuit-mode conditions for the occurrence of ferroresonant processes in power supply systems with distributed generation. Research methods To study the circuit-mode conditions for the occurrence of ferroresonant processes in power supply systems with distributed generation, the main provisions of the theory of electrical complexes and systems, the theory of nonlinear electrical circuits, and the principles of controlling objects of electrical complexes and industrial systems were used. Results The circuit-mode conditions for the occurrence of ferroresonant processes in power supply systems with distributed generation are studied. The power supply system of a HF radio center, containing a power plant with a lower installed power or corresponding to the maximum power consumption of the load, was chosen as the object of study. The features of the scheme-mode conditions for the occurrence of ferroresonant processes under conditions of distributed generation are as follows. Due to the insignificant remoteness of distributed generation facilities and consumers, additional opportunities arise for subharmonic ferroresonant processes. When a generating plant is connected to low-voltage busbars, conditions are created for the occurrence of a ferroresonant process involving low-voltage windings of power transformers. The low dynamic stability of generating installations of distributed generation facilities based on synchronous generators reduces the likelihood and duration of ferroresonant processes in the event of phase wire breaks and short circuits on the power line. Generating plants connected via grid inverters have a limited output current and can be turned off by emergency automatics in the event of an emergency operation of the grid, which, as a rule, precedes the appearance of ferroresonant overvoltages in electrical installations. Thus, in power districts with distributed generation facilities, the circuit-mode conditions for the occurrence of ferroresonant processes, known in the centralized power supply system, undergo changes, and it is also possible to form new ferroresonant oscillatory circuits. Keywords: distributed generation, ferroresonant process, power supply system, oscillatory circuit, generating plant, relay protection and automation devices Acknoledgements: The work was carried out under the state order of the Omsk Scientific Center of the Siberian Branch of the Russian Academy of Sciences (project state registration number 122011200349-3).

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GÜNAY, ENIS, and MUSTAFA ALÇI. "n-DOUBLE SCROLLS IN SC-CNN CIRCUIT VIA DIODE-BASED PWL FUNCTION." International Journal of Bifurcation and Chaos 16, no. 04 (2006): 1023–33. http://dx.doi.org/10.1142/s0218127406015271.

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In this paper n-double scroll generating via diode-based PieceWise-Linear (PWL) circuit in State Controlled Cellular Neural Network (SC-CNN) is presented. It has been shown that by using simple diode-based configurations; alternative nonlinear circuit configurations for chaotic circuits and PWL-based systems can be used in the generation of n-double scrolls. With this study, while the analysis of the nonlinear block in the SC-CNN-based circuit is simplified, the implementation cost of the circuit is also reduced. Pspice simulations are proved with experimental studies.

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Kim, Junyeong, and Jin Jang. "P‐2: Narrow Bezel Gate Driver Generating Positive Pulse for AMOLED Display Using LTPO Technology with Depletion Mode Oxide TFTs." SID Symposium Digest of Technical Papers 54, no. 1 (2023): 1782–85. http://dx.doi.org/10.1002/sdtp.16950.

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We propose a novel gate driver generating positive pulse for oxide switching TFTs in AMOLED pixel circuits using low‐temperature polycrystalline silicon and oxide (LTPO) thin‐film transistors (TFTs). The proposed gate driver circuit has only five TFTs without capacitor. The proposed circuits can operate perfectly when all oxide TFTs in the circuits have threshold voltage (VTH) of ‐3.5V, depletion mode. The circuit can be easily designed for narrow bezel due to simple structures. The one stage of the circuit was designed with the size of 50 μm × 100 μm. The fabricated circuit works well with the depletion mode oxide TFTs with VTH of ‐3.5V. The circuit operated at the pulse width of 1 μs, corresponding to operating speed of 500 kHz. The proposed gate driver can be applicable for narrow bezel AMOLED display.

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Weikle, R. M., T. W. Crowe, and E. L. Kollberg. "Multiplier and Harmonic Generator Technologies for Terahertz Applications." International Journal of High Speed Electronics and Systems 13, no. 02 (2003): 429–56. http://dx.doi.org/10.1142/s012915640300179x.

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Harmonic generation based on frequency multipliers has proven to be the most successful and widely used solid-state technology for generating power at submillimeter wavelengths. Over the last several years, the development of new device technologies, implementation of innovative circuits, and application of advanced integrated-circuit processing techniques to frequency multiplier design have resulted in unprecedented levels of performance throughout the submillimeter-wave frequency band. This paper reviews the technological innovations, device options, circuit architectures, and fabrication technologies that have made harmonic generation such a successful approach to source development in the submillimeter spectrum.

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Rozprawy doktorskie na temat "GENERATING CIRCUITS"

Sheikhbahaei, Shahriar. "Astroglial control of respiratory rhythm generating circuits." Thesis, University College London (University of London), 2017. http://discovery.ucl.ac.uk/10037956/.

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Astrocytes, the most numerous glial cells of the central nervous system, are well known to provide neuronal circuits with essential structural and metabolic support. There is also evidence that astrocytes may modulate the activities of neuronal circuits controlling motor rhythms including those of the brainstem’s preBötzinger complex (preBötC) that generates the rhythm of breathing in mammals. However, the extent and mechanisms of active astroglial control of the respiratory rhythm-generating circuits remain unknown. The morphological features of astrocytes in this critical brainstem region are also unknown. In this dissertation, viral gene transfer approaches designed to block or activate astroglial signaling pathways were used to determine the role of preBötC astrocytes in the control of breathing using in vitro and in vivo experimental models. Computer-aided morphometric analyses were used to investigate the structural features of brainstem astrocytes potentially contributing to their functional role. The results from these complementary, multi-faceted experiments show that (i) morphologically, preBötC astrocytes are larger, have more branches, and longer processes when compared to astrocytes residing in other regions of the brainstem; (ii) in conscious adult rats, blockade of vesicular release mechanisms or ATP-mediated signaling in preBötC astrocytes by virally-induced bilateral expression of either the light chain of tetanus toxin (TeLC), the dominant-negative SNARE proteins (dnSNARE), or a potent ectonucleotidase – transmembrane prostatic acid phosphatase – results in a significant reduction of resting respiratory frequency and frequency of sighs, augmented breaths that engage preBötC circuits to increase inspiratory effort; (iii) hypoxic- and CO2-induced ventilatory responses are significantly reduced when vesicular release mechanisms in preBötC astrocytes are blocked; (iv) activation of preBötC astrocytes expressing Gq-coupled Designer Receptor Exclusively Activated by Designer Drug is associated with higher frequency of both normal inspirations and sighs; (v) blockade of vesicular release mechanisms (expression of TeLC or dnSNARE) in preBötC astrocytes is associated with a dramatic reduction of exercise capacity. These data suggest that astroglial mechanisms involving exocytotic vesicular release of signaling molecules (gliotransmitters), provides tonic excitatory drive to the inspiratory rhythm-generating circuits of the preBötC and contributes to the generation of sighs. The role of preBötC astrocytes in central nervous mechanisms controlling breathing becomes especially important in conditions of metabolic stress requiring homeostatic adjustments of breathing such as systemic hypoxia, hypercapnia, and exercise, when enhanced respiratory efforts are critical to support physiological and behavioral demands of the body.

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Wang, Jianwei. "Generating, manipulating, distributing and analysing light's quantum states using integrated photonic circuits." Thesis, University of Bristol, 2015. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.702227.

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The emergence of integrated quantum photonics is revolutionising the field of photonic quantum information science and technology. Quantum photonic waveguide platforms, capable of integrating single photon sources, quantum optical circuits and single photon detectors on semiconductor chips by exploring mature micro- or nano-fabrication technology, greatly promise unprecedented complexity, miniaturisation, scalability and robustness for advanced quantum information applications, including quantum communication, sensing, simulation, machine learning and computing. This thesis is to continually enlarge the scope of integrated quantum photonics technology by developing new materials, devices and systems for new functionalities including generation, manipulation, transmission, distribution, interconversion and measurement of photonic quantum states. Gallium arsenide waveguide quantum circuits are first developed to manipulate photons, demonstrating two-photon quantum interference in integrated beamsplitters and manipulation of photon number entanglement in optical interferometers utilising the linear electro-optic effect of gallium arsenide. We also demonstrate a chip-to-chip quantum photonic interconnect, by demonstrating high-fidelity entanglement generation, manipulation, transmission, distribution and measurement across two separate integrated silicon quantum photonic chips. A highfidelity interconversion of path and polarisation encoding preserves coherence across the full interconnected chip-to-chip system. This would allows quantum information encoding, processing and analysing on chips and quantum information transmission and distribution across chips, towards the multi-chip and multi-core quantum systems. We report on-chip generation of high-purity orbital angular momentum states and the fast-speed reconfigurability and switch-ability using an ultra-compact integrated silicon microring resonator embedded with angular diffractive gratings. Quantitive and qualitative measurements are performed to analyse the orbital angular momentum states from the chip. This might allow a high-capacity quantum interconnectivity of free space and integrated quantum circuits for many quantum information prototypes. This thesis demonstrates the capabilities of on-chip encoding, controlling, transferring and analysing quantum states in photon's path, polarisation and spatial modes degrees of freedom, providing a new generation of integrated quantum photonics toolbox for future quantum information technology.

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McKnight, Walter Lee. "A meta system for generating software engineering environments /." The Ohio State University, 1985. http://rave.ohiolink.edu/etdc/view?acc_num=osu1487260531958418.

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Ferraz, Rafael da Silva. "Dispositivo para medição de impedância em sistemas de aterramento elétricos em alta frequência." Universidade Federal de Goiás, 2016. http://repositorio.bc.ufg.br/tede/handle/tede/6615.

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Submitted by Cássia Santos (cassia.bcufg@gmail.com) on 2016-12-16T12:38:56Z No. of bitstreams: 2 Dissertação - Rafael da Silva Ferraz - 2016.pdf: 8992095 bytes, checksum: 11544acef63b20e945753d7b895bb5ae (MD5) license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) Approved for entry into archive by Jaqueline Silva (jtas29@gmail.com) on 2016-12-16T16:57:34Z (GMT) No. of bitstreams: 2 Dissertação - Rafael da Silva Ferraz - 2016.pdf: 8992095 bytes, checksum: 11544acef63b20e945753d7b895bb5ae (MD5) license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) Made available in DSpace on 2016-12-16T16:57:34Z (GMT). No. of bitstreams: 2 Dissertação - Rafael da Silva Ferraz - 2016.pdf: 8992095 bytes, checksum: 11544acef63b20e945753d7b895bb5ae (MD5) license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) Previous issue date: 2016-11-04 Coordenação de Aperfeiçoamento de Pessoal de Nível Superior - CAPES This work presents the project and the implementation of a device that is capable of measuring the electrical effects, especially the impedance, in grounding meshes when subjected to atmospherical discharges. An analysis on the influence of the atmospheric discharges in electrical protection systems is performed and also a comparison between current and voltage impulsive circuits. The device is built of electronic circuits controlled by a microcontroller, with the possibility of parameter adjusting for shaping the generated impulse wave. The device was conceived such that it can be used for tests of soil impedance measurement and for verification of the behavior of electrical grounding systems under high frequencies. The results are presented for tests in different types of systems and there was satisfactory performance for the developed equipment when compared with a commercial device Este trabalho apresenta o projeto e a implementação do dispositivo capaz de medir os efeitos elétricos, em especial, as impedâncias, em malha de aterramento, sujeito a descargas atmosféricas. Analisa-se as influências das descargas atmosféricas nos sistemas de proteção elétricos e desenvolve-se análise comparativa dos circuitos impulsivos de corrente e de tensão. Constrói-se o dispositivo que consiste de circuitos eletrônicos controlados por microcontrolador, com possibilidade de ajuste de parâmetros da onda gerada. O dispositivo produzido é utilizado para medição da impedância do solo e verificação do comportamento de sistemas de aterramento elétrico em baixas e altas frequências. São apresentados os resultados dos testes em diferentes tipos de sistemas, demonstrando o satisfatório desempenho quando comparado com instrumento comercial.

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Krishnamurthy, Smitha. "SOLAR AND FUEL CELL CIRCUIT MODELING, ANALYSIS AND INTEGRATIONS WITH POWER CONVERSION CIRCUITS FOR DISTRIBUTED GENERATION." Master's thesis, University of Central Florida, 2009. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3501.

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Renewable energy is considered to be one of the most promising alternatives for the growing energy demand in response to depletion of fossil fuels and undesired global warming issue. With such perspective, Solar Cells and Fuel Cells are most viable, environmentally sound, and sustainable energy sources for power generation. Solar and Fuel cells have created great interests in modern applications including distributed energy generation to provide clean energy. The purpose of this thesis was to perform a detailed analysis and modeling of Solar and Fuel cells using Cadence SPICE, and to investigate dynamic interactions between the modules and power conversion circuits. Equivalent electronic static and dynamic models for Solar and Fuel Cells, their electrical characteristics, and typical power loss mechanisms associated with them are demonstrated with simulation results. Power conversion circuits for integration with the dynamic models of these renewable low voltage sources are specifically chosen to boost and regulate the input low dc voltage from the modules. The scope of this work was to analyze and model solar and fuel cells to study their terminal characteristics, power loss mechanisms, modules and their dynamics when interfaced with power converters, which would lead to better understanding of these renewable sources in power applications. M.S. School of Electrical Engineering and Computer Science Engineering and Computer Science Electrical Engineering MSEE

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Bollinger, S. Wayne. "Hierarchical test generation for CMOS circuits." Diss., This resource online, 1992. http://scholar.lib.vt.edu/theses/available/etd-07282008-134708/.

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Hutton, Michael D. "Characterization and parameterized generation of digital circuits." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/tape16/PQDD_0021/NQ27666.pdf.

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Vasudevan, Dilip Prasad. "Automatic test pattern generation for asynchronous circuits." Thesis, University of Edinburgh, 2012. http://hdl.handle.net/1842/7670.

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The testability of integrated circuits becomes worse with transistor dimensions reaching nanometer scales. Testing, the process of ensuring that circuits are fabricated without defects, becomes inevitably part of the design process; a technique called design for test (DFT). Asynchronous circuits have a number of desirable properties making them suitable for the challenges posed by modern technologies, but are severely limited by the unavailability of EDA tools for DFT and automatic test-pattern generation (ATPG). This thesis is motivated towards developing test generation methodologies for asynchronous circuits. In total four methods were developed which are aimed at two different fault models: stuck-at faults at the basic logic gate level and transistor-level faults. The methods were evaluated using a set of benchmark circuits and compared favorably to previously published work. First, ABALLAST is a partial-scan DFT method adapting the well-known BALLAST technique for asynchronous circuits where balanced structures are used to guide the selection of the state-holding elements that will be scanned. The test inputs are automatically provided by a novel test pattern generator, which uses time frame unrolling to deal with the remaining, non-scanned sequential C-elements. The second method, called AGLOB, uses algorithms from strongly-connected components in graph graph theory as a method for finding the optimal position of breaking the loops in the asynchronous circuit and adding scan registers. The corresponding ATPG method converts cyclic circuits into acyclic for which standard tools can provide test patterns. These patterns are then automatically converted for use in the original cyclic circuits. The third method, ASCP, employs a new cycle enumeration method to find the loops present in a circuit. Enumerated cycles are then processed using an efficient set covering heuristic to select the scan elements for the circuit to be tested.Applying these methods to the benchmark circuits shows an improvement in fault coverage compared to previous work, which, for some circuits, was substantial. As no single method consistently outperforms the others in all benchmarks, they are all valuable as a designer’s suite of tools for testing. Moreover, since they are all scan-based, they are compatible and thus can be simultaneously used in different parts of a larger circuit. In the final method, ATRANTE, the main motivation of developing ATPG is supplemented by transistor level test generation. It is developed for asynchronous circuits designed using a State Transition Graph (STG) as their specification. The transistor-level circuit faults are efficiently mapped onto faults that modify the original STG. For each potential STG fault, the ATPG tool provides a sequence of test vectors that expose the difference in behavior to the output ports. The fault coverage obtained was 52-72 % higher than the coverage obtained using the gate level tests. Overall, four different design for test (DFT) methods for automatic test pattern generation (ATPG) for asynchronous circuits at both gate and transistor level were introduced in this thesis. A circuit extraction method for representing the asynchronous circuits at a higher level of abstraction was also implemented. Developing new methods for the test generation of asynchronous circuits in this thesis facilitates the test generation for asynchronous designs using the CAD tools available for testing the synchronous designs. Lessons learned and the research questions raised due to this work will impact the future work to probe the possibilities of developing robust CAD tools for testing the future asynchronous designs.

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Franco, Eduardo Vala. "Photonic integrated circuits for next generation PONs." Master's thesis, Universidade de Aveiro, 2017. http://hdl.handle.net/10773/23473.

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Mestrado em Engenharia Eletrónica e Telecomunicação We are living in a time where communications became essential for most of our lives, whether it's in the business world, or in our own homes. The increasing need of higher bandwidth inhibits other networks other than optical ber based ones. Nowadays communications are responsible for a substantial percentage of our energetic footprint, hence Passive Optical Network(PON) are a strong contender for the next step of network implementation. These networks present a low energy consumption because between the transmitter and the receiver the signal stays in the optical domain. Although the increasing needs of bandwidth is almost across the communication world, certain services/identities need more bandwidth whether is download or upload. It's easy to understand that di erent consumers have unique needs. It's necessary to develop an architecture that serves all the costumers, in other words, there is a need for a network that provides high bitrate tra c to the users that needs it but also a network that serves the low end user that is not interested in this increase of bandwidth and therefore price in ation. There is today technologies yet to be widely implemented like NG-PON2 that were not implemented in a large scale because they dont represent a nancial return to the telecom operators simply because there is not enough user that requires the high bandwidth delivered by NG-PON2. It's necessary to nd a solution that includes not only the modern technologies but also the already implemented ones. With the objective of nding a solution for the problems mentioned before, this dissertation has the objective of designing a Photonic Integrated Circuit(PIC) that aims to be a transceiver of a Multitech Network that will be composed by the following technologies: Video-Overlay, XG-PON e NG-PON2. This dissertation presents an approach on Passive Optical Networks( PON) and the standards of the said technologies as well as a study of the components needed to assemble the transceiver using the programs ASPIC and VPI Photonics . In the end, there will be presented an architecture for the transceiver to be used in a Optical Network Unit(ONU), and the respective mask Layout. Vivemos numa época em que as comunicações se tornaram essenciais para grande parte da nossa vida, seja no mundo empresarial, seja nas nossas habitações. A crescente necessidade de aumento de largura de banda inviabiliza outras redes que não baseadas em braotica. Actualmente as comunicações são responsáveis por uma percentagem substancial dos nossos gastos energéticos, justamente por este facto Passive Optical Networks(PON) sao as principais candidatas ao próximo passo no desenvolvimento de redes. Estas apresentam menor consumo energético, pois entre o emissor e o receptor todo o sinal permanece no domínio óptico. Apesar da necessidade de largura de banda estar a aumentar de um modo transversal no mundo das telecomunicações, certos serviços/entidades necessitam de maiores velocidades tanto em termos de download como em termos de upload. E então fácil de perceber que consumidores diferentes têm necessidades diferentes. E necessário encontrar uma arquitectura que agrade a quem necessita de maiores larguras de banda mas também a quem não necessita de um aumento significativo e que, não está disposto a pagar por este. Existem neste momento tecnologias que ainda não foram implementadas em grandes escalas, como o caso de Next Generation Passive Optical Network (NG-PON2), porque não simbolizam um retorno financeiro para as grande operadores, uma vez que o número de potenciais consumidores de tais velocidades ainda não e substancialmente grande. E necessário encontrar uma solução que não so englobe as novas tecnologias como também as já existentes. Com o objectivo de se encontrar um solução para os problemas acima referidos, este trabalho assenta na elaboração de um Circuito integrado fotonico que visa ser um transrecetor de uma arquitetura multi-tecnologia em que irão ser incorporadas tecnologias como Video-Overlay, 10 Gigabit-capable Passive Optical Network (XG-PON) e NG-PON2. Esta dissertação apresenta uma abordagem as Redes Oticas Passivas e também um estudo feito aos componentes usados no transreceptor usando os programas Aspic e VPI Photonics . Porém ser a apresentado o desenho final do transreceptor que ser a usado numa Optical Network Unit(ONU).

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Tupuri, Raghuram Srinivasa. "Hierarchical sequential test generation for large circuits /." Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.

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Książki na temat "GENERATING CIRCUITS"

Martins, Ricardo M. F. Generating Analog IC Layouts with LAYGEN II. Springer Berlin Heidelberg, 2013.

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Givon, Lev E. An Open Pipeline for Generating Executable Neural Circuits from Fruit Fly Brain Data. [publisher not identified], 2016.

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Zeljko, Zilic, and SpringerLink (Online service), eds. Generating Hardware Assertion Checkers: For Hardware Verification, Emulation, Post-Fabrication Debugging and On-Line Monitoring. Springer Science + Business Media B.V, 2008.

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Bobyr', Maksim, Vitaliy Titov, and Vladimir Ivanov. Design of analog and digital devices. INFRA-M Academic Publishing LLC., 2020. http://dx.doi.org/10.12737/1070341.

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The textbook contains the material necessary for the formation of students ' knowledge of the basics of analog and digital circuitry and the principles of building digital nodes, instilling skills in the development and design of digital devices, as well as performing practical work and a course project in the discipline "electrical Engineering, electronics and circuit engineering". Methods of calculation of analog circuits and synthesis of discrete devices of combinational type and automata with memory are considered. Examples of calculation of analog circuits and implementation of digital devices for various purposes on integrated circuits are given. Meets the requirements of Federal state educational standards of higher education of the latest generation. For students of higher education institutions studying in the field of training 09.03.01 "computer Science and engineering". It can be useful for students of the areas of training "Design and technology of electronic means", "Biotechnical systems and technologies"and" Information security".

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IEEE Power Engineering Society. Power Generation Committee., ed. IEEE recommended practice for the design of safety-related DC auxiliary power systems for nuclear power generating stations. Institute of Electrical and Electronics Engineers, 1985.

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Lin, Chieh. Mixed-signal layout generation concepts. Kluwer Academic Publishers, 2004.

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Lin, Chieh. Mixed-signal layout generation concepts. Kluwer Academic Publishers, 2003.

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Bobyr', Maksim. Design of analog and digital devices. INFRA-M Academic Publishing LLC., 2025. https://doi.org/10.12737/2146031.

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The textbook contains the material necessary to form students' knowledge of the basics of analog and digital circuit engineering and the principles of building digital nodes, to instill skills in the development and design of digital devices, as well as to perform practical work and a course project in the disciplines "Fundamentals of Electronics", "Electronics", "Circuit Engineering" and "Digital signal processing". Methods for calculating analog circuits and synthesizing discrete combinational devices and automata with memory are considered. Examples of the calculation of analog circuits and the implementation of digital devices for various purposes on integrated circuits are given, as well as an example of the calculation of a course project in the discipline "Electronics" on the topic: Designing an amplifier stage on a bipolar transistor. Meets the requirements of the latest generation of federal state educational standards for higher education. It is intended for undergraduates and postgraduates in the fields of 09.03.04 "Software Engineering", 09.03.01, 09.06.01 "Computer Science and Computer Engineering", 2.3.3 "Automation and control of technological processes and production" and 5.12.4 "Cognitive modeling", studying the disciplines "Fundamentals of Electronics", "Electronics", "Circuit Engineering" and "Digital signal processing". It can be useful for students of the fields of study "Design and technology of electronic means", "Biotechnical systems and technologies" and "Information Security".

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Lampaert, Koen. Analog layout generation for performance and manufacturability. Kluwer Academic, 1999.

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Kryuchatov, Vladimir. Designing thin-film integrated circuits with increased reliability. INFRA-M Academic Publishing LLC., 2025. https://doi.org/10.12737/2155769.

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The textbook discusses the problems and ways to improve the reliability and yield of thin-film integrated circuit (IC) boards with resistive elements. Modern technologies of thin-film integrated circuits with resistive elements, including ultrahigh-frequency integrated circuits (UHF ICS), with increased reliability, are proposed. The principles and new methods of designing thin-film resistors based on them are described using the basic principles of probability theory, which take into account manufacturing errors in the design and technological parameters of resistors that occur during their manufacture. The systems of computer-aided design of resistive elements and automated statistical quality control, analysis and regulation of technological processes for manufacturing integrated circuits with resistive elements, taking into account contact resistances, to ensure high reproducibility of electrical parameters in mass production and reliability during operation, are considered. Meets the requirements of the latest generation of federal state educational standards for higher education. For students studying in the directions 11.03.03 and 11.04.03 "Design and technology of electronic means".

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Części książek na temat "GENERATING CIRCUITS"

Mellergaard, Niels, and Jørgen Staunstrup. "Generating Proof Obligations for Circuits." In Workshops in Computing. Springer London, 1993. http://dx.doi.org/10.1007/978-1-4471-3558-6_11.

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Tanaka, Takushi. "Generating explanations from electronic circuits." In Lecture Notes in Computer Science. Springer Berlin Heidelberg, 1998. http://dx.doi.org/10.1007/3-540-64582-9_806.

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Sheeran, Mary. "Generating Fast Multipliers Using Clever Circuits." In Formal Methods in Computer-Aided Design. Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-30494-4_2.

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Stent, Gunther S. "Neural Circuits for Generating Rhythmic Movements." In Self-Organizing Systems. Springer US, 1987. http://dx.doi.org/10.1007/978-1-4613-0883-6_14.

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Valiron, Benoît. "Generating Reversible Circuits from Higher-Order Functional Programs." In Reversible Computation. Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-40578-0_21.

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Li, Zhiqiang, Jiajia Hu, Xi Wu, Juan Dai, Wei Zhang, and Donghan Yang. "An Efficient Method for Generating Matrices of Quantum Logic Circuits." In Lecture Notes in Computer Science. Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-57884-8_13.

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Ádám, Zsófia, Dirk Beyer, Po-Chun Chien, Nian-Ze Lee, and Nils Sirrenberg. "Btor2-Cert: A Certifying Hardware-Verification Framework Using Software Analyzers." In Tools and Algorithms for the Construction and Analysis of Systems. Springer Nature Switzerland, 2024. http://dx.doi.org/10.1007/978-3-031-57256-2_7.

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AbstractFormal verification is essential but challenging: Even the best verifiers may produce wrong verification verdicts. Certifying verifiers enhance the confidence in verification results by generating a witness for other tools to validate the verdict independently. Recently, translating the hardware-modeling language Btor2 to software, such as the programming language C or LLVM intermediate representation, has been actively studied and facilitated verifying hardware designs by software analyzers. However, it remained unknown whether witnesses produced by software verifiers contain helpful information about the original circuits and how such information can aid hardware analysis. We propose a certifying and validating framework Btor2-Cert to verify safety properties of Btor2 circuits, combining Btor2-to-C translation, software verifiers, and a new witness validator Btor2-Val, to answer the above open questions. Btor2-Cert translates a software violation witness to a Btor2 violation witness; As the Btor2 language lacks a format for correctness witnesses, we encode invariants in software correctness witnesses as Btor2 circuits. The validator Btor2-Val checks violation witnesses by circuit simulation and correctness witnesses by validation via verification. In our evaluation, Btor2-Cert successfully utilized software witnesses to improve quality assurance of hardware. By invoking the software verifier Cbmc on translated programs, it uniquely solved, with confirmed witnesses, 8 % of the unsafe tasks for which the hardware verifier ABC failed to detect bugs.

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Ali Taher, Murad Ahmed. "Algorithmic Method for Generating DC-DC Converter Circuits by Using Topological Matrix." In Communications in Computer and Information Science. Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-22603-8_62.

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Michaelis, Dennis, and Karlheinz Ochs. "A Wave Digital Approach Towards Bio-inspired Computing Using Memristive Networks." In Springer Series on Bio- and Neurosystems. Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-36705-2_8.

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AbstractBio-inspired computing is a promising approach to tackle problems that are too complex for state-of-the-art computing approaches. It is a highly interdisciplinary field of research as it requires expertise, which ranges from understanding biological organisms (psychology, physiology zoology, biology, bio-chemistry) to building electrical circuits (electrical engineering, physics). This chapter focuses on theoretical circuits designs and concepts to abstractly map biological behavior to idealized circuits. We utilize a special digital emulation technique as a tool to digitally replicate circuits and hence bridge the gap from biological behavioral observation to hardware circuit designs. Application examples include parameter optimization of a neuronal oscillator, gait pattern generation, multi-neuron communication, neuroplasticity and optical illusions. The fundamental circuit elemental to realize several bio-inspired circuit designs is the memristor, which is essentially a resistor with a memory. Since memristors are hard to fabricate with the current state of technology, digital emulators are a useful tool to accelerate development cycles and investigate the circuits of the next generation.

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Goldberg, Eugene, and Panagiotis Manolios. "Generating High-Quality Tests for Boolean Circuits by Treating Tests as Proof Encoding." In Tests and Proofs. Springer Berlin Heidelberg, 2010. http://dx.doi.org/10.1007/978-3-642-13977-2_10.

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Streszczenia konferencji na temat "GENERATING CIRCUITS"

Alomari, Ahmad, and Sathish A. P. Kumar. "QRA: Quantum Reinforcement Agent for Generating Optimal Quantum Sensor Circuits." In 2024 IEEE International Conference on Quantum Computing and Engineering (QCE). IEEE, 2024. https://doi.org/10.1109/qce60285.2024.00162.

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Brunel, Léandre, Miller Eaton, Hussain Zaidi, and Olivier Pfister. "Generating foliated quantum error-correcting codes with quantum optics." In CLEO: Fundamental Science. Optica Publishing Group, 2024. http://dx.doi.org/10.1364/cleo_fs.2024.ff1h.4.

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We present a graph generation algorithm, using quantum optical circuits, for general continuous-variable cluster states of arbitrary dimension. We describe its application to the large-scale generation of the foliated toric code for quantum error correction.

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Midolo, Leonardo. "Nano-Mechanical Photonic Integrated Circuits with Quantum Dots." In Frontiers in Optics. Optica Publishing Group, 2024. https://doi.org/10.1364/fio.2024.ftu1c.1.

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I will present recent advances in generating and routing single photons on-chip using quantum dots and reconfigurable photonic devices based on nano-mechanical motion and discuss the challenges in scaling up the technology further. Full-text article not available; see video presentation

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Huang, Hui. "Framework Based Summarization approach for Generating Ideological and Political Education Texts." In 2025 3rd International Conference on Integrated Circuits and Communication Systems (ICICACS). IEEE, 2025. https://doi.org/10.1109/icicacs65178.2025.10967593.

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Malygin, Ivan, Ilya Lukinukh, Elena Korotkova, Vitaliy Loginovskikh, and Maxim Lyubin. "Design and Study of Passive Optical Logic Element “AND” for Application in Photonic Integrated Circuits." In 2025 Systems of Signals Generating and Processing in the Field of on Board Communications. IEEE, 2025. https://doi.org/10.1109/ieeeconf64229.2025.10948071.

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Wang, Chenyu, Lin Zou, and Yu Feng. "Analysis of the Effect of Contact Resistance on the Output Accuracy of Standard Signal Generating Circuits." In 2024 3rd International Symposium on Semiconductor and Electronic Technology (ISSET). IEEE, 2024. https://doi.org/10.1109/isset62871.2024.10779931.

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MacDonald, S. "Preoperational Chemical Cleaning of Heat Recovery Steam Generators." In CORROSION 2003. NACE International, 2003. https://doi.org/10.5006/c2003-03582.

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Abstract Combined-cycle power generation has become very popular for utilities wishing to increase their power production capacity. Compared to conventional coal-fired units, combined-cycle plants are less expensive, easier to install, have a higher efficiency, and, at the time of this study, are less subject to environmental regulations. An integral component of a combined-cycle unit is the heat recovery steam generator (HRSG). Although heat fluxes in an HRSG are typically lower than in a standard boiler,1 water chemistry issues are just as critical. One topic of extensive discussion among power generating personnel is pre-operational chemical cleaning of HRSGs. Pre-operational cleanings are often recommended to remove lubricants, mill scale, weld spatter, and other debris that would otherwise foul the boiler upon start-up. Chemical cleaning of an HRSG is frequently complicated by the physical lay out of the unit, which may include two or even three steam generating circuits. This may require staged or extended cleaning procedures. This report outlines previous experiences with HRSG pre-operational cleanings and it looks at how cleaning procedures may be improved in the future.

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Gaber, Lamya, Aziza I. Hussein, and Mohammed Moness. "Incremental Automatic Correction for Digital VLSI Circuits." In 10th International Conference on Advances in Computing and Information Technology (ACITY 2020). AIRCC Publishing Corporation, 2020. http://dx.doi.org/10.5121/csit.2020.101508.

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The impact of the recent exponential increase in complexity of digital VLSI circuits has heavily affected verification methodologies. Many advances toward verification and debugging techniques of digital VLSI circuits have relied on Computer Aided Design (CAD). Existing techniques are highly dependent on specialized test patterns with specific numbers increased by the rising complexity of VLSI circuits. A second problem arises in the form of large sizes of injecting circuits for correction and large number of SAT solver calls with a negative impact on the resultant running time. Three goals arise: first, diminishing dependence on a given test pattern by incrementally generating compact test patterns corresponding to design errors during the rectification process. Second, to reduce the size of in-circuit mutation circuit for error-fixing process. Finally, distribution of test patterns can be performed in parallel with a positive impact on digital VLSI circuits with large numbers of inputs and outputs. The experimental results illustrate that the proposed incremental correction algorithm can fix design bugs of type gate replacements in several digital VLSI circuits from ISCAS'85 with high speed and full accuracy. The speed of proposed Auto-correction mechanism outperforms the latest existing methods around 4.8x using ISCAS'85 benchmarks. The parallel distribution of test patterns on digital VLSI circuits during generating new compact test patterns achieves speed around 1.2x compared to latest methods.

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Tabei, Kaku, and Toshinori Yamada. "On generating test sets for reversible circuits." In Systems (ICCES). IEEE, 2009. http://dx.doi.org/10.1109/icces.2009.5383305.

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Dubrov, Denis, and Alexander Roshal. "Generating pipeline integrated circuits using C2HDL converter." In 2013 11th East-West Design and Test Symposium (EWDTS). IEEE, 2013. http://dx.doi.org/10.1109/ewdts.2013.6673108.

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Raporty organizacyjne na temat "GENERATING CIRCUITS"

Ghosh, Abhijit, Srinivas Devadas, and A. R. Newton. Test Generation for Highly Sequential Circuits. Defense Technical Information Center, 1989. http://dx.doi.org/10.21236/ada211932.

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Pasupuleti, Murali Krishna. Quantum-Enhanced Machine Learning: Harnessing Quantum Computing for Next-Generation AI Systems. National Education Services, 2025. https://doi.org/10.62311/nesx/rrv125.

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Abstract Quantum-enhanced machine learning (QML) represents a paradigm shift in artificial intelligence by integrating quantum computing principles to solve complex computational problems more efficiently than classical methods. By leveraging quantum superposition, entanglement, and parallelism, QML has the potential to accelerate deep learning training, optimize combinatorial problems, and enhance feature selection in high-dimensional spaces. This research explores foundational quantum computing concepts relevant to AI, including quantum circuits, variational quantum algorithms, and quantum kernel methods, while analyzing their impact on neural networks, generative models, and reinforcement learning. Hybrid quantum-classical AI architectures, which combine quantum subroutines with classical deep learning models, are examined for their ability to provide computational advantages in optimization and large-scale data processing. Despite the promise of quantum AI, challenges such as qubit noise, error correction, and hardware scalability remain barriers to full-scale implementation. This study provides an in-depth evaluation of quantum-enhanced AI, highlighting existing applications, ongoing research, and future directions in quantum deep learning, autonomous systems, and scientific computing. The findings contribute to the development of scalable quantum machine learning frameworks, offering novel solutions for next-generation AI systems across finance, healthcare, cybersecurity, and robotics. Keywords Quantum machine learning, quantum computing, artificial intelligence, quantum neural networks, quantum kernel methods, hybrid quantum-classical AI, variational quantum algorithms, quantum generative models, reinforcement learning, quantum optimization, quantum advantage, deep learning, quantum circuits, quantum-enhanced AI, quantum deep learning, error correction, quantum-inspired algorithms, quantum annealing, probabilistic computing.

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Author, Not Given. Advanced Gate Dielectric Materials for Next-Generation Integrated Circuits. Office of Scientific and Technical Information (OSTI), 2018. http://dx.doi.org/10.2172/1483866.

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Cardwell, Suma, John Smith, and Douglas Crowder. AI-enhanced Codesign for Next-Generation Neuromorphic Circuits and Systems. Office of Scientific and Technical Information (OSTI), 2022. http://dx.doi.org/10.2172/1889339.

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Ragozin, Konstantin. High-tech ecosystem in construction. Intellectual Archive, 2024. http://dx.doi.org/10.32370/iaj.3187.

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The issues of ensuring the stability and safety of energy generating equipment, including through various innovative aspects of cyber security, are currently extremely relevant; Energy equipment when used within the framework of construction projects is quite autonomous and issues of operational management and online control can be fully resolved within the capacity of their internal processors and controllers. In many cases, issues of computer modeling of the operating cycle parameters of such equipment, with the correct and economical formulation of the problem, can also be solved using the above resources. Construction and Electricity companies have significant engineering resources to optimize the processes of electricity production, including using the latest fuel mixtures of diesel fuel and methanol, with a tendency to increase the proportions of methanol in the fuel mixture up to 95-100%. Changing the type and kind of fuel requires prompt restructuring of the operation of all control and management systems and loading special software onto these systems that takes into account all the nuances and changes in the operating parameters of the equipment and settings, and calibration of the control and monitoring systems; Production experience and practice have shown that mobile and very simple systems are required that can ensure the operation of equipment in an autonomous mode, without involving additional data carriers in the circuits; In this regard, it is necessary to note the fact that, having familiarized ourselves with the most interesting integrative inventions and informative publications of the famous innovation specialist Dmitry Starkov on the subject of high-tech ecosystems in the construction industry, our working group recognized the utmost necessity and promise in testing the data carrier encoding system in accordance with his proposals and recommendations; As can be seen from the above publications, Dmitry Starkov's developments in this area as a whole ensure compliance with all of the above technical requirements and a fairly significant number of both independent requirements and their combinations, as well as new requirements that open up a new and promising technological field - high-tech ecosystems and infrastructures in construction projects using magnetic resonance, non-contact control methods and nanoscale measurements.

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Boppana, Vamsi, and W. Kent Fuchs. Dynamic Fault Collapsing and Diagnostic Test Pattern Generation for Sequential Circuits. Defense Technical Information Center, 1998. http://dx.doi.org/10.21236/ada351548.

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Vawter, G. A., A. Mar, J. Zolper, and V. Hietala. Photonic integrated circuit for all-optical millimeter-wave signal generation. Office of Scientific and Technical Information (OSTI), 1997. http://dx.doi.org/10.2172/469141.

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Rahai, Hamid, Assma Begum, Jeremy Bonifacio, and Ryan Moffit. Experimental Investigations of Wind Shear from Passing a Vehicle. Mineta Transportation Institute, 2024. https://doi.org/10.31979/mti.2024.2334.

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Wind energy can be harnessed for various commercial and transportation-related applications. This study assessed experimentally the potential of capturing wind energy from the passage of vehicles for electric power generation. Both wind tunnel experiments and field tests were performed. The wind tunnel experiments were performed in an open-circuit low-speed wind tunnel at a free-stream mean velocity of 23 m/s. Five PVC pipes placed adjacent to the wind-blowing domain were used to simulate the columns under a freeway overpass. A scaled Ahmad body (simplified car body model) was used as the vehicle. The spanwise distance between the Ahmad body and the tubes was 0.75 W where W is the width of the vehicle. The middle tube was used as a reference tube for circumferential and vertical pressure measurements. The streamwise locations of the vehicle were according to our previous transient numerical simulations as the vehicle approached and passed the columns at 0.1–0.5 sec. Results showed a significant potential of the transient wind generated from passing vehicles and identified optimized locations for harnessing this wind for electric power generation. Field tests were performed using a moving scaled Ahmad body. The vehicle speed was approximately 22 miles/hr (10 m/s.). Wind measurements were made up to 0.75 W adjacent to a vertical wall with static and total pressure taps. Results verified the corresponding wind tunnel results and showed a maximum transient wind of 10 m/s from the passing of the vehicle. These results were in agreement with our previous simulation results. The experiment results suggest great potential for harnessing the wind from vehicles to generate electric power, benefiting California's renewable energy goals.

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Eshed, Yuval, and Sarah Hake. Exploring General and Specific Regulators of Phase Transitions for Crop Improvement. United States Department of Agriculture, 2012. http://dx.doi.org/10.32747/2012.7699851.bard.

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The transition of plants from a juvenile to adult growth phase entails a wide range of changes in growth habit, physiological competence and composition. Strikingly, most of these changes are coordinated by the expression of a single regulator, micro RNA 156 (miR156) that coordinately regulates a family of SBP genes containing a miR156 recognition site in the coding region or in their 3’ UTR. In the framework of this research, we have taken a broad taxonomic approach to examine the role of miR156 and other genetic regulators in phase change transition and its implication to plant development and crop improvement. We set to: Determine the common and unique factors that are altered upon juvenile to adult phase transition. Determine the functions of select miR156 target genes in tomato and maize, and identify those targets that mediate phase transition. Characterize the role of miR172 and its targets in tomato phase change. Determine the relationships between the various molecular circuits directing phase change. Determine the effects of regulated manipulation of phase change genes on plant architecture and if applicable, productivity. In the course of the study, a new technology for gene expression was introduced – next generation sequencing (NGS). Hence some of the original experiments that were planned with other platforms of RNA profiling, primarily Affymetrix arrays, were substituted with the new technology. Yet, not all were fully completed. Moreover, once the initial stage was completed, each group chose to focus its efforts on specific components of the phase change program. The Israeli group focused on the roles of the DELAYED SYMPODIAL TERMINATION and FALSIFLORA factors in tomato age dependent programs whereas the US group characterized in detail the role of miR156 (also termed Cg) in other grasses and in maize, its interplay with the many genes encoding miR172.

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Modeling a Printed Circuit Heat Exchanger with RELAP5-3D for the Next Generation Nuclear Plant. Office of Scientific and Technical Information (OSTI), 2010. http://dx.doi.org/10.2172/1004237.

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