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Artykuły w czasopismach na temat „GENERATING CIRCUITS”

Autor: Grafiati

Data publikacji: 11 września 2023

Data aktualizacji: 19 lipca 2025

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Yaman, Orhan, Tuba Sanli, and Mehmet Karakose. "A Quine-McCluskey Based Method for Generating Optimum Combinational Logic Circuits from Reversible Quantum Circuits." Journal of Artificial Intelligence and Autonomous Intelligence 01, no. 01 (2024): 139–54. https://doi.org/10.54364/jaiai.2024.1110.

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Algorithms specifically designed for quantum computers have been developed. In quantum circuits, the Feynman, Toffoli, and Fredkin gates are employed instead of traditional inputs such as AND, OR, NAND, NOR, XOR, and XNOR in combinational logic gates. The ability to convert quantum circuits into combinational logic circuits, or vice versa, is of utmost importance. This essay study (or paper) aims to demonstrates the process of deriving combinational logic circuits from reversible quantum circuits. To achieve this, the Quine-McCluskey technique was utilized along with state tables generated from the quantum circuits to obtain an optimal logic expression that serves as the basis for constructing the combinational logic circuit. The resultant obtained combinational logic circuit was implemented within the MATLAB Simulink environment, and state tables were obtained. A comparison was made between the state tables derived from the quantum circuit and the combinational circuit, yielding successful results.

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Materzok, Marek. "Generating circuits with generators." Proceedings of the ACM on Programming Languages 6, ICFP (2022): 52–79. http://dx.doi.org/10.1145/3549821.

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The most widely used languages and methods used for designing digital hardware fall into two rough categories. One of them, register transfer level (RTL), requires specifying each and every component in the designed circuit. This gives the designer full control, but burdens the designer with many trivial details. The other, the high-level synthesis (HLS) method, allows the designer to abstract the details of hardware away and focus on the problem being solved. This method however cannot be used for a class of hardware design problems because the circuit's clock is also abstracted away. We present YieldFSM, a hardware description language that uses the generator abstraction to represent clock-level timing in a digital circuit. It represents a middle ground between the RTL and HLS approaches: the abstraction level is higher than in RTL, but thanks to explicit information about clock-level timing, it can be used in applications where RTL is traditionally used. We also present the YieldFSM compiler, which uses methods developed by the functional programming community -- including continuation-passsing style translation and defunctionalization -- to translate YieldFSM programs to Mealy machines. It is implemented using Template Haskell and the Clash functional hardware description language. We show that this approach leads to short and conceptually simple hardware descriptions.

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Briggman, K. L., and W. B. Kristan. "Multifunctional Pattern-Generating Circuits." Annual Review of Neuroscience 31, no. 1 (2008): 271–94. http://dx.doi.org/10.1146/annurev.neuro.31.060407.125552.

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Strohmer, Beck, Elias Najarro, Jessica Ausborn, Rune W. Berg, and Silvia Tolu. "Sparse Firing in a Hybrid Central Pattern Generator for Spinal Motor Circuits." Neural Computation 36, no. 5 (2024): 759–80. http://dx.doi.org/10.1162/neco_a_01660.

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Abstract Central pattern generators are circuits generating rhythmic movements, such as walking. The majority of existing computational models of these circuits produce antagonistic output where all neurons within a population spike with a broad burst at about the same neuronal phase with respect to network output. However, experimental recordings reveal that many neurons within these circuits fire sparsely, sometimes as rarely as once within a cycle. Here we address the sparse neuronal firing and develop a model to replicate the behavior of individual neurons within rhythm-generating populations to increase biological plausibility and facilitate new insights into the underlying mechanisms of rhythm generation. The developed network architecture is able to produce sparse firing of individual neurons, creating a novel implementation for exploring the contribution of network architecture on rhythmic output. Furthermore, the introduction of sparse firing of individual neurons within the rhythm-generating circuits is one of the factors that allows for a broad neuronal phase representation of firing at the population level. This moves the model toward recent experimental findings of evenly distributed neuronal firing across phases among individual spinal neurons. The network is tested by methodically iterating select parameters to gain an understanding of how connectivity and the interplay of excitation and inhibition influence the output. This knowledge can be applied in future studies to implement a biologically plausible rhythm-generating circuit for testing biological hypotheses.

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Brodovskaya, Anastasia, and Jaideep Kapur. "Circuits generating secondarily generalized seizures." Epilepsy & Behavior 101 (December 2019): 106474. http://dx.doi.org/10.1016/j.yebeh.2019.106474.

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SOLIMAN, AHMED M. "GENERATION OF THIRD-ORDER QUADRATURE OSCILLATOR CIRCUITS USING NAM EXPANSION." Journal of Circuits, Systems and Computers 22, no. 07 (2013): 1350060. http://dx.doi.org/10.1142/s0218126613500606.

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A systematic synthesis procedure for generating third-order grounded passive element quadrature oscillators is given. The synthesis procedure is based on using nodal admittance matrix (NAM) expansion applied to the Y matrix of a recently reported three Op Amp third-order oscillator circuit. Four new circuits using current conveyors (CCII) are reported. In addition four more new circuits using inverting current conveyors (ICCII) are also given. Many more quadrature third-order oscillator circuits using combinations of CCII and ICCII can be obtained. Simulation results demonstrating the practicality of one of the generated circuits are included.

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Kosarev, Boris. "FERRORESONANT PROCESSES IN POWER SUPPLY SYSTEMS WITH DISTRIBUTED GENERATION." Electrical and data processing facilities and systems 18, no. 3-4 (2022): 56–64. http://dx.doi.org/10.17122/1999-5458-2022-18-3-4-56-64.

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Relevance The article is devoted to the study of the possibility of occurrence of ferroresonant processes in power supply systems with distributed generation. Ferroresonant processes cause overvoltages in electrical installations and lead to their failure. In backbone and distribution networks without distributed generation facilities, the phenomenon of ferroresonance has been studied quite deeply, effective hardware and operational measures have been developed to prevent the occurrence of ferroresonance surges in electrical installations. However, the issue of the occurrence of ferroresonant processes in power supply systems with distributed generation, which is a promising direction in the development of the energy sector, seems to be little studied. Aim of research The main aim of the research is to investigate circuit-mode conditions for the occurrence of ferroresonant processes in power supply systems with distributed generation. Research methods To study the circuit-mode conditions for the occurrence of ferroresonant processes in power supply systems with distributed generation, the main provisions of the theory of electrical complexes and systems, the theory of nonlinear electrical circuits, and the principles of controlling objects of electrical complexes and industrial systems were used. Results The circuit-mode conditions for the occurrence of ferroresonant processes in power supply systems with distributed generation are studied. The power supply system of a HF radio center, containing a power plant with a lower installed power or corresponding to the maximum power consumption of the load, was chosen as the object of study. The features of the scheme-mode conditions for the occurrence of ferroresonant processes under conditions of distributed generation are as follows. Due to the insignificant remoteness of distributed generation facilities and consumers, additional opportunities arise for subharmonic ferroresonant processes. When a generating plant is connected to low-voltage busbars, conditions are created for the occurrence of a ferroresonant process involving low-voltage windings of power transformers. The low dynamic stability of generating installations of distributed generation facilities based on synchronous generators reduces the likelihood and duration of ferroresonant processes in the event of phase wire breaks and short circuits on the power line. Generating plants connected via grid inverters have a limited output current and can be turned off by emergency automatics in the event of an emergency operation of the grid, which, as a rule, precedes the appearance of ferroresonant overvoltages in electrical installations. Thus, in power districts with distributed generation facilities, the circuit-mode conditions for the occurrence of ferroresonant processes, known in the centralized power supply system, undergo changes, and it is also possible to form new ferroresonant oscillatory circuits. Keywords: distributed generation, ferroresonant process, power supply system, oscillatory circuit, generating plant, relay protection and automation devices Acknoledgements: The work was carried out under the state order of the Omsk Scientific Center of the Siberian Branch of the Russian Academy of Sciences (project state registration number 122011200349-3).

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GÜNAY, ENIS, and MUSTAFA ALÇI. "n-DOUBLE SCROLLS IN SC-CNN CIRCUIT VIA DIODE-BASED PWL FUNCTION." International Journal of Bifurcation and Chaos 16, no. 04 (2006): 1023–33. http://dx.doi.org/10.1142/s0218127406015271.

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In this paper n-double scroll generating via diode-based PieceWise-Linear (PWL) circuit in State Controlled Cellular Neural Network (SC-CNN) is presented. It has been shown that by using simple diode-based configurations; alternative nonlinear circuit configurations for chaotic circuits and PWL-based systems can be used in the generation of n-double scrolls. With this study, while the analysis of the nonlinear block in the SC-CNN-based circuit is simplified, the implementation cost of the circuit is also reduced. Pspice simulations are proved with experimental studies.

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Kim, Junyeong, and Jin Jang. "P‐2: Narrow Bezel Gate Driver Generating Positive Pulse for AMOLED Display Using LTPO Technology with Depletion Mode Oxide TFTs." SID Symposium Digest of Technical Papers 54, no. 1 (2023): 1782–85. http://dx.doi.org/10.1002/sdtp.16950.

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We propose a novel gate driver generating positive pulse for oxide switching TFTs in AMOLED pixel circuits using low‐temperature polycrystalline silicon and oxide (LTPO) thin‐film transistors (TFTs). The proposed gate driver circuit has only five TFTs without capacitor. The proposed circuits can operate perfectly when all oxide TFTs in the circuits have threshold voltage (VTH) of ‐3.5V, depletion mode. The circuit can be easily designed for narrow bezel due to simple structures. The one stage of the circuit was designed with the size of 50 μm × 100 μm. The fabricated circuit works well with the depletion mode oxide TFTs with VTH of ‐3.5V. The circuit operated at the pulse width of 1 μs, corresponding to operating speed of 500 kHz. The proposed gate driver can be applicable for narrow bezel AMOLED display.

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Weikle, R. M., T. W. Crowe, and E. L. Kollberg. "Multiplier and Harmonic Generator Technologies for Terahertz Applications." International Journal of High Speed Electronics and Systems 13, no. 02 (2003): 429–56. http://dx.doi.org/10.1142/s012915640300179x.

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Harmonic generation based on frequency multipliers has proven to be the most successful and widely used solid-state technology for generating power at submillimeter wavelengths. Over the last several years, the development of new device technologies, implementation of innovative circuits, and application of advanced integrated-circuit processing techniques to frequency multiplier design have resulted in unprecedented levels of performance throughout the submillimeter-wave frequency band. This paper reviews the technological innovations, device options, circuit architectures, and fabrication technologies that have made harmonic generation such a successful approach to source development in the submillimeter spectrum.

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Miachin, Danil Aleksandrovich, Viktoriia Pavlovna Pugach, Stepan Sergeevich Avdeiuk, Vladimir Viktorovich Zunin, and Aleksandr Yur’yevich Romanov. "The Open System for Storing and Processing of a Dataset of Combinational Circuits." Proceedings of the Institute for System Programming of the RAS 35, no. 5 (2023): 81–90. http://dx.doi.org/10.15514/ispras-2022-35(5)-6.

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This paper presents an open-source software for generation, storage, and analysis of combinational circuits. The previously created methods for generating combinational circuits have been optimized, and a dataset has been formed. The generation of combinational circuits is carried out on various devices. The application implements the possibility to combine the generated datasets into a single storage (Synology Drive), as well as analyze the fault tolerance of combinational circuits using various methods for their evaluation. New possible methods for assessing combinational circuits’ reliability using machine learning are proposed.

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CAFAGNA, DONATO, and GIUSEPPE GRASSI. "NEW 3D-SCROLL ATTRACTORS IN HYPERCHAOTIC CHUA'S CIRCUITS FORMING A RING." International Journal of Bifurcation and Chaos 13, no. 10 (2003): 2889–903. http://dx.doi.org/10.1142/s0218127403008284.

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This paper presents an approach for generating new hyperchaotic attractors in a ring of Chua's circuits. By taking a closed chain of three circuits and exploiting sine functions as nonlinearities, the proposed technique enables 3D-scroll attractors to be generated. In particular, the paper shows that 3D-scroll dynamics can be designed by modifying six parameters related to the circuit nonlinearities.

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Zeng, Xian Tao, and Qian Hua Ren. "Power Generation System by Vehicle on the Downhill of Expressway." Advanced Materials Research 724-725 (August 2013): 1361–65. http://dx.doi.org/10.4028/www.scientific.net/amr.724-725.1361.

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In this paper, a method of magnetoelectricity power generation system for vehicle on the downhill of expressways is proposed. This system is a clean energy system that can be reused. Its structure includes car magnetic poles, magnetic poles imbedded in road surface, closed circuit imbedded in road surface, rectifier, inverter and storage battery. Multi-unit magnetic poles and closed circuits imbedded in the road surface are used in this invention, so when the car poles move with the running down of cars on downhill, magnetic flow in closed circuits will change to produce a technique of group control power generation. From the simulated system in the test, it can be seen that it is efficient and effective in generating power.

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Liu, Ruopeng, Kai He, Liming Zhang, and Xiangrui Geng. "Design of Secondary Circuit Visualization System for UHVDC Converter Stations." Journal of Physics: Conference Series 2503, no. 1 (2023): 012070. http://dx.doi.org/10.1088/1742-6596/2503/1/012070.

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Abstract For the problems of complicated work content and error-prone workload of secondary circuits, a three-dimensional visualization method is proposed for the visualization and management of the physical circuits of the control and protection system of the converter station based on digital twin technology. The system can be used to improve the work efficiency of operation and maintenance personnel by constructing a secondary circuit information data model, generating corresponding data through artificial intelligence image recognition and manual review of secondary circuit drawings and schematics, and performing accurate corresponding circuit data analysis and 3D visualization management of the secondary physical circuits of control and security equipment, which can visualize the circuit information of control and security equipment in the station from outside to inside at multiple levels and multiple dimensions.

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BIRGET, JEAN-CAMILLE. "FACTORIZATIONS OF THE THOMPSON–HIGMAN GROUPS, AND CIRCUIT COMPLEXITY." International Journal of Algebra and Computation 18, no. 02 (2008): 285–320. http://dx.doi.org/10.1142/s0218196708004457.

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We consider the subgroup lpGk,1 of length preserving elements of the Thompson–Higman group Gk,1 and we show that all elements of Gk,1 have a unique lpGk,1 · Fk,1 factorization. This applies to the Thompson–Higman group Tk,1 as well. We show that lpGk,1 is a "diagonal" direct limit of finite symmetric groups, and that lpTk,1 is a k∞ Prüfer group. We find an infinite generating set of lpGk,1 which is related to reversible boolean circuits. We further investigate connections between the Thompson–Higman groups, circuits, and complexity. We show that elements of Fk,1 cannot be one-way functions. We show that describing an element of Gk,1 by a generalized bijective circuit is equivalent to describing the element by a word over a certain infinite generating set of Gk,1; word length over these generators is equivalent to generalized bijective circuit size. We give some coNP-completeness results for Gk,1 (e.g., the word problem when elements are given by circuits), and [Formula: see text]-completeness results (e.g., finding the lpGk,1 · Fk,1 factorization of an element of Gk,1 given by a circuit).

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Kiran, Kumar Gopathoti, and Sunil Kumar G. "Built-in Self-Test Algorithm for Functional Broadside Tests." Journals of Advancement in Electronics Design 5, no. 3 (2022): 1–9. https://doi.org/10.5281/zenodo.7476638.

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<em>In this paper, we propose a technique for weighted test sequence generation for synchronous sequential circuit’s on-chip. Three weights—0, 0.5, and 1—are adequate for combinational circuits to completely cover stuck-at failures because they can accurately duplicate any given test pattern. We define the weights for sequential circuits based on subsequences of a deterministic test sequence. These weights enable us to partially replicate the test sequence and assure that the resulting weighted test sequences would receive full fault coverage. This accumulator-based 3-weight test pattern generating system is demonstrated and more effectively addresses the fundamental shortcomings of the suggested scheme. Compared to traditional techniques of creating test sequences for complicated large-scale systems, the weighted random test pattern generation represents a major improvement.</em>

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Awata, Hiroko, Mai Takakura, Yoko Kimura, Ikuko Iwata, Tomoko Masuda, and Yukinori Hirano. "The neural circuit linking mushroom body parallel circuits induces memory consolidation in Drosophila." Proceedings of the National Academy of Sciences 116, no. 32 (2019): 16080–85. http://dx.doi.org/10.1073/pnas.1901292116.

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Memory consolidation is augmented by repeated learning following rest intervals, which is known as the spacing effect. Although the spacing effect has been associated with cumulative cellular responses in the neurons engaged in memory, here, we report the neural circuit-based mechanism for generating the spacing effect in the memory-related mushroom body (MB) parallel circuits in Drosophila. To investigate the neurons activated during the training, we monitored expression of phosphorylation of mitogen-activated protein kinase (MAPK), ERK [phosphorylation of extracellular signal-related kinase (pERK)]. In an olfactory spaced training paradigm, pERK expression in one of the parallel circuits, consisting of γm neurons, was progressively inhibited via dopamine. This inhibition resulted in reduced pERK expression in a postsynaptic GABAergic neuron that, in turn, led to an increase in pERK expression in a dopaminergic neuron specifically in the later session during spaced training, suggesting that disinhibition of the dopaminergic neuron occurs during spaced training. The dopaminergic neuron was significant for gene expression in the different MB parallel circuits consisting of α/βs neurons for memory consolidation. Our results suggest that the spacing effect-generating neurons and the neurons engaged in memory reside in the distinct MB parallel circuits and that the spacing effect can be a consequence of evolved neural circuit architecture.

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Marder, Eve, and Kristina J. Rehm. "Development of central pattern generating circuits." Current Opinion in Neurobiology 15, no. 1 (2005): 86–93. http://dx.doi.org/10.1016/j.conb.2005.01.011.

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Zhang, Chao Xia. "Circuit Realization of Grid Multi-Wing Hyperchaotic System." Applied Mechanics and Materials 336-338 (July 2013): 718–21. http://dx.doi.org/10.4028/www.scientific.net/amm.336-338.718.

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This paper investigates a grid multi-wing hyperchaotic system firstly, then an improved module-based circuits are designed for generating the hyperchaotic attractor. Numerical simulation and circuit implementation have testified the feasibility of the proposed method.

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NAKATA, YOSHIFUMI, and MIO MURAO. "DIAGONAL-UNITARY 2-DESIGN AND THEIR IMPLEMENTATIONS BY QUANTUM CIRCUITS." International Journal of Quantum Information 11, no. 07 (2013): 1350062. http://dx.doi.org/10.1142/s0219749913500627.

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We study efficient generations of random diagonal-unitary matrices, an ensemble of unitary matrices diagonal in a given basis with randomly distributed phases for their eigenvalues. Despite the simple algebraic structure, they cannot be achieved by quantum circuits composed of a few-qubit diagonal gates. We introduce diagonal-unitaryt-designs and present two quantum circuits that implement diagonal-unitary 2-design with the computational basis in N-qubit systems. One is composed of single-qubit diagonal gates and controlled-phase gates with randomized phases, which achieves an exact diagonal-unitary 2-design after applying the gates on all pairs of qubits. The number of required gates is N(N - 1)/2. If the controlled-Z gates are used instead of the controlled-phase gates, the circuit cannot achieve an exact 2-design, but achieves an ϵ-approximate 2-design by applying gates on randomly selected pairs of qubits. Due to the random choice of pairs, the circuit obtains extra randomness and the required number of gates is at most O(N2(N + log 1/∊)). We also provide an application of the circuits, a protocol of generating an exact 2-design of random states by combining the circuits with a simple classical procedure requiring O(N) random classical bits.

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YOUNES, AHMED. "TIGHT BOUNDS ON THE SYNTHESIS OF 3-BIT REVERSIBLE CIRCUITS: NFFr LIBRARY." Journal of Circuits, Systems and Computers 23, no. 03 (2014): 1450040. http://dx.doi.org/10.1142/s0218126614500406.

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The reversible circuit synthesis problem can be reduced to permutation group. This allows Schreier–Sims algorithm for the strong generating set-finding problem to be used to find tight bounds on the synthesis of 3-bit reversible circuits using the NFFr library. The tight bounds include the maximum and minimum length of 3-bit reversible circuits, the maximum and minimum cost of 3-bit reversible circuits. The analysis shows better results than that found in the literature for the lower bound of the cost. The analysis also shows that there are 2460 universal reversible sub-libraries from the main NFFr library.

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LÜ, JINHU, and GUANRONG CHEN. "GENERATING MULTISCROLL CHAOTIC ATTRACTORS: THEORIES, METHODS AND APPLICATIONS." International Journal of Bifurcation and Chaos 16, no. 04 (2006): 775–858. http://dx.doi.org/10.1142/s0218127406015179.

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Over the last two decades, theoretical design and circuit implementation of various chaos generators have been a focal subject of increasing interest due to their promising applications in various real-world chaos-based technologies and information systems. In particular, generating complex multiscroll chaotic attractors via simple electronic circuits has seen rapid development. This article offers an overview of the subject on multiscroll chaotic attractors generation, including some fundamental theories, design methodologies, circuit implementations and practical applications. More precisely, the article first describes some effective design methods using piecewise-linear functions, cellular neural networks, nonlinear modulating functions, circuit component design, switching manifolds, multifolded tori formation, and so on. Based on different approaches, computer simulation and circuit implementation of various multiscroll chaotic attractors are then discussed in detail, with some theoretical proofs and laboratory experiments presented for verification and demonstration. It is then followed by some discussion on potential applications of multiscroll chaotic attractors, including secure and digital communications, synchronous prediction, random bit generation, and so on. The article is finally concluded with some future research outlooks, putting the important subject into engineering perspective.

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Pavlov, Gennadiy, Andrey Obrubov, and Irina Vinnichenko. "Optimizing the operation of charging self-generating resonant inverters." Eastern-European Journal of Enterprise Technologies 1, no. 5(115) (2022): 23–34. http://dx.doi.org/10.15587/1729-4061.2022.252148.

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This paper reports a study of the electromagnetic processes in self-generating resonant inverters, as well as the derivation of analytical dependences of their operating frequency on the parameters of the resonance circuit and positive feedback circuits, in order to expand the range of their output power and optimize their operation. The object of research is electromagnetic processes in resonant inverters, in which autogeneration of resonant current oscillations is carried out in the process of operation. The results of studying the electromagnetic processes in sequential self-generating resonant inverters based on the characteristics of the resonant circuit are presented. The operating modes of the inverters have been optimized by setting certain ratios between the operating and resonant frequencies at unstable circuit parameters. The ratio of operating and resonant frequencies is set through the use of phase-shifting filters in a positive feedback loop along the circuit current and correspond to the autogenerator mode. The conditions of self-generation in converters with a sequential resonant circuit have been determined. Mathematical expressions have been built for determining the coefficients of positive feedback on the current and voltage of the resonant circuit, which made it possible to derive target analytical dependences. Analytical dependences of the established operating frequency on the parameters of the circuit and phase-shifting filters have been established. Based on the obtained dependences, the parameters of the positive feedback circuits have been determined in order to ensure a wide range of output power of the converters. The resulting dependences make it possible to carry out theoretical calculations whose results repeat the results of model experiments. Phase characteristics of the resonance circuit and various phase-shifting filters, which can be part of a serial resonant converter, have been constructed. The results of the analysis reported here could be used in the design of resonant inverters with unstable circuit parameters, in particular in inductive chargers.

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Gennadiy, Pavlov, Obrubov Andrey, and Vinnichenko Irina. "Optimizing the operation of charging self-generating resonant inverters." Eastern-European Journal of Enterprise Technologies 1, no. 5 (115) (2022): 23–34. https://doi.org/10.15587/1729-4061.2022.252148.

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Sharma, Ankit. "The Development of an Automated Approach for Designing Quantum Algorithms Using Circuits Generated By Generative Adversarial Networks (Gans)." Journal of Artificial Intelligence General science (JAIGS) ISSN:3006-4023 4, no. 1 (2024): 1–140. http://dx.doi.org/10.60087/jaigs.v4i1.226.

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The advent of quantum computing has inaugurated a novel epoch of computational prowess, offering the potential to tackle intricate problems with unparalleled speed (Zoufal et al., 2019). Quantum circuits, which are essential components of quantum computation, serve as representations of sequences of quantum gates designed for specific quantum processes (Zoufal et al., 2019). Nevertheless, the task of creating efficient quantum circuits continues to be a formidable and labor-intensive undertaking. This research proposal presents a unique methodology that utilizes Generative Adversarial Networks (GANs) to automate the process of generating quantum circuits that are specifically designed for particular quantum gates and operations (Zoufal et al., 2019). The main goal of this study is to create a model based on Generative Adversarial Networks (GANs) that can generate quantum circuits by leveraging the collaborative efforts of the generator and discriminator networks (Zoufal et al., 2019). The GAN model will be trained using a carefully selected dataset that includes established quantum circuits and their corresponding required quantum operations (Zoufal et al., 2019). This dataset will form the basis for the training process. Following this, the quantum circuits that are produced will be thoroughly assessed in terms of fidelity, efficiency, and resource allocation (Zoufal et al., 2019). Additionally, the objective of this work is to refine and optimize the circuits that are formed by employing reinforcement learning and gradient-based techniques (Zoufal et al., 2019). In addition to investigating circuit production, this research will delve into the practical implications and consequences of quantum circuits formed by Generative Adversarial Networks (GANs) on the development of quantum algorithms (Zoufal et al., 2019). The study's value is in its capacity to accelerate the creation of quantum algorithms through the automation of circuit design (Zoufal et al., 2019). This research makes a valuable contribution to the field of quantum computing by improving the efficiency and resource utilization of quantum circuits (Zoufal et al., 2019). These developments are crucial for the development of practical quantum computing applications and will play a significant role in the evolution of quantum algorithms and processing capabilities in the future (Zoufal et al., 2019).

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OYA, TAKAHIDE, IKUKO N. MOTOIKE, and TETSUYA ASAI. "SINGLE-ELECTRON CIRCUITS PERFORMING DENDRITIC PATTERN FORMATION WITH NATURE-INSPIRED CELLULAR AUTOMATA." International Journal of Bifurcation and Chaos 17, no. 10 (2007): 3651–55. http://dx.doi.org/10.1142/s0218127407019512.

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We propose a novel semiconductor device in which electronic-analogue dendritic trees grow on multilayer single-electron circuits. A simple cellular-automaton circuit was designed for generating dendritic patterns by utilizing the physical properties of single-electron devices, i.e. quantum and thermal effects in tunneling junctions. We demonstrate typical operations of the proposed circuit through extensive numerical simulations.

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Gibbs, Joe, and Lukasz Cincio. "Deep Circuit Compression for Quantum Dynamics via Tensor Networks." Quantum 9 (July 9, 2025): 1789. https://doi.org/10.22331/q-2025-07-09-1789.

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Dynamic quantum simulation is a leading application for achieving quantum advantage. However, high circuit depths remain a limiting factor on near-term quantum hardware. We present a compilation algorithm based on Matrix Product Operators for generating compressed circuits enabling real-time simulation on digital quantum computers, that for a given depth are more accurate than all Trotterizations of the same depth. By the efficient use of environment tensors, the algorithm is scalable in depth far beyond prior work, and we present circuit compilations of up to 64 layers of SU(4) gates. Surpassing only 1D circuits, our approach can flexibly target a particular quasi-2D gate topology. We demonstrate this by compiling a 52-qubit 2D Transverse-Field Ising propagator onto the IBM Heavy-Hex topology. For all circuit depths and widths tested, we produce circuits with smaller errors than all equivalent depth Trotter unitaries, corresponding to reductions in error by up to 4 orders of magnitude and circuit depth compressions with a factor of over 6.

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Ichimiya, Masahiro, Masaki Hashizume, Hiroyuki Yotsuyanagi, and Takeomi Tamesada. "A test circuit for pin shorts generating oscillation in CMOS logic circuits." Systems and Computers in Japan 35, no. 13 (2004): 10–20. http://dx.doi.org/10.1002/scj.10604.

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Suroso, Winasis, Tri Nugroho Daru, and Tri Cahyanto Wahyu. "Power loss analysis of current-modules based multilevel current-source power inverters." TELKOMNIKA Telecommunication, Computing, Electronics and Control 17, no. 1 (2019): 453–62. https://doi.org/10.12928/TELKOMNIKA. v17i1.11601.

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A power loss analysis of multilevel current-source inverter (MCSI) circuits developed from two basic configurations of three-level current-source inverters, i.e. H-bridge and common-emitter inverter configurations is presented and discussed. The first circuit topology of the MCSI is developed by using DC current modules connected to the primary three-level H-bridge inverter. The second MCSI circuit is created by connecting the current-modules to a three-level common-emitter inverter. The DC current modules work generating the intermediate level waveform of the inverter circuits. Power loss analysis of the both topologies was carried out to explore the efficiency performance of the inverter circuits. The results showed that for the H-bridge and common-emitter MCSI using DC current modules, the amount of conduction losses in the inverter circuits could be diminished when the level number of AC output current increase. The measurement test results have also proved that using these MCSI topologies, the power conversion efficiency will also increase.

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Khakpour, Mahdi, Mohammad Gholami, and Shokoufeh Naghizadeh. "Parity generator and digital code converter in QCA nanotechnology." International Nano Letters 10, no. 1 (2019): 49–59. http://dx.doi.org/10.1007/s40089-019-00292-8.

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AbstractIn this paper, new structures for digital code converter circuits in quantum dot cellular automata (QCA) technology are presented. The basic structure of most of these circuits is the XOR gate, which is widely used in digital design. Therefore, in the proposed, the XOR gate will be presented which will be better than previous circuits in terms of cell number and delay. Then, using the proposed circuits for the XOR gate, new circuits for generating parity bit, Binary to Gray, Gray to binary and BCD to gray code converter are introduced. Proposal designs have an efficient implementation in terms of complexity. The proposed structures are simulated using the QCAdesigner tool to evaluate the correct performance. The proposed final circuit as a digital code converter has improved by 37% in terms of cell consumption and 25% in speed.

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Katz, Paul S. "Evolution of central pattern generators and rhythmic behaviours." Philosophical Transactions of the Royal Society B: Biological Sciences 371, no. 1685 (2016): 20150057. http://dx.doi.org/10.1098/rstb.2015.0057.

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Comparisons of rhythmic movements and the central pattern generators (CPGs) that control them uncover principles about the evolution of behaviour and neural circuits. Over the course of evolutionary history, gradual evolution of behaviours and their neural circuitry within any lineage of animals has been a predominant occurrence. Small changes in gene regulation can lead to divergence of circuit organization and corresponding changes in behaviour. However, some behavioural divergence has resulted from large-scale rewiring of the neural network. Divergence of CPG circuits has also occurred without a corresponding change in behaviour. When analogous rhythmic behaviours have evolved independently, it has generally been with different neural mechanisms. Repeated evolution of particular rhythmic behaviours has occurred within some lineages due to parallel evolution or latent CPGs. Particular motor pattern generating mechanisms have also evolved independently in separate lineages. The evolution of CPGs and rhythmic behaviours shows that although most behaviours and neural circuits are highly conserved, the nature of the behaviour does not dictate the neural mechanism and that the presence of homologous neural components does not determine the behaviour. This suggests that although behaviour is generated by neural circuits, natural selection can act separately on these two levels of biological organization.

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Smarandache-Wellmann, Carmen, Cynthia Weller, Terrence M. Wright, and Brian Mulloney. "Five types of nonspiking interneurons in local pattern-generating circuits of the crayfish swimmeret system." Journal of Neurophysiology 110, no. 2 (2013): 344–57. http://dx.doi.org/10.1152/jn.00079.2013.

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We conducted a quantitative analysis of the different nonspiking interneurons in the local pattern-generating circuits of the crayfish swimmeret system. Within each local circuit, these interneurons control the firing of the power-stroke and return-stroke motor neurons that drive swimmeret movements. Fifty-four of these interneurons were identified during physiological experiments with sharp microelectrodes and filled with dextran Texas red, Neurobiotin, or both. Five types of neurons were identified on the basis of combinations of physiological and anatomical characteristics. Anatomical categories were based on 16 anatomical parameters measured from stacks of confocal images obtained from each neuron. The results support the recognition of two functional classes: inhibitors of power stroke (IPS) and inhibitors of return stroke (IRS). The IPS class of interneuron has three morphological types with similar physiological properties. The IRS class has two morphological types with physiological properties and anatomical features different from the IPS neurons but similar within the class. Three of these five types have not been previously identified. Reviewing the evidence for dye coupling within each type, we conclude that each type of IPS neuron and one type of IRS neuron occur as a single copy in each local pattern-generating circuit. The last IRS type includes neurons that might occur as a dye-coupled pair in each local circuit. Recognition of these different interneurons in the swimmeret pattern-generating circuits leads to a refined model of the local pattern-generating circuit that includes synaptic connections that encode and decode information required for intersegmental coordination of swimmeret movements.

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Chua, Leon. "Genesis of Chua's scheme." Izvestiya VUZ. Applied Nonlinear Dynamics 1, no. 3 (1993): 4–16. https://doi.org/10.18500/0869-6632-1993-1-3-4-16.

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The article is a systematic presentation of the sequence of technical steps that the author went through in developing a chaos-generating circuit. The design procedure, although clear in nature, could not have been invented without using some important properties of nonlinear circuits and their physical implementations.

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Sangwaranatee, N., T. Wongkampha, E. Kaseam, N. W. Sangwaranatee, and W. Mekhum. "Temperature Difference of Thermoelectric Module on PIC-Microcontroller." Advanced Materials Research 979 (June 2014): 417–20. http://dx.doi.org/10.4028/www.scientific.net/amr.979.417.

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This research is the study of electric power generated by the temperature difference below 100 °C of thermoelectric effect (cooling devices), which gets power from direct current and the electromotive force from thermoelectric module. In this research, a testing kit was designed to collect the output of temperature difference on the thermoelectric device, and compared the level of electric power of various modules in 2 different circuits; series and parallel. The result of the study showed that the higher differential temperature increased the value of electricity generation. Also, the electrical connection of thermoelectric module had an effect on power generating. When using 2 modules for each circuit, the series circuit generated more power than the parallel circuit.

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Hu, Ye Lin, Zhi Wen Du, and Zhao Quan Chen. "Development of a Pulsed DC Power Supply for Generating Cold Plasma Jet." Advanced Materials Research 791-793 (September 2013): 1841–44. http://dx.doi.org/10.4028/www.scientific.net/amr.791-793.1841.

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This paper discusses a lithium battery-driven cold plasma jet at atmospheric pressure with a pulsed power supply of design and its simulation. H.V. DC(High voltage directed current) and pulsed discharge circuit comprise of the entire pulse power system. H.V. DC circuit using TIs TMS320F28335 chips as the core of the circuit control module, the chip improves the stability of the H.V.DC circuits. Pulsed discharge circuit design plays a crucial impact on the formation of the narrowed pulses. A new double pulsed discharge circuit is designed by the proposed program. As discharge experiment shown finally, the steep narrowed pulse of pulsed power supply can be used to stabilize the output of the pulsed front.

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Zajkowski, Konrad, Stanisław Duer, Jacek Paś, and László Pokorádi. "Cooperation of a Non-Linear Receiver with a Three-Phase Power Grid." Energies 16, no. 3 (2023): 1418. http://dx.doi.org/10.3390/en16031418.

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This article presents an analysis of electrical parameters in a three-phase circuit characterized by the generation of harmonics. The Currents Physical Components (CPC) power theory for three-phase circuits were used. Relationships for three-wire circuits were used, and mathematical relationships were determined to enable decomposition into those components that depend on the direction of energy flow and the reasons for their creation. A calculation example using the previously determined dependencies was presented, and the results of the calculations were discussed. When mathematical analyses are required in circuits with non-linear receivers, and in particular, when there is a cooperation of several such receivers with a common power grid, the calculation concept presented is important. The generation of identical harmonic orders by several receivers causes a disturbance in the direction of energy flow in the power grid. For this reason, the case of a non-linear receiver generating harmonics of orders that has existed before in the power grid seems very interesting. Determining the value of individual powers can be used to estimate the impact of individual receivers on the quality of electricity.

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Leitner, Stefan, Haibo Wang, and Spyros Tragoudas. "Design Techniques for Direct Digital Synthesis Circuits with Improved Frequency Accuracy Over Wide Frequency Ranges." Journal of Circuits, Systems and Computers 26, no. 02 (2016): 1750035. http://dx.doi.org/10.1142/s0218126617500359.

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Recently, there is increasing interest in impedance sensors for various applications. Direct digital synthesis (DDS) circuits are commonly used in such sensor circuits for generating stimulus signals, due to advantages of accurate frequency control, drift-free performance, etc. Previously reported DDS circuits for sensor applications typically maintain superb frequency accuracy within relatively small frequency ranges. This paper investigates techniques to improve frequency accuracy over wide frequency ranges. In addition, it presents an analytical framework to estimate the signal to noise ratio (SNR) of the generated signal and derives guidelines for optimizing DDS circuit configurations. Both simulation and hardware measurement results are presented to validate the derived SNR estimation equation as well as the developed frequency accuracy enhancement techniques.

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Meyrand, Pierre, Serge Faumont, John Simmers, Andrew E. Christie, and Michael P. Nusbaum. "Species-specific modulation of pattern-generating circuits." European Journal of Neuroscience 12, no. 7 (2000): 2585–96. http://dx.doi.org/10.1046/j.1460-9568.2000.00121.x.

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Yi-Huo, Wen, and Long Gui-Lu. "Generating Squeezed States in Solid State Circuits." Communications in Theoretical Physics 49, no. 5 (2008): 1207–10. http://dx.doi.org/10.1088/0253-6102/49/5/28.

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Shufelt, Jefferey A., and Hans J. Berliner. "Generating Hamiltonian circuits without backtracking from errors." Theoretical Computer Science 132, no. 1-2 (1994): 347–75. http://dx.doi.org/10.1016/0304-3975(94)90239-9.

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KLOMKARN, KITDAKORN, and PITIKHATE SOORAKSA. "SIMPLE SELF-INSTRUCTIONAL MODULES BASED ON CHAOTIC OSCILLATORS: FEW BLOCKS GENERATING MANY PATTERNS." International Journal of Bifurcation and Chaos 21, no. 05 (2011): 1469–91. http://dx.doi.org/10.1142/s021812741102915x.

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Chaotic circuits have been widely used in the teaching of nonlinear dynamics disciplines, where a common practice is pedagogically based on the circuit point of view. Chua's circuit is the most popular platform for the demonstration of its components with rich dynamical patterns. However, engineering students majoring in control systems are more familiar with feedback systems rather than physical electronics with nonlinear components. This may lead to some difficulty in understanding the nonlinear properties of Chua's circuit, at least on first sight. This paper provides an alternative approach to teaching and learning chaotic oscillators by using the inherent understanding of feedback systems with simple modules at the undergraduate level. Utilizing the idea of chaotification, which means to make a nonchaotic module chaotic, the modules consist of only four blocks yet can generate more than thirty types of chaotic patterns via their various combinations. Conceptually, the blocks can be assembled as various mixed-mode chaotic circuits. Functionally, the blocks are easy-to-use in a Simulink-like fashion. Structurally, they are a LEGO-like educational kit. With low-cost implementation employing a few op-amps for each block, the newly proposed modules are simple, self-instructional and suitable for teaching and training students in school laboratories and in experimental environments.

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Garbaya, Amel, Mouna Kotti, Omaya Bellaaj Kchaou, Mourad Fakhfakh, Omar Guillen-Fernandez, and Esteban Tlelo-Cuautle. "Fast and Efficient Sensitivity Aware Multi-Objective Optimization of Analog Circuits." Technologies 7, no. 2 (2019): 40. http://dx.doi.org/10.3390/technologies7020040.

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This article introduces a novel approach for generating low-sensitive Pareto fronts of analog circuit performances. The main idea consists of taking advantage from the social interaction between particles within a multi-objective particle swarm optimization algorithm by progressively guiding the global leading process towards low sensitive solutions inside the landscape. We show that the proposed approach significantly outperforms already proposed techniques dealing with the generation of sensitivity-aware Pareto fronts, not only in terms of computing time, but also with regards to the number of solutions forming the tradeoff surface. Performances of our approach are highlighted via the design of two analog circuits.

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Jeon, Yongjin, Seungjun Baek, Giyoon Kim, and Jongsung Kim. "A Framework for Generating S-Box Circuits with Boyer–Peralta Algorithm-Based Heuristics, and Its Applications to AES, SNOW3G, and Saturnin." IACR Transactions on Cryptographic Hardware and Embedded Systems 2025, no. 1 (2024): 586–631. https://doi.org/10.46586/tches.v2025.i1.586-631.

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In many lightweight cryptography applications, low area and latency are required for efficient implementation. The gate count in the cipher and the circuit depth must be low to minimize these two metrics. Many optimization strategies have been developed for the linear layer, led by the Boyer–Peralta (BP) algorithm. The Advanced Encryption Standard (AES) has been a focus of extensive research in this area. However, while the linear layer uses only XOR gates, the S-box, which is an essential nonlinear component in symmetric cryptography, uses various gate types, making optimization challenging, particularly as the bit size increases.In this paper, we propose a new framework for a heuristic search to optimize the circuit depth or XOR gate count of S-box circuits. Existing S-box circuit optimization studies have divided the nonlinear and linear layers of the S-box, optimizing each separately, but limitations still exist in optimizing large S-box circuits. To extend the optimization target from individual internal components to the entire S-box circuit, we extract the XOR information of each node in the target circuit and reconstruct the nodes based on nonlinear gates. Next, we extend the BP algorithm-based heuristics to address nonlinear gates and incorporate this into the framework. It is noteworthy that the effects of our framework occur while maintaining the AND gate count and AND depth without any increase.To demonstrate the effectiveness of the proposed framework, we apply it to the AES, SNOW3G, and Saturnin S-box circuits. Our results include depth improvements by about 40% and 11% compared to the existing AES S-box [BP10] and Saturnin super S-box [CDL+20] circuits, respectively. We implement a new circuit for the SNOW3G S-box, which has not previously been developed, and apply our framework to reduce its depth. We expect the proposed framework to contribute to the design and implementation of various symmetric-key cryptography solutions.

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MEYRAND, PIERRE, and MAURICE MOULINS. "Phylogenetic Plasticity of Crustacean Stomatogastric Circuits: II. Extrinsic Inputs to the Pyloric Circuit of the Shrimp Palaemon Serratus." Journal of Experimental Biology 138, no. 1 (1988): 133–53. http://dx.doi.org/10.1242/jeb.138.1.133.

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The rhythmic motor patterns produced by the pyloric circuit of the shrimp Palaemon are substantially different from those of large decapods, although the homologous neuronal circuits are very similar (Meyrand & Moulins, 1988). The extrinsic inputs received by the Palaemon pyloric circuit were similar, at least qualitatively, to the extrinsic inputs known to impinge upon the pyloric circuit of large decapods. These include: rhythmic inputs that descend from another oscillator (the commissural pyloric oscillator, CPO) which appears to impose its own rhythm on neurones of the pyloric circuit; and inputs that have long-lasting effects and control the expression of endogenous burst-generating properties of individual neurones within the circuit via modulatory mechanisms. The AB—PD neurones were not observed to oscillate, and so do not appear to act as pacemakers for the pyloric circuit as they do in large decapods, probably because of differences in the organization of the modulatory extrinsic inputs. It is our conclusion that differences in the control of expression of intrinsic properties of neurones of homologous (and structurally similar) circuits belonging to related species can explain how such circuits produce widely different patterned motor outputs.

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Ding, Pengfei, Xiaoyi Feng, and Lin Fa. "Generation of 3-D Grid Multi-Scroll Chaotic Attractors Based on Sign Function and Sine Function." Electronics 9, no. 12 (2020): 2145. http://dx.doi.org/10.3390/electronics9122145.

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A three directional (3-D) multi-scroll chaotic attractors based on the Jerk system with nonlinearity of the sine function and sign function is introduced in this paper. The scrolls in the X-direction are generated by the sine function, which is a modified sine function (MSF). In addition, the scrolls in Y and Z directions are generated by the sign function series, which are the superposition of some sign functions with different time-shift values. In the X-direction, the scroll number is adjusted by changing the comparative voltages of the MSF, and the ones in Y and Z directions are regulated by the sign function. The basic dynamics of Lyapunov exponent spectrum, phase diagrams, bifurcation diagram and equilibrium points distribution were studied. Furthermore, the circuits of the chaotic system are designed by Multisim10, and the circuit simulation results indicate the feasibility of the proposed chaotic system for generating chaotic attractors. On the basis of the circuit simulations, the hardware circuits of the system are designed for experimental verification. The experimental results match with the circuit simulation results, this powerfully proves the correctness and feasibility of the proposed system for generating 3-D grid multi-scroll chaotic attractors.

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Waites, William, Göksel Mısırlı, Matteo Cavaliere, Vincent Danos, and Anil Wipat. "A Genetic Circuit Compiler: Generating Combinatorial Genetic Circuits with Web Semantics and Inference." ACS Synthetic Biology 7, no. 12 (2018): 2812–23. http://dx.doi.org/10.1021/acssynbio.8b00201.

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Jin, Peipei, Guangyi Wang, and Long Chen. "Biphasic action potential and chaos in a symmetrical Chua Corsage Memristor-based circuit." Chaos: An Interdisciplinary Journal of Nonlinear Science 33, no. 2 (2023): 023120. http://dx.doi.org/10.1063/5.0138363.

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Neuromorphic computing provides unique computing and memory capabilities that could break the limitation of conventional von Neumann computing. Toward realizing neuromorphic computing, fabrication and synthetization of hardware elements and circuits to emulate biological neurons are crucial. Despite the striking progress in exploring neuron circuits, the existing circuits can only reproduce monophasic action potentials, and no studies report on circuits that could emulate biphasic action potentials, limiting the development of neuromorphic devices. Here, we present a simple third-order memristive circuit built with a classical symmetrical Chua Corsage Memristor (SCCM) to accurately emulate biological neurons and show that the circuit can reproduce monophasic action potentials, biphasic action potentials, and chaos. Applying the edge of chaos criterion, we calculate that the SCCM and the proposed circuit have the symmetrical edge of chaos domains with respect to the origin, which plays an important role in generating biphasic action potentials. Also, we draw a parameter classification map of the proposed circuit, showing the edge of chaos domain (EOCD), the locally active domain, and the locally passive domain. Near the calculated EOCD, the third-order circuit generates monophasic action potentials, biphasic action potentials, chaos, and ten types of symmetrical bi-directional neuromorphic phenomena by only tuning the input voltage, showing a resemblance to biological neurons. Finally, a physical SCCM circuit and some experimentally measured neuromorphic waveforms are exhibited. The experimental results agree with the numerical simulations, verifying that the proposed circuit is suitable as artificial neurons.

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Cafagna, Donato, and Giuseppe Grassi. "Hyperchaotic Coupled Chua Circuits: An Approach for Generating New n×m-Scroll Attractors." International Journal of Bifurcation and Chaos 13, no. 09 (2003): 2537–50. http://dx.doi.org/10.1142/s0218127403008065.

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In this paper an approach for generating new hyperchaotic attractors from coupled Chua circuits is proposed. The technique, which exploits sine functions as nonlinearities, enables n×m-scroll attractors to be generated. In particular, it is shown that n×m-scroll dynamics can be easily designed by modifying four parameters related to the circuit nonlinearities. Simulation results are reported to illustrate the capability of the proposed approach.

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Koukoulekidis, Nikolaos, Hyukjoon Kwon, Hyejung H. Jee, David Jennings, and M. S. Kim. "Faster Born probability estimation via gate merging and frame optimisation." Quantum 6 (October 13, 2022): 838. http://dx.doi.org/10.22331/q-2022-10-13-838.

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Outcome probability estimation via classical methods is an important task for validating quantum computing devices. Outcome probabilities of any quantum circuit can be estimated using Monte Carlo sampling, where the amount of negativity present in the circuit frame representation quantifies the overhead on the number of samples required to achieve a certain precision. In this paper, we propose two classical sub-routines: circuit gate merging and frame optimisation, which optimise the circuit representation to reduce the sampling overhead. We show that the runtimes of both sub-routines scale polynomially in circuit size and gate depth. Our methods are applicable to general circuits, regardless of generating gate sets, qudit dimensions and the chosen frame representations for the circuit components. We numerically demonstrate that our methods provide improved scaling in the negativity overhead for all tested cases of random circuits with Clifford+T and Haar-random gates, and that the performance of our methods compares favourably with prior quasi-probability simulators as the number of non-Clifford gates increases.

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BIRGET, JEAN-CAMILLE. "THE THOMPSON–HIGMAN MONOIDS Mk,i: THE ${\mathcal J}$-ORDER, THE ${\mathcal D}$-RELATION, AND THEIR COMPLEXITY." International Journal of Algebra and Computation 21, no. 01n02 (2011): 1–34. http://dx.doi.org/10.1142/s0218196711006066.

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The Thompson–Higman groups Gk,i have a natural generalization to monoids, called Mk,i, and inverse monoids, called Invk,i. We study some structural features of Mk,i and Invk,i and investigate the computational complexity of related decision problems. The main interest of these monoids is their close connection with circuits and circuit complexity. The maximal subgroups of Mk,1 and Invk,1 are isomorphic to the groups Gk,j (1 ≤ j ≤ k - 1); so we rediscover all the Thompson–Higman groups within Mk,1. Deciding the Green relations [Formula: see text] and [Formula: see text] of Mk,1, when the inputs are words over a finite generating set of Mk,1, is in P. When a circuit-like generating set is used for Mk,1 then deciding [Formula: see text] is coDP-complete (where DP is the complexity class consisting of differences of sets in NP). The multiplier search problem for [Formula: see text] is xNPsearch-complete, whereas the multiplier search problems of [Formula: see text] and [Formula: see text] are not in xNPsearch unless NP = coNP. The class of search problems xNPsearch is introduced as a slight generalization of NPsearch. Deciding [Formula: see text] for Mk,1 when the inputs are words over a circuit-like generating set, is ⊕k-1• NP -complete; for any h ≥ 2, ⊕h•NP is a modular counting complexity class, whose verification problems are in NP. Related problems for partial circuits are the image size problem (which is # • NP-complete), and the image size modulo h problem (which is ⊕h•NP-complete). For Invk,1 over a circuit-like generating set, deciding [Formula: see text] is ⊕k-1P-complete. It is interesting that the little known complexity classes coDP and ⊕k-1•NP play a central role in Mk,1.

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