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1

Jeanneret, Sanmiguel Guillaume. "Towards explainable and interpretable deep neural networks." Electronic Thesis or Diss., Normandie, 2024. http://www.theses.fr/2024NORMC229.

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Les architectures neuronales profondes ont démontré des résultats remarquables dans diverses tâches de vision par ordinateur. Cependant, leur performance extraordinaire se fait au détriment de l'interprétabilité. En conséquence, le domaine de l'IA explicable a émergé pour comprendre réellement ce que ces modèles apprennent et pour découvrir leurs sources d'erreur. Cette thèse explore les algorithmes explicables afin de révéler les biais et les variables utilisés par ces modèles de boîte noire dans le contexte de la classification d'images. Par conséquent, nous divisons cette thèse en quatre pa
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Kumar, Rakesh. "Holistic design for multi-core architectures." Connect to a 24 p. preview or request complete full text in PDF format. Access restricted to UC campuses, 2006. http://wwwlib.umi.com/cr/ucsd/fullcit?p3222991.

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Thesis (Ph. D.)--University of California, San Diego, 2006.<br>Title from first page of PDF file (viewed September 20, 2006). Available via ProQuest Digital Dissertations. Vita. Includes bibliographical references (p. 182-193).
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3

Poyias, Kyriakos. "Design-by-contract for software architectures." Thesis, University of Leicester, 2014. http://hdl.handle.net/2381/28924.

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We propose a design by contract (DbC) approach to specify and maintain architectural level properties of software. Such properties are typically relevant in the design phase of the development cycle but may also impact the execution of systems. We give a formal framework for specifying software architectures (and their refi nements) together with contracts that architectural con figurations abide by. In our framework, we can specify that if an architecture guarantees a given pre- condition and a refi nement rule satisfi es a given contract, then the refi ned architecture will enjoy a given pos
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4

Shao, Yakun. "Design and Modeling of Specialized Architectures." Thesis, Harvard University, 2016. http://nrs.harvard.edu/urn-3:HUL.InstRepos:33493560.

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Hardware acceleration in the form of customized datapath and control circuitry tuned to specific applications has gained popularity for its promise to utilize transistors more efficiently. However, architectural research in the area of specialization architectures is still in its preliminary stages. A major obstacle for such research has been the lack of an architecture-level infrastructure that analyzes and quantifies the benefits and trade-offs across different designs options. Existing accelerator design primarily relies on creating Register-Transfer Level (RTL) implementations, a tedious a
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Davies, Daniel. "Representation of multiple engineering viewpoints in Computer Aided Design through computer-interpretable descriptive markup." Thesis, University of Bath, 2008. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.488893.

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The aim of this work was to find a way of representing multiple interpretations of a product design with the same CAD model and in a way that allowed reduction of the manual work of producing the viewpoint specific models of the product through automation The approach presented is the recording of multiple viewpoint-interpretations of a product design with a CAD product model using descriptive, by-reference (stand-off) computer interpretable markup of the model.
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Ippolito, Corey A. "Software architectures for flight simulation." Thesis, Georgia Institute of Technology, 2000. http://hdl.handle.net/1853/15749.

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Nuzman, Joseph. "Memory subsystem design for explicit multithreading architectures." College Park, Md. : University of Maryland, 2003. http://hdl.handle.net/1903/146.

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Thesis (M.S.) -- University of Maryland, College Park, 2003.<br>Thesis research directed by: Dept. of Electrical and Computer Engineering. Title from t.p. of PDF. Includes bibliographical references. Published by UMI Dissertation Services, Ann Arbor, Mich. Also available in paper.
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8

Smith, Richard Bartlett. "Design and integrity of deterministic system architectures." Thesis, University College London (University of London), 2007. http://discovery.ucl.ac.uk/1445115/.

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Architectures represented by system construction 'building block' components and interrelationships provide the structural form. This thesis addresses processes, procedures and methods that support system design synthesis and specifically the determination of the integrity of candidate architectural structures. Particular emphasis is given to the structural representation of system architectures, their consistency and functional quantification. It is a design imperative that a hierarchically decomposed structure maintains compatibility and consistency between the functional and realisation sol
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9

Roomi, Akeel S. "Multiprocessor computer architectures : algorithmic design and applications." Thesis, Loughborough University, 1989. https://dspace.lboro.ac.uk/2134/10872.

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The contents of this thesis are concerned with the implementation of parallel algorithms for solving partial differential equations (POEs) by the Alternative Group EXplicit (AGE) method and an investigation into the numerical inversion of the Laplace transform on the Balance 8000 MIMO system. Parallel computer architectures are introduced with different types of existing parallel computers including the Data-Flow computer and VLSI technology which are described from both the hardware and implementation points of view. The main characteristics of the Sequent parallel computer system at Loughbor
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10

Dasgupta, Sohini. "Formal design and synthesis of GALS architectures." Thesis, University of Newcastle Upon Tyne, 2008. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.446196.

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Lee, Andrew Sui Tin. "Design of future optical ring network architectures." Thesis, University of Strathclyde, 2004. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.415308.

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Ibrahim, Jihad E. "Algorithms and Architectures for UWB Receiver Design." Diss., Virginia Tech, 2007. http://hdl.handle.net/10919/26105.

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Impulse-based Ultra Wideband (UWB) radio technology has recently gained significant research attention for various indoor ranging, sensing and communications applications due to the large amount of allocated bandwidth and desirable properties of UWB signals (e.g., improved timing resolution or multipath fading mitigation). However, most of the applications have focused on indoor environments where the UWB channel is characterized by tens to hundreds of resolvable multipath components. Such environments introduce tremendous complexity challenges to traditional radio designs in terms of signal d
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13

BOZZOLI, LUDOVICA. "New Design Techniques for Dynamic Reconfigurable Architectures." Doctoral thesis, Politecnico di Torino, 2021. http://hdl.handle.net/11583/2934684.

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Ismailoglu, Ayse Neslin. "Asynchronous Design Of Systolic Array Architectures In Cmos." Phd thesis, METU, 2008. http://etd.lib.metu.edu.tr/upload/12609443/index.pdf.

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In this study, delay-insensitive asynchronous circuit design style has been adopted to systolic array architectures to exploit the benefits of both techniques for improved throughput. A delay-insensitivity verification analysis method employing symbolic delays is proposed for bit-level pipelined asynchronous circuits. The proposed verification method allows datadependent early output evaluation to co-exist with robust delay-insensitive circuit behavior in pipelined architectures such as systolic arrays. Regardless of the length of the pipeline, delay-insensitivity verification of a systolic ar
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15

Schlutz, Jürgen [Verfasser]. "Conceptual Design of Lunar Exploration Architectures / Jürgen Schlutz." München : Verlag Dr. Hut, 2012. http://d-nb.info/1022535749/34.

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16

McGovern, Brian Patrick. "The systematic design of VLSI signal processing architectures." Thesis, Queen's University Belfast, 1992. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.333841.

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17

Perreault, David John. "Design and evaluation of cellular power converter architectures." Thesis, Massachusetts Institute of Technology, 1997. http://hdl.handle.net/1721.1/10452.

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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1997.<br>Includes bibliographical references (p. 155-160).<br>by David John Perreault.<br>Ph.D.
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18

Ahmed, Mohamed Hassan Abouelella. "Power Architectures and Design for Next Generation Microprocessors." Diss., Virginia Tech, 2019. http://hdl.handle.net/10919/103175.

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With the rapid increase of cloud computing and the high demand for digital content, it is estimated that the power consumption of the IT industry will reach 10 % of the total electric power in the USA by 2020. Multi-core processors (CPUs) and graphics processing units (GPUs) are the key elements in fulfilling all of the digital content requirements, but come with a price of more power-hungry processors, driving the power per server rack to 20 KW levels. The need for more efficient power management solutions on the architecture level, down to the converter level, is inevitable. Recently, data c
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19

Chan, Yi-Tsu. "Design and Construction of Metallo-Supramolecular Terpyridine Architectures." University of Akron / OhioLINK, 2010. http://rave.ohiolink.edu/etdc/view?acc_num=akron1285698309.

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20

Liang, Heyi. "Rational Design of Soft Materials through Chemical Architectures." University of Akron / OhioLINK, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=akron1573085345744325.

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21

Teodorov, Ciprian. "Model-driven physical design for future nanoscale architectures." Brest, 2011. http://www.theses.fr/2011BRES2050.

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Actuellement, comme la technologie CMOS arrive à ses limites, plusieurs alternatives architecturales nanométriques sont étudiées. Ces architectures partagent des caractéristiques communes, comme par exemple la régularité d’assemblage, qui contraint le placement de dispositifs physiques à des motifs réguliers. Par conséquence, les activités de recherche dans ce domaine sont focalisées autour des structures régulières similaires, d’un point de vue conceptuel, aux architectures reconfigurables de type PLA et FPGA. Parmi ces différents travaux, on peut citer CMOL, FPNI, NASIC. Ces prototypes archi
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22

Stonor, Andrew James. "The design of coinage metal and pnictogen architectures." Thesis, University of Bristol, 2015. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.683732.

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A series of experiments were designed with the dual goals of, firstly, accessing new pnictogen ring and cage architectures suitable for use as antiwear additives in industrial lubricants and, secondly, to synthesise novel coinage metal complexes utilising both organic and inorganic ligands. Several asymmetrically and symmetrically substituted cyclodiphosphazanes were synthesised and in the majority of cases the cisoid or transoid isomerism was determined in solution by 31p NMR spectroscopy. Moreover, in three cases the molecular structures of cyclodiphosphazanes were examined using X-ray cryst
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23

Sun, Luo. "Design and process variation analysis of SRAM architectures." Thesis, University of Bristol, 2014. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.684909.

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Future memory subsystems will have to achieve high performance, low power, high reliability, small size and high robustness under process variation. Moreover, it should be possible to build them with reasonable yield. Thus, design methodologies are needed to enhance the behaviors and yield of these systems. Increasing process variation effects on the design metrics also need to be evaluated, such as performance and power consumption. This dissertation addresses these problems. First, it proposes a novel SRAM bitcell design based on a promising technology, carbon nanotube field-effect-transisto
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24

Layton, Kent D. "Low-voltage analog CMOS architectures and design methods /." Diss., CLICK HERE for online access, 2007. http://contentdm.lib.byu.edu/ETD/image/etd2141.pdf.

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25

Layton, Kent Downing. "Low-Voltage Analog CMOS Architectures and Design Methods." BYU ScholarsArchive, 2007. https://scholarsarchive.byu.edu/etd/1218.

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This dissertation develops design methods and architectures which allow analog circuits to operate at VT + 2Vds,sat, the minimum supply for CMOS circuits with all transistors in the active region where Vds,sat is the drain to source saturation voltage of a MOS transistor. Techniques which meet this criteria for rail-to-rail input stages, gain enhancement stages, and output stages are discussed and developed. These techniques are used to design four fully-differential rail-to-rail amplifiers. The highest gain is shown to be attained using a drain voltage equalization (DVE) or active-bootstrappi
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26

Baroncini, Massimo <1979&gt. "Design, Synthesis and Characterization of new Supramolecular Architectures." Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2010. http://amsdottorato.unibo.it/2943/1/Baroncini_Massimo_Tesi.pdf.

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27

Baroncini, Massimo <1979&gt. "Design, Synthesis and Characterization of new Supramolecular Architectures." Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2010. http://amsdottorato.unibo.it/2943/.

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28

BOLLO, MATTEO. "Architectures and Design Methodologies for Micro and Nanocomputing." Doctoral thesis, Politecnico di Torino, 2017. http://hdl.handle.net/11583/2679368.

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For many years, the transistors placement was not limited by interconnections thanks to the Digital Integrated Circuits market that is changing from a situation where CMOS technology was the reference (microelectronics era) to a plurality of emerging technologies (nanoelectronics era). The costs of optics photolithography needed to produce the recent CMOS technologies are increasing to such an extent as to make interesting the exploration of nanoelectronics alternative solutions. These technologies are called beyond CMOS technologies. Among the application fields, Information Security is one
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COCCIA, ARIANNA. "Design of Wideband Architectures for Modern Communication Standards." Doctoral thesis, Università degli studi di Pavia, 2019. http://hdl.handle.net/11571/1243908.

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Modern communication standards demand wideband solutions, with increasing channel bandwidths. At the same time, massive MIMO is quickly approaching, asking for low-cost and low-power architectures. This thesis is focused on the design of RF blocks, suitable for state-of-the-art applications. The work is divided in two parts. In the first one an innovative transmitter architecture based on a current-mode passive mixer topology with a closed-loop RF amplier is presented. The second part deals with the analysis and design of a broadband, inductorless noise-cancelling low-noise amplifier. Measurem
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30

Ramaratnam, Rajiv. "An analysis of service oriented architectures." Thesis, Massachusetts Institute of Technology, 2007. http://hdl.handle.net/1721.1/42372.

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Thesis (S.M.)--Massachusetts Institute of Technology, System Design and Management Program, 2007.<br>Leaf 96 blank.<br>Includes bibliographical references (leaves 88-95).<br>Introduction: Corporations all across the globe and of various sizes rely on their IT systems for business processes, reduction of process lifecycle and management of resources. These systems house several applications for internal sales, purchasing, finance, HR and so on. In any such typical organization, IT systems are a heterogeneous mix of hardware, operating systems and applications. Many of these applications run on
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Zheng, Ning. "Discovering interpretable topics in free-style text diagnostics, rare topics, and topic supervision /." Columbus, Ohio : Ohio State University, 2008. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=osu1199237529.

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32

de, Tenorio Cyril. "Methods for collaborative conceptual design of aircraft power architectures." Diss., Georgia Institute of Technology, 2010. http://hdl.handle.net/1853/34818.

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This thesis proposes an advanced architecting methodology. This methodology allows for the sizing and optimization of aircraft system architecture concepts and the establishment of subsystem development strategies. The process is implemented by an architecting team composed of subsystem experts and architects. The methodology organizes the architecture definition using the SysML language. Using meta-modeling techniques, this definition is translated into an analysis model which automatically integrates subsystem analyses in a fashion that represents the specific architecture concept described
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Albarello, Nicolas. "Model-based trade studies in systems architectures design phases." Thesis, Châtenay-Malabry, Ecole centrale de Paris, 2012. http://www.theses.fr/2012ECAP0052/document.

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La conception d'architectures de systèmes est une tâche complexe qui implique des enjeux majeurs. Au cours de cette activité, les concepteurs du système doivent créer des alternatives de conception et doivent les comparer entre elles afin de sélectionner l'architecture la plus appropriée suivant un ensemble de critères. Dans le but d'étudier différentes alternatives, les concepteurs doivent généralement limiter leur étude comparative à une petite partie de l'espace de conception qui peut être composé d'un nombre immense de solutions. Traditionnellement, le processus de conception d'architectur
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34

Allen, James D. "System level design issues for high performance SIMD architectures." Diss., Georgia Institute of Technology, 1996. http://hdl.handle.net/1853/15406.

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35

Williams, Owen Ricardo. "Kinematics and design of robotic manipulators with complex architectures." Thesis, McGill University, 1989. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=61790.

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36

Morrow, Joseph M. (Joseph Monroe). "Design and analysis of lunar lander control system architectures." Thesis, Massachusetts Institute of Technology, 2012. http://hdl.handle.net/1721.1/76167.

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Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Aeronautics and Astronautics, 2012.<br>Cataloged from PDF version of thesis.<br>Includes bibliographical references (p. 153-157).<br>Although a great deal of separate work exists on the development of spacecraft actuators and control algorithm design, less work exists which examines the connections between the selection of specific actuator types and placements, how this affects control algorithm design, and how these combined factors affect the overall vehicle performance of a lunar lander. This thesis attempts to address these is
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37

Krieger, James David 1978. "Architectures and system design for digitally-enhanced antenna arrays." Thesis, Massachusetts Institute of Technology, 2014. http://hdl.handle.net/1721.1/87925.

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Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014.<br>Cataloged from PDF version of thesis.<br>Includes bibliographical references (pages 143-147).<br>Digital techniques have had longstanding use in both the operational control and signal processing efforts associated with phased array antennas. Fundamentally, these techniques have served to provide additional levels of convenience and performance over the fully analog counterparts, without specifically addressing the underlying design of the analog hardware aspects of the ar
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38

Ludlow, James M. III. "Design and Synthesis of Terpyridine based Metallo-Supramolecular Architectures." University of Akron / OhioLINK, 2015. http://rave.ohiolink.edu/etdc/view?acc_num=akron1444989836.

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39

Kurland, Nicholas. "Design of Engineered Biomaterial Architectures Through Natural Silk Proteins." VCU Scholars Compass, 2013. http://scholarscompass.vcu.edu/etd/571.

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Silk proteins have provided a source of unique and versatile building blocks in the fabrication of biomedical devices for addressing a range of applications. Critical to advancing this field is the ability to establish an understanding of these proteins in their native and engineered states as well as in developing scalable processing strategies, which can fully exploit or enhance the stability, structure, and functionality of the two constituent proteins, silk fibroin and sericin. The research outlined in this dissertation focuses on the evolution in architecture and capability of silks, to e
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Lahiri, Kanishka. "On-chip communication : system-level architectures and design methodologies /." Diss., Connect to a 24 p. preview or request complete full text in PDF format. Access restricted to UC campuses, 2003. http://wwwlib.umi.com/cr/ucsd/fullcit?p3091346.

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41

Ancajas, Dean Michael B. "Design of Reliable and Secure Network-On-Chip Architectures." DigitalCommons@USU, 2015. https://digitalcommons.usu.edu/etd/4150.

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Network-on-Chips (NoCs) have become the standard communication platform for future massively parallel systems due to their performance, flexibility and scalability advantages. However, reliability issues brought about by scaling in the sub-20nm era threaten to undermine the benefits offered by NoCs. This dissertation demonstrates design techniques that address both reliability and security issues facing modern NoC architectures. The reliability and security problem is tackled at different abstraction levels using a series of schemes that combine information from the architecture-level as well
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42

Ho, Phuong Minh. "Parallel architectures for solving combinatorial problems of logic design." PDXScholar, 1989. https://pdxscholar.library.pdx.edu/open_access_etds/3872.

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This thesis presents a new, practical approach to solve various NP-hard combinatorial problems of logic synthesis, logic programming, graph theory and related areas. A problem to be solved is polynomially time reduced to one of several generic combinatorial problems which can be expressed in the form of the Generalized Propositional Formula (GPF) : a Boolean product of clauses, where each clause is a sum of products of negated or non-negated literals.
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43

Wu, Ziyang. "Rational design of two-dimensional architectures for efficient electrocatalysis." Thesis, Queensland University of Technology, 2022. https://eprints.qut.edu.au/235888/1/ziyang%2Bwu%2Bthesis%284%29.pdf.

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In this thesis, the principal focus is the rational design and fabrication of two-dimensional (2D) nanoarchitectures, e.g., low-cost metal oxide nanosheets and earth-abundant transition metal layered double hydroxides (LDHs) for enhanced electrocatalysis. The related hydrogen evolution reaction (HER) and oxygen evolution reaction (OER) performance not only demonstrated the advances of 2D nanomaterials, such as unique physical and mechanical properties, unprecedented electronic features, and ultrahigh surface areas but also indicated the possible mechanisms behind boosted activity and stability
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44

Walker, Simon N. "High speed algorithms and architectures for RSA encryption." Thesis, University of Sheffield, 1998. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.298054.

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45

LaFon, Christian (Christian Phillip). "Context characterization for synthesis of process architectures." Thesis, Massachusetts Institute of Technology, 2008. http://hdl.handle.net/1721.1/47871.

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Thesis (S.M.)--Massachusetts Institute of Technology, System Design and Management Program, 2008.<br>Includes bibliographical references (leaves 115-118).<br>Analysis steps are proposed as an aid for establishing Lean Product Development (LPD) activities in an organization. The proposal is offered as an aid to engineering managers and process designers for coping with the unique challenges of implementing processes from their inception - for example, at a new enterprise. As such, the thesis focuses on the creation of LPD, as opposed to traditional Lean improvement activities which benefit from
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46

Sekar, Krishna. "Dynamically configurable system-on-chip platforms architectures and design methodologies /." Diss., Connected to a 24 p. preview or request complete full text in PDF format. Access restricted to UC campuses, 2005. http://wwwlib.umi.com/cr/ucsd/fullcit?p3190004.

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Thesis (Ph. D.)--University of California, San Diego, 2005.<br>Title from first page of PDF file (viewed March 8, 2006). Available via ProQuest Digital Dissertations. Vita. Includes bibliographical references (p. 151-165).
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47

Altinigneli, Muzaffer Can. "Pipelined Design Approach To Microprocessor Architectures A Partial Implementation: Mips." Master's thesis, METU, 2005. http://etd.lib.metu.edu.tr/upload/12606778/index.pdf.

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This thesis demonstrate how pipelining in a RISC processor is achieved by implementing a subset of MIPS R2000 instructions on FPGA. Pipelining, which is one of the primary concepts to speed up a microprocessor is emphasized throughout this thesis. Pipelining is fundamentally invisible for high level programming language user and this work reveals the internals of microprocessor pipelining and the potential problems encountered while implementing pipelining. The comparative and quantitative flow of this thesis allows to understand why pipelining is preferred instead of other possible implementa
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48

Narayanan, Sridhar. "Formal methods for reuse of design patterns and micro-architectures." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk3/ftp04/mq26018.pdf.

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49

Payan, Alexia Paule Marie-Renee. "Enabling methods for the design and optimization of detection architectures." Diss., Georgia Institute of Technology, 2013. http://hdl.handle.net/1853/47688.

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The surveillance of geographic borders and critical infrastructures using limited sensor capability has always been a challenging task in many homeland security applications. While geographic borders may be very long and may go through isolated areas, critical assets may be large and numerous and may be located in highly populated areas. As a result, it is virtually impossible to secure each and every mile of border around the country, and each and every critical infrastructure inside the country. Most often, a compromise must be made between the percentage of border or critical asset covered
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50

Banz, Christian [Verfasser]. "Design and Analysis of Architectures for Stereo Vision / Christian Banz." Aachen : Shaker, 2013. http://d-nb.info/1048457915/34.

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