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Kraemer, R., and B. Meister. "Fast real-time moment-ratio analysis of multibreath nitrogen washout in children." Journal of Applied Physiology 59, no. 4 (1985): 1137–44. http://dx.doi.org/10.1152/jappl.1985.59.4.1137.
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To apply real-time moment-ratio analysis to multibreath N2-washout curves (MBNW) from children, a new processor-controlled device was constructed. Flow and fractional N2 concentration (FN2) were each sampled by 200 Hz. An electromagnetic triple-valve system, with an instrumental dead space of 36 ml and a valve resistance of 0.3 cmH2O . l-1 . s, was connected in series with a pneumotachograph and an N2 analyzer (Ohio 720) placed next to the mouthpiece. A FORTRAN/MACRO program on a PDP 11/23 computer enabled measurement of inspiratory and expiratory flow and FN2 sampling by a 12-bit analog-to-digital converter. The fast real-time digital processing of the N2 and flow signals incorporated filtering, delay compensation, and corrections for the effects of changes in gas composition and temperature. MBNW dynamics of the lungs were studied in 17 healthy and 28 asthmatic children and in 16 patients with cystic fibrosis, evaluating the moment ratios of the washout curves as indices of the ventilation characteristics. Intrasubject variability of the moment ratios (m1/m0, m2/m0) and determination of functional residual capacity (FRC) varied between 6.3 and 14.7% (depending on which parameter is considered) and was comparatively lower than other indices previously investigated in adults. In addition, the sensitivity of the moment ratios for discriminating different stages of ventilation inhomogeneity was superior to other indices. m2/m0 is closely related to the simultaneously measured airway resistance, and the ratio between cumulative expired volume and FRC is correlated with the ratio between residual volume and total lung capacity.
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Engroff, Alian, Marcelo Romanssini, Lucas Compassi-Severo, Paulo C. C. de Aguirre, and Alessandro Girardi. "ASIPAMPIUM: An Efficient ASIP Generator for Low Power Applications." Electronics 12, no. 2 (2023): 401. http://dx.doi.org/10.3390/electronics12020401.
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The adoption of customized ASIPs (Application Specific Instruction Set Processors) in embedded circuits is an important alternative for optimizing power consumption, silicon area, or processing performance according to the design requirements. The processor is implemented specifically for the target application, which allows the hardware customization in terms of instruction set architecture, data word length, memory size, and parallelism. This work describes an EDA tool for the semi-automatic development of ASIPs named ASIPAMPIUM. The strategy is to provide a set of integrated tools to interpret and generate a customized hardware for a given target application, including compilation, simulation, and hardware synthesis. From the C code description of the application, the tool returns a synthesizable hardware description of the processor. The proposed methodology is based on the adaptation of a new customizable microprocessor called PAMPIUM, which can be optimized in terms of silicon area, power consumption, or processing performance according to the target application. The ASIPAMPIUM tool provides a series of simulated data to the designer in order to identify optimization strategies in both software and hardware domains. We show the results for the implementation of an FFT algorithm using the proposed methodology, which achieved best results in terms of silicon area and energy consumption compared to other works described in the literature for both FPGA and silicon implementation. Moreover, measurement results of the implementation in silicon of a dedicated ASIP for interfacing with six sensors in real-time, including three I2C, an SPI, and an RS-232 interfaces, demonstrate the complete design flow, from the C code program to physical implementation and characterization. Aside from providing a short design time, the ASIPAMPIUM tool also affords a simple and intuitive design flow, allowing the designer to deal with different design trade-offs and objectives.
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Makhanov, K. M., and L. V. Chirkova. "Interdisciplinary communication of physics, schemes and programming." Bulletin of the Karaganda University. "Physics" Series 98, no. 2 (2020): 143–49. http://dx.doi.org/10.31489/2020ph2/143-149.
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The article presents the results of the development of an electronic device based on digital components, carried out jointly with schoolchildren and students. The aim of this work was the design and development of an electronic device based on 32-bit microcontrollers of the STM32 series. For the design and development of the electronic part of the device, the integrated development environment Altium Designer was used. Using a high-level C ++ language, a control program was developed in the Keil v.5 debugging environment. The microcontroller of the STM32F030K6T6 series was used as the central control processor. The electrical circuit and the circuit board of the device are developed. A highly sensitive gas sensor TGS 2610, manufactured by Figaro (Japan), was used as a sensor element. For SMS transmission, the SIM800A module was used. In the process of doing the work, students independently made electric boards using the method of irradiation of a special photoresist with a UV lamp. Practically all the components were arranged and soldered by the students on their own. Together with the students, a control program for the microcontroller was developed. To manufacture the case of the device, the «KOMPAS» environment was used. The case was printed on a 3D — printer. Calibrated the device and its test tests. According to the results of preliminary test tests of the device, it was found that the gas sensor responds to the presence of gas during the first 20 seconds from the time the leak started. False positives of the device are not fixed. The importance of the foundations of physics, computer science and mathematics in the process of designing digital devices and instruments is shown.
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Ye, Qian, and Minyan Lu. "SPOT: Testing Stream Processing Programs with Symbolic Execution and Stream Synthesizing." Applied Sciences 11, no. 17 (2021): 8057. http://dx.doi.org/10.3390/app11178057.
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Adoption of distributed stream processing (DSP) systems such as Apache Flink in real-time big data processing is increasing. However, DSP programs are prone to be buggy, especially when one programmer neglects some DSP features (e.g., source data reordering), which motivates development of approaches for testing and verification. In this paper, we focus on the test data generation problem for DSP programs. Currently, there is a lack of an approach that generates test data for DSP programs with both high path coverage and covering different stream reordering situations. We present a novel solution, SPOT (i.e., Stream Processing Program Test), to achieve these two goals simultaneously. At first, SPOT generates a set of individual test data representing each path of one DSP program through symbolic execution. Then, SPOT composes these independent data into various time series data (a.k.a, stream) in diverse reordering. Finally, we can perform a test by feeding the DSP program with these streams continuously. To automatically support symbolic analysis, we also developed JPF-Flink, a JPF (i.e., Java Pathfinder) extension to coordinate the execution of Flink programs. We present four case studies to illustrate that: (1) SPOT can support symbolic analysis for the commonly used DSP operators; (2) test data generated by SPOT can more efficiently achieve high JDU (i.e., Joint Dataflow and UDF) path coverage than two recent DSP testing approaches; (3) test data generated by SPOT can more easily trigger software failure when comparing with those two DSP testing approaches; and (4) the data randomly generated by those two test techniques are highly skewed in terms of stream reordering, which is measured by the entropy metric. In comparison, it is even for test data from SPOT.
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Patalakh, D., A. Prykhodko, K. Lut, and S. O. Tykhovod. "Improvement of modeling techniques of transients in transformers based on magnetoelectric equivalent schemes." Naukovyi Visnyk Natsionalnoho Hirnychoho Universytetu, no. 6 (2021): 107–12. http://dx.doi.org/10.33271/nvngu/2021-6/107.
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Purpose. Use of an improved numerical method of calculating transient processes in electrical circuits for modeling electromagnetic processes in nonlinear magneto-electric circuits, and also development of a circuit model based on this method, which leads to the convenience of calculation. Methodology. Approximation of functions by Chebyshevs polynomials, numerical methods of differential equations integrating, matrix methods, spline interpolation, programming, theory of electric and magnetic circuits. Findings. On the base of the well-known method of transient process analysis in linear electric circuits, the method of numerical calculation of transient processes in nonlinear magneto-electric equivalent circuits of transformer has been developed. By the help of the proposed method it is possible to reduce processing time for modeling electromagnetic processes in transformers. The example of using the developed method is shown. The computer program for modeling of electromagnetic transient in a single-phase transformer based on the described method has been developed. This example shows reduction of processor time by more than four times compared to examples of calculations based on other known methods. Originality. The method in which the solution of state differential equations is presented in the form of decomposition into a series along orthogonal Chebyshevs polynomials is used in this work. The polynomial approximation applied in this work is not corresponding to the solution function itself, but its derivative, which significantly reduces the error of integration of differential equations. Differential equations of state are transformed into linear algebraic equations for special images of solution functions. A principle is developed of constructing magneto-electric substitution circuits in which images of solution functions appear. Images of true dynamic currents and magnetic fluxes in the proposed equivalent scheme are interpreted as direct currents and direct magnetic fluxes. The used method has shown advantages in accuracy and time of simulation of electromagnetic transient over other known methods based on application of magneto-electric substitution circuits. Practical value. The developed method opens up the possibility of using the apparatus of the theory of electric and magnetic circuits to work with images of currents and magnetic fluxes. Based on this, a universal software complex is being developed to calculate transients in transformers of various constructions.
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Ma, Haoran, Hang Sun, and Changsheng Li. "Penetration Overload Prediction Method Based on a Deep Neural Network with Multiple Inputs." Applied Sciences 13, no. 4 (2023): 2351. http://dx.doi.org/10.3390/app13042351.
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In the process of high-speed penetration, penetrating ammunition is prone to problems such as penetration overload signal vibration and mixings and projectile attitude deflection. It is easy to misjudge if a fuze relies only on the overload data from the ground or the utilized program, and the actual penetration overload measured under actual launch conditions cannot be taken as the dynamic judgement basis. Therefore, a real-time penetration overload prediction method based on a deep neural network is proposed, which can predict overload values according to the projectile parameter settings, the real-time collection of overload information, and the calculation speed and assist the fuze in judging the target layer and projectile attitude. In this paper, we adopt a deep learning model with multiple time series inputs and modify the input coding mode so that the model can output a 48 us overload curve within 20 us, meeting the real-time signal processing requirements of the high-speed missile penetration process. The mean squared error between the predicted curve and the actual curve is 0.221 for the prediction of multilayer penetrating targets and 0.452 for the prediction of thick penetrating targets. A penetration overload prediction function can be realized.
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Brincat, Arthur, Angéline Antezack, Camille Sadowski, Mathias Faure-Brac, Romain Ohanessian, and Virginie Monnet-Corti. "Absence of Progressive Bone Loss Following Peri-Implantitis Surgical Therapy with Implantoplasty: A Case Series." Applied Sciences 13, no. 12 (2023): 7224. http://dx.doi.org/10.3390/app13127224.
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Background: Peri-implantitis, a bacteria-associated inflammatory disease, is characterized by inflammation of the peri-implant mucosa and progressive loss of the supporting bone, thereby reducing the chances of dental implant survival. The absence of progressive marginal bone loss is crucial for implant success. The aim of this study is to assess the peri-implantitis resolution by measuring the absence of progressive bone loss rate around the implant over a period of one year to more than three years after surgical reconstructive (REC) treatment, apically repositioned flap (ARP) surgery, or combined (COM) treatment of peri-implantitis with implantoplasty. Methods: Peri-implantitis patients, that underwent surgical therapy with implantoplasty and that enrolled in a regular peri-implant supportive care program with a follow up of ≥12 months, were recruited in this study. ARP, REC, or COM surgical therapy was performed depending on the anatomy of the bone defect. For REC and COM groups, intraosseous defects were filled with a bone substitute. The ARP group consisted of an apically positioned flap without osseous surgery. Absence of progressive marginal bone loss was evaluated on radiographs of the treated implants. Results: A total of 57 patients (91 implants) were included. The study occurred over a follow-up period of 12 to 42 months (mean = 24 months). The surgical treatment with implantoplasty yielded an absence of progressive bone loss rate of 96.7% at implant level (100% REC, 98% COM, 92,9% ARP) and 96.5% at patient level. Three implants had to be removed in two patients due to relapse or progression of peri-implantitis. Conclusions: This case series demonstrated that implantoplasty during surgical treatment of peri-implantitis lesions resulted in favorable biological conditions to maintain functional implants with 96.7% of implants that did not show bone loss over time from one year to more than three years.
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Lauritano, Dorina, Giulia Moreo, Annalisa Palmieri, et al. "Photodynamic Therapy Using 5-Aminolevulinic Acid (Ala) for the Treatment of Chronic Periodontitis: A Prospective Case Series." Applied Sciences 12, no. 6 (2022): 3102. http://dx.doi.org/10.3390/app12063102.
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Aim: The objective of this study was to compare the efficacy of supportive periodontal therapy (i.e., scaling and root planning, SRP) alone versus ALADENT medical device used in association with SRP in the treatment of chronic periodontitis in adult patients. Materials and Methods: A total of 20 patients with a diagnosis of chronic periodontitis (40 localized chronic periodontitis sites) aged between 35 and 55 were selected. None of these patients previously received any surgical or non-surgical periodontal therapy, and they presented radiographic evidence of moderate bone loss. Two non-adjacent sites in different quadrants were identified and observed in each patient, analyzing treatment effectiveness (split-mouth design). Clinical pocket depth, clinical attachment loss, and bleeding on probing were evaluated at time 0 and after 6 months, while microbial analysis (MA) was conducted at baseline and after 15 days. Significant differences were calculated using SPSS program and paired simple statistic t-test. Results: Total bacteria loadings had a statistically significant reduction before and after treatment with SRP (left site) (total average decrease of 27%). The sites treated with SRP plus ALADENT (right) showed a significantly reduced total bacterial loading compared to the untreated sites (right) (total average decrease of 75%). Mean values of CAL/PD and percentages data of BOP, recorded after SRP + ALADENT therapy, showed a higher reduction (CAL = 2.42, PD = 2.87 mm, 90% of sites with no bleeding) than those obtained after SRP treatment (CAL = 4.08 mm, PD = 4.73 mm, 70% of sites with no bleeding). Conclusion: The treatment of moderate and severe chronic periodontitis should include, beside SRP, the use of ALADENT medical device, which has been proved to be a useful adjuvant therapy.
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Makahleh, Firas M., Ali A. Badran, Hani Attar, Ayman Amer, and Ayman A. Al-Maaitah. "Modeling and Simulation of a Two-Stage Air Cooled Adsorption Chiller with Heat Recovery Part I: Physical and Mathematical Performance Model." Applied Sciences 12, no. 13 (2022): 6542. http://dx.doi.org/10.3390/app12136542.
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In the proposed work, the MATLAB program was used to model and simulate the performance of the investigated two-stage adsorption chiller with and without heat recovery using an activated carbon/methanol pair. The simulated model results were then validated by the experimental results conducted by Millennium Industries. The model was based on 10th order differential equations; six of them were used to predict bed, evaporator and condenser temperatures while the other four equations were used to calculate the adsorption isotherm and adsorption kinetics. The detailed validation is stated in the next paragraphs; for example, it clearly notes that the simulation model results for the two-stage air cooled chiller are well compared with the experimental data in terms of cooling capacity (6.7 kW for the model compared with 6.14 kW from the experimental results at the same conditions). The Coefficient of Performance (COP) predicted by this simulation was 0.4, which is very close to that given by the Carnot cycle working at the same operating conditions. The model optimized the switching time, adsorption/desorption time and heat recovery time to maximize both cooling capacity and COP. The model optimized the adsorption/desorption cycle time (300 to 400 s), switching cycle time (50 s) and heat recovery cycle time (30 s). The temporal history of bed, evaporator and condenser temperatures is provided by this model for both heat recovery and without heat recovery chiller operation modes. The importance of this study is that it will be used as a basis for future series production.
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Acosta, Ruth, Klaus Heckmann, Jürgen Sievers, et al. "Microstructure-Based Lifetime Assessment of Austenitic Steel AISI 347 in View of Fatigue, Environmental Conditions and NDT." Applied Sciences 11, no. 23 (2021): 11214. http://dx.doi.org/10.3390/app112311214.
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The assessment of metallic materials used in power plants’ piping represents a big challenge due to the thermal transients and the environmental conditions to which they are exposed. At present, a lack of information related to degradation mechanisms in structures and materials is covered by safety factors in its design, and in some cases, the replacement of components is prescribed after a determined period of time without knowledge of the true degree of degradation. In the collaborative project “Microstructure-based assessment of maximum service life of nuclear materials and components exposed to corrosion and fatigue (MibaLeb)”, a methodology for the assessment of materials’ degradation is being developed, which combines the use of NDT techniques for materials characterization, an optimized fatigue lifetime analysis using short time evaluation procedures (STEPs) and numerical simulations. In this investigation, the AISI 347 (X6CrNiNb18-10) is being analyzed at different conditions in order to validate the methodology. Besides microstructural analysis, tensile and fatigue tests, all to characterize the material, a pressurized hot water pipe exposed to a series of flow conditions will be evaluated in terms of full-scale testing as well as prognostic evaluation, where the latter will be based on the materials’ data generated, which should prognose changes in the material’s condition, specifically in a pre-cracked stage. This paper provides an overview of the program, while the more material’s related aspects are presented in the subsequent paper.
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Wang, Yucheng, and Gang Liu. "Research on Rigid–Elastic Coupling Flight Dynamics of Hybrid Wing Body Based on a Multidiscipline Co-Simulation." Applied Sciences 13, no. 1 (2022): 410. http://dx.doi.org/10.3390/app13010410.
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Due to the special aerodynamic layout and mass distribution, the natural frequency differences between the hybrid wing body (HWB)’s rigid-body motion modes and the fuselage structure elastic modes are smaller compared to conventional aircraft, resulting in the disappearance of the decoupling relationship between the HWB’s rigid-body motion and the elastic motion of the airframe structure. For the above reason, the traditional analysis approach based on the rigid-body assumption is no longer applicable when analyzing the flight dynamics of an HWB aircraft, and a shift must be made to an analysis method that takes into account aeroelastic effects. Therefore, in this paper, a time-domain co-simulation program combining the computational fluid dynamics (CFD) method with computational structure dynamics (CSD) and rigid-body dynamics (RBD) is developed to investigate the effect of a rigid–elastic coupling effect on the flight dynamics of the HWB and this co-simulation method is more advantageous in the calculation of unsteady aerodynamics compared to existing methods of rigid–elastic coupling dynamics analysis. By means of the co-simulation technology, this paper completed a series of simulations, based on which the influence of rigid–elastic coupling effect on the short-period dynamic characteristics of aircraft was studied.
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Gündüz, Halil İbrahim, Ferruh Yılmaztürk, and Osman Orhan. "An Investigation of Volcanic Ground Deformation Using InSAR Observations at Tendürek Volcano (Turkey)." Applied Sciences 13, no. 11 (2023): 6787. http://dx.doi.org/10.3390/app13116787.
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Although approximately one-tenth of the world’s population lives near volcanoes, most of the 1500 active volcanoes are not monitored by ground-based instruments because of the cost and difficulty of access. Since the development of interferometric synthetic aperture radar (InSAR) in the 1990s, recent advances have allowed the near-real-time detection of surface deformations, one of the earliest markers of volcanic activity. According to the Global Volcanism Program, Turkey’s most recent eruption (involving gas and ash) occurred in the Tendürek volcano in 1885. An explosion in the Tendürek volcano, which continues to actively output gas and steam, would be a critical issue for the life and property of the people living nearby. In this context, we processed the Sentinel-1 data collected by the European Space Agency using the Stanford Method for Persistent Scatterers, and the surface deformations of the Tendürek volcano were investigated. In addition, we applied two different atmospheric correction approaches (linear phase-based tropospheric correction and the Generic Atmospheric Correction Online Service for InSAR) to reduce atmospheric effects and found that the linear phase-based tropospheric correction model produced lower standard deviation values. Subsequently, the mean deformation velocity maps, displacement time series, and deformation components in the line-of-sight direction were calculated. The results showed that the most severe subsidence was −11 mm/yr on the upper slopes of the Tendürek volcano. Although the lower slopes of the subsidence region have a lower settlement rate, the subsidence has a peak-caldera-centered location.
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Firouzianhaji, Ahmad, Nima Usefi, Bijan Samali, and Peyman Mehrabi. "Shake Table Testing of Standard Cold-Formed Steel Storage Rack." Applied Sciences 11, no. 4 (2021): 1821. http://dx.doi.org/10.3390/app11041821.
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Full-scale shake table investigations are strongly required to understand the actual performance of storage racks and to improve the rack design guidelines. This paper presents the results of full-scale shake table tests on New Zealand standard storage rack frames with two-bay and two-level to determine the dynamic characteristics of a standard rack structure and to measure the damping of the system. The experimental program was conducted in three phases. First, the identification parameters including the natural frequency and damping of the system were determined through a series of preliminary tests. Then, shake table tests were performed to capture the inelastic response of rack frames under low to medium intensities of El-Centro ground motion. Finally, the shake-table tests were repeated with scaling down the time domain and broader ranges of ground motion intensities to consider the performance of taller rack systems. In addition, a comprehensive discussion on the damping of the system is also provided based on the test results. The performance of the rack frame is described through an extensive set of measurements, including rack displacement, pallet sliding, the acceleration of a concrete block and rack frame and the damping of the system in the down-aisle direction. The results indicate that the standard rack frames are able to endure large inelastic deformations without loss of stability.
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KAPLOW, WESLEY K., and BOLESLAW K. SZYMANSKI. "PROGRAM OPTIMIZATION BASED ON COMPILE-TIME CACHE PERFORMANCE PREDICTION." Parallel Processing Letters 06, no. 01 (1996): 173–84. http://dx.doi.org/10.1142/s0129626496000170.
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We present a novel, compile-time method for determining the cache performance of the loop nests in a program. The cache hit-rates are produced by applying the reference string, determined during compilation, to an architecturally parameterized cache simulator. We also describe a heuristic that uses this method for compile-time optimization of loop ranges in iteration-space blocking. The results of the loop program optimizations are presented for different parallel program benchmarks and various processor architectures, such as IBM SP1 RS/6000, the SuperSPARC, and the Intel 1860.
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Li, Xiao Long, Dan Liu, and Chun Xiu Wang. "The Improvement of Control System of Wind Turbine Gearbox Test Device." Advanced Materials Research 605-607 (December 2012): 1866–71. http://dx.doi.org/10.4028/www.scientific.net/amr.605-607.1866.
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Aim at technical improve of the control system in the Wind Turbine Gearbox Test Device at a factory of Yinchuan , the design plan of the control system Based on Mitsubishi FX series PLC,FX2n-4AD,FX2n-4DA,Mitsubishi FX series Ethernet adapters and King View are put forward ,lower processor was composed by FX2N series CPU module and I/O module in that control system , moreover , centralized management and real-time monitoring of collect data are carried out through the upper processor that adopts industrial computer and King View . Through the improvement device become automation, enhance safety and capacity of product development of company.
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Saeed, Firas Mahmood, Salwa M. Ali, and Mohammed W. Al-Neama. "A parallel time series algorithm for searching similar sub-sequences." Indonesian Journal of Electrical Engineering and Computer Science 25, no. 3 (2022): 1652. http://dx.doi.org/10.11591/ijeecs.v25.i3.pp1652-1661.
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<p><span>Dynamic time warping (DTW) is an important metric for measuring similarity for most time series applications. The computations of DTW cost too much especially with the gigantic of sequence databases and lead to an urgent need for accelerating these computations. However, the multi-core cluster systems, which are available now, with their scalability and performance/cost ratio, meet the need for more powerful and efficient performance. This paper proposes a highly efficient parallel vectorized algorithm with high performance for computing DTW, addressed to multi-core clusters using the Intel quad-core Xeon co-processors. It deduces an efficient architecture. Implementations employ the potential of both message passing interface (MPI) and OpenMP libraries. The implementation is based on the OpenMP parallel programming technology and offloads execution mode, where part of the code sub-sequences on the processor side, which are uploaded to the co-processor for the DTW computations. The results of experiments confirm the effectiveness of the algorithm.</span></p>
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Arkhipov, Ivan. "Investigation of the Multiply-sub Operation on the Baikal-T Processor." Computer tools in education, no. 3 (October 24, 2022): 82–93. http://dx.doi.org/10.32603/2071-2340-2022-3-82-93.
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This article is a continuation of a series of studies devoted to the study of combined operations on the Baikal-T processor. It discusses various features of the multiply-sub command. Various examples of using the command are given, calculations are made and conclusions are formulated. It also describes situations in which the use of the multiply-sub command is justified, and situations in which its use is not profitable relative to the running time of the program.
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Fernandez, Ivan, Alejandro Villegas, Eladio Gutierrez, and Oscar Plata. "Accelerating time series motif discovery in the Intel Xeon Phi KNL processor." Journal of Supercomputing 75, no. 11 (2019): 7053–75. http://dx.doi.org/10.1007/s11227-019-02923-5.
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Sardar, Rupam. "Instruction Level Parallelism and Memory Synchronization." INTERANTIONAL JOURNAL OF SCIENTIFIC RESEARCH IN ENGINEERING AND MANAGEMENT 08, no. 03 (2024): 1–5. http://dx.doi.org/10.55041/ijsrem29532.
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The simultaneous or parallel execution of a series of instructions within a computer program is known as instruction-level parallelism, or ILP. ILP stands for the average number of instructions executed throughout each stage of this parallel execution, to be more precise. The architecture known as instruction level parallelism (ILP) allows for the execution of several operations in parallel within a single process, each with its own set of resources, including address space, registers, identifiers, state, and program counters. It describes compiler design strategies and processors intended to carry out operations in parallel to increase processor performance, such as memory load and store, integer addition, and float multiplication.
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Zaitsev, Vladimir, and Evgeniy Tsybaev. "Estimation of timing characteristics in real-time computer systems using Petri nets." Management of Development of Complex Systems, no. 54 (June 2, 2023): 48–62. http://dx.doi.org/10.32347/2412-9933.2023.54.48-62.
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The work is devoted to the problem of determining the time characteristics of tasks in real-time systems, the success of which depends not only on their logical correctness, but also on the time for which they receive the result. Determining such time characteristics of the system at the design stage is a rather difficult problem. Its solution is currently based on the use of two main methods: theoretical calculations related to the calculation of the so-called feasibility criteria and modeling of the system's operation on models. Among the models, statistical models of mass service systems are the most widespread. However, in both the first and second options, it is impossible to obtain a guaranteed result, which significantly complicates the design process. Recently, it has been proposed to use the methods of researching models based on the use of the Petri net apparatus. The paper proposes a method for estimating the time characteristics of tasks in real-time systems by means of data analysis. Obtained by modeling the distribution of processor time between tasks according to the selected algorithms of the scheduler by using a model of the software system in the form of a Petri net. The paper proposes a method for estimating the time characteristics of tasks in real-time systems by means of data analysis. Obtained by modeling the distribution of processor time between tasks according to the selected algorithms of the scheduler by using a model of the software system in the form of a Petri net. The method guarantees obtaining the time characteristics of the tasks when choosing specific types of processor and scheduler, which is required to start the technical design of the real-time system. The use of the proposed mathematical model and a package of application programs allow, at the early stages of the development of a real-time system, to determine the real terms of tasks and choose the optimal option for the implementation of technical and lost support. The proposed mathematical models are based on determining the time characteristics of program execution by modeling the distribution of processor time between tasks, subject to the prior selection of planning algorithms and the characteristics of a complex of technical means. The research is based on the use of simulated statistical models and Petri net models, The use of the proposed tools allows you to significantly reduce the time of analysis of possible options for real-time system implementation, increases the quality of the project and significantly reduces the overall time and cost of the entire development. The paper examines in detail the process of modeling a multitasking computer system using a Petri net device. A concrete example shows the simulation of the operation of a complex of programs, including the development of simulation algorithms, the listing of the simulation program, and the analysis of the obtained results.
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Asadina, Habliya, Torib Hamzah, Dyah Titisari, and Bedjo Utomo. "A Centrifuge Calibrator Based on Personal Computer Equipped with Data Processor." Indonesian Journal of electronics, electromedical engineering, and medical informatics 1, no. 1 (2019): 14–19. http://dx.doi.org/10.35882/ijeeemi.v1i1.3.
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Calibration is an activity to determine the conventional truth of the value of the appointment of a measuring instrument by comparing traceable standards to national and international standards for measurement and / or international units and certified reference materials. The purpose of this study is to develop a system of efficient and practical centrifuge calibrators by sending the calibration results directly via bluetooth to a PC. The main series of centrifuge calibrators are Arduino modules, laser sensors and Bluetooth.The high low signal is obtained from the reflection of the laser beam aimed at the reflector point on the centrifuge plate, processed in the Arduino module and displayed on the LCD, the calibration results can be directly seen in the Delphi program. The design of this module is also equipped with a Bluetooth transmitter to send data to a PC. This module can be used in medical equipment calibration laboratories. Based on the results of testing and data collection on the 8 Tube centrifuge with a Lutron Tachometer ratio, the error value was 0.0136%. After planning, experimenting, making modules, testing modules, and collecting data, it can be concluded that the tool "centrifuge calibrator equipped with PC-based data processors" can be used and according to planning because the fault tolerance does not exceed 10%.Keywords—Holter Monitor; Heart Monitoring; Arduino Microcontroller; SD Card Memory
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Gainutdinova, T. Yu, S. V. Novikova, V. G. Gainutdinov, M. V. Trusfus, and V. M. Litvin. "Algoritms for determining the attitude position of an unmanned aerial vehicle relative to the landing platform by using computer vision." VESTNIK of Samara University. Aerospace and Mechanical Engineering 22, no. 4 (2023): 37–51. http://dx.doi.org/10.18287/2541-7533-2023-22-4-37-51.
Pełny tekst źródłaStreszczenie:
Algorithms for determining the attitude position of an aircraft or helicopter-type unmanned aerial vehicle relative to the landing platform with special optical marks are considered. An assessment is made of the possibility of calculating the angular position, height and distance to the landing platform in real time based on image processing by a separate on-board processor combined with a digital optical camera into a single measuring unit. The results of calculating the aircraft attitude relative to the landing platform moving along a program trajectory using computer vision algorithms are presented. Simulation of the process of recognizing optical marks on a moving platform from a moving aircraft confirmed that using a processor with a program for recognizing and identifying optical marks by using computer vision and algorithms for calculating the position of the aircraft relative to landing platforms can assuredly provide reliable information about the positioning of an unmanned aerial vehicle relative to the landing platform in real time and can be used in conjunction with other navigation aids (or independently) to ensure accurate landing of unmanned aircraft.
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SINGH, JASVIR, and DAVINDER PAL SHARMA. "COMPUTER-AIDED SIMULATION AND IMPLEMENTATION OF V.90 MODULUS ENCODER." Journal of Circuits, Systems and Computers 14, no. 05 (2005): 1027–36. http://dx.doi.org/10.1142/s0218126605002702.
Pełny tekst źródłaStreszczenie:
This paper presents the computer-aided simulation and implementation of Modulus Encoder for V.90 digital modem transmitter, which is a device that performs Multiple Modulus Conversion (MMC) process. The present work deals with the development of an efficient algorithm for MMC process used by modulus encoder of V.90 digital modem transmitter, the corresponding assembly program development (source code generation), its simulation on simulator of Code Composer Studio and finally the implementation of modulus encoder on Digital Signal Processor (DSP). The practical results match with the simulated as well as theoretically predicted results, which confirms successful implementation of modulus encoder of V.90 digital modem transmitter on DSP. The implementation parameters like the total program execution time, data memory and program memory used for the present implementation have been presented.
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Kaziuchyts, V. O., S. M. Borovikov, and E. N. Shneiderov. "Model for Prediction of Testing Time of a Computer Program for Automated Reliability Evaluation of Semiconductor Devices." Doklady BGUIR 20, no. 7 (2022): 72–80. http://dx.doi.org/10.35596/1729-7648-2022-20-7-72-80.
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The KLASS computer program planned for development is designed to work as a part of the ARION-plus software package and allows you to perform an automated assessment of the reliability of electronic products, including semiconductor devices. At the stage of work planning on the creation of the KLASS program, as a module of the ARION-plus complex, the question arose about the working time allotted for the procedure for testing a computer program. The approaches described in the scientific literature used to assess the operational reliability of computer programs, taking into account their testing, proceed from the fact that the program code has been written and debugged and there are certain data on the results of testing the computer program. Software developers would like to know the predicted testing time, which ensures a given operational reliability of a computer program, even before starting work on writing program code. Based on the analysis of the experimental data on the reliability of computer programs in various fields of application, a model is proposed for determining the testing time required to ensure the operational reliability of programs. The model was used for the computer program KLASS planned for development and takes into account the programming language, the amount of program code, the speed of the computer processor, and the scope of the program. Based on the obtained model, a nomogram with two binary fields was constructed, which allows one to quickly determine the predicted time for testing computer programs.
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Ravotto, D., E. Sanchez, M. Sonza Reorda, and G. Squillero. "Design Validation of Multithreaded Processors Using Threads Evolution." Journal of Integrated Circuits and Systems 5, no. 1 (2010): 67–77. http://dx.doi.org/10.29292/jics.v5i1.311.
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Within the design arena of modern devices based on cutting-edge processor cores, the availability of effective verification, validation and test methodologies able to work on high-level descriptions of processor cores represents an interesting advantage, since it can dramatically reduce the overall time for design and manufacturing, while improving yield and quality. In this paper we propose a semi-automatic test program generation technique able to target modules in modern computer architectures that implement the multithreading paradigm. The methodology starts from high level descriptions of processor cores and using an incremental multi-run approach produces, with very limited manual intervention, a test set able to maximize verification metrics. Experimental results gathered on a couple of real complex designs (the OpenSPARC™ T1 and T2) show the effectiveness of the proposed methodology.
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SEO, KYUNG-RYONG, and KYU-HO PARK. "TASK ASSIGNMENT IN HOST-SATELLITE SYSTEMS." Journal of Circuits, Systems and Computers 06, no. 03 (1996): 213–25. http://dx.doi.org/10.1142/s0218126696000170.
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This paper deals with the problem of assigning task modules of a program over a multiple computer system such that the sum of execution and communication costs is minimized. If the number of processors is two, this problem can be solved efficiently using the network flow approach pioneered by Stone.13 However, the general n-processor problem (n>3) in a fully connected system is known to be NP-complete.14 A host-satellite system considered in this paper is composed of a powerful host processor p0 and N homogeneous satellite processors pk’s, 1≤k≤N, in which each satellite processor pk is connected to the host processor p0 through a communication link. When any two satellite processors are to communicate with each other, the host processor p0 must participate in the communication. Therefore, the interprocessor communication cost per unit of information transferred between any two satellite processors is twice as much as that between a satellite processor and the host processor p0. In this paper, we propose an algorithm which finds an optimal assignment on a host-satellite system in polynomial time. A task assignment problem for a host-satellite system is first transformed into a network flow problem, and then solved by applying the well known network flow algorithm in time no worse than O(NM3), where N and M are the number of satellites and the number of modules, respectively.
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Zang, Hua Dong. "Configuration Software-Based Control System for Wine Production." Advanced Materials Research 328-330 (September 2011): 2144–47. http://dx.doi.org/10.4028/www.scientific.net/amr.328-330.2144.
Pełny tekst źródłaStreszczenie:
According to request of the control system in the wine fermentation process at a winery, the design plan of the control system based on Siemens PLC and King View is put forward. Lower processor was composed by series CPU module and ET200S module of Siemens S7-400 PLC in that control system; moreover, centralized management and real-time monitoring of collected data are carried out through the upper processor that adopts industrial computer and the software of King View. The practice shows that the control precision and the reliability of the control system of the wine fermentation process both have met the needs of the control.
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Akgun, B. Tevfik. "The Digital Art of Marbled Paper." Leonardo 37, no. 1 (2004): 49–52. http://dx.doi.org/10.1162/002409404772828120.
Pełny tekst źródłaStreszczenie:
The author describes his development of a computer-based paper-marbling tool, based on a traditional Turkish art form in which marbled-paper figures and patterns are created on the surface of a liquid bath. Similar works can be obtained by simulating fluid flows on a computer, using the Navier-Stokes equations as the physical model of the fluid flows. The author has created an application program that includes marbling tools. Such a program must run in real time, so that hand-eye coordination is required of the user. Real-time simulation of fluid flows requires much processor power. The author has attempted to adapt this technique for use with a personal computer. To decrease the processing power required, the image size may be decreased, but the results may not be as satisfactory
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JARZABEK, STAN, HONGYU ZHANG, SHEN RU, VU TUNG LAM, and ZHENXIN SUN. "ANALYSIS OF META-PROGRAMS: AN EXAMPLE." International Journal of Software Engineering and Knowledge Engineering 16, no. 01 (2006): 77–101. http://dx.doi.org/10.1142/s0218194006002689.
Pełny tekst źródłaStreszczenie:
Meta-programs are generic, incomplete, adaptable programs that are instantiated at construction time to meet specific requirements. Templates and generative techniques are examples of meta-programming techniques. Understanding of meta-programs is more difficult than understanding of concrete, executable programs. Static and dynamic analysis methods have been applied to ease understanding of programs — can similar methods be used for meta-programs? In our projects, we build meta-programs with a meta-programming technique called XVCL. Meta-programs in XVCL are organized into a hierarchy of meta-components from which the XVCL processor generates concrete, executable programs that meet specific requirements. We developed an automated system that analyzes XVCL meta-programs, and presents developers with information that helps them work with meta-programs more effectively. Our system conducts both static and dynamic analysis of a meta-program. An integral part of our solution is a query language, FQL in which we formulate questions about meta-program properties. An FQL query processor automatically answers a class of queries. The analysis method described in the paper is specific to XVCL. However, the principle of our approach can be applied to other meta-programming systems. We believe readers interested in meta-programming in general will find some of the lessons from our experiment interesting and useful.
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Wanta, Damian, Waldemar T. Smolik, Jacek Kryszyn, Przemysław Wróblewski, and Mateusz Midura. "A Run-Time Reconfiguration Method for an FPGA-Based Electrical Capacitance Tomography System." Electronics 11, no. 4 (2022): 545. http://dx.doi.org/10.3390/electronics11040545.
Pełny tekst źródłaStreszczenie:
A desirable feature of an electrical capacitance tomography system is the adaptation possibility to any sensor configuration and measurement mode. A run-time reconfiguration of a system for electrical capacitance tomography is presented. An original mechanism is elaborated to reconfigure, on the fly, a modular EVT4 system with multiple FPGAs installed. The outlined system architecture is based on FPGA programmable logic devices (Xilinx Spartan) and PicoBlaze soft-core processors. Soft-core processors are used for communication, measurement control and data preprocessing. A novel method of FPGA partial reconfiguration is described, in which a PicoBlaze soft-core processor is used as a reconfiguration controller. Behavioral reconfiguration of the system is obtained by providing run-time access to the program code of a soft-core control processor. The tests using EVT4 hardware and different algorithms for tomographic scanning were performed. A test object was measured using 2D and 3D sensors. The time and resources required for the examined reconfiguration procedure are evaluated.
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Mocanu, George Danut, Gabriel Murariu, Daniel Andrei Iordan, Ion Sandu, and Mihaela Orlanda Antonovici Munteanu. "The Perception of the Online Teaching Process during the COVID-19 Pandemic for the Students of the Physical Education and Sports Domain." Applied Sciences 11, no. 12 (2021): 5558. http://dx.doi.org/10.3390/app11125558.
Pełny tekst źródłaStreszczenie:
The context of the COVID-19 pandemic required the implementation of special measures to ensure the continuity and quality of teaching in higher education. The study presented here aims to identify the differences of opinion between the age categories of students in the first year of the Faculty of Physical Education and Sports in Galati, Romania, regarding teaching, learning and assessment activities on online platforms. A total of 147 students divided into three age groups (under 20 years, 20–30 years and over 30 years) filled out a questionnaire composed of items with closed and free answers, structured on four factors (attractiveness, accessibility, motivation and efficiency), after participating in the online teaching and evaluation act during the first semester of the academic year 2020–2021. Multivariate and univariate tests were applied, identifying the influence of the independent age variable on the dependent variables (aspects measured by the items of the questionnaire). Values were obtained at significant thresholds of F for some of the investigated aspects: boredom induced by online activities, stress value, participation, involvement, motivation and adaptation to the online program, usefulness and quality of teaching process, value of professional training and involvement in disruptive activities. The analysis of the differences between the average scores of the items for the pairs formed by age categories highlighted insignificant values between those under 20 and those aged 20–30, but multiple significant differences between the group of those over 30 and the other two groups. The centralization of free answers by environment (rural and urban) identified the advantages perceived by the students about the online activities (increasing the amount of free time, low financial costs, high accessibility, personal learning pace), the reported disadvantages (technical problems, low concentration, poor socialization) and contradictory proposals to improve activities (continuing online, returning to classical teaching, simplifying the subject, using video materials, involving all students in activities). The paper aims to evaluate the performance of teaching activities performed in the first year of study for the students of physical education and sports, in the context of the COVID-19 pandemic, involving questionnaires validated by the specialty center at the university. The analysis of the results highlighted a series of extremely important aspects that have a role in the future design of activities and courses.
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LEE, BEN, and ALI R. HURSON. "A STRATEGY FOR SCHEDULING PARTIALLY ORDERED PROGRAM GRAPHS ONTO MULTICOMPUTERS." Parallel Processing Letters 05, no. 04 (1995): 575–86. http://dx.doi.org/10.1142/s0129626495000515.
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The issue of scalability is key to the success of massively parallel processing. Due to their distributed nature, message-passing multicomputers are appropriate for achieving scalar performance. However, the message-passing model lacks programmability due to difficulties encountered by the programmers to partition and schedule the computation over the processors and to establish efficient inter-processor communication in the user code. Therefore, this paper presents a compile-time scheduling heuristic, called BLS, that maps programs onto the processors of a message-passing multicomputer. In contrast to other methods proposed, BLS takes a more global approach in attempt to balance the tradeoff between exploiting parallelism and reducing communication overhead. To evaluate the effectiveness of BLS, simulation studies of scheduling SISAL programs are presented.
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Bin, Lee Jia, Nor Asilah Wati Abdul Hamid, Zurita Ismail, and Mohamed Faris Laham. "Fast Processing RNA-Seq on Multicore Processor." Baghdad Science Journal 18, no. 4(Suppl.) (2021): 1413. http://dx.doi.org/10.21123/bsj.2021.18.4(suppl.).1413.
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RNA Sequencing (RNA-Seq) is the sequencing and analysis of transcriptomes. The main purpose of RNA-Seq analysis is to find out the presence and quantity of RNA in an experimental sample under a specific condition. Essentially, RNA raw sequence data was massive. It can be as big as hundreds of Gigabytes (GB). This massive data always makes the processing time become longer and take several days. A multicore processor can speed up a program by separating the tasks and running the tasks’ errands concurrently. Hence, a multicore processor will be a suitable choice to overcome this problem. Therefore, this study aims to use an Intel multicore processor to improve the RNA-Seq speed and analyze RNA-Seq analysis's performance with a multiprocessor. This study only processed RNA-Seq from quality control analysis until sorted the BAM (Binary Alignment/Map) file content. Three different sizes of RNA paired end has been used to make the comparison. The final experiment results showed that the implementation of RNA-Seq on an Intel multicore processor could achieve a higher speedup. The total processing time of RNA-Seq with the largest size of RNA raw sequence data (66.3 Megabytes) decreased from 317.638 seconds to 211.916 seconds. The reduced processing time was 105 seconds and near to 2 minutes. Furthermore, for the smallest RNA raw sequence data size, the total processing time decreased from 212.380 seconds to 163.961 seconds which reduced 48 seconds.
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Magro, N., J. R. Vázquez, A. D. Martin, and R. S. Herrera. "Digital Signal Processor Programming using MATLAB Simulink Embedded Coder." Renewable Energy and Power Quality Journal 21, no. 1 (2023): 493–98. http://dx.doi.org/10.24084/repqj21.373.
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In this work, a computer tool developed in Matlab is presented for process control in real time. The Matlab/Simulink Embedded Code toolbox allows the programming of different commercial acquisition and control cards. In addition, it is easy to supervise the practical cases implemented both from the cards commercial interfaces and from Matlab/Simulink. This work shows how to use the Texas Instruments TMS320F28335 card, the installation of the required software to program the card and the development of a practical case to prove its performance. Thus, the way of generating a sinusoidal voltage waveform using a power DC/AC converter controlled by the PWM (pulse-width modulation) modules card, is presented. This method can be used for teaching and researching purposes, and it is also used for the electric power system management.
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Li, Jiemin, Shancong Zhang, and Chong Bao. "DuckCore: A Fault-Tolerant Processor Core Architecture Based on the RISC-V ISA." Electronics 11, no. 1 (2021): 122. http://dx.doi.org/10.3390/electronics11010122.
Pełny tekst źródłaStreszczenie:
With the development of large-scale CMOS-integrated circuit manufacturing technology, microprocessor chips are more vulnerable to soft errors and radiation interference, resulting in reduced reliability. Core reliability is an important element of the microprocessor’s ability to resist soft errors. This paper proposes DuckCore, a fault-tolerant processor core architecture based on the free and open instruction set architecture (ISA) RISC-V. This architecture uses improved SECDED (single error correction, double error detection) code between pipelines, detects processor operating errors in real-time through the Supervision unit, and takes instruction rollbacks for different error types, which not only saves resources but also improves the reliability of the processor core. In the implementation process, all error injection tests are passed to verify the completeness of the function. In order to better verify the performance of the processor under different error intensity injections, the software is used to inject errors, the running program is run on the FPGA (Field Programmable Gate Array), and the impact of the actual radiation environment on the architecture is evaluated through the results. The architecture is applied to three–five-stage open-source processor cores and the results show that this method consumes fewer resources and its discrete design makes it more portable.
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GEERTSEMA, GERTIE, and HUGO BURM. "Porting a 3D-Turbulence Simulation to a Multi-Processor System." International Journal of Modern Physics C 02, no. 01 (1991): 353–60. http://dx.doi.org/10.1142/s0129183191000470.
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The performance of several computers is examined using a 3D-turbulence simulation. Results are given for test runs using the original program as well as a partially optimized/vectorized version. Special attention is given to porting the code to a multiprocessor transputer system. The results of the simulations are presented in two ways: (1) energy versus lengthscales plotted at subsequent time steps, and (2) for each lenghtscale a color scale is used to represent the energy.
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CAPPELLO, PETER, and ÖMER EĞECIOĞLU. "PROCESSOR LOWER BOUND FORMULAS FOR ARRAY COMPUTATIONS AND PARAMETRIC DIOPHANTINE SYSTEMS." International Journal of Foundations of Computer Science 09, no. 04 (1998): 351–75. http://dx.doi.org/10.1142/s0129054198000295.
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Using a directed acyclic graph (dag) model of algorithms, we solve a problem related to precedence-constrained multiprocessor schedules for array computations: Given a sequence of dags and linear schedules parametrized by n, compute a lower bound on the number of processors required by the schedule as a function of n. In our formulation, the number of tasks that are scheduled for execution during any fixed time step is the number of non-negative integer solutions dn to a set of parametric linear Diophantine equations. We present an algorithm based on generating functions for constructing a formula for these numbers dn. The algorithm has been implemented as a Mathematica program. Example runs and the symbolic formulas for processor lower bounds automatically produced by the algorithm for Matrix-Vector Product, Triangular Matrix Product, and Gaussian Elimination problems are presented. Our approach actually solves the following more general problem: Given an arbitrary r× s integral matrix A and r-dimensional integral vectors b and c, let dn(n=0,1,…) be the number of solutions in non-negative integers to the system Az=nb+c. Calculate the (rational) generating function ∑n≥ 0dntn and construct a formula for dn.
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Ali, Hesham A., and Neville A. Parker. "Using Time Series to Incorporate Seasonal Variations in Pavement Design." Transportation Research Record: Journal of the Transportation Research Board 1539, no. 1 (1996): 33–43. http://dx.doi.org/10.1177/0361198196153900105.
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Analysis of the seasonal monitoring program data of the long term pavement performance program indicated that some pavement structural properties often follow predictable seasonal patterns. Time series is a statistical technique that may be used to develop periodic functions to predict the values of such properties as a function of time. The application of time series technique in characterizing the seasonal variations of pavement structural properties as simulated functions is presented. In addition, the incorporation of such variations in both empirical and mechanistic-empirical methods of flexible pavement design is demonstrated. To this end, a computer program, seasonal variation in pavement design, was written to carry out the required calculations and to facilitate the comparison between empirical and mechanistic-empirical design methods.
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HU, WEI, TIANZHOU CHEN, QINGSONG SHI, and SHA LIU. "CRITICAL-PATH DRIVEN ROUTERS FOR ON-CHIP NETWORKS." Journal of Circuits, Systems and Computers 19, no. 07 (2010): 1543–57. http://dx.doi.org/10.1142/s021812661000689x.
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Multithreaded programming has become the dominant paradigm in computer architecture, mainly in the form of multi-core processors. The performance bottleneck of a multithreaded program is its critical path, whose length is its total execution time. As the number of cores within a processor increases, Network-on-Chip (NoC) has been proposed as a promising approach for inter-core communication. In order to optimize the performance of a multithreaded program running on an NoC based multi-core platform, we design and implement the critical-path driven router, which prioritizes inter-thread communication on the critical path when routing packets. The experimental results show that the critical-path driven router improves the execution time of the test case by 14.8% compared to the ordinary router.
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YONG, XIE, and HSU WEN-JING. "ALIGNED MULTITHREADED COMPUTATIONS AND THEIR SCHEDULING WITH PERFORMANCE GUARANTEES." Parallel Processing Letters 13, no. 03 (2003): 353–64. http://dx.doi.org/10.1142/s0129626403001331.
Pełny tekst źródłaStreszczenie:
This paper considers the problem of scheduling dynamic parallel computations to achieve linear speedup without using significantly more space per processor than that required for a single processor execution. Earlier research in the Cilk project proposed the "strict" computational model, in which every dependency goes from a thread x only to one of x's ancestor threads, and guaranteed both linear speedup and linear expansion of space. However, Cilk threads are stateless, and the task graph that Cilk language expresses is series-parallel graph, which is a proper subset of arbitrary task graph. Moreover, Cilk does not support applications with pipelining. We propose the "aligned" multithreaded computational model, which extends the "strict" computational model in Cilk. In the aligned multithreaded computational model, dependencies can go from arbitrary thread x not only to x's ancestor threads, but also to x's younger brother threads, that are spawned by x's parent thread but after x. We use the same measures of time and space as those used in Cilk: T1 is the time required for executing the computation on 1 processor, T∞ is the time required by an infinite number of processors, and S1 is the space required to execute the computation on 1 processor. We show that for any aligned computation, there exists an execution schedule that achieves both efficient time and efficient space. Specifically, we show that for an execution of any aligned multithreaded computation on P processors, the time required is bounded by O(T1/P + T∞), and the space required can be loosely bounded by O(λ·S1P), where λ is the maximum number of younger brother threads that have the same parent thread and can be blocked during execution. If we assume that λ is a constant, and the space requirements for elder and younger brother threads are the same, then the space required would be bounded by O(S1P). Based on the aligned multithreaded computational model, we show that the aligned multithreaded computational model supports pipelined applications. Furthermore, we propose a multithreaded programming language and show that it can express arbitrary task graph.
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Kniat, Aleksander. "Visualization of a Lifeboat Motion During Lowering Along Ship’s Side." Polish Maritime Research 24, no. 4 (2017): 42–46. http://dx.doi.org/10.1515/pomr-2017-0134.
Pełny tekst źródłaStreszczenie:
Abstract This paper presents description of a computer program for motion visualization of a lifeboat lowered along ship’s side. The program is a post-processor which reads results of numerical calculations of simulated objects’ motions. The data is used to create scene composed of 3D surfaces to visualize mutual spatial positions of a lifeboat, ship’s side and water waving surface. Since the numerical data contain description of a simulation as a function of time it is possible to screen a static scene showing the simulated objects in an arbitrary instance of time. The program can also reproduce a sequence of scenes in the form of animation and control its speed. The static mode allows to view an arbitrary crosssection of the scene, rotate and enlarge specific details and make the image more realistic by hiding invisible lines or shading. The application of the program is aimed at making it possible to assess and analyze numerical calculation results in advance of their experimental verification.
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Hamidi, Beqir, and Lindita Hamidi. "Synchronization Possibilities and Features in Java." European Journal of Interdisciplinary Studies 1, no. 1 (2015): 75. http://dx.doi.org/10.26417/ejis.v1i1.p75-84.
Pełny tekst źródłaStreszczenie:
In this paper we have discussed one of the greatest features of the general purpose computer programming language –Java. This paper represents concepts of Synchronization possibilities and features in Java. Today's operating systems support concept of "Multitasking". Multitasking achieved by executing more than one task at a same time. Tasks runs on threads. Multitasking runs more than one task at a same time. Multitasking which means doing many things at the same time is one of the most fundamental concepts in computer engineering and computer science because the processor execute given tasks in parallel so it makes me think that are executing simultaneously. Multitasking is related to other fundamental concepts like processes and threads. A process is a computer program that is executing in a processor, while a thread is a part of a process that has a way of execution: it is a thread of execution. Every process has at least one thread of execution. There are two types of multitasking: process – based and thread – based. Process-based multitasking, means that on a given computer there can be more than one program or process that is executing, while thread-based multitasking, which is also known as multithreading, means that within a process, there can be more than one thread of execution, each of them doing a job and so accomplishing the job of their process. When there are many processes or many threads within processes, they may have to cooperate with each other or concurrently try to get access to some shared computer resources like: processor, memory and input/output devices. They may have to, for example: print a file in a printer or write and/or read to the same file. We need a way of setting an order, where processes and/or threads could do their jobs (user jobs) without any problem, we need to synchronize them. Java has built-in support for process and thread synchronization, there are some constructs that we can use when we need to do synchronization.This paper, a first phase discussed the concept of Parall Programming, threads, how to create a thread, using a thread, working with more than one thread. Second phase is about synchronization, what is in general and in the end we disscused the synchronization possibilities and feautures in Java.
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Hamidi, Beqir, and Lindita Hamidi. "Synchronization Possibilities and Features in Java." European Journal of Formal Sciences and Engineering 6, no. 2 (2023): 124–36. http://dx.doi.org/10.2478/ejfe-2023-0019.
Pełny tekst źródłaStreszczenie:
Abstract In this paper we have discussed one of the greatest features of the general-purpose computer programming language –Java. This paper represents concepts of Synchronization possibilities and features in Java. Today’s operating systems support concept of “Multitasking”. Multitasking achieved by executing more than one task at a same time. Tasks runs on threads. Multitasking runs more than one task at a same time. Multitasking which means doing many things at the same time is one of the most fundamental concepts in computer engineering and computer science because the processor execute given tasks in parallel so it makes me think that are executing simultaneously. Multitasking is related to other fundamental concepts like processes and threads. A process is a computer program that is executing in a processor, while a thread is a part of a process that has a way of execution: it is a thread of execution. Every process has at least one thread of execution. There are two types of multitasking: process – based and thread – based. Process-based multitasking, means that on a given computer there can be more than one program or process that is executing, while thread-based multitasking, which is also known as multithreading, means that within a process, there can be more than one thread of execution, each of them doing a job and so accomplishing the job of their process. When there are many processes or many threads within processes, they may have to cooperate with each other or concurrently try to get access to some shared computer resources like: processor, memory and input/output devices. They may have to, for example: print a file in a printer or write and/or read to the same file. We need a way of setting an order, where processes and/or threads could do their jobs (user jobs) without any problem, we need to synchronize them. Java has built-in support for process and thread synchronization, there are some constructs that we can use when we need to do synchronization.This paper, a first phase discussed the concept of Parall Programming, threads, how to create a thread, using a thread, working with more than one thread. Second phase is about synchronization, what is in general and in the end we disscused the synchronization possibilities and feautures in Java.
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Wagner, Neal, Zbigniew Michalewicz, Moutaz Khouja, and Rob Roy McGregor. "Time Series Forecasting for Dynamic Environments: The DyFor Genetic Program Model." IEEE Transactions on Evolutionary Computation 11, no. 4 (2007): 433–52. http://dx.doi.org/10.1109/tevc.2006.882430.
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Gedikli, Abdullah, Hafzullah Aksoy, and N. Erdem Unal. "AUG-Segmenter: a user-friendly tool for segmentation of long time series." Journal of Hydroinformatics 12, no. 3 (2010): 318–28. http://dx.doi.org/10.2166/hydro.2009.084.
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In this study, three algorithms are presented for time series segmentation. The first algorithm is based on the branch-and-bound approach, the second on the dynamic programming while the third is a modified version of the latter into which the remaining cost concept of the former is introduced. A user-friendly computer program called AUG-Segmenter is developed. Segmentation-by-constant and segmentation-by-linear-regression can be performed by the program. The program is tested on real-world time series of thousands of terms and found useful in performing segmentation satisfactorily and fast.
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Siow, C. L., Jaswar, and Efi Afrizal. "Computational Fluid Dynamic Using Parallel Loop of Multi-Cores Processor." Applied Mechanics and Materials 493 (January 2014): 80–85. http://dx.doi.org/10.4028/www.scientific.net/amm.493.80.
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Computational Fluid Dynamics (CFD) software is often used to study fluid flow and structures motion in fluids. The CFD normally requires large size of arrays and computer memory and then caused long execution time. However, Innovation of computer hardware such as multi-cores processor provides an alternative solution to improve this programming performance. This paper discussed loop parallelize multi-cores processor for optimization of sequential looping CFD code. This loop parallelize CFD was achieved by applying multi-tasking or multi-threading code into the original CFD code which was developed by one of the authors. The CFD code was developed based on Reynolds Average Navier-Stokes (RANS) method. The new CFD code program was developed using Microsoft Visual Basic (VB) programming language. In the early stage, the whole CFD code was constructed in a sequential flow before it is modified to parallel flow by using VBs multi-threading library. In the comparison, fluid flow around the hull of round-shaped FPSO was selected to compare the performance of both the programming codes. Besides, executed results of this self-developed code such as pressure distribution around the hull were also presented in this paper.
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Wu, Huanjie, Chun Chen, and Kai Weng. "An Energy-Efficient Strategy for Microcontrollers." Applied Sciences 11, no. 6 (2021): 2581. http://dx.doi.org/10.3390/app11062581.
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Power saving has always been an important research direction in the field of microcontrollers. Dozens of low power technologies have been proposed to achieve the goal of reducing their power consumption. However, most of them focus mostly on lowering the consumption rate. It is well known that energy is the integral of power over time. Thus, our view is that both power and time should be carefully considered to achieve better energy efficiency. We reviewed some commonly used low power technologies and proposed our assumptions and strategy for improving energy efficiency. A series of test sets are designed to validate our hypotheses for improving energy efficiency. The experimental results suggest that time has no less impact on energy consumption than power. To support the operation of the processor, some peripheral components consume a constant amount of power regardless of the clock frequency, but the power consumption will be reduced when the processor enters low-power modes. This results in some interesting phenomena that are different from the usual thinking that energy can be saved by increasing processor clock frequency. For STM32F407 and Xtensa LX6 processors, this article also analyzes and calculates the minimum sleep time required for achieving energy saving based on our analytical models. Our energy efficiency strategy has been verified, and in some cases, it can indeed improve energy efficiency. We also proposed some suggestions on hardware design and software development for better energy efficiency.
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Mudelsee, Manfred. "TAUEST: a computer program for estimating persistence in unevenly spaced weather/climate time series." Computers & Geosciences 28, no. 1 (2002): 69–72. http://dx.doi.org/10.1016/s0098-3004(01)00041-3.
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Baharaeen, Sasan, and Abu S. Masud. "A computer program for time series forecasting using single and double exponential smoothing techniques." Computers & Industrial Engineering 11, no. 1-4 (1986): 151–55. http://dx.doi.org/10.1016/0360-8352(86)90068-9.
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Han, Li, Valentin Le Fèvre, Louis-Claude Canon, Yves Robert, and Frédéric Vivien. "A generic approach to scheduling and checkpointing workflows." International Journal of High Performance Computing Applications 33, no. 6 (2019): 1255–74. http://dx.doi.org/10.1177/1094342019866891.
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This work deals with scheduling and checkpointing strategies to execute scientific workflows on failure-prone large-scale platforms. To the best of our knowledge, this work is the first to target fail-stop errors for arbitrary workflows. Most previous work addresses soft errors, which corrupt the task being executed by a processor but do not cause the entire memory of that processor to be lost, contrarily to fail-stop errors. We revisit classical mapping heuristics such as Heterogeneous Earliest Finish Time and MinMin and complement them with several checkpointing strategies. The objective is to derive an efficient trade-off between checkpointing every task (CkptAll), which is an overkill when failures are rare events, and checkpointing no task (CkptNone), which induces dramatic re-execution overhead even when only a few failures strike during execution. Contrarily to previous work, our approach applies to arbitrary workflows, not just special classes of dependence graphs such as minimal series-parallel graphs. Extensive experiments report significant gain over both CkptAll and CkptNone for a wide variety of workflows.