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1
Kantzon, David. "PFC-design for frequency converter". Thesis, Linköpings universitet, Fysik och elektroteknik, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-124547.
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This thesis deals with power factor correction for three-phase systems. A boost-buck topology was described, modeled and then simulated in MATLAB/Simulink. The simulation results show that the system provides a power factor over 99% over the tested power output range. Moreover, the harmonic injection concept was introduced which reduces the total harmonic distortion to 8.72% at full output power. A prototype system was also built using an FPGA for the control system. The prototype did not provide the performance seen in simulation but showed that the method is valid and does provide a higher power factor when used.
2
Luschas, Susan 1975. "Radio frequency digital to analog converter". Thesis, Massachusetts Institute of Technology, 2003. http://hdl.handle.net/1721.1/28277.
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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2003.Includes bibliographical references (p. 124-126).
Dynamic performance of high speed, high resolution digital-to-analog converters (DACs) is limited by distortion at the data switching instants. Inter-symbol interference (ISI), imperfect timing synchronization and clock jitter are all culprits. A DAC output current controlled by an oscillating waveform is proposed to mitigate the effects of the switching distortion. The oscillating waveform should be a multiple (k*fs) of the sampling frequency (f), where k>l. The waveforms can be aligned so that the data switching occurs in the zero regions of the oscillating output. This makes the DAC insensitive to switch dynamics and jitter. The architecture has the additional benefit of mixing the DAC impulse response energy to a higher frequency. An image of a low IF input signal can therefore be output directly at a high IF or RF frequency for transmit communications applications. A narrow-band sigma-delta DAC with eight unit elements is chosen to demonstrate the radio frequency digital-to-analog converter (RF DAC) concept. A sigma-delta architecture allows the current source transistors to be smaller since mismatch shaping is employed. Smaller current source transistors have a lower drain capacitance, allowing large high frequency output impedance to be achieved without an extra cascode transistor. Elimination of the cascode reduces transistor headroom requirements and allows the DAC to be built with a 1.8V supply. The RF DAC prototype is targeted to GSM transmit specifications and implemented in 0.1 8ptm CMOS technology. Measured single-tone SFDR is -75dBc, SNR is 52dB, and IMD3 is -70.8dBc over a 17.5MHz bandwidth centered at 942.5MHz. Measured SNR has the predicted dependence on the phase alignment of the data clock and oscillating pulse.
by Susan Luschas.
Ph.D.
3
Xu, Ping. "High-frequency Analog Voltage Converter Design". PDXScholar, 1994. https://pdxscholar.library.pdx.edu/open_access_etds/4891.
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For many high-speed, high-performance circuits, purely differential inputs are needed. This project focuses on building high-speed voltage converters which can transfer a single-ended signal to a purely differential signal, or a differential input signal to a single-ended signal. Operational transconductance amplifier (OTAs) techniques are widely used in high-speed continuous-time integrated analog signal processing (ASP) circuits because resistors, inductors, integrators, buffers, multipliers and filters can be built by OT As and capacitors. Taking advantage of OT As, very-high-speed voltage converters are designed in CMOS technology. These converters can work in a frequency range from DC (OHz) up to lOOMHz and higher, and keep low distortion over a± 0.5V input range. They can replace transformers so that designing fully integrated differential circuits becomes possible. The designs are based on a MOSIS 2μm n-well process. SPICE simulations of these designs are given. The circuit was laid out with MAGIC layout tools and fabricated through MOSIS. The chip was measured at PSU and Intel circuit labs and the experimental results show the correctness of the designs.
4
Liu, Kwang-Hwa. "High-frequency quasi-resonant converter techniques". Diss., Virginia Polytechnic Institute and State University, 1986. http://hdl.handle.net/10919/74737.
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Two waveform-shaping techniques to reduce or eliminate the switching stresses and switching losses in switching-mode power conversion circuits are developed: the zero-current switching technique and the zero-voltage switching technique.
Based on these two techniques two new families of quasi-resonant converters are derived. Since the stresses on semiconductor switching devices are significantly alleviated, these quasi-resonant (QRC) converters are suitable for high-frequency operations with much improved performances and equipment power density.
Employing the duality principle, the duality relationship between these two families of quasi-resonant converters are derived. The establishment of the duality relationship provides a framework allowing the knowledge obtained from one converter family to be readily transferred to the other.
Further topological refinements are derived through the utilization of parasitic elements in the devices and the circuit. In particular, the two most significant parasitic elements, the leakage inductance of the transformer and the junction capacitances of the semiconductor switch, are incorporated as part of the resonant-tank circuit required by these quasi-resonant converters. Consequently, the detrimental effects due to these parasitic elements are eliminated, and the converters can be operated at very high frequencies.Ph. D.
5
Balakrishnan, Anand Kumar. "Soft switched high frequency ac-link converter". [College Station, Tex. : Texas A&M University, 2008. http://hdl.handle.net/1969.1/ETD-TAMU-3156.
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6
Chin, Yuan. "Constant-frequency parallel-resonant converter (clamped-mode)". Thesis, Virginia Polytechnic Institute and State University, 1986. http://hdl.handle.net/10919/104308.
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LI, QUAN, e q. li@cqu edu au. "HIGH FREQUENCY TRANSFORMER LINKED CONVERTERS FOR PHOTOVOLTAIC APPLICATIONS". Central Queensland University. N/A, 2006. http://library-resources.cqu.edu.au./thesis/adt-QCQU/public/adt-QCQU20060830.110106.
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This thesis examines converter topologies suitable for Module Integrated Converters
(MICs) in grid interactive photovoltaic (PV) systems, and makes a contribution to
the development of the MIC topologies based on the two-inductor boost converter,
which has received less research interest than other well known converters.
The thesis provides a detailed analysis of the resonant two-inductor boost converter
in the MIC implementations with intermediate constant DC links. Under variable
frequency control, this converter is able to operate with a variable DC gain while
maintaining the resonant condition. A similar study is also provided for the resonant
two-inductor boost converter with the voltage clamp, which aims to increase the
output voltage range while reducing the switch voltage stress. An operating point
with minimized power loss can be also established under the fixed load condition.
Both the hard-switched and the soft-switched current fed two-inductor boost
converters are developed for the MIC implementations with unfolding stages. Nondissipative
snubbers and a resonant transition gate drive circuit are respectively
employed in the two converters to minimize the power loss.
The simulation study of a frequency-changer-based two-inductor boost converter is
also provided. This converter features a small non-polarised capacitor in a second
phase output to provide the power balance in single phase inverter applications.
Four magnetic integration solutions for the two-inductor boost converter have also
been presented and they are promising in reducing the converter size and power loss.
8
Lopez, Arevalo Saul. "Matrix converter for frequency changing power supply applications". Thesis, University of Nottingham, 2008. http://eprints.nottingham.ac.uk/10477/.
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The purpose of this work is to investigate the design and implementation of a 7.5kVA Matrix Converter-based power supply for aircraft applications (GPU Ground Power Unit). A Matlab/Simulink as well as SABER simulation analysis of the candidate Matrix Converter system is provided. The design and implementation of the Matrix Converter is described, with particular attention to the strict requirements of the given power supply application. This AC-AC system is proposed as an effective replacement for the conventional AC-DC-AC system which employs a two-step power conversion. The Matrix Converter is an attractive topology of power converter for power supply applications where factors such as the absence of electrolytic capacitors, the potentiality of increasing power density, reducing size and weight and good input power quality are fundamental. An improved control structure is proposed. This structure employs an ABC reference frame implementation comprising at the Repetitive Control strategy combined with a traditional tracking controller in order to attenuate or eliminate the unwanted harmonic distortion in the output voltage waveform of the Matrix Converter and to compensate for the steady-state error. The system with the proposed control was initially fully analyzed and verified by simulation. The analysis of the input and output waveforms identified the constraints that need to be satisfied to ensure successful operation of the converter. Finally, to demonstrate both the Matrix Converter concept and the control strategy proposed, a 7.5kVA prototype of the proposed system was constructed and tested in Nottingham PEMC laboratory. The experimental results obtained confirmed the expectations from the simulation study and the validity of the power converter and control design.
9
Patel, Chirag. "A time-to-voltage converter". Ohio : Ohio University, 1999. http://www.ohiolink.edu/etd/view.cgi?ohiou1175794164.
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Li, Quan, e q. li@cqu edu au. "DEVELOPMENT OF HIGH FREQUENCY POWER CONVERSION TECHNOLOGIES FOR GRID INTERACTIVE PV SYSTEMS". Central Queensland University. School of Advanced Technologies & Processes, 2002. http://library-resources.cqu.edu.au./thesis/adt-QCQU/public/adt-QCQU20020807.152750.
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This thesis examines the development of DC-DC converters that are suitable for Module Integrated Converters, (MICs), in grid interactive photovoltaic (PV) systems, and especially concentrates on the study of the half bridge dual converter, which was previously developed from the conventional half bridge converter. Both hard-switched and soft-switched half bridge dual converters are constructed,
which are rated at 88W each and transform a nominal 17.6Vdc input to an output in the range from 340V to 360Vdc. An initial prototype converter operated at 100kHz and is used as a base line device to establish the operational behaviours of the converter. The second hard-switched converter operated at 250kHz and included a coaxial matrix transformer that significantly reduced the power losses related to the transformer leakage inductance. The soft-switched converter operated at 1MHz and is capable of absorbing the parasitic elements into the resonant tank. Extensive theoretical analysis, simulation and experimental results are provided for each converter. All three converters
achieved conversion efficiencies around 90%. The progressive increases in the operation frequency, while maintaining the conversion efficiency, will translate into the reduced converter size and weight. Finally different operation modes for the
soft-switched converter are established and the techniques for predicting the occurrence of those modes are developed. The analysis of the effects of the transformer winding capacitance also shows that soft switching condition applies for both the primary side mosfets and the output rectifier diodes.
11
Druyts, Jan. "Control induction motor by frequency converter : Simulation electric vehicle". Thesis, Halmstad University, Energiteknik, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-4968.
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Summary
Today we are probably on a point of change for the car industry. The last century was the century of vehicles with internal combustion engines. Fossil fuels were relative cheap, easy accessible and they have a high specific energy. The pollution and dependency on oil caused the last decade an increasing demand for alternatives. Alternatives for electric power plants and for car drives. Yet the turnover to hybrids is a fact and much research is done for pure electric vehicles. Research about the control of electric motors is by that become a hot topic.
To simulate an electric vehicle drive with an induction motor, a frequency converter is needed. This combination of motor and converter led to many possible experiments. With a few experiments already done and a broad theoretical background report this thesis provides a good bundle of information to start with further experiments. The experiments can become even broader when a flywheel is added as mass inertia momentum and a DC source on the DC-link. Both elements contribute for a better simulation of an electric motor in an electric vehicle.
What is described in this theoretical report about the combination of an induction motor and converter is only the tip of the iceberg. I had too less time to begin experimenting with the flying wheel. The DC-link voltage becomes ca. 540V. From the perspective of safety I could never work alone with the DC-link. Even with a companion it was too dangerous because the equipment of the Halmstad University is not made for such dangerous voltages. That’s why this thesis contains more theoretical background and less actual practical data.
SAMENVATTING
Momenteel bevinden we ons in een tijd van omslag. Na een eeuw waarin de brandstofmotor het transportlandschap domineerde, is er nood aan een alternatief. Fossiele brandstof zorgt voor schadelijke uitlaatgassen bij verbranding en de afhankelijkheid van andere landen voor de bevoorrading van fossiele brandstof blijft altijd een risicofactor. De eerste stap in deze verandering is gezet met de ontwikkeling van hybride wagens. De toekomst zal waarschijnlijk helemaal elektrisch worden. Daarom is het onderzoek naar de controle van elektrische motoren belangrijk.
In de universiteit van Halmstad zijn er verscheidene inductiemotoren aanwezig in het elektriciteitslabo. De doelstelling was dat ik een frequentieomvormer selecteerde, bestelde en parametreerde op basis van deze motoren. Daarnaast kreeg ik de vrijheid om een elektrische wagen te simuleren. Dit zou ik doen door een vliegwiel voor de traagheid en door een batterij na te bootsen om de DC-link te voeden. Al mijn informatie moest ik bundelen in deze thesistekst zodat het eventueel een handige bundel werd voor toekomstige studenten die willen werken met de convertor.
Ik had slechts 2 maanden de tijd om dit uit te voeren, metingen te doen en een theoretisch verslag te schrijven. Vanwege deze korte tijdspanne was het niet mogelijk het vliegwiel te implementeren. Daarnaast was de tussenkringspanning ongeveer 540V DC. Dit is zeer gevaarlijk zodat ze liever hadden dat ik de proeven met een gesimuleerde batterij liet varen. Dit verklaart enigszins waarom uitgebreide meetresultaten ontbreken en deze thesis vooral een bredere theoretische toets heeft.
12
Ahmad, Nisar. "Design and Implementation of a High Frequency Flyback Converter". Thesis, Mittuniversitetet, Avdelningen för elektronikkonstruktion, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:miun:diva-24598.
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The power supply designers choose flyback topology due to its promising features of design simplicity, cost effectiveness and multiple outputs handling capability. The designed product based on flyback topology should be smaller in size, cost effective and energy efficient. Similarly, designers focus on reducing the circuit losses while operating at high frequencies that affect the converter efficiency and performance. Based on the above circumstances, an energy efficient open loop high frequency flyback converter is designed and operated in MHz frequency region using step down multilayer PCB planar transformer. The maximum efficiency of 84.75% is observed and maximum output power level reached is 22.8W. To overcome the switching losses, quasi-resonant soft switching technique is adopted and a high voltage CoolMOS power transistor is used.
13
Tian, Feng. "Pulse Frequency Modulation ZCS Flyback Converter in Inverter Applications". Doctoral diss., University of Central Florida, 2009. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/4266.
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Renewable energy source plays an important role in energy co-generation and distribution. A traditional solar-based inverter system has two stages cascaded, which has simpler controller but low efficiency. A new solar-based single-stage grid-connected inverter system can achieve higher efficiency by reducing the power semiconductor switching loss and output stable and synchronizing sinusoid current into the utility grid. In Chapter 1, the characteristic I-V and P-V curve of PV array has been illustrated. Based on prediction of the PV power capacity installed on the grid-connected and off-grid, the trends of grid-tied inverter for DG system have been analyzed. In Chapter 2, the topologies of single-phase grid-connect inverter system have been listed and compared. The key parameters of all these topologies are listed in a table in terms of topology, power decoupling, isolation, bi-directional/uni-directional, power rating, switching frequency, efficiency and input voltage. In Chapter 3, to reduce the capacitance of input filter, an active filter has been proposed, which will eliminate the 120/100Hz low frequency ripple from the PV array's output voltage completely. A feedforward controller is proposed to optimize the step response of PV array output voltage. A sample and hold also is used to provide the 120/100Hz low frequency decoupling between the controller of active filter and inverter stage. In Chapter 4, the single-stage inverter is proposed. Compared with conventional two-stage inverter, which has two high frequency switching stages cascaded, the single-stage inverter system increases the system efficiency by utilizing DC/DC converter to generate rectified sinusoid voltage. A transformer analysis is conducted for the single-stage inverter system, which proves the transformer has no low-frequency magnetic flux bias. To apply peak current mode control on single-stage inverter and get unified loop gain, adaptive slope compensation is also proposed for single-stage inverter. In Chapter 5, a digital controller for single-stage inverter is designed and optimized by the Matlab Control Toolbox. A Psim simulation verified the performance of the digital controller design. In Chapter 6, three bi-directional single-stage inverter topologies are proposed and compared. A conventional single-stage bi-directional inverter has certain shortcoming that cannot be overcome. A modular grid-connect micro-inverter system with dedicated reactive energy processing unit can overcome certain shortcoming and increase the system efficiency and reliability. A unique controller design is also proposed. In Chapter 7, a PFM ZCS flyback inverter system is invented. By using half-wave quasi-resonant ZCS flyback resonant converter and PFM control, this topology completely eliminates switching loss. A detailed mathematical analysis provides all the key parameters for the inverter design. As the inductance of transformer secondary side get smaller, the power stage transfer function of PFM ZCS flyback inverter system demonstrates nonlinearity. An optimized PFM ZCS flyback DC/DC converter design resolves this issue by introducing a MOSFET on the secondary side of transformer. In Chapter 8, experimental results of uni-direcitonal single-stage inverter with grid-connection, bi-directional single-stage inverter and single-stage PFM ZCS flyback inverter have been provided. Conclusions are given in Chapter 9.Ph.D.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering PhD
14
Salazar, Nathaniel Jay Tobias. "High frequency AC power converter for low voltage circuits". Thesis, Massachusetts Institute of Technology, 2012. http://hdl.handle.net/1721.1/77026.
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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.
Includes bibliographical references (p. 74-76).
This thesis presents a novel AC power delivery architecture that is suitable for VHF frequency (50-100MHz) polyphase AC/DC power conversion in low voltage integrated circuits. A complete AC power delivery architecture was evaluated demonstrating the benefits of delivering power across the interconnect at high voltage and lower current with on- or over-die transformation to low voltage and high current. Two approaches to polyphase matching networks in the transformation stage are compared: a 3-phase system with separate single-phase matching networks and individual full bridge rectifiers, and a 3-phase delta-to-wye matching network and a 3-phase rectifier bridge. In addition, a novel switch-capacitor rectifier capable of 3V, 1W output, was evaluated as an alternative circuit to the diode rectifiers. A 50MHz prototype of each version of the system was designed and built for a 12:1 conversion ratio with 24Vpp line-to-line AC input, 2V DC output and 0.7W output power. The measured overall system efficiency is about 63 % for the 3-phase delta system. Although the application is intended for an integrated CMOS implementation, this thesis primarily focuses on discrete PCB level realizations of the proposed architectures to validate the concept and provide insights for future designs.
by Nathaniel Jay Tobias Salazar.
M.Eng.
15
Goldberg, Andrew Franklin. "A radio frequency DC-to-DC resonant power converter". Thesis, Massachusetts Institute of Technology, 1985. http://hdl.handle.net/1721.1/27944.
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Thesis (Elect. E.)--Massachusetts Institute of Technology, Dept. of Electrical Engieering and Computer Science, 1985.MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING.
Bibliography: leaves 136-139.
by Andrew Franklin Goldberg.
Elect.E.
16
Collins, Steven John. "A radio frequency capacitive discharge digital to analogue converter". Thesis, University of Glasgow, 2012. http://theses.gla.ac.uk/3371/.
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As the communications revolution continues there is an ever increasing demand for integrated transmitters and receivers on silicon in devices such as mobile phones and networking products. The demand to integrate complete systems onto a single die has driven a need to minimise the area of transmitters which has led to research into combining digital to analogue converters and RF mixers to minimise their area. The drive for increasing speeds and smaller transistors has resulted in higher capacitance densities and lower operating voltages, the latter making it more difficult to implement conventional transmitter circuits. Therefore there is a need for passive transmitter systems that maximise the output power to the load by minimising the voltage overhead on the output signal. This thesis proposes and demonstrates that it is possible to use a digital to analogue converter that performs RF up conversion using direct capacitive discharge to the load, which takes advantage of the large capacitance densities of a modern 40nm CMOS process. The DAC uses charge sharing in a similar manner to a charge sharing DAC without the bandwidth limitations imposed by an output amplifier. The RF frequency up conversion at the DAC data clock rate is produced using two DACs that differentially output the complement of each other on different halves of the clock cycle (one outputting while the other is charging) thereby emulating a passive switched mixer. The thesis shows that an 8 bit capacitive discharge DAC of 0.16mm2 can output 3dBm into a 50Ω load at 2.15GHz using a clock rate of 2GHz with MTPR of greater than 30dBc.
17
Van, Der Kogel André, e Niklas Österlund. "High frequency dc/dc power converter with galvanic isolation". Thesis, Linköpings universitet, Fysik och elektroteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-128831.
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There is a steady demand to increase the efficiency and raise the power density of power converters. This trend is desired since it leads to reduced size of the converter. The purpose of this thesis is to investigate materials, topologies, core structure and then build a prototype to demonstrate the result. Two core materials have been compared, Fair-Rite material 68 and Ferroxcube 4F1. The goal was to have 50 V input and 30 V output with 80 % efficiency of the converter. The converter with the Fair-Rite material 68 accomplished a peak efficiency at 11 MHz with 54 % efficiency. The core material Ferroxcube 4F1, reached an efficiency of 52 % at 7 MHz. These results were however with 5 V input and 3 V output. The converter had a low efficiency at 50 V input, which lead to ripple in the circuit. One reason for this behaviour was because the design of the PCB was not optimized for MHz operation. The focus of the PCB was that it should be easy to work with instead of achieving peak performance. Also, from the beginning it was decided that no PCB should be made. The focus was instead on the theory and simulations of the converter so no thoroughly investigation of PCB design was done. The leakage inductance of the transformer core was about 10 % of the primary inductance for both materials. The high leakage inductance is believed to further reduce the efficiency of the converter.
18
Pan, Yaobin, e Xizhuo Li. "Design and Implementation of Sigma-Delta Converter : in Oversampling frequency". Thesis, Linnéuniversitetet, Institutionen för fysik och elektroteknik (IFE), 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:lnu:diva-53052.
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Nowadays, Sigma-Delta analog-to-digital converters have been widely used in the technology of analog-to-digital conversion. It depends on the merits that the approach of Sigma-Delta has. The signal converted by oversampling is precise and well-suited in signal processing systems.This thesis mainly focuses on the principles and simulations of fundamental first-order Sigma-Delta converter, and some brief introductions about other Sigma-Delta converters.The main researches of this thesis are as follows: (1)This thesis shows not only the path about development of technology of different ADCs, but also the features and principles of these ADCs and their structures. (2)The thesis discusses how the technologies of oversampling and noise shaping are used in Sigma-Delta analog-to-digital conversion. (3)Illustrate different orders Sigma-Delta converters in different bits and their advantages and disadvantages, respectively. (4)The simulation is given in Matlab(Simulink). Typical first-order SigmaDelta converter is simulated with additional noise which will impact the input signal when implement.Sigma-Delta Converter
19
Gunawan, Tadeus. "Two-Phase Boost Converter". DigitalCommons@CalPoly, 2009. https://digitalcommons.calpoly.edu/theses/200.
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A boost converter is one of the most efficient techniques to step up DC input voltage to a higher needed DC output voltage. The boost converter has many possible applications, such as in a photovoltaic system, hybrid car and battery charger. The proposed prototype in this report is a proof of concept that a Two-Phase Boost Converter is a possible improvement topology to offer higher efficiency without compromising any advantages readily offered by a basic boost. The prototype is designed to be able to handle up to 200 watts of output power with an input of 36 volts and an output of 48 volts. This paper goes through step-by-step the calculation, design, build and test of a Two-Phase Boost Converter. Calculations found in this paper were done on Mathcad and the simulations were done on LTSpice and Pspice. These include converter’s efficiency and other measures of converter’s performance. Advantages, disadvantages as well as possible improvements of the proposed topology will be presented. Data collected and analyzed from the prototype were done on a bench test, not through an actual application.
20
Bai, Yuming. "Optimization of Power MOSFET for High-Frequency Synchronous Buck Converter". Diss., Virginia Tech, 2003. http://hdl.handle.net/10919/28915.
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Evolutions in microprocessor technology require the use of a high-frequency synchronous buck converter (SBC) in order to achieve low cost, low profile, fast transient response and high power density. However, high frequency also causes more power loss on MOSFETs. Optimization of the MOSFETs plays an important role in the system performance.
Circuit and device modeling is important in understanding the relationship between the device parameters and the power loss. The gate-to-drain charge (Qgd) is studied by a novel nonlinear model and compared with the simulation results. A new switching model is developed, which takes into account the effect of parasitic inductance on the switching process. Another model for dv/dt-induced false triggering-on relates the false-trigger-on voltage with the parasitic elements of the device and the circuits.
Some techniques are proposed to reduce the simulation time of FEA in the circuit simulation. Based on this approach, extensive simulations are performed to study the switching performance of the MOSFET with the effect of the parasitic elements. Directed by the analytical models and the experience acquired in the circuit simulation, the MOSFET optimization is realized using FEA. Different optimization algorithms are compared. The experimental results show that the optimized MOSFETs surpass the mainstream commercialized products in both cost and performance.Ph. D.
21
Ward, Gillian Anne. "Design of a multi-kilowatt, high frequency, DC-DC converter". Thesis, University of Birmingham, 2003. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.274596.
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Neveu, Florian. "Design and implementation of high frequency 3D DC-DC converter". Thesis, Lyon, INSA, 2015. http://www.theses.fr/2015ISAL0133/document.
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L’intégration ultime de convertisseurs à découpage repose sur deux axes de recherche. Le premier axe est de développer les convertisseurs à capacités commutées. Cette approche est compatible avec une intégration totale sur silicium, mais limitée en terme de densité de puissance. Le second axe est l’utilisation de convertisseurs à inductances, qui pâtissent d’imposants composants passifs. Une augmentation de la fréquence permet de réduire les valeurs des composants passifs. Cependant une augmentation de la fréquence implique une augmentation des pertes par commutation, ce qui est contrebalancé par l’utilisation d’une technologie de fabrication plus avancée. Ces technologies plus avancées souffrent quant à elles de limitations au niveau de leur tension d’utilisation. Convertir une tension de 3,3V vers une tension de 1,2V apparait donc comme un objectif ambitieux, particulièrement dans le cas où les objectifs de taille minimale et de rendement supérieur à 90 % sont visés. Un assemblage 3D des composants actifs et passifs permet de minimiser la surface du système. Un fonctionnement à haute fréquence est aussi considéré, ce qui permet de réduire les valeurs requises pour les composants passifs. Dans le contexte de l’alimentation « on-chip », la technologie silicium est contrainte par les fonctions numériques. Une technologie 40 nm CMOS de type « bulk » est choisie comme cas d’étude pour une tension d’entrée de 3,3 V. Les transistors 3,3 V présentent une figure de mérite médiocre, les transistors 1,2 V sont donc choisis. Ce choix permet en outre de présenter une meilleure compatibilité avec une future intégration sur puce. Une structure cascode utilisant trois transistors en série est étudiée est confrontée à une structure standard à travers des simulations et mesures. Une fréquence de +100MHz est choisie. Une technologie de capacités en tranchées est sélectionnée, et fabriquée sur une puce séparée qui servira d’interposeur et recevra la puce active et les inductances. Les inductances doivent être aussi fabriquées de manière intégrée afin de limiter leur impact sur la surface du convertisseur. Ce travail fournit un objet contenant un convertisseur de type Buck à une phase, avec la puce active retournée (« flip-chip ») sur l’interposeur capacitif, sur lequel une inductance est rapportée. Le démonstrateur une phase est compatible pour une démonstration à phases couplées. Les configurations standard et cascode sont comparées expérimentalement aux fréquences de 100 MHz et 200 MHz. La conception de la puce active est l’élément central de ce travail, l’interposeur capacitif étant fabriqué par IPDiA et les inductances par Tyndall National Institute. L’assemblage des différents sous-éléments est réalisé via des procédés industriels. Un important ensemble de mesures ont été réalisées, montrant les performances du convertisseur DC-DC délivré, ainsi que ses limitations. Un rendement pic de 91,5 % à la fréquence de 100 MHz a été démontréUltimate integration of power switch-mode converter relies on two research paths. One path experiments the development of switched-capacitor converters. This approach fits silicon integration but is still limited in term of power density. Inductive DC-DC architectures of converters suffer by the values and size of passive components. This limitation is addressed with an increase in frequency. Increase in switching losses in switches leads to consider advanced technological nodes. Consequently, the capability with respect to input voltage is then limited. Handling 3.3 V input voltage to deliver an output voltage in the range 0.6 V to 1.2 V appears a challenging specification for an inductive buck converter if the smallest footprint is targeted at +90 % efficiency. Smallest footprint is approached through a 3D assembly of passive components to the active silicon die. High switching frequency is also considered to shrink the values of passive components as much as possible. In the context of on-chip power supply, the silicon technology is dictated by the digital functions. Complementary Metal-Oxide- Semiconductor (CMOS) bulk C40 is selected as a study case for 3.3 V input voltage. 3.3 V Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) features poor figure of merits and 1.2 V standard core, regular devices are preferred. Moreover future integration as an on-chip power supply is more compatible. A three-MOSFET cascode arrangement is experimented and confronted experimentally to a standard buck arrangement in the same technology. The coupled-phase architecture enables to reduce the switching frequency to half the operating frequency of the passive devices. +100MHz is selected for operation of passive devices. CMOS bulk C40 offers Metal-Oxide-Metal (MOM) and MOS capacitors, in density too low to address the decoupling requirements. Capacitors have to be added externally to the silicon die but in a tight combination. Trench-cap technology is selected and capacitors are fabricated on a separate die that will act as an interposer to receive the silicon die as well as the inductors. The work delivers an object containing a one-phase buck converter with the silicon die flip-chipped on a capacitor interposer where a tiny inductor die is reported. The one-phase demonstrator is suitable for coupled-phase demonstration. Standard and cascode configurations are experimentally compared at 100 MHz and 200 MHz switching frequency. A design methodology is presented to cover a system-to-device approach. The active silicon die is the central design part as the capacitive interposer is fabricated by IPDiA and inductors are provided by Tyndall National Institute. The assembly of the converter sub-parts is achieved using an industrial process. The work details a large set of measurements to show the performances of the delivered DC/DC converters as well as its limitations. A 91.5% peak efficiency at 100MHz switching frequency has been demonstrated
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Sagneri, Anthony (Anthony David). "Design of a Very High Frequency dc-dc boost converter". Thesis, Massachusetts Institute of Technology, 2007. http://hdl.handle.net/1721.1/38664.
Texto completo da fonteResumo:
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.Includes bibliographical references (p. 167-169).
Passive component volume is a perennial concern in power conversion. With new circuit architectures operating at extreme high frequencies it becomes possible to miniaturize the passive components needed for a power converter, and to achieve dramatic improvements in converter transient performance. This thesis focuses on the development of a Very High Frequency (VHF, 30 - 300 MHz) dc-dc boost converter using a MOSFET fabricated from a typical power process. Modeling and design studies reveal the possibility of building VHF dc-dc converters operable over the full automotive input voltage range (8 - 18 V) with transistors in a 50 V power process, through use of newly-developed resonant circuit topologies designed to minimize transistor voltage stress. Based on this, a study of the design of automotive boost converters was undertaken (e.g., for LED headlamp drivers at output voltages in the range of 22 - 33 V.) Two VHF boost converter prototypes using a [Phi]2 resonant boost topology were developed. The first design used an off the shelf RF power MOSFET, while the second uses a MOSFET fabricated in a BCD process with no special modifications.
(cont.) Soft switching and soft gating of the devices are employed to achieve efficient operation at a switching frequencies of 75 MHz in the first case and 50 MHz in the latter. In the 75 MHz case, efficiency ranges to 82%. The 50 MHz converter, has efficiencies in the high 70% range. Of note is low energy storage requirement of this topology. In the case of the 50 MHz converter, in particular, the largest inductor is 56 nH. Finally, closed-loop control is implemented and an evaluation of the transient characteristics reveals excellent performance.
by Anthony Sagneri.
S.M.
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Jacques, R. "A frequency converter to power a soudronic VAA20 welding machine". Master's thesis, University of Cape Town, 1991. http://hdl.handle.net/11427/22037.
Texto completo da fonteResumo:
Bibliography: pages 135-136.This thesis covers the design, manufacture and testing of a frequency converter, that transforms three phase AC 380V, into one phase AC 50 to 120Hz, 100 to 650V. The inverter output is intended to power a Soudronic VAA2 O welding machine. The input to the converter was stepped down and rectified to generate an unregulated DC bus of 250V. A full bridge transistorised inverter was controlled by a 6809 microprocessor that generated pulse width modulated waveforms to derive a desired inverter output current and frequency. A base drive was developed to control the power transistor in the inverter. It facilitates the rapid switching of the transistors and provides them with overcurrent protection. The inverter was originally constructed in push-pull configuration. At 20KVA this type of inverter was found to be undesirable, so a full bridge configuration was used in the final design. The converter has been installed and is operating successfully. Many recommendations are made for the improvement of future converters. The changes will improve the operation of the converter and can also reduce the size, cost and weight of it.
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Zhang, Zhemin. "High-frequency Quasi-square-wave Flyback Regulator". Diss., Virginia Tech, 2016. http://hdl.handle.net/10919/77434.
Texto completo da fonteResumo:
Motivated by the recent commercialization of gallium-nitride (GaN) switches, an effort was initiated to determine whether it was feasible to switch the flyback converter at 5 MHz in order to improve the power density of this versatile isolated topology. Soft switching techniques have to be utilized to eliminate the switching loss to maintain high efficiency at multi-megahertz. Compared to the traditional modeling of zero-voltage-switching quasi-square-wave converters, a numerical methodology of parameters design is proposed based on the steady-state model of zero-voltage switching quasi-square-wave flyback converter. The magnetizing inductance is selected to guarantee zero-voltage switching for the entire input and load range with the trade-off design for conduction loss and turn-off loss.
A design methodology is introduced to select a minimum core volume for an inductor or coupled inductors experiencing appreciable core loss. The geometric constant Kgac = MLT/(Ac2WA) is shown to be a power function of the core volume Ve, where Ac is the effective core area, WA is the area of the winding window, and MLT is the mean length per turn for commercial toroidal, ER, and PQ cores, permitting the total loss to be expressed as a direct function of the core volume. The inductor is designed to meet specific loss or thermal constraints. An iterative procedure is described in which two- or three-dimensional proximity effects are first neglected and then subsequently incorporated via finite-element simulation. Interleaved and non-interleaved planar PCB winding structures were also evaluated to minimize leakage inductance, self-capacitance and winding loss. The analysis on the trade-off between magnetic size, frequency, loss and temperature indicated the potential for a higher density flyback converter.
A small-signal equivalent circuit of QSW converter was proposed to design the control loop and to understand the small-signal behavior. By adding a simple damping resistor on the traditional small-signal CCM model, it can predict the pole splitting phenomenon observed in QSW converter. With the analytical expressions of the transfer functions of QSW converters, the impact of key parameters including magnetizing inductance, dead time, input voltage and output power on the small-signal behavior can be analyzed. The closed-loop bandwidth can be pushed much higher with this modified model, and the transient performance is significantly improved.
With the traditional fix dead-time control, a large amount of loss during dead time occurred, especially for the eGaN FETs with high reverse voltage drop. An adaptive dead time control scheme was implemented with simple combinational logic circuitries to adjust the turn on time of the power switches. A variable deadtime control was proposed to further improve the performance of adaptive dead-time control with simplified sensing circuit, and the extra conduction loss caused by propagation delay in adaptive dead-time control can be minimized at multi-megahertz frequency.Ph. D.
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Si, Dang Huy Quoc. "A new implementation of high frequency, high voltage direct power converter". Thesis, University of Nottingham, 2006. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.430219.
Texto completo da fonte
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Pilawa-Podgurski, Robert C. N. "Design and evaluation of a very high frequency dc/dc converter". Thesis, Massachusetts Institute of Technology, 2007. http://hdl.handle.net/1721.1/41545.
Texto completo da fonteResumo:
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Includes bibliographical references (p. 139-143).
This thesis presents a resonant boost topology suitable for very high frequency (VHF, 30-300 MHz) dc-dc power conversion. The proposed design is a fixed frequency, fixed duty ratio resonant converter featuring low device stress, high efficiency over a wide load range, and excellent transient performance. A 110 MHz, 23 W experimental converter has been built and evaluated. The input voltage range is 8-16 V (14.4 V nominal), and the selectable output voltage is between 22-34 V (33 V nominal). The converter achieves higher than 87% efficiency at nominal input and output voltages, and maintains efficiency above 80% for loads as small as 5% of full load. Furthermore, efficiency is high over the input and output voltage range. In addition, a resonant gate drive scheme suitable for VHF operation is presented, which provides rapid startup and low-loss operation. The converter regulates the output using high-bandwidth on-off hysteretic control, which enables fast transient response and efficient light load operation. The low energy storage requirements of the converter allow the use of coreless inductors, thereby eliminating magnetic core loss and introducing the possibility of integration. The target application of the converter is the automotive industry, but the design presented here can be used in a broad range of applications where size, cost, and weight are important, as well as high efficiency and fast transient response.
by Robert C.N. Pilawa-Podgurski.
M.Eng.
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Burkhart, Justin (Justin Michael). "Design of a very high frequency resonant boost DC-DC converter". Thesis, Massachusetts Institute of Technology, 2010. http://hdl.handle.net/1721.1/60157.
Texto completo da fonteResumo:
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2010.Includes bibliographical references (p. 163-164).
THIS thesis explores the development of a very high frequency DC-DC resonant boost converter. The topology examined features low parts count and fast transient response but suffers from higher device stresses compared to other topologies that use a larger number of passive components. A new design methodology for the proposed converter topology is developed. This design procedure - unlike previous design methodologies for similar topologies - is based on direct analysis of the topology and does not rely on lengthy time-domain simulation sweeps across circuit parameters to identify good designs. Additionally, a method to design semiconductor devices that are suitable for use in the proposed VHF power converter is presented. When the main semiconductor switch is fabricated in a integrated power process where the designer has control over the device layout, large performance gains can be achieved by considering parasitics and loss mechanisms that are important to operation at VHF when designing the device. A method to find the optimal device for a particular converter design is presented. The new design methodology is combined with the device optimization technique to enable the designer to rapidly find the optimal combination of converter and device design for a given specification. To validate the proposed converter topology, design methodology, and device optimization, a 75 MHz prototype converter is designed and experimentally demonstrated. The performance of the prototype closely matches that predicted by the design procedure, and achieves good efficiency over a wide input voltage range.
by Justin Burkhart.
S.M.
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Musabeyoglu, Ahmet Can. "A zero-voltage switching technique for high frequency buck converter ICs". Thesis, Massachusetts Institute of Technology, 2017. http://hdl.handle.net/1721.1/113122.
Texto completo da fonteResumo:
Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Cataloged from student-submitted PDF version of thesis.
Includes bibliographical references (pages 59-60).
This thesis explores a zero-voltage switching (ZVS) method that can be used to decrease the frequency dependent losses in a buck converter. The specific application for this thesis was a buck converter IC with an input voltage of up to 42V. The method utilizes the addition of an auxiliary circuit composed of a helper inductor and two helper power MOSFETs that compliment the switching transition of a conventional synchronous buck converter topology. It is shown in this thesis that by using the described topology, the switching losses of the high-side power MOSFET in a synchronous buck converter can be reduced by up to 45%. Furthermore, it is shown that a similar helper circuit could be used to reduce the gate drive losses for both power MOSFETs in a synchronous buck converter by up to 60%. Since the method requires the use of an additional helper inductor with a small value (10-50 nH), various methods to integrate this inductor into an IC package are investigated. 0.35[mu]m BiCMOS technology was used to simulate and analyze the merits of the described topology and compare it to the LT8697, a hard-switched synchronous buck converter IC.
by Ahmet Can Musabeyoglu.
M. Eng.
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Jackson, David A. (David Alexander). "Design and characterization of a radio-frequency dc/dc power converter". Thesis, Massachusetts Institute of Technology, 2005. http://hdl.handle.net/1721.1/33286.
Texto completo da fonteResumo:
Thesis (M. Eng. and S.B.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005.Includes bibliographical references (p. 169-171).
The use of radio-frequency (RF) amplifier topologies in dc/dc power converters allows the operating frequency to be increased by more than two orders of magnitude over the frequency of conventional converters. This enables a reduction in energy storage capacity by several orders of magnitude, and completely eliminates the need for ferromagnetic material in the converter. As a result, power converter size, weight and cost can all potentially be reduced. Moreover, converter output power and efficiency remain high because of the soft-switching capabilities of RF amplifiers. This document describes the design, implementation and measurement of a dc/dc power converter cell operating at 100MHz, with approximately 10 to 30W of output power at around 75% efficiency. The cell is designed for an input voltage range of 11 to 16V, and a user-determined output voltage on the same order of magnitude. The design of this cell also allows an unlimited number of identical cells to be used in parallel to achieve higher output power. This type of converter has applications in a broad range of industries, including automotive, telecommunications, and computing.
by David A. Jackson.
M.Eng.and S.B.
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Li, Qiang. "Low-Profile Magnetic Integration for High-Frequency Point-of-Load Converter". Diss., Virginia Tech, 2011. http://hdl.handle.net/10919/28637.
Texto completo da fonteResumo:
Today, every microprocessor is powered with a Voltage Regulator (VR), which is also known as a high current Point-of-Load converter (POL). These circuits are mostly constructed using discrete components, and populated on the motherboard. With this solution, the passive components such as inductors and capacitors are bulky. They occupy a considerable footprint on the motherboard. The problem is exacerbated with the current trend of reducing the size of all forms of portable computing equipment from laptop to netbook, increasing functionalities of PDA and smart phones. In order to solve this problem, a high power density POL needs to be developed. An integration solution was recently proposed to incorporate passive components, especially magnetic components, with active components in order to realize the needed power density for the POL. Todayâ s discrete VR only has around 100W/in3 power density. The 3D integration concept is widely used for low current integrated POL. With this solution, a very low profile planar inductor is built as a substrate for the active components of the POL. By doing so, the POL footprint can be dramatically saved, and the available space is also fully utilized. This 3D integrated POL can achieve 300-1000W/in3 power density, however, with considerably less current. This might address the needs of small hand-held equipment such as PDA and Smart phone type of applications. It does not, however, meet the needs for such applications as netbook, laptop, desk-top and server applications where tens and hundreds of amperes are needed. So, although the high density integrated POL has been demonstrated at low current level, magnetic integration is still one of the toughest barriers for integration, especially for high current POL.
In order to alleviate the intense thirst from the computing and telecom industry for high power density POL, the 3D integration concept needs be extended from low current applications to high current applications. The key technology for 3D integration is the low profile planar inductor design. Before this research, there was no general methodology to analyze and design a low profile planar inductor due to its non-uniform flux distribution, which is totally different as a conventional bulky inductor. A Low Temperature Co-fired Ceramic (LTCC) inductor is one of the most promising candidates for 3D integration for high current applications. For the LTCC inductor, besides the non-uniform flux, it also has non-linear permeability, which makes this problem even more complicated. This research focuses on penetrating modeling and design barriers for planar magnetic to develop high current 3D integrated POL with a power density dramatically higher than todayâ s industry products in the same current level.
In the beginning, a general analysis method is proposed to classify different low profile inductor structures into two types according to their flux path pattern. One is a vertical flux type; another one is a lateral flux type. The vertical flux type means that the magnetic flux path plane is perpendicular with the substrate. The lateral flux type means that the magnetic flux path plane is parallel with the substrate. This analysis method allows us to compare different inductor structures in a more general way to reveal the essential difference between them. After a very thorough study, it shows that a lateral flux structure is superior to a vertical flux structure for low profile high current inductor design from an inductance density point of view, which contradicts conventional thinking. This conclusion is not only valid for the LTCC planar inductor, which has very non-linear permeability, but is also valid for the planar inductor with other core material, which has constant permeability.
Next, some inductance and loss models for a planar lateral flux inductor with a non-uniform flux are also developed. With the help of these models, different LTCC lateral flux inductor structures (single-turn structure and multi-turn structures) are compared systematically. In this comparison, the inductance density, winding loss and core loss are all considered. The proposed modeling methodology is a valuable extension of previous uniform flux inductor modeling, and can be used to solve other modeling problems, such as non-uniform flux transformer modeling.
After that, a design method is proposed for the LTCC lateral flux inductor with non-uniform flux distribution. In this design method, inductor volume, core thickness, winding loss, core loss are all considered, which has not been achieved in previous conventional inductor design methods. With the help of this design method, the LTCC lateral flux inductor can be optimized to achieve small volume, small loss and low profile at the same time. Several LTCC inductor substrates are also designed and fabricated for the 3D integrated POL. Comparing the vertical flux inductor substrate with the lateral flux inductor substrate, we can see a savings of 30% on the footprint, and a much simpler fabrication process. A 1.5MHz, 5V to 1.2V, 15A 3D integrated POL converter with LTCC lateral flux inductor substrate is demonstrated with 300W/in3 power density, which has a factor of 3 improvements when compared to todayâ s industry products.
Furthermore, the LTCC lateral flux coupled inductor is proposed to further increase power density of the 3D integrated POL converter. Due to the DC flux cancelling effect, the size of LTCC planar coupled inductor can be dramatically reduced to only 50% of the LTCC planar non-coupled inductor. Compared to previous vertical flux coupled inductor prototypes, a lateral flux coupled inductor prototype is demonstrated to have a 50% core thickness reduction. A 1.5MHz, 5V to 1.2V, 40A 3D integrated POL converter with LTCC lateral flux coupled inductor substrate is demonstrated with 700W/in3 power density, which has a factor of 7 improvements when compared to today's industry POL products in the same current level.
In conclusion, this research not only overcame some major academia problems about analysis and design for planar magnetic components, but also made significant contributions to the industry by successfully scaling the integrated POL from today's 1W-5W case to a 40W case. This level of integration would significantly save the cost, and valuable motherboard real estate for other critical functions, which may enable the next technological innovation for the whole computing and telecom industry.Ph. D.
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Vulovic, Marko. "Digital Control of a High Frequency Parallel Resonant DC-DC Converter". Thesis, Virginia Tech, 2010. http://hdl.handle.net/10919/35934.
Texto completo da fonteResumo:
A brief analysis of the nonresonant-coupled parallel resonant converter is performed. The converter is modeled and a reference classical analog controller is designed and simulated. Infrastructure required for digital control of the converter (including anti-aliasing filters and a modulator) is designed and a classical digital controller is designed and simulated, yielding a ~30% degradation in control bandwidth at the worst-case operating point as compared with the analog controller. Based on the strong relationship observed between low-frequency converter gain and operating point, a gain-scheduled digital controller is proposed, designed, and simulated, showing 4:1 improved worst-case control bandwidth as compared with the analog controller. A complete prototype is designed and built which experimentally validates the results of the gain-scheduled controller simulation with good correlation. The three approaches that were investigated are compared and conclusions are drawn. Suggestions for further research are presented.Master of Science
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Singh, Gunjan. "Computer control of a pulse width modulated AC/DC converter under a variable frequency power supply". Ohio : Ohio University, 1993. http://www.ohiolink.edu/etd/view.cgi?ohiou1175884455.
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Reusch, David Clayton. "High Frequency, High Power Density Integrated Point of Load and Bus Converters". Diss., Virginia Tech, 2012. http://hdl.handle.net/10919/26920.
Texto completo da fonteResumo:
The increased power consumption and power density demands of modern technologies
combined with the focus on global energy savings have increased the demands on DC/DC power
supplies. DC/DC converters are ubiquitous in everyday life, found in products ranging from
small handheld electronics requiring a few watts to warehouse sized server farms demanding
over 50 megawatts. To improve efficiency and power density while reducing complexity and
cost the modular building block approach is gaining popularity. These modular building blocks
replace individually designed specialty power supplies, providing instead an optimized complete
solution. To meet the demands for lower loss and higher power density, higher efficiency and
higher frequency must be targeted in future designs. The objective of this dissertation is to
explore and propose methods to improve the power density and performance of point of load
modules ranging from 10 to 600W.Ph. D.
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Chu, Alex. "Evaluation and Design of a SiC-Based Bidirectional Isolated DC/DC Converter". Thesis, Virginia Tech, 2018. http://hdl.handle.net/10919/81994.
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Galvanic isolation between the grid and energy storage unit is typically required for bidirectional power distribution systems. Due to the recent advancement in wide-bandgap semiconductor devices, it has become feasible to achieve the galvanic isolation using bidirectional isolated DC/DC converters instead of line-frequency transformers.
A survey of the latest generation SiC MOSFET is performed. The devices were compared against each other based on their key parameters. It was determined that under the given specifications, the most suitable devices are X3M0016120K 1.2 kV 16 mohm and C3M0010090K 900 V 10 mohm SiC MOSFETs from Wolfspeed.
Two of the most commonly utilized bidirectional isolated DC/DC converter topologies, dual active bridge and CLLC resonant converter are introduced. The operating principle of these converter topologies are explained. A comparative analysis between the two converter topologies, focusing on total device loss, has been performed. It was found that the CLLC converter has lower total device loss compared to the dual active bridge converter under the given specifications. Loss analysis for the isolation transformer in the CLLC resonant converter was also performed at different switching frequencies. It was determined that the total converter loss was lowest at a switching frequency of 250 kHz
A prototype for the CLLC resonant converter switching at 250 kHz was then designed and built. Bidirectional power delivery for the converter was verified for power levels up to 25 kW. The converter waveforms and efficiency data were captured at different power levels. Under forward mode operation, a peak efficiency of 98.3% at 15 kW was recorded, along with a full load efficiency value of 98.1% at 25 kW. Under reverse mode operation, a peak efficiency of 98.8% was measured at 17.8 kW. The full load efficiency at 25 kW under reverse mode operation is 98.5%.Master of Science
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Tolstoy, Georg. "High-Efficiency SiC Power Conversion : Base Drivers for Bipolar Junction Transistors and Performance Impacts on Series-Resonant Converters". Doctoral thesis, KTH, Elektrisk energiomvandling, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-168163.
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This thesis aims to bring an understanding to the silicon carbide (SiC) bipolar junction transistor (BJT). SiC power devices are superior to the silicon IGBT in several ways. They are for instance, able to operate with higher efficiency, at higher frequencies, and at higher junction temperatures. From a system point of view the SiC power device could decrease the cost and complexity of cooling, reduce the size and weight of the system, and enable the system to endure harsher environments. The three main SiC power device designs are discussed with a focus on the BJT. The SiC BJT is compared to the SiC junction field-effect transistor (JFET) and the metal-oxide semiconductor field-effect transistor (MOSFET). The potential of employing SiC power devices in applications, ranging from induction heating to high-voltage direct current (HVDC), is presented. The theory behind the state-of-the-art dual-source (2SRC) base driver that was presented by Rabkowski et al. a few years ago is described. This concept of proportional base drivers is introduced with a focus on the discretized proportional base drivers (DPBD). By implementing the DPBD concept and building a prototype it is shown that the steady-state consumption of the base driver can be reduced considerably. The aspects of the reverse conduction of the SiC BJT are presented. It is shown to be of importance to consider the reduced voltage drop over the base-emitter junction. Last the impact of SiC unipolar and bipolar devices in series-resonant (SLR) converters is presented. Two full-bridges are designed and constructed, one with SiC MOSFETs utilizing the body diode for reverse conduction during the dead-time, and the second with SiC BJTs with anti-parallel SiC Schottky diodes. It is found that the SiC power devices, with their absence of tail current, are ideal devices to fully utilize the soft-switching properties that the SLR converters offer. The SiC MOSFET benefits from its possibility to utilize reverse conduction with a low voltage drop. It is also found that the size of capacitance of the snubbers can be reduced compare to state-of-the-art silicon technology. High switching frequencies of 200 kHz are possible while still keeping the losses low. A dead-time control strategy for each device is presented. The dual control (DuC) algorithm is tested with the SiC devices and compared to frequency modulation (FM). The analytical investigations presented in this thesis are confirmed by experimental results on several laboratory prototype converters.QC 20150529
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Glaser, John Stanley 1964. "Analysis and design of a constant frequency diode-clamped series resonant converter". Thesis, The University of Arizona, 1991. http://hdl.handle.net/10150/278060.
Texto completo da fonteResumo:
A constant frequency diode-clamped series resonant power converter (CFCSRC) is proposed as a solution to problems associated with frequency-controlled resonant converters. This converter has two resonant frequencies, and control is achieved by varying the relative time per switching cycle spent at each resonant frequency. Two zero-current-switching (ZCS) modes are examined and plotted in the output plane. Operating and mode boundaries are found and also plotted in the output plane. The output equation for the main mode is shown to be hyperbolic. Peak voltages are shown to be less than or equal to the input voltage, and peak currents are shown to be less than those of the frequency-controlled diode-clamped series resonant converter over a large operating range. A design procedure is given in the form of a design example. Data from a prototype converter is plotted with theoretical data in the output plane and good agreement with the theoretical model is obtained.
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STEPHANE, YANNICK NJIOMOUO. "3D High Frequency Modelling of Motor Converter and Cables in Propulsion Systems". Thesis, KTH, Elektroteknisk teori och konstruktion, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-160637.
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The use of the power converters in railway traction systems introduces high frequency electromagnetic interference (EMI) in the propulsion system, which causes electromagnetic compatibility (EMC) problems. These high frequency phenomena come from fast variations of current and voltage during the switching operations in the power converter. The high frequency currents generate Electromagnetic (EM) disturbances that could distort the smooth functionality of the electrical drive system. In fact, power and audio frequency emissions could disturb track signaling and the control systems, while high frequency currents injected into cable screens could damage the cables. In order to ensure compatibility to conducted and radiated EMC requirements, and related infrastructure signaling specications, it is necessary to perform 3D modelling of the drive system to predict the EM emission during the design phase of the propulsion system. CST, an electromagnetic analysis tool, is used to create the 3D model of the converter module and the cables. The model allows for the inclusion of the parasitic characteristics of the IGBTs, the bus-bars, and the motor cables. Inuence of dierent grounding schemes is analyzed. The model predicts the EM eld distribution at points inside the converter module and in the vicinity.Anvandningen av kraftomvandlare i jarnvagstraktionssystem introducerar hogfrekvens elektromagnetisk interferens (EMI) i framdrivningssystemet, vilket orsakar elektromagnetiska kompatibilitetsproblem (EMC). Dessa hogfrekvensfenomen orsakas av snabba variationer i strom och spanning under omkopplingsoperationer i kraftomvandlare. Hogfrekvensstrommarna alstrar elektromagnetiska (EM) storningar, som kan paverka funktionaliteten hos det elektriska drivsystemet. Storningar vid kraft- och ljudfrekvenser kan paverka signal- och kontrollsystemen, medan hogfrekventa strommar injiceras i kabelskarmar kan skada kablarna. For att sakerstalla kompatibiliteten mellan EMC-kraven, vad galler ledningsbundna och utsanda storningar, och specikationerna for signalsystemets infrastruktur ar det nodvandigt att utfora 3D-modellering av drivsystemet, for att redan under designfasen av framdrivningssystemet kunna forutsaga de elektromagnetiska storningarna. CST, som ar ett elektromagnetiskt analysverktyg, anvands for att skapa 3D-modellen av omriktarmodulen och kablarna. Modellen gor det mojligt att ta med de parasitiska egenskaperna hos IGBT, ledningsmoduler och motorkablar. Inverkan av olika jordningssystemen analyseras. Modellen forutsager det elektromagnetiska faltet vid olika punkter inuti omriktarmodulen och i dess narhet.
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LANG, YONG-LING, e 郎永齡. "High frequency DC converter". Thesis, 1987. http://ndltd.ncl.edu.tw/handle/49679249817562212384.
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Kuan, Chih-Kuang, e 管馳光. "Microwave Frequency Sensing Using Frequency to Voltage Converter". Thesis, 2012. http://ndltd.ncl.edu.tw/handle/47397833157346916430.
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碩士國立交通大學
電子研究所
100
This thesis aims at the design of a frequency to voltage converter with 22GHz to 29GHz wide sensing frequency bandwidth for providing microwave frequency sensing. The propose structure is transformed two signals by low pass filter and buffer respectively, and two power detector convert signals into DC voltage and then do the math divided by the square root. Based on a very simple operating principle, the converter provides a linear transfer characteristic. Two topics are realized in this thesis. The first topic is a frequency to voltage converter with -10dBm to 0dBm input power dynamic range in TSMC 0.18-贡m CMOS technology. The simulation results show 694mV maximum output variable voltage with 22GHz to 29GHz input frequency different. Linearity error and input power error are less then 6.3% under 7.25mW power consumption. In the second topic, the proposed frequency to voltage converter is verified in board level. Measurement results show 325mV maximum output variable voltage with 1.5GHz to 3.5GHz input frequency different. Provided 30dBm input power dynamic range.
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CAI, DONG-YI, e 蔡東宜. "Constant-Frequency parallel-resonant converter". Thesis, 1990. http://ndltd.ncl.edu.tw/handle/09359324523573623283.
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Chen, Song-Cian, e 陳頌謙. "Near Constant-Frequency LLC Resonant Converter". Thesis, 2011. http://ndltd.ncl.edu.tw/handle/80169305727621846036.
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碩士建國科技大學
電機工程系暨研究所
99
This study proposed a new LLC resonant converter with near constant-frequency. With the characteristic of soft switching, LLC resonant converters presents the advantages of high conversion efficiency and low electromagnetic interference (EMI) that they are suitable for high-frequency power converters. Nonetheless, LLC resonant converters are operated with variable-frequency control that the designs of EMI filters become more complicated and difficult. Besides, when working in light load, the efficiency conversion is lower and the output voltage ripples are larger. In this case, the LLC resonant converter, which could work in Near Constant-Frequency, is proposed in this study. To achieve the function of Near Constant-Frequency, a frequency-converted Resonant Tank is designed to change the resonant frequency with the change of load. Furthermore, the LLC resonant converter with Near Constant-Frequency remains the characteristic of high efficiency conversion and largely improves the conversion efficiency with light load. The LLC resonant converter with near constant-frequency control is first analyzed; then, chaotic ganetic algorithm is utilized to design the key circuit element parameters of the converter; and finally, the near constant-frequency LLC resonant converter is completed. The experimental results show that the efficiency of the ultra-light load 6W is 78.2%, the efficiency of 18W reaches 89.3%, the maximum efficiency of the circuit presents 94.5%, and the change of the operation frequency 24W~240W appears 1.1kHz.
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GIU, GUO-ZHEN, e 邱國珍. "High frequency quasi-resonant 'CUK converter". Thesis, 1988. http://ndltd.ncl.edu.tw/handle/16475920676707101656.
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Liao, Shih-Chieh, e 廖士傑. "Low current, pulse-frequency modulation converter". Thesis, 2004. http://ndltd.ncl.edu.tw/handle/86023484578794714759.
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碩士逢甲大學
電子工程所
92
In recent years, the CMOS integrated circuit technology has been successfully applied to a lot of systems. In order to provide efficient power for portable devices, the low voltage and low current circuits would be the trend for current CMOS development. To deal with faster and more complicated analog signals, most of research directions for pulse modulation circuits focus on the precise output waveform and fast response time. The design of pulse modulation circuit is in a mature stage now, however, due to the advance of process technology, how to achieve a low voltage, low power consumption, and fast response time is the main topic for my research. In this thesis, I will concentrate on the design of an accurate comparator, effective discharging route, as well as precise control of oscillator. This design is suitable for standard CMOS technology implementation and easy to make an IP circuit to use widely. From HSPICE simulation results, the operating frequency can achieve 200kHz and the operating voltage is 1.4V. The circuit of this thesis is designed by using tsmc 0.35μm CMOS 2P4M technology. It occupies an area of 0.438×0.391 mm2 and has a power consumption of 66μW from a 3.3V power supply.
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Hsu, Steven, e 徐聯芳. "frequency control of series resonant converter". Thesis, 1998. http://ndltd.ncl.edu.tw/handle/51362460146490510678.
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碩士中正理工學院
電機工程研究所
86
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Rajapandian, A. "A Constant Frequency Resonant Transition Converter". Thesis, 1995. http://etd.iisc.ernet.in/handle/2005/1645.
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YANG, JIN-DE, e 楊進德. "High frequency multi-resonant 'Cuk converter". Thesis, 1990. http://ndltd.ncl.edu.tw/handle/48884549100181992421.
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Amirabadi, Mahshid. "Soft-Switching High-Frequency AC-Link Universal Power Converters with Galvanic Isolation". Thesis, 2013. http://hdl.handle.net/1969.1/151305.
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In this dissertation the ac-link universal power converters, which are a new class of power converters, are introduced and studied in detail. The inputs and outputs of these converters may be dc, ac, single phase, or multi-phase. Therefore, they can be used in a variety of applications, including photovoltaic power generation, wind power generation, and electric vehicles. In these converters the link current and voltage are both alternating and their frequency can be high, which leads to the elimination of the dc electrolytic capacitors and the bulky low-frequency transformers. Therefore, the ac-link universal power converters are expected to have higher reliability and smaller size. Moreover, these converters are soft switching, which results in negligible switching losses and minimized current and voltage stress over devices.
In the first part of the dissertation, the parallel ac-link universal power converter is studied in detail. This converter is an extension of the buck-boost converter. The series ac-link universal power converter, which is dual of the parallel ac-link universal power converter, is proposed in the second part of this dissertation. This converter is an extension of the Cuk converter. A modified configuration with fewer switches, named sparse ac-link universal power converter is proposed in the third part of this dissertation. The sparse ac-link universal power converters can appear as parallel or series.
The performance of all these configurations is evaluated through simulations and experiments.
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LEE, HSIANG-LUNG, e 李湘龍. "The Frequency Response Analysis of Buck Converter". Thesis, 2008. http://ndltd.ncl.edu.tw/handle/44849144664763351425.
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碩士大葉大學
電機工程學系碩士在職專班
96
Recently the energy question was more serious, when the electric power, the petroleum and non-renewable was in danger. When it became international society economy problem. The power of development solar energy resource become economical development question. The switch loss of the resonant converter is lower than traditional switch converter, and the technique of zero-voltage-switch is more effective in reducing the temperature of active switch. Finally , we will compare the case of switch with the resonant type and traditional type
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Chang, Ching-Hsiang, e 章晉祥. "A 2.4-GHz Digital-to-Frequency Converter". Thesis, 2008. http://ndltd.ncl.edu.tw/handle/81855487247758049440.
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碩士國立清華大學
電機工程學系
96
In this thesis, a digital-to-frequency converter (DFC) designed for 2.4 GHz ISM-band applications is proposed. The DFC directly produces an analog periodic output signal which frequency is proportional to the input digital code. Since there is no feedback control loop, the converter can achieve very fast frequency-switching which is important for some wireless applications, for example: high data-rate FSK transmitters. The proposed design consists of a digitally controlled oscillator (DCO), a high speed gated ripple counter, and a digital control circuit for capacitance and frequency calibration. The DCO-based design provides stable and precise output frequency by avoiding noisy analog control. The digital-to-frequency conversion is realized by transfer the input frequency code to the capacitor control code of the DCO. Considering hardware complexity and process variations, two transfer algorithms for piecewise linear approximation and non-binary-weighted switched-capacitor arrays are proposed to minimize output frequency error. This design is implemented in TSMC 0.18 µm 1P6M CMOS process and the chip area is 1 x 1 mm2. According to the measurement results, the oscillation frequency is 2.34 ~ 2.59 GHz with 255 MHz tuning range, and the phase noise is less than -102 dBc/Hz at 500 kHz offset. The effective frequency resolution is 7 bits and the total power consumption is 13 mW under 1.8 V supply voltage.