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Artigos de revistas sobre o assunto "Parallel computers Evaluation"

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Choudhary, A., Wei-Keng Liao, D. Weiner, P. Varshney, R. Linderman, M. Linderman, and R. Brown. "Design, implementation and evaluation of parallel pipelined STAP on parallel computers." IEEE Transactions on Aerospace and Electronic Systems 36, no. 2 (April 2000): 528–48. http://dx.doi.org/10.1109/7.845238.

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Moorthi, M. Narayana, and R. Manjula. "Performance Evaluation and Analysis of Parallel Computers Workload." International Journal of Grid and Distributed Computing 9, no. 1 (January 31, 2016): 127–34. http://dx.doi.org/10.14257/ijgdc.2016.9.1.13.

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TOUYAMA, TAKAYOSHI, and SUSUMU HORIGUCHI. "PERFORMANCE EVALUATION OF PRACTICAL PARALLEL COMPUTER MODEL LogPQ." International Journal of Foundations of Computer Science 12, no. 03 (June 2001): 325–40. http://dx.doi.org/10.1142/s0129054101000515.

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The present super computer will be replaced by a massively parallel computer consisting of a large number of processing elements which satisfy the continuous increasing depend for computing power. Practical parallel computing model has been expected to develop efficient parallel algorithms on massively parallel computers. Thus, we have presented a practical parallel computation model LogPQ by taking account of communication queues into the LogP model. This paper addresses the performance of a parallel matrix multiplication algorithm using LogPQ and LogP models. The parallel algorithm is implem
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KRUSCHE, PETER. "EXPERIMENTAL EVALUATION OF BSP PROGRAMMING LIBRARIES." Parallel Processing Letters 18, no. 01 (March 2008): 7–21. http://dx.doi.org/10.1142/s0129626408003193.

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The model of bulk-synchronous parallel computation (BSP) helps to implement portable general purpose algorithms while maintaining predictable performance on different parallel computers. Nevertheless, when programming in ‘BSP style’, the running time of the implementation of an algorithm can be very dependent on the underlying communication library. In this study, an overview of existing approaches to practical BSP programming in C/C++ or Fortran is given and benchmarks were run for the two main BSP-like communication libraries, the Oxford BSP Toolset and PUB. Furthermore, a memory efficient m
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Onbasioglu, E., and Y. Paker. "A comparative workload-based methodology for performance evaluation of parallel computers." Future Generation Computer Systems 12, no. 6 (June 1997): 521–45. http://dx.doi.org/10.1016/s0167-739x(97)83070-1.

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Furht, B. "A contribution to classification and evaluation of structures for parallel computers." Microprocessing and Microprogramming 25, no. 1-5 (January 1989): 203–8. http://dx.doi.org/10.1016/0165-6074(89)90196-8.

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BLÖTE, H. W. J. "Statistical Mechanics and Special-Purpose Computers." International Journal of Modern Physics C 02, no. 01 (March 1991): 14–20. http://dx.doi.org/10.1142/s0129183191000032.

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A number of special-purpose computers (SPC’s) have been built in the last two decades, and more are under construction. In parallel with the evolution of generalpurpose computers, the capacity of the fastest SPC’s has grown considerably in this period. The increase of speed is partly due to the availability of faster components, but even more important is the introduction of new architectures using pipelining and parallel processing. Apart from becoming faster on the average, a pronounced diversification has taken place in SPC’s which does not only affect their speed but also their versatility
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Sueyoshi, Toshinori, Keizo Saisho, and Itsujiro Arita. "Performance evaluation of the binary tree access mechanism in mimd type parallel computers." Systems and Computers in Japan 17, no. 9 (1986): 47–57. http://dx.doi.org/10.1002/scj.4690170906.

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Nguyen Thu, Thuy. "Parallel iteration of two-step Runge-Kutta methods." Journal of Science Natural Science 66, no. 1 (March 2021): 12–24. http://dx.doi.org/10.18173/2354-1059.2021-0002.

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In this paper, we introduce the Parallel iteration of two-step Runge-Kutta methods for solving non-stiff initial-value problems for systems of first-order differential equations (ODEs): y′(t) = f(t, y(t)), for use on parallel computers. Starting with an s−stage implicit two-step Runge-Kutta (TSRK) method of order p, we apply the highly parallel predictor-corrector iteration process in P (EC)mE mode. In this way, we obtain an explicit two-step Runge-Kutta method that has order p for all m, and that requires s(m+1) right-hand side evaluations per step of which each s evaluation can be computed p
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Gupta, Anshul, Fred G. Gustavson, Mahesh Joshi, and Sivan Toledo. "The design, implementation, and evaluation of a symmetric banded linear solver for distributed-memory parallel computers." ACM Transactions on Mathematical Software 24, no. 1 (March 1998): 74–101. http://dx.doi.org/10.1145/285861.285865.

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Teses / dissertações sobre o assunto "Parallel computers Evaluation"

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Grove, Duncan A. "Performance modelling of message-passing parallel programs." Title page, contents and abstract only, 2003. http://web4.library.adelaide.edu.au/theses/09PH/09phg8832.pdf.

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This dissertation describes a new performance modelling system, called the Performance Evaluating Virtual Parallel Machine (PEVPM). It uses a novel bottom-up approach, where submodels of individual computation and communication events are dynamically constructed from data-dependencies, current contention levels and the performance distributions of low-level operations, which define performance variability in the face of contention.
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Ligon, Walter Batchelor III. "An empirical evaluation of architectural reconfigurability." Diss., Georgia Institute of Technology, 1992. http://hdl.handle.net/1853/8204.

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Maache, Ahmed. "A prototype parallel multi-FPGA accelerator for SPICE CMOS model evaluation." Thesis, University of Southampton, 2011. https://eprints.soton.ac.uk/173435/.

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Due to ever increasing complexity of circuits, EDA tools and algorithms are demanding more computational power. This made transistor-level simulation a growing bottleneck in the circuit development process. This thesis serves as a proof of concept to evaluate and quantify the cost of using multi-FPGA systems in SPICE-like simulations in terms of acceleration, throughput, area, and power. To this end, a multi-FPGA architecture is designed to exploit the inherent parallelism in the device model evaluation phase within the SPICE simulator. A code transformation flow which converts the high-level
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Dhandapani, Mangayarkarasi. "Performance evaluation of high performance parallel I/O." Master's thesis, Mississippi State : Mississippi State University, 2003. http://sun.library.msstate.edu/ETD-db/theses/available/etd-07072003-155031/unrestricted/mythesis.pdf.

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Larriba, Pey Josep Lluís. "Design and evaluation of tridiagonal solvers for vector and parallel computers." Doctoral thesis, Universitat Politècnica de Catalunya, 1995. http://hdl.handle.net/10803/6012.

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Jiang, Jie Cheng. "Performance monitoring in transputer-based multicomputer networks." Thesis, University of British Columbia, 1990. http://hdl.handle.net/2429/28968.

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Parallel architectures, like the transputer-based multicomputer network, offer potentially enormous computational power at modest cost. However, writing programs on a multicomputer to exploit parallelism is very difficult due to the lack of tools to help users understand the run-time behavior of the parallel system and detect performance bottlenecks in their programs. This thesis examines the performance characteristics of parallel programs in a multicomputer network, and describes the design and implementation of a real-time performance monitoring tool on transputers. We started with a sim
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Afsahi, Ahmad. "Design and evaluation of communication latency hiding/reduction techniques for message-passing environments." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 2000. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape4/PQDD_0019/NQ48225.pdf.

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Li, Xiaogang. "Efficient and parallel evaluation of XQuery." Columbus, Ohio : Ohio State University, 2006. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=osu1139939037.

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Fu, Jingsong. "ParPlum : a system for evaluating parallel program optimization methods." PDXScholar, 1991. https://pdxscholar.library.pdx.edu/open_access_etds/4177.

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The diversity of application programs and parallel architectures makes the mapping problem complicated and hard to evaluate. The quality of mapping is machine and application dependent and varies due to inaccurate values of application and architecture characteristics. A system for developing, applying and evaluating mappings must have four characteristics: (1) Simplicity: A mapping procedure can be evaluated by separately evaluating its submapping, so the complicated problem can be simplified. (2) Generality: A wide range of application programs and architectures can be easily represented and
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Tang, Dezheng. "Mapping Programs to Parallel Architectures in the Real World." PDXScholar, 1992. https://pdxscholar.library.pdx.edu/open_access_etds/4534.

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Mapping an application program to a parallel architecture can be described as a multidimensional optimization problem. To simplify the problem, we divide the overall mapping process into three sequential substeps: partitioning, allocating, and scheduling, with each step using a few details of the program and architecture description. Due to the difficulty in accurately describing the program and architecture and the fact that each substep uses incomplete information, inaccuracy is pervasive in the real-world mapping process. We hypothesize that the inaccuracy and the use of suboptimal, heurist
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Livros sobre o assunto "Parallel computers Evaluation"

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Performance evaluation, prediction and visualization of parallel systems. Boston: Kluwer Academic Publishers, 1999.

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Lyon, Gordon. On parallel processing benchmarks. Gaithersburg, MD: U.S. Dept. of Commerce, National Bureau of Standards, 1987.

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Walch, Markus. Evaluating parallel processing of communication protocols. München: R. Oldenbourg, 1994.

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Dimpsey, Robert Tod. Performance evaluation and modeling techniques for parallel processors. Urbana, Ill: Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, College of Engineering, University of Illinois at Urbana-Champaign, 1992.

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Peter, Thanisch, Bloor Robin, and Jowitt Tom, eds. Parallel database technology: An evaluation and comparison of scalable sytems. Milton Keynes: Bloor Research Group, 1995.

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Paul, Miller Barton, ed. Monitoring systems and tool interoperability. New York: Nova Science, 2004.

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Jones, James Patton. Evaluation of job queuing/scheduling software: Phase l report. [Washington, D.C: National Aeronautics and Space Administration, 1996.

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1945-, Gelenbe E., ed. High performance computer systems: Proceedings of the International Symposium on High Performance Computer Systems, Paris, France, 14-16 December 1987. Amsterdam: North-Holland, 1988.

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Ferscha, Alois. Modellierung und Leistungsanalyse paralleler Systeme mit dem PRM-Netz-Modell. Wien: Oldenbourg, 1995.

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Lindemann, Christoph. Performance modelling with deterministic and stochastic Petri nets. Chichester: Wiley, 1998.

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Capítulos de livros sobre o assunto "Parallel computers Evaluation"

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Genz, Alan. "The Numerical Evaluation of Multiple Integrals on Parallel Computers." In Numerical Integration, 219–29. Dordrecht: Springer Netherlands, 1987. http://dx.doi.org/10.1007/978-94-009-3889-2_23.

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Hagiya, Masami, Masanori Arita, Daisuke Kiga, Kensaku Sakamoto, and Shigeyuki Yokoyama. "Towards parallel evaluation and learning of Boolean 𝜇-formulas with molecules." In DNA Based Computers III, 57–72. Providence, Rhode Island: American Mathematical Society, 1999. http://dx.doi.org/10.1090/dimacs/048/05.

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Shang, Haifeng, Jiaqi Zhang, Wenguang Chen, Weimin Zheng, and Zhiyi Huang. "Performance Evaluation of View-Oriented Parallel Programming on Cluster of Computers." In High Performance Computing and Communications, 120–31. Berlin, Heidelberg: Springer Berlin Heidelberg, 2007. http://dx.doi.org/10.1007/978-3-540-75444-2_17.

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Gupta, Anshul, Fred G. Gustavson, Mahesh Joshi, and Sivan Toledo. "The design, implementation, and evaluation of a banded linear solver for distributed-memory parallel computers." In Applied Parallel Computing Industrial Computation and Optimization, 328–40. Berlin, Heidelberg: Springer Berlin Heidelberg, 1996. http://dx.doi.org/10.1007/3-540-62095-8_35.

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Bergamaschi, Flavio A., Carlos Hulot, and Ed Zaluska. "Performance evaluation of an advanced radar tracking filter on commercially available parallel computers." In High-Performance Computing and Networking, 915–16. Berlin, Heidelberg: Springer Berlin Heidelberg, 1996. http://dx.doi.org/10.1007/3-540-61142-8_647.

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Liao, Wei-keng, Alok Choudhary, Donald Weiner, and Pramod Varshney. "I/O Implementation and Evaluation of Parallel Pipelined STAP on High Performance Computers." In Lecture Notes in Computer Science, 354–58. Berlin, Heidelberg: Springer Berlin Heidelberg, 1999. http://dx.doi.org/10.1007/978-3-540-46642-0_51.

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Hartleb, Franz. "Graph Models for Performance Evaluation of Parallel Programs." In Parallel Computer Architectures, 80–86. Berlin, Heidelberg: Springer Berlin Heidelberg, 1993. http://dx.doi.org/10.1007/978-3-662-21577-7_6.

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Hockney, Roger W. "Classification and evaluation of parallel computer systems." In Parallel Computing in Science and Engineering, 13–25. Berlin, Heidelberg: Springer Berlin Heidelberg, 1988. http://dx.doi.org/10.1007/3-540-18923-8_12.

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Cui, J., J. L. Bordim, K. Nakano, T. Hayashi, and N. Ishii. "Multithreaded Parallel Computer Model with Performance Evaluation." In Lecture Notes in Computer Science, 155–60. Berlin, Heidelberg: Springer Berlin Heidelberg, 2000. http://dx.doi.org/10.1007/3-540-45591-4_20.

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Luque, E., R. Suppi, and J. Sorribes. "PSEE: Parallel system evaluation environment." In Lecture Notes in Computer Science, 696–99. Berlin, Heidelberg: Springer Berlin Heidelberg, 1993. http://dx.doi.org/10.1007/3-540-56891-3_62.

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Trabalhos de conferências sobre o assunto "Parallel computers Evaluation"

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Shahnaz, Rukhsana, Anila Usman, and Imran Chughtai. "Implementation and Evaluation of Parallel Sparse Matrix-Vector Products on Distributed Memory Parallel Computers." In 2006 IEEE International Conference on Cluster Computing. IEEE, 2006. http://dx.doi.org/10.1109/clustr.2006.311878.

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Abbas, Muhammad, Oscar Gustafsson, and Anton Blad. "Low-complexity parallel evaluation of powers exploiting bit-level redundancy." In 2010 44th Asilomar Conference on Signals, Systems and Computers. IEEE, 2010. http://dx.doi.org/10.1109/acssc.2010.5757714.

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Bohm, W., W. Najjar, B. Shankar, and L. Roh. "An evaluation of coarse grain dataflow code generation strategies." In Proceedings of Workshop on Programming Models for Massively Parallel Computers. IEEE Comput. Soc. Press, 1993. http://dx.doi.org/10.1109/pmmp.1993.315554.

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Lopez, David, Claudia Zepeda, and Jose Luis Carballido. "Evaluation of a parallel approach implementation of the p-stable semantics." In 2012 22nd International Conference on Electrical Communications and Computers (CONIELECOMP). IEEE, 2012. http://dx.doi.org/10.1109/conielecomp.2012.6189875.

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Nik Zulkipli, Nurul Huda, and Norazlan Idris. "An empirical study on performance evaluation of parallel architecture for web application services." In 2013 IEEE Symposium on Computers & Informatics (ISCI). IEEE, 2013. http://dx.doi.org/10.1109/isci.2013.6612406.

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Schönherr, Jürgen. "Evaluation and Optimum Design of Parallel Manipulators Having Defined Workspace." In ASME 2000 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. American Society of Mechanical Engineers, 2000. http://dx.doi.org/10.1115/detc2000/mech-14092.

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Abstract The condition of the Jacobian characterizes the transmission quality of manipulators and is used in this paper for the determination of the dimensions of manipulators having best mobility for a defined workspace. Typical planar and spatial manipulators of parallel structure and having 3 or 6 degrees of freedom are used to demonstrate the method of design used. Manipulators having identical degrees of freedom and workspaces and different structures, including those having fixed or variable leg lengths, are compared with respect to their mobility. The computing program developed for the
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Li, Liming, and Jing Zhao. "Comprehensive Evaluation of Parallel Mechanism and Robot Performance Based on Principal Component Analysis and Kernel Principal Component Analysis." In ASME 2015 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. American Society of Mechanical Engineers, 2015. http://dx.doi.org/10.1115/detc2015-47032.

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Revealing the relations among parallel mechanism and robot comprehensive performance, topological structure and dimension is the basis to optimize mechanism. Due to the correlation and diversity of the single performance indexes, statistical principles of linear dimension reduction and nonlinear dimension reduction were introduced into comprehensive performance analysis and evaluation for typical parallel mechanisms and robots. Then the mechanism’s topological structure and dimension with the best comprehensive performance could be selected based on principal component analysis (PCA) and kerne
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Mei, Bin, Fugui Xie, Xin-Jun Liu, and Xuan Luo. "Motion/Force Transmissibility Based Performance Evaluation of a 6-DOF Parallel Robot With 2-DOF Active Joints." In ASME 2018 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. American Society of Mechanical Engineers, 2018. http://dx.doi.org/10.1115/detc2018-85666.

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3-PP(Pa)S robot is a six degrees of freedom (DOFs) parallel mechanism with 2-DOF active planar joint. For the design and application of the 3-PP(Pa)S robot, it is essential to investigate the motion/force transmissibility of the robot. But previous studies of the motion/force transmissibility have mainly focused on the parallel robots with 1-DOF active joints and thus cannot be directly applied to the 3-PP(Pa)S robot. In this paper, input twist subspace, transmission wrench subspace and output twist subspace are investigated to build mathematical models of the twists and wrenches corresponding
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Devendorf, Erich, and Kemper Lewis. "Incorporating Process Architecture in the Evaluation of Stability in Distributed Design." In ASME 2011 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. ASMEDC, 2011. http://dx.doi.org/10.1115/detc2011-48375.

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In distributed design processes, individual design subsystems have local control over design variables and seek to satisfy their own individual objectives, which may also be influenced by some system level objectives. The resulting network of coupled subsystems will either converge to a stable equilibrium, or diverge in an unstable manner. In this paper, we study the dependence of system stability on the solution process architecture. The solution process architecture describes how the design subsystems are ordered and can be either sequential, parallel, or a hybrid that incorporates both para
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Zhang, Dan, and Zhen Gao. "Conceptual Design, Performance Evaluation and Dimensional Optimization of a Compact Acceleration Sensor Based on Flexure Parallel Mechanisms." In ASME 2011 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. ASMEDC, 2011. http://dx.doi.org/10.1115/detc2011-48089.

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In this paper, a tridimensional acceleration sensor based on flexure parallel mechanism (FPM) is presented. Three perpendicular compliant legs with compact monolithic structure are served as the elastic body for sensing the inertial signals in each direction. With integrated flexure hinges, each chain containing multiple revolute joints and cantilever beams are designed to carry compressive and tensile loads. Firstly, the structure evolution and kinematics modeling are introduced, followed by the multi-spring modeling of the directional compliance for the flexure leg. Then, the comprehensive f
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Relatórios de organizações sobre o assunto "Parallel computers Evaluation"

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Salazar, Sandra B., and Carl H. Smith. National Bureau of Standards Workshop on Performance Evaluation of Parallel Computers. Gaithersburg, MD: National Bureau of Standards, 1986. http://dx.doi.org/10.6028/nbs.ir.86-3395.

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