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Rozprawy doktorskie na temat „Complementary Metal-Oxide-Semiconductor (CMOS) Technology”

Autor: Grafiati

Data publikacji: 3 czerwca 2025

Data aktualizacji: 31 lipca 2025

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1

Al-Ahmadi, Ahmad Aziz. "COMPLEMENTARY ORTHOGONAL STACKED METAL OXIDE SEMICONDUCTOR: A NOVEL NANOSCALE COMPLEMENTRAY METAL OXIDE SEMICONDUCTOR ARCHTECTURE." Ohio University / OhioLINK, 2006. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1147134449.

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Csutak, Sebastian Marius. "Optical receivers and photodetectors in 130nm CMOS technology." Access restricted to users with UT Austin EID Full text (PDF) from UMI/Dissertation Abstracts International, 2001. http://wwwlib.umi.com/cr/utexas/fullcit?p3036588.

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Zahorian, Jaime S. "Fabrication technology and design for CMUTS on CMOS for IVUS catheters." Diss., Georgia Institute of Technology, 2013. http://hdl.handle.net/1853/51730.

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The objective of this research is to develop novel capacitive micromachined ultrasonic transducer (CMUT) arrays for intravascular ultrasonic (IVUS) imaging along with the fabrication processes to allow for monolithic integration of CMUTs with custom CMOS electronics for improved performance. The IVUS imaging arrays include dual-ring arrays for forward-looking volumetric imaging in coronary arteries and annular-ring arrays with dynamic focusing capabilities for side-looking cross sectional imaging applications. Both are capable of integration into an IVUS catheter 1-2 mm in diameter. The resear

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Ramirez, Ortiz Rolando Carleton University Dissertation Engineering Electrical. "Technology mapping algorithms for CMOS dynamic logic circuits." Ottawa, 1992.

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Walker, Richard John. "Fully digital, phase-domain ΔΣ 3D range image sensor in 130nm CMOS imaging technology". Thesis, University of Edinburgh, 2012. http://hdl.handle.net/1842/6214.

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Three-Dimensional (3D) optical range-imaging is a field experiencing rapid growth, expanding into a wide variety of machine vision applications, most recently including consumer gaming. Time of Flight (ToF) cameras, akin to RADAR with light, sense distance by measuring the round trip time of modulated Infra-Red (IR) illumination light projected into the scene and reflected back to the camera. Such systems generate 'depth maps' without requiring the complex processing utilised by other 3D imaging techniques such as stereo vision and structured light. Existing range-imaging solutions within the

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6

Lee, Myunghee. "A quasi-monolithic optical receiver using a standard digital CMOS technology." Diss., Georgia Institute of Technology, 1996. http://hdl.handle.net/1853/14720.

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Balachandran, Ganesh Kumar. "A switched-current filter in digital-CMOS technology with low charge-injection errors." Diss., Georgia Institute of Technology, 2001. http://hdl.handle.net/1853/15405.

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Moen, Kurt Andrew. "Predictive modeling of device and circuit reliability in highly scaled CMOS and SiGe BiCMOS technology." Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/44700.

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The advent of high-frequency silicon-based technologies has enabled the design of mixed-signal circuits that incorporate analog, RF, and digital circuit components to build cost-effective system-on-a-chip solutions. Emerging applications provide great incentive for continued scaling of transistor performance, requiring careful attention to mismatch, noise, and reliability concerns. If these mixed-signal technologies are to be employed within space-based electronic systems, they must also demonstrate reliability in radiation-rich environments. SiGe BiCMOS technology in particular is positioned

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9

Ho, Ka Wai. "A 1-V CMOS power amplifier for Bluetooth applications /." View Abstract or Full-Text, 2002. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202002%20HO.

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Xiao, Haiqiao. "Design of Radio-Frequency Filters and Oscillators in Deep-Submicron CMOS Technology." PDXScholar, 2008. https://pdxscholar.library.pdx.edu/open_access_etds/5233.

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Radio-frequency filters and oscillators are widely used in wireless communication and high-speed digital systems, and they are mostly built on passive integrated inductors, which occupy a relative large silicon area. This research attempted to implement filters and oscillators operating at 1-5 GHz using transistors only, to reduce the circuits’ area. The filters and oscillators are designed using active inductors, based on the gyrator principle; they are fabricated in standard digital CMOS technology to be compatible with logic circuits and further lower the cost. To obtain the highest operati

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11

Song, Seung-chul. "Advanced oxynitride and silicon nitride gate dielectrics for ULSI CMOS technology /." Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.

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12

Tang, Yi. "Digitally-assisted sigma-delta ADCs for scaled CMOS technology /." Thesis, Connect to this title online; UW restricted, 2007. http://hdl.handle.net/1773/5958.

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Haneef, Ibraheem. "SOI CMOS MEMS flow sensors." Thesis, University of Cambridge, 2009. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.611843.

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14

Wong, Man Chun. "A 1.8-V 2.4-GHz monolithic CMOS inductor-less frequency synthesizer for bluetooth application /." View Abstract or Full-Text, 2002. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202002%20WONG.

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15

Kong, Wan-Chul. "Low-power low-phase noise LC oscillators in silicon-on-sapphire CMOS technology /." Title page, table of contents and abstract only, 2004. http://web4.library.adelaide.edu.au/theses/09ENS/09ensk822.pdf.

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16

Shen, Chao. "Study of CMOS active pixel image sensor on SOI/SOS substrate /." View Abstract or Full-Text, 2003. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202003%20SHEN.

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Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2003.<br>Includes bibliographical references (leaves 67-69). Also available in electronic version. Access restricted to campus users.

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17

Khlif, Wassim. "Design of tunable low-noise amplifier in 0.13 [symbol for Greek letter mu]m CMOS technology for multistandard RF transceivers." Link to electronic thesis, 2007. http://www.wpi.edu/Pubs/ETD/Available/etd-050407-145957/.

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18

Manley, Robert G. "Development and modeling of a low temperature thin-film CMOS on glass /." Online version of thesis, 2009. http://hdl.handle.net/1850/11202.

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19

Sengupta, Susanta. "Technology-independent CMOS op amp in minimum channel length." Diss., Available online, Georgia Institute of Technology, 2004:, 2004. http://etd.gatech.edu/theses/available/etd-07092004-101204/unrestricted/sengupta%5Fsusanta%5F200407%5Fphd.pdf.

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Thesis (Ph. D.)--School of Electrical and Computer Engineering, Georgia Institute of Technology, 2005. Directed by Phillip Allen.<br>Morley, Thomas, Committee Member ; Leach, Marshall, Committee Member ; Ayazi, Farrokh, Committee Member ; Rincon-Mora, Gabriel, Committee Member ; Allen, Phillip, Committee Chair. Includes bibliographical references.

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20

Khlif, Wassim. "Design of Tunable Low-Noise Amplifier in 0.13um CMOS Technology for Multistandard RF Transceivers." Digital WPI, 2007. https://digitalcommons.wpi.edu/etd-theses/714.

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The global market of mobile and wireless communications is witnessing explosive growth in size as well as radical changes. Third generation (3G) wireless systems have recently been deployed and some are still in the process. 3G wireless systems promise integration of voice and data communications with higher data rates and a superior quality of service compared to second generation systems. Unfortunately, more and more communication standards continue to be developed which ultimately requires specific RF/MW and baseband communication integrated circuits that are designed for functionality and

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21

Benhammou, Younes. "Développement de SPADs (Single Photon Avalanche Diodes) à cavité de germanium sur silicium en intégration 3D avec une technologie silicium CMOS 40nm." Thesis, Lyon, 2020. http://www.theses.fr/2020LYSEI123.

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Cette thèse porte sur une famille de photo-détecteurs appelés SPAD pour Single Photon Avalanche Diodes qui sont des jonctions PN polarisées en inverse au-delà de la tension de claquage. Les diodes SPADs sont reconnues pour présenter de très bonnes performances en détection de faibles flux lumineux avec une réponse extrême rapide. Afin d’améliorer l’efficacité de détection dans le proche infrarouge de diodes SPAD sur silicium, les objectifs de la thèse sont de concevoir, fabriquer et caractériser une nouvelle génération de photodiodes SPADs dans une technologie CMOS 40nm en intégrant une cavité

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22

Ekanayake, Sobhath Ramesh Electrical Engineering &amp Telecommunications Faculty of Engineering UNSW. "Qubit control-pulse circuits in SOS-CMOS technology for a Si:P quantum computer." Publisher:University of New South Wales. Electrical Engineering & Telecommunications, 2008. http://handle.unsw.edu.au/1959.4/43096.

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Microelectronics has shaped the world beyond what was thought possible at the time of its advent. One area of current research in this field is on the solid-state Si:P-based quantum computer (QC). In this machine, each qubit requires an individually addressed fast control-pulse for non-adiabatic drive and measure operations. Additionally, it is increasingly becoming important to be able to interface nanoelectronics with complementary metal-oxide-semiconductor (CMOS) technology. In this work, I have designed and demonstrated full-custom mixed-mode and full-digital fast control-pulse generators

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23

Singh, Siddhartha. "Phosphorus implants for off-state improvement of SOI CMOS fabricated at low temperature /." Online version of thesis, 2009. http://hdl.handle.net/1850/11427.

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24

Mallavarpu, Navin. "Large signal model development and high efficiency power amplifier design in cmos technology for millimeter-wave applications." Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/44711.

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This dissertation presents a novel large signal modeling approach which can be used to accurately model CMOS transistors used in millimeter-wave CMOS power amplifiers. The large signal model presented in this work is classified as an empirical compact device model which incorporates temperature-dependency and device periphery scaling. These added features allow for efficient design of multi-stage CMOS power amplifiers by virtue of the process-scalability. Prior to the presentation of the details of the model development, background is given regarding the 90nm CMOS process, device test structur

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25

Silva, Audrey Roberto 1964. "Texturização da superfície de silício monocristalino com NH4OH e camada antirrefletora para aplicações em células fotovoltaicas compatíveis com tecnologia CMOS = Texturing the surface of monocrystalline silicon with NH4OH and anti-reflective coating for applications in photovoltaic cells compatible with CMOS technology." [s.n.], 2012. http://repositorio.unicamp.br/jspui/handle/REPOSIP/259291.

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Orientador: José Alexandre Diniz<br>Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação<br>Made available in DSpace on 2018-08-21T10:50:41Z (GMT). No. of bitstreams: 1 Silva_AudreyRoberto_M.pdf: 3023922 bytes, checksum: ee750f675d01f2b3ceebd5d74149b16e (MD5) Previous issue date: 2012<br>Resumo: Este trabalho apresenta o desenvolvimento de células fotovoltaicas de junção n+/p em substratos de Si com processos de fabricação totalmente compatíveis com a tecnologia CMOS (Complementary Metal Oxide Semiconductor). Os processos compatíveis de

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26

Sundaresan, Krishnakumar. "Temperature Compensated CMOS and MEMS-CMOS Oscillators for Clock Generators and Frequency References." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/13977.

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Silicon alternatives to quartz crystal based oscillators to electronic system clocking are explored. A study of clocking requirements reveals widely different specifications for different applications. Traditional CMOS oscillator-based solutions are optimized for low-cost fully integrated micro-controller clock applications. The frequency variability of these clock generators is studied and techniques to compensate for this variability are proposed. The efficacy of these techniques in reducing variability is proven theoretically and experimentally. MEMS-resonator based oscillators, due to thei

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27

Muppalla, Ashwin K. "Ultra low power multi-gigabit digital CMOS modem technology for millimeter wave wireless systems." Thesis, Georgia Institute of Technology, 2010. http://hdl.handle.net/1853/41084.

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The objective of this research is to present a low power modem technology for a high speed millimeter wave wireless system. The first part of the research focuses on a robust ASIC design methodology. There are several aspects of the ASIC flow that require special attention such as logical synthesis, timing driven physical placement, Clock Tree Synthesis, Static Timing Analysis, estimation and reduction of power consumption and LVS and DRC closure. The latter part is dedicated to high speed baseband circuits such as Coherent and Non coherent demodulator which are critical components of a mu

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28

Yoon, Sangwoong. "LC-tank CMOS Voltage-Controlled Oscillators using High Quality Inductor Embedded in Advanced Packaging Technologies." Diss., Georgia Institute of Technology, 2004. http://hdl.handle.net/1853/4887.

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This dissertation focuses on high-performance LC-tank CMOS VCO design at 2 GHz. The high-Q inductors are realized using wiring metal lines in advanced packages. Those inductors are used in the resonator of the VCO to achieve low phase noise, low power consumption, and a wide frequency tuning range. In this dissertation, a fine-pitch ball-grid array (FBGA) package, a multichip module (MCM)-L package, and a wafer-level package (WLP) are incorporated to realize the high-Q inductor. The Q-factors of inductors embedded in packages are compared to those of inductors monolithically integrated on Si

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29

Vadlmudi, Tripurasuparna. "A nano-CMOS based universal voltage level converter for multi-VDD SoCs." Thesis, University of North Texas, 2007. https://digital.library.unt.edu/ark:/67531/metadc3602/.

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Power dissipation of integrated circuits is the most demanding issue for very large scale integration (VLSI) design engineers, especially for portable and mobile applications. Use of multiple supply voltages systems, which employs level converter between two voltage islands is one of the most effective ways to reduce power consumption. In this thesis work, a unique level converter known as universal level converter (ULC), capable of four distinct level converting operations, is proposed. The schematic and layout of ULC are built and simulated using CADENCE. The ULC is characterized by performi

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30

Arora, Rajan. "Trade-offs between performance and reliability of sub 100-nm RF-CMOS technologies." Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/50140.

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The objective of this research is to develop an understanding of the trade-offs between performance and reliability in sub 100-nm silicon-on-insulator (SOI) CMOS technologies. Such trade-offs can be used to demonstrate high performance reliable circuits in scaled technologies. Several CMOS reliability concerns such as hot-carrier stress, ionizing irradiation damage, RF stress, temperature effects, and single-event effects are studied. These reliability mechanisms can cause temporary or permanent damage to the semiconductor device and to the circuits using them. Several improvements are made to

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Rakheja, Shaloo. "Interconnects for post-CMOS devices: physical limits and device and circuit implications." Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/45866.

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The objective of this dissertation is to classify the opportunities, advantages, and limits of novel interconnects for post-CMOS logic that can augment or eventually replace the CMOS logic. Post-CMOS devices are envisaged on the idea of using state variables other than the electron charge to store and manipulate information. In the first component of the thesis, a comprehensive analysis of the performance and the energy dissipation of novel logic based on various state variables is conducted, and it is demonstrated that the interconnects will continue to be a major challenge even for post-CMOS

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32

Chaves, De Albuquerque Tulio. "Integration of Single Photon Avalanche Diodes in Fully Depleted Silicon-on-Insulator Technology." Thesis, Lyon, 2019. http://www.theses.fr/2019LYSEI091.

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Ce travail a pour objectif la conception, la simulation, la modélisation et la caractérisation électrique de diodes à avalanche à photon unique (Single Photon Avalanche Diodes - SPAD) intégrées dans une technologie CMOS Fully Depleted Silicon on Insulator - FDSOI. Les SPAD sont des diodes (jonctions PN) polarisées en inverse au-delà de la tension de claquage, fonctionnant dans le mode Geiger. Grace à leur haute sensibilité et rapidité, les SPAD sont utiles pour plusieurs applications, telles que les mesures de temps de vol (Time of Flight - ToF), l’imagerie médicale (Fluorescence Lifetime Imag

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Sarivisetti, Gayathri. "Design and Optimization of Components in a 45nm CMOS Phase Locked Loop." Thesis, University of North Texas, 2006. https://digital.library.unt.edu/ark:/67531/metadc5397/.

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A novel scheme of optimizing the individual components of a phase locked loop (PLL) which is used for stable clock generation and synchronization of signals is considered in this work. Verilog-A is used for the high level system design of the main components of the PLL, followed by the individual component wise optimization. The design of experiments (DOE) approach to optimize the analog, 45nm voltage controlled oscillator (VCO) is presented. Also a mixed signal analysis using the analog and digital Verilog behavior of components is studied. Overall a high level system design of a PLL, a syste

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34

Song, Indal. "Multi-Gbit/s CMOS Transimpedance Amplifier with Integrated Photodetector for Optical Interconnects." Diss., Georgia Institute of Technology, 2004. http://hdl.handle.net/1853/4902.

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Trends toward increased integration and miniaturization of optical system components have created pressure to consolidate widely disparate analog and digital functions onto fewer and fewer chips with a goal of eventually built into a single mixed-signal chip. Yet, because of those performance requirements, the frontend circuit has traditionally used III-V compound semiconductor technologies, but the low-level of integration with other digital ICs limits the sustainability of such end products for short-distance applications. On the other hand, their CMOS counter parts, despite having such adva

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Sciancalepore, Corrado. "Intégration hétérogène III-V sur silicium de microlasers à émission par la surface à base de cristaux photoniques." Phd thesis, Ecole Centrale de Lyon, 2012. http://tel.archives-ouvertes.fr/tel-00915280.

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La croissance continue et rapide du trafic de données dans les infrastructures de télécommunications, impose des niveaux de débit de transmission ainsi que de puissance de traitement de l'information, que les capacités intrinsèques des systèmes et microcircuits électroniques ne seront plus en mesure d'assurer à brève échéance : le développement de nouveaux scenarii technologiques s'avère indispensable pour répondre à la demande de bande passante imposée notamment par la révolution de l'internet, tout en préservant une consommation énergétique raisonnable. Dans ce contexte, l'intégration hétéro

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36

Chadha, Vishal. "Design and Implementation of a Second Generation Logic Cluster for Multi-Technology Field Programmable Gate Arrays." University of Cincinnati / OhioLINK, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1126539992.

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Ayele, Getenet Tesega. "Developing ultrasensitive and CMOS compatible ISFETs in the BEOL of industrial UTBB FDSOI transistors." Thesis, Lyon, 2019. http://www.theses.fr/2019LYSEI026/document.

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En exploitant la fonction d’amplification intrinsèque fournie par les transistors UTBB FDSOI, nous avons présenté des ISFET ultra sensibles. L'intégration de la fonctionnalité de détection a été réalisée en back end of line (BEOL), ce qui offre les avantages d'une fiabilité et d'une durée de vie accrues du capteur, d'une compatibilité avec le processus CMOS standard et d'une possibilité d'intégration d'un circuit diviseur capacitif. Le fonctionnement des MOSFETs, sans une polarisation appropriée de la grille avant, les rend vulnérables aux effets de grilles flottantes indésirables. Le circuit

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Musa, Purnawarman. "Etude, conception et réalisation d'un capteur d'image en technologie CMOS : implantation d'opérateurs analogiques dans le plan focal pour le traitement non-linéaire des images." Thesis, Dijon, 2013. http://www.theses.fr/2013DIJOS039.

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Les capteurs d'images en technologie CMOS se sont fortement développés grâce à l'avènement du multimédia à la fin des années 1990. Leurs caractéristiques optiques, ainsi que leur coût, les ont, en effet, destinés au marché “grand public”. Ces capteurs intègrent des fonctions analogiques et/ou numériques qui permettent la mise en œuvre de traitements au sein du pixel, autour du pixel, pour un groupe de pixels, en bout de colonne. Jusqu’à présent, les traitements intégrés dans le capteur sont de nature linéaire et consistent en général à réaliser des convolutions. Si ces traitements sont inconto

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Zicha, Nicholas. "High-speed optical receivers in nanometer complementary metal-oxide-semiconductor (CMOS)." Thesis, McGill University, 2009. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=40665.

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Optical interconnects have attracted great interest as data rates continue to increase. When compared with their electrical counterparts, optical interconnects have significant advantages in terms of crosstalk, bandwidth, distance, and latency. Many applications stand to benefit from low-cost, high-speed integrated optical transceivers with single-channel gigabit data rates. As in the case of RF wireless designs, using CMOS technology is of special interest due to the potential of lower cost and higher integration. The analog frontend is a key component in optical receivers due to its import

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Chan, Wan Tim. "CMOS-compatible zero-mask one time programmable (OTP) memory design /." View abstract or full-text, 2008. http://library.ust.hk/cgi/db/thesis.pl?ECED%202008%20CHANW.

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Vega, Reinaldo A. "Schottky field effect transistors and Schottky CMOS circuitry /." Online version of thesis, 2006. http://hdl.handle.net/1850/5179.

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42

Haugerud, Becca Mary. "Radiation and Strain Effects in Silicon-Germanium Bipolar Complementary Metal Oxide Semiconductor Technology." Thesis, Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/6952.

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This work examines the effects of radiation and strain on silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) BiCMOS technology. First, aspects of the various SiGe HBT BiCMOS technologies and the device physics of the SiGe HBT are discussed. The performance advantages of the SiGe HBT over the Si BJT are also presented. Chapter II offers a basic introduction to key radiation concepts. The space radiation environment as well as the two common radiation damage mechanisms are described. An overview of the effects of radiation damage on Si-based semiconductor devices, namely bipolar

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43

Wang, Haihong. "Advanced transport models development for deep submicron low power CMOS device design /." Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.

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Zheng, Yi. "Biological Agent Sensing Integrated Circuit (BASIC): A New Complementary Metal-oxide-semiconductor (CMOS) Magnetic Biosensor System." Diss., Virginia Tech, 2014. http://hdl.handle.net/10919/48892.

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Fast and accurate diagnosis is always in demand by modern medical professionals and in the area of national defense. At present, limitations of testing speed, sample conditions, and levels of precision exist under current technologies, which are usually slow and involve testing the specimen under laboratory conditions. Typically, these methods also involve several biochemical processing steps and subsequent detection of low energy luminescence or electrical changes, all of which reduce the speed of the test as well as limit the precision. In order to solve these problems and improve the sensin

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45

Saha, Tanmoy. "Design, fabrication, and complementary metal-oxide- semiconductor (CMOS) integration of micro-electro- mechanical systems (MEMS) humidity sensors." Thesis, McGill University, 2013. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=114228.

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The design, microfabrication, and CMOS integration of micro-electro-mechanical systems (MEMS) capacitive humidity sensors are presented in this work. Theoretical analysis and simulations were done to understand how sensor performance can be optimized. While CoventorWare was used for steady-state simulations, a MATLAB simulation model, based on the mathematics of moisture adsorption and diffusion, was developed for dynamic simulations. The sensors were fabricated using a process flow that has a low thermal budget (≤ 300 ○C), as well as material and chemical compatibility with IC fabrication, al

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Barsatan, Randy. "CMOS-compatible nonvolatile memories for radio frequency identification (RFID) applications /." View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ECED%202006%20BARSAT.

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Liu, Haitao. "Novel 3-D CMOS and BiCMOS devices for high-density and high-speed ICs /." View Abstract or Full-Text, 2003. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202003%20LIU.

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Malou, Amokrane. "A study on an integrated 4-Switch Buck-Boost DC-DC converter with high efficiency for portable applications." Thesis, Lyon, 2019. http://www.theses.fr/2019LYSEI027.

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L’augmentation des performances des produits portables requièrent une exploitation la plus efficace possible de la batterie afin de permettre à ces produits d’être utilisés le plus longtemps possible avant d’être rechargés. Les circuits en aval ont besoin d’une source de tension stable qui peut varier pour chacun d’entre eux entre 1.0 V et 5.5 V à partir d’une tension d’entrée pouvant varier entre 2.5V et 5V. Un convertisseur DC-DC à 4 interrupteurs de type dévolteur-survolteur apparait comme une solution intéressante permettant des opérations de diminutions et d’augmentations de tension d’une

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Zhang, Xibo. "RF integrated circuit design options : from technology to layout /." View Abstract or Full-Text, 2003. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202003%20ZHANG.

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Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2003.<br>Includes bibliographical references (leaves 59-61). Also available in electronic version. Access restricted to campus users.

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Patil, Urmila. "Precursors for metal organic chemical vapor deposition (MOCVD) of ZrO2 and HfO2 thin films as gate dielectrics in complementary metal oxide semiconductor (CMOS) devices." [S.l. : s.n.], 2005. http://deposit.ddb.de/cgi-bin/dokserv?idn=975723774.

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