Gotowe bibliografie tematyczne / Formal verification

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Gotowa bibliografia na temat „Formal verification”

Autor: Grafiati
Data publikacji: 4 czerwca 2021
Data aktualizacji: 25 lipca 2025

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Artykuły w czasopismach na temat "Formal verification"

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Meenakshi, B. "Formal verification." Resonance 10, no. 5 (2005): 26–38. http://dx.doi.org/10.1007/bf02871329.

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Kaushik Velapa Reddy. "Formal Verification with ABV : A Superior Alternative to UVM for Complex Computing Chips." International Journal of Scientific Research in Computer Science, Engineering and Information Technology 10, no. 6 (2024): 90–98. http://dx.doi.org/10.32628/cseit24106157.

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This article explores the evolution and effectiveness of formal verification enhanced with Assertion-Based Verification (ABV) as a superior alternative to traditional Universal Verification Methodology (UVM) in complex computing chip design. Through analysis of implementation data from major semiconductor companies, including Intel's Core i7 and IBM's POWER processors, the article demonstrates how formal methods achieve up to 100% coverage of critical modules compared to UVM's typical 80-85% coverage. The research presents quantitative evidence of formal verification's advantages, including a
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Bjesse, Per. "What is formal verification?" ACM SIGDA Newsletter 35, no. 24 (2005): 1. http://dx.doi.org/10.1145/1113792.1113794.

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Schlipf, T., T. Buechner, R. Fritz, M. Helms, and J. Koehl. "Formal verification made easy." IBM Journal of Research and Development 41, no. 4.5 (1997): 567–76. http://dx.doi.org/10.1147/rd.414.0567.

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Sauvage, Laurent, Tarik Graba, and Thibault Porteboeuf. "Multi-level formal verification." Journal of Cryptographic Engineering 7, no. 1 (2016): 87–95. http://dx.doi.org/10.1007/s13389-016-0144-3.

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Niculaescu, Oana. "What's formal software verification?" XRDS: Crossroads, The ACM Magazine for Students 25, no. 4 (2019): 64–65. http://dx.doi.org/10.1145/3341815.

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Flores, Sonia, Salvador Lucas, and Alicia Villanueva. "Formal Verification of Websites." Electronic Notes in Theoretical Computer Science 200, no. 3 (2008): 103–18. http://dx.doi.org/10.1016/j.entcs.2008.04.095.

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Staroletov, Sergey Mikhailovich, Dmitry Alexandrovich Kondratyev, Natalia Olegovna Garanina, and Irina Vladimirovna Shoshmina. "VeHa-2023 Formal Verification Contest: The Experience." Proceedings of the Institute for System Programming of the RAS 36, no. 2 (2024): 141–68. http://dx.doi.org/10.15514/ispras-2024-36(2)-11.

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To create modern competitive and trusted software, it is necessary to use knowledge of formal methods. Currently, a huge number of students are studying specialties related to programming. However, when studying at a university, it is difficult to gain the skill of practical application of theoretical knowledge. Short competitions with non-standard, industrial-related problems can arouse students' interest in the field of formal methods. The article describes the first experience of organizing a competition in formal verification of programs among students of Russian universities. The competit
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Harrison, John. "Floating-Point Verification." JUCS - Journal of Universal Computer Science 13, no. (5) (2007): 629–38. https://doi.org/10.3217/jucs-013-05-0629.

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This paper overviews the application of formal verification techniques to hardware ingeneral, and to floating-point hardware in particular. A specific challenge is to connect the usual mathematical view of continuous arithmetic operations with the discrete world, in a credible andverifiable way.
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Greengard, Samuel. "Formal software verification measures up." Communications of the ACM 64, no. 7 (2021): 13–15. http://dx.doi.org/10.1145/3464933.

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Rozprawy doktorskie na temat "Formal verification"

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Tristan, Jean-Baptiste. "Formal verification of translation validators." Phd thesis, Université Paris-Diderot - Paris VII, 2009. http://tel.archives-ouvertes.fr/tel-00437582.

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Comme tout logiciel, les compilateurs, et tout particulièrement les compilateurs optimisant, peuvent être défectueux. Il est donc possible qu'ils changent la sémantique du programme compilé, et par conséquent ses propriétés. Dans le cadre de développement de logiciels critiques, où des méthodes formelles sont utilisées pour s'assurer qu'un programme satisfait certaines propriétés, et cela avant qu'il soit compilé, cela pose un problème de fond. Une solution à ce problème est de vérifier le compilateur en s'assurant qu'il préserve la sémantique des programmes compilés. Dans cette thèse, nous év
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Trinh, Cong Quy. "Formal Verification of Skiplist Algorithms." Thesis, Uppsala universitet, Institutionen för informationsteknologi, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-160314.

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Dragomir, Ciprian. "Formal verification of P systems." Thesis, University of Sheffield, 2016. http://etheses.whiterose.ac.uk/15452/.

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Membrane systems, also known as P systems, constitute an innovative computational paradigm inspired by the structure and dynamics of the living cell. A P system consists of a hierarchical arrangement of compartments and a finite set of multiset rewriting and communication rules, which operate in a maximally parallel manner. The organic vision of concurrent dynamics captured by membrane systems stands in antithesis with conventional formal modelling methods which focus on algebraic descriptions of distributed systems. As a consequence, verifying such models in a mathematically rigorous way is o
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Hurd, J. "Formal verification of probabilistic algorithms." Thesis, University of Cambridge, 2001. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.604823.

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We begin with an extensive foundational development of probability, creating a higher-order logic formalization of mathematical measure theory. This allows the definition of the probability space we use to model a random bit generator, which informally is a stream of coin-flips, or technically an infinite sequence of IID Bernoulli( 1/2 ) random variables. Probabilistic programs are modified using the state-transformer monad familiar from functional programming, where the random bit generator is passed around in the computation. Functions remove random bits from the generator to perform their c
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Botinčan, Matko. "Formal verification-driven parallelisation synthesis." Thesis, University of Cambridge, 2018. https://www.repository.cam.ac.uk/handle/1810/274136.

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Concurrency is often an optimisation, rather than intrinsic to the functional behaviour of a program, i.e., a concurrent program is often intended to achieve the same effect of a simpler sequential counterpart, just faster. Error-free concurrent programming remains a tricky problem, beyond the capabilities of most programmers. Consequently, an attractive alternative to manually developing a concurrent program is to automatically synthesise one. This dissertation presents two novel formal verification-based methods for safely transforming a sequential program into a concurrent one. The first me
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Jobredeaux, Romain J. "Formal verification of control software." Diss., Georgia Institute of Technology, 2015. http://hdl.handle.net/1853/53841.

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In a context of heightened requirements for safety-critical embedded systems and ever-increasing costs of verification and validation, this research proposes to advance the state of formal analysis for control software. Formal methods are a field of computer science that uses mathematical techniques and formalisms to rigorously analyze the behavior of programs. This research develops a framework and tools to express and prove high level properties of control law implementations. One goal is to bridge the gap between control theory and computer science. An annotation language is extended with s
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Parikh, Ankur. "Abstraction Guided Semi-formal Verification." Thesis, Virginia Tech, 2007. http://hdl.handle.net/10919/33596.

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Abstraction-guided simulation is a promising semi-formal framework for design validation in which an abstract model of the design is used to guide a logic simulator towards a target property. However, key issues still need to be addressed before this framework can truly deliver on it's promise. Concretizing, or finding a real trace from an abstract trace, remains a hard problem. Abstract traces are often spurious, for which no corresponding real trace exits. This is a direct consequence of the abstraction being an over-approximation of the real design. Further, the way in which the abstract mo
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Bubel, Richard. "Formal verification of recursive predicates." [S.l. : s.n.], 2007. http://digbib.ubka.uni-karlsruhe.de/volltexte/1000008366.

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Suresh, Amrita. "Formal Verification of Communicating Automata." Electronic Thesis or Diss., université Paris-Saclay, 2022. http://www.theses.fr/2022UPASG092.

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Les systèmes distribués concernent des processus qui s’exécutent indépendamment et communiquent de manière asynchrone. Bien qu’ils couvrent un large éventail de cas d’utilisation et soient donc omniprésents dans notre monde, il est particulièrement difficile de garantir leur exactitude. Dans cette thèse, nous modélisons de tels systèmes en utilisant une formulation mathématique et logique, et nousles vérifions algorithmiquement. En particulier, nous nous concentrons sur les automates FIFO (First In First Out), et plus précisément sur des systèmes à un ou plusieurs automates finis qui communiqu
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Wei, Jijie. "Formal verification of a digital PLL." Thesis, University of British Columbia, 2014. http://hdl.handle.net/2429/50048.

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Common AMS circuit are composed from blocks that can be modeled accurately using linear differential inclusions to enable verification of important properties using reachability analysis. This dissertation presents a formal verification of Digital Phase Locked Loop (PLL) using reachability techniques. PLLs are ubiquitous in analog mixed signal (AMS) designs and are widely used in modern communication equipment, clock generation for CPUs in computers, clock-acquisition in high-speed links etc. The most important property of a PLL is convergence, which means starting from any possible initial
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Książki na temat "Formal verification"

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Kropf, Thomas, ed. Formal Hardware Verification. Springer Berlin Heidelberg, 1997. http://dx.doi.org/10.1007/3-540-63475-4.

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Drechsler, Rolf, ed. Advanced Formal Verification. Springer US, 2004. http://dx.doi.org/10.1007/b105236.

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Drechsler, Rolf, ed. Formal System Verification. Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-57685-5.

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Rolf, Drechsler, ed. Advanced formal verification. Kluwer Academic Publishers, 2004.

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Drechsler, Rolf. Formal Verification of Circuits. Springer US, 2000. http://dx.doi.org/10.1007/978-1-4757-3184-2.

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Drechsler, Rolf. Formal Verification of Circuits. Springer US, 2000.

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Boulanger, Jean-Louis. Industrial used of formal method: Formal verification. ISTE, 2012.

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Kropf, Thomas. Introduction to Formal Hardware Verification. Springer Berlin Heidelberg, 1999.

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Bernardo, Marco, and Alessandro Cimatti, eds. Formal Methods for Hardware Verification. Springer Berlin Heidelberg, 2006. http://dx.doi.org/10.1007/11757283.

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Ray, Sandip. Scalable Techniques for Formal Verification. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-5998-0.

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Części książek na temat "Formal verification"

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Rülling, Wolfgang. "Formal Verification." In The Electronic Design Automation Handbook. Springer US, 2003. http://dx.doi.org/10.1007/978-0-387-73543-6_14.

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Bernadeschi, Cinzia, Alessandro Fantechi, and Stefania Gnesi. "Formal Verification." In A Generic Fault-Tolerant Architecture for Real-Time Dependable Systems. Springer US, 2001. http://dx.doi.org/10.1007/978-1-4757-3353-2_8.

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Weik, Martin H. "formal verification." In Computer Science and Communications Dictionary. Springer US, 2000. http://dx.doi.org/10.1007/1-4020-0613-6_7435.

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Staunstrup, Jørgen. "Formal Verification." In A Formal Approach to Hardware Design. Springer US, 1994. http://dx.doi.org/10.1007/978-1-4615-2764-0_3.

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Lin, Hai, and Panos J. Antsaklis. "Formal Verification." In Advanced Textbooks in Control and Signal Processing. Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-78731-8_3.

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Walter, Marcel, Robert Wille, Frank Sill Torres, and Rolf Drechsler. "Formal Verification." In Design Automation for Field-coupled Nanotechnologies. Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-89952-3_8.

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Nielson, Flemming, and Hanne Riis Nielson. "Program Verification." In Formal Methods. Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-05156-3_3.

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Coelho, Claudionor Nunes, and Harry D. Foster. "Assertion-Based Verification." In Advanced Formal Verification. Springer US, 2004. http://dx.doi.org/10.1007/1-4020-2530-0_5.

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Hazelhurst, Scott, and Carl-Johan H. Seger. "Symbolic trajectory evaluation." In Formal Hardware Verification. Springer Berlin Heidelberg, 1997. http://dx.doi.org/10.1007/3-540-63475-4_1.

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Cerny, E., F. Corella, M. Langevin, X. Song, S. Tahar, and Z. Zhou. "Automated verification with abstract state machines using multiway decision graphs." In Formal Hardware Verification. Springer Berlin Heidelberg, 1997. http://dx.doi.org/10.1007/3-540-63475-4_2.

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Streszczenia konferencji na temat "Formal verification"

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Wolfsthal, Yaron, and Rebecca M. Gott. "Formal verification." In the 42nd annual conference. ACM Press, 2005. http://dx.doi.org/10.1145/1065579.1065755.

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Dill, David, Nate James, Shishpal Rawat, et al. "Formal verification methods." In the 39th conference. ACM Press, 2002. http://dx.doi.org/10.1145/513918.514064.

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Drechsler, Rolf, and Alireza Mahzoon. "Polynomial Formal Verification." In ICCAD '22: IEEE/ACM International Conference on Computer-Aided Design. ACM, 2022. http://dx.doi.org/10.1145/3508352.3561104.

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Beers, Robert. "Pre-RTL formal verification." In the 45th annual conference. ACM Press, 2008. http://dx.doi.org/10.1145/1391469.1391675.

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Jang, Jae-Young, Shaz Qadeer, Matt Kaufmann, and Carl Pixley. "Formal verification of FIRE." In the 34th annual conference. ACM Press, 1997. http://dx.doi.org/10.1145/266021.266059.

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Doghri, Ines. "Formal verification of WAHS." In the 8th international conference. ACM Press, 2008. http://dx.doi.org/10.1145/1416729.1416754.

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"Session 6: Formal verification." In 2007 IEEE International High Level Design Validation and Test Workshop. IEEE, 2007. http://dx.doi.org/10.1109/hldvt.2007.4392795.

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"Session 4: Formal verification." In 2008 IEEE International High Level Design Validation and Test Workshop. IEEE, 2008. http://dx.doi.org/10.1109/hldvt.2008.4695872.

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Agrawal, Arpan, Emily First, Zhanna Kaufman, et al. "PRoofster: Automated Formal Verification." In 2023 IEEE/ACM 45th International Conference on Software Engineering: Companion Proceedings (ICSE-Companion). IEEE, 2023. http://dx.doi.org/10.1109/icse-companion58688.2023.00018.

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Yang, Jin, and Avi Puder. "Tightly integrate dynamic verification with formal verification." In the 2005 conference. ACM Press, 2005. http://dx.doi.org/10.1145/1120725.1120860.

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Raporty organizacyjne na temat "Formal verification"

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Ernst, Michael. Verification Games: Crowd-Sourced Formal Verification. Defense Technical Information Center, 2016. http://dx.doi.org/10.21236/ad1006471.

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Andronick, June, and Gerwin Klein. Formal System Verification - Extension 2. Defense Technical Information Center, 2012. http://dx.doi.org/10.21236/ada570949.

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Mayer, Barbara A., and Monica M. Lu. Guidelines for Formal Verification Systems. Defense Technical Information Center, 1989. http://dx.doi.org/10.21236/ada385357.

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Punnoose, Ratish J., Robert C. Armstrong, Matthew H. Wong, and Mayo Jackson. Survey of Existing Tools for Formal Verification. Office of Scientific and Technical Information (OSTI), 2014. http://dx.doi.org/10.2172/1166644.

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Andronick, June, and Gerwin Klein. Formal System Verification for Trustworthy Embedded Systems. Defense Technical Information Center, 2011. http://dx.doi.org/10.21236/ada541318.

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Berry, Daniel M. Formal Specification and Verification of Concurrent Programs. Defense Technical Information Center, 1993. http://dx.doi.org/10.21236/ada265201.

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Chavan, Anand, Byoung Woo Min, and Shiu-Kai Chin. HOL2GDT a Formal Verification-Based Design Methodology. Defense Technical Information Center, 2001. http://dx.doi.org/10.21236/ada387742.

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Meadows, Catherine A. Formal Verification of Cryptographic Protocols: A Survey. Defense Technical Information Center, 1995. http://dx.doi.org/10.21236/ada464292.

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Brackin, Stephen H., and Ian Sutherland. Formal Verification of Mathematical Software. Volume 2. Defense Technical Information Center, 1990. http://dx.doi.org/10.21236/ada223633.

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Dill, David L. A Federal Approach to Formal Hardware Design Verification. Defense Technical Information Center, 2002. http://dx.doi.org/10.21236/ada400999.

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