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1

Rao, Wenjing. "Towards reliable nanoelectronic systems." Diss., Connect to a 24 p. preview or request complete full text in PDF format. Access restricted to UC campuses, 2008. http://wwwlib.umi.com/cr/ucsd/fullcit?p3291919.

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Thesis (Ph. D.)--University of California, San Diego, 2008.<br>Title from first page of PDF file (viewed March 18, 2008). Available via ProQuest Digital Dissertations. Vita. Includes bibliographical references (p. 193-199).
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Chiu, Pit Ho Patrio 1977. "Bismuth based nanoelectronic devices." Thesis, McGill University, 2005. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=100337.

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Bismuth (Bi) is a unique electronic material with small effective mass (&sim;0.001me) and long carrier mean free path (100 nm at 300K). It is particularly suitable for studying nano scale related phenomena such as size effect and energy level spacing. In this thesis work, bismuth based nanoelectronic devices were studied. Devices were fabricated using a combination of electron beam (e-beam) writing and thermal evaporation techniques. Dimensions of the fabricated devices were in the order of 100 rim. All structures were optimized for individual electrical characterization. Three types of device
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Blackburn, A. M. "Multiple-gate vacuum nanoelectronic devices." Thesis, University of Cambridge, 2005. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.596691.

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This thesis introduces novel multiple-gate vacuum nanoelectronic devices, presenting details of their theoretical and experimental characterization, and of the methods that have been established for their fabrication. These devices, based upon the nanotriode of Driskill-Smith et al, have multiple-gates placed within an anode-cathode vacuum gap of only a few hundred nanometres, permitting a wide range of potential-energy landscapes to be created in front of its tungsten-nanopillar field-emitting cathode. The current transport in such devices is suggested to be influenced by quantum interference
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4

Maassen, Jesse. "First principles simulations of nanoelectronic devices." Thesis, McGill University, 2012. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=106463.

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As the miniaturization of devices begins to reveal the atomic nature of materials, where chemical bonding and quantum effects are important, one must resort to a parameter-free theory for predictions. This thesis theoretically investigates the quantum transport properties of nanoelectronic devices using atomistic first principles. Our theoretical formalism employs density functional theory (DFT) in combination with Keldysh nonequilibrium Green's functions (NEGF). Self-consistently solving the DFT Hamiltonian with the NEGF charge density provides a way to simulate nonequilibrium systems without
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Huang, Jun, and 黃俊. "Efficiency enhancement for nanoelectronic transport simulations." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2013. http://hdl.handle.net/10722/196031.

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Continual technology innovations make it possible to fabricate electronic devices on the order of 10nm. In this nanoscale regime, quantum physics becomes critically important, like energy quantization effects of the narrow channel and the leakage currents due to tunneling. It has also been utilized to build novel devices, such as the band-to-band tunneling field-effect transistors (FETs). Therefore, it presages accurate quantum transport simulations, which not only allow quantitative understanding of the device performances but also provide physical insight and guidelines for device optimizati
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Mirza, Muhammad M. "Nanofabrication of silicon nanowires and nanoelectronic transistors." Thesis, University of Glasgow, 2015. http://theses.gla.ac.uk/6495/.

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This project developed a robust and reliable process to pattern < 5 nm features in negative tone Hydrogen silsesquioxane (HSQ) resist using high resolution electron beam lithography and developed a low damage reactive ion etch (RIE) process to fabricate silicon nanowires on degenerately doped n-type silicon-on-insulator (SOI) substrates. A process to thermally grow high quality silicon dioxide (SiO2) (between 5-15 nm) is also developed to passivate onto the etched silicon nanowire devices to serve the purposes of gate dielectric and a diffusion barrier to minimize the donor deactivation. The m
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Coker, Ayodeji. "Performance analysis of fault-tolerant nanoelectronic memories." [College Station, Tex. : Texas A&M University, 2008. http://hdl.handle.net/1969.1/ETD-TAMU-2666.

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Sarsby, Matt. "Nanoelectronic and nanomechanical devices for low temperature applications." Thesis, Lancaster University, 2017. http://eprints.lancs.ac.uk/84447/.

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Cooling physical experiments to low temperatures removes thermal excitations to reveal quantum mechanical phenomena. The progression of nanotechnologies provides new and exciting research opportunities to probe nature at ever smaller length scales. The coupling of nanotechnologies and low temperature techniques has potential for scientific discoveries as well as real world applications. This work demonstrates techniques to further extend physical experimental research into the millikelvin-nanoscale domain. The challenge of thermometry becomes an increasingly complex problem as the temperature
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Jiang, Zhe. "Novel nanowire structures and devices for nanoelectronic bioprobes." Thesis, Harvard University, 2015. http://nrs.harvard.edu/urn-3:HUL.InstRepos:17467307.

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Semiconductor nanowire materials and devices provide unique opportunities in the frontier between nanoelectronics and biology. The bottom-up paradigm enables flexible synthesis and patterning of nanoscale building blocks with novel structures and properties, and nano-to-micro fabrication methods allow the advantages of functional nanowire elements to interface with biological systems in new ways. In this thesis, I will focus on the development of bottom-up nanoscience platforms, which includes rational synthesis and assembly of semiconductor nanowires with new capabilities, as well as design a
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10

Kim, Jungyup. "Effective germanium surface preparation methods for nanoelectronic applications /." May be available electronically:, 2007. http://proquest.umi.com/login?COPT=REJTPTU1MTUmSU5UPTAmVkVSPTI=&clientId=12498.

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11

Hsueh, Yu-Ling. "Electron Spin Relaxation of Donors in Silicon Nanoelectronic Devices." Thesis, Purdue University, 2019. http://pqdtopen.proquest.com/#viewpdf?dispub=10638270.

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<p> The environment interacts with the electron and leads to electron relaxation pro cesses. To measure the relaxation rate the system is disturbed from equilibrium. <i> T</i><sub>1</sub> time characterizes the time for the system to restore equilibrium. </p><p> Understanding and controlling the spin-relaxation mechanism is crucial for real izing a spin-qubit based quantum computer. The spin-lattice relaxation time (<i>T</i><sub>1</sub>) is one of the two important timescales of a qubit, and in addition, it can provide valu able information about the qubit and its interaction with the device
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12

Ye, Sheng. "Kelvin Probe Force Microscopy (KPFM) for nanoelectronic device characterisation." Thesis, University of Southampton, 2016. https://eprints.soton.ac.uk/419059/.

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This project is to develope a new method of characterization for Silicon-nano-wire (SiNW) FET and SET devices by using KPFM technology to derive the information of local surface potential change on the channel of SiNW devices. The surface potential is related to many important parameters on material's surface, e.g. fixed surface charge, doping profile variation, distribution of charge carriers under applied bias, and individual dopant atoms near the surface. Those parameters are strongly related to the characteristics of SiNW devices. The KPFM equipment is designed to extract the contact poten
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13

MIRYALA, SANDEEP. "CAD Solutions for Graphene Based Nanoelectronic Circuits and Systems." Doctoral thesis, Politecnico di Torino, 2014. http://hdl.handle.net/11583/2539691.

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As an answer to More Moore paradigm, Complementary Metal Oxide Semiconductor (CMOS) technology is continuously scaled to nanometer lengths and the silicon channel has reached its physical limit. It is time for the industry to explore novel material based devices that support future integrated circuits. Graphene is a two dimensional material which can be patterned through existing lithography process, therefore representing the most interesting material for concurrent, single-layer integration of devices and interconnects. Moreover, it shows unique mechanical properties alowing for the growth o
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Escott, Christopher Colin Electrical Engineering &amp Telecommunications Faculty of Engineering UNSW. "Modelling of phosphorus-donor based silicon qubit and nanoelectronic devices." Publisher:University of New South Wales. Electrical Engineering & Telecommunications, 2008. http://handle.unsw.edu.au/1959.4/41470.

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Modelling of phosphorus donor-based silicon (Si:P) qubit devices and mesoscopic single-electron devices is presented in this thesis. This theoretical analysis is motivated by the use of Si:P devices for scalable quantum computing. Modelling of Si:P single-electron devices (SEDs) using readily available simulation tools is presented. The mesoscopic properties of single and double island devices with source-drain leads is investigated through ion implantation simulation (using Crystal-TRIM), 3D capacitance extraction (FastCap) and single-electron circuit simulation (SIMON). Results from modellin
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15

Joshi, Shital. "Analysis and Optimization of Graphene FET based Nanoelectronic Integrated Circuits." Thesis, University of North Texas, 2016. https://digital.library.unt.edu/ark:/67531/metadc849755/.

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Like cell to the human body, transistors are the basic building blocks of any electronics circuits. Silicon has been the industries obvious choice for making transistors. Transistors with large size occupy large chip area, consume lots of power and the number of functionalities will be limited due to area constraints. Thus to make the devices smaller, smarter and faster, the transistors are aggressively scaled down in each generation. Moore's law states that the transistors count in any electronic circuits doubles every 18 months. Following this Moore's law, the transistor has already been sca
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16

PENAZZI, GABRIELE. "Development of an atomistic/continous simulation tool for nanoelectronic devices." Doctoral thesis, Università degli Studi di Roma "Tor Vergata", 2010. http://hdl.handle.net/2108/1335.

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La simulazione dei moderni dispositivi elettronici è una grande sfida per la comunità ingegneristica. L'enorme progresso nei processi di fabbricazione ha permesso una riduzione della dimensione dei dispositivi talmente spinta che fenomeni tipici della scala di lunghezza nanometrica giocano un ruolo cruciale. Inoltre stiamo assistendo a un grande sforzo teso ad esplorare soluzioni tecnologiche alternatice ai tradizionali dispositivi a semiconduttore. Questo sforzo è rivolto verso la frontiera dell'elettronica molecolare, dei polimeri semiconduttori, delle strutture autoassemblanti,
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17

Landauer, Gerhard Martin. "Opportunities for radio frequency nanoelectronic integrated circuits using carbon-based technologies." Doctoral thesis, Universitat Politècnica de Catalunya, 2014. http://hdl.handle.net/10803/145982.

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This thesis presents a body of work on the modeling of and performance predictions for carbon nanotube field-effect transistors (CNFET) and graphene field-effect transistors (GFET). While conventional silicon-based CMOS is expected to reach its ultimate scaling limits during the next decade, these two novel technologies are promising candidates for future high-performance electronics. The main goal of this work is to investigate on the opportunities of using such carbon-based electronics for RF integrated circuits. This thesis addresses 1) the modeling of noise and process variability in CNF
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18

Di, Giacomo Sandro John. "Development of silicon germanium-based quantum dots for nanoelectronic device applications." The Ohio State University, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=osu1406719133.

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19

Dai, Xiaochuan. "Multifunctional Three-Dimensional Nanoelectronic Networks for Smart Materials and Cyborg Tissues." Thesis, Harvard University, 2015. http://nrs.harvard.edu/urn-3:HUL.InstRepos:23845480.

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Nanomaterials provide unique opportunities at the interface between nanoelectronics and biology. “Bottom-up” synthesized nanowire(NW) with defined functionality can be assembled and enabled into three-dimensional(3D) flexible nanoelectronic networks. The micro- to nanoscale electronic units blur the distinction between electronics and cells/tissue in terms of length scale and mechanical stiffness. These unconventional 3D nanoelectronic networks can thus provide a path towards truly seamless integration of non-living electronics and living systems. In this thesis, I will introduce a general met
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20

Pawar, M. "Growth of two dimensional (2D) materials and its applications in nanoelectronic devices." Thesis(Ph.D.), CSIR-National Chemical Laboratory, Pune, 2021. http://dspace.ncl.res.in:8080/xmlui/handle/20.500.12252/6013.

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The 2D materials like Graphene and MoS2 are widely studied over the last decade due to their unique structural, mechanical, electrical and optical properties for nanoelectronics device applications. There are many other materials from 2D family possess similar properties as that of MoS2 but are less explored by the researchers. In the present thesis, various 2D materials such as V2O5, Black Phosphorous, SnSe2, PtSe2 and CdMoS4 are synthesized using top down and bottom up approaches. The structural, morphological and optical investigations were carried out using microscopic and spectroscopic te
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21

Souza, Aldilene Saraiva. "Electronic Transport in Molecular Systems." reponame:Repositório Institucional da UFC, 2012. http://www.repositorio.ufc.br/handle/riufc/12671.

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SOUZA, Aldilene Saraiva. Electronic Transport in Molecular Systems. 2012. 107 f. Tese (Doutorado em Física) - Programa de Pós-Graduação em Física, Departamento de Física, Centro de Ciências, Universidade Federal do Ceará, Fortaleza, 2012.<br>Submitted by Edvander Pires (edvanderpires@gmail.com) on 2015-06-08T19:17:13Z No. of bitstreams: 1 2012_tese_assouza.pdf: 11520100 bytes, checksum: 04bcbbf301130ab097bf5c01340034df (MD5)<br>Approved for entry into archive by Edvander Pires(edvanderpires@gmail.com) on 2015-06-08T19:52:21Z (GMT) No. of bitstreams: 1 2012_tese_assouza.pdf: 11520100 bytes, che
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22

Pan, Chenyun. "A hierarchical optimization engine for nanoelectronic systems using emerging device and interconnect technologies." Diss., Georgia Institute of Technology, 2015. http://hdl.handle.net/1853/53931.

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A fast and efficient hierarchical optimization engine was developed to benchmark and optimize various emerging device and interconnect technologies and system-level innovations at the early design stage. As the semiconductor industry approaches sub-20nm technology nodes, both devices and interconnects are facing severe physical challenges. Many novel device and interconnect concepts and system integration techniques are proposed in the past decade to reinforce or even replace the conventional Si CMOS technology and Cu interconnects. To efficiently benchmark and optimize these emerging technolo
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23

Tomlinson, Christopher David. "A highly parallel image processing computer architecture suitable for implementation in nanotechnology." Thesis, University College London (University of London), 1999. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.313616.

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24

Nominé, Anna V. "Synthesis of Bi₂O₂CO₃ nanosheets by electrical discharges in liquids for photocatalytic and nanoelectronic applications." Electronic Thesis or Diss., Université de Lorraine, 2023. http://www.theses.fr/2023LORR0357.

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Ce travail fournit des informations sur la synthèse de feuillets nanométriques ultrafins composés de Bi₂O₂CO₃, ci-après dénommé BOC. La synthèse est réalisée par une technique rapide et simple connue sous le signe EDDL correspondant au procédé de décharges électriques dans les liquides diélectriques. Pour assurer la reproductibilité de la synthèse, une méthode de prétraitement impliquant la gravure d'électrodes de bismuth avec du Nital a été employée. Le processus choisi consiste à initier des décharges électriques entre ces électrodes alors qu'elles sont immergées soit dans l'azote liquide, s
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FRACHE, STEFANO. "Massively Parallel Nanoarchitectures: structures, algorithms and simulation tools." Doctoral thesis, Politecnico di Torino, 2013. http://hdl.handle.net/11583/2518616.

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The exponential growth of computing power that we have been used-to since years is about to face new challenges, most notably for technical and economical reasons. It is highly debated when it will be time to go past traditional CMOS technology, but from ITRS data we know that traditional ultra-deep submicron devices are approaching fundamental physical limits. From an economical point of view, the extremely high costs of chip masks and production plants are posing substantial limitations to the development margins. The end of a remarkably successful era in computing is approaching then. It’s
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Sangtarash, Sara. "Theory of mid-gap quantum transport through single molecule : new approach to transport modeling of nanoelectronic devices." Thesis, Lancaster University, 2017. http://eprints.lancs.ac.uk/88312/.

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Molecules due to their very small sizes, possess discrete energy levels and electrons can transmit from one side of the molecule to the other with high probability if their energy coincides with molecular energy levels. In the weak coupling limit such on-resonance electron transport is described by the simple Lorentzian-shaped Breit-Wigner formula. On the other hand, electrons with energy different than the molecular energy levels have to tunnel through the energy gap between two molecular energy levels (off resonance transmission). Consequently the electron transmission probability is much sm
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Chung, Chia-Ling. "Study of DNA- SWNT conjugation for nanoelectronic purposes : realisation of transistors and SWNT positioning in DNA T scaffold." Paris 11, 2010. http://www.theses.fr/2010PA112033.

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Dans cette thèse l’ADN a été envisagé comme un matériau de choix pour l’auto-assemblage de circuits à base de SWNTS. Afin de réaliser cette vision ambitieuse, plusieurs étapes sont nécessaires et dans cette thèse nous nous intéressons à trois d’entre elles : l’assemblage de l’ADN sur nanotubes. Nous avons exploré deux approches : l’approche covalente (chapitre 2) et l’approche non covalente ( chapitre 3). Les résultats obtenus nous ont servi à évaluer quelle méthode était la plus pertinente pour la fabrication de transistors. La conclusion de ces études a été que l’approche non covalente basée
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Chouard, Florian Raoul Verfasser], Doris [Akademischer Betreuer] [Schmitt-Landsiedel, and Sebastian M. [Akademischer Betreuer] Sattler. "Device Aging in Analog Circuits for Nanoelectronic CMOS Technologies / Florian Raoul Chouard. Gutachter: Sebastian M. Sattler ; Doris Schmitt-Landsiedel. Betreuer: Doris Schmitt-Landsiedel." München : Universitätsbibliothek der TU München, 2012. http://d-nb.info/1024355020/34.

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Krüger, Justus [Verfasser], Gianaurelio [Akademischer Betreuer] Cuniberti, Gianaurelio [Gutachter] Cuniberti, and Lukas [Gutachter] Eng. "On-surface synthesis of acenes – : organic nanoelectronic materials explored at a single-molecule level / Justus Krüger ; Gutachter: Gianaurelio Cuniberti, Lukas Eng ; Betreuer: Gianaurelio Cuniberti." Dresden : Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2018. http://d-nb.info/1151046957/34.

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Krüger, Justus [Verfasser], Gianaurelio [Akademischer Betreuer] Cuniberti, Gianaurelio Gutachter] Cuniberti, and Lukas [Gutachter] [Eng. "On-surface synthesis of acenes – : organic nanoelectronic materials explored at a single-molecule level / Justus Krüger ; Gutachter: Gianaurelio Cuniberti, Lukas Eng ; Betreuer: Gianaurelio Cuniberti." Dresden : Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2018. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-232078.

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31

Hutjens, Charles Michael. "Morphology Control for Model Block Copolymer/Nanoparticle Thin Film Nano-Electronic Devices on Conductive Substrates." University of Akron / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=akron1374496041.

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McCaughan, Adam Nykoruk. "Superconducting thin film nanoelectronics." Thesis, Massachusetts Institute of Technology, 2015. http://hdl.handle.net/1721.1/101576.

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Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2015.<br>Cataloged from PDF version of thesis.<br>Includes bibliographical references (pages 163-171).<br>Superconducting devices have found application in a diverse set of fields due to their unique properties which cannot be reproduced in normal materials. Although many of these devices rely on the properties of bulk superconductors, superconducting devices based on thin films are finding increasing application, especially in the realms of sensing and amplification. With recent a
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Echtermeyer, Tim Joachim. "Graphene nanoelectronics and optoelectronics." Thesis, University of Cambridge, 2013. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.648171.

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Kulmala, Tero Samuli. "Nanowires and graphene nanoelectronics." Thesis, University of Cambridge, 2013. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.608195.

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Fasoli, Andrea. "Nanowires and nanoribbons nanoelectronics." Thesis, University of Cambridge, 2010. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.608660.

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Lombardo, Antonio. "Graphene nanoelectronics and optoelectronics." Thesis, University of Cambridge, 2014. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.648601.

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37

Conrad, Brad Richard. "Interface effects on nanoelectronics." College Park, Md.: University of Maryland, 2009. http://hdl.handle.net/1903/9154.

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Thesis (Ph. D.) -- University of Maryland, College Park, 2009.<br>Thesis research directed by: Dept. of Physics. Title from t.p. of PDF. Includes bibliographical references. Published by UMI Dissertation Services, Ann Arbor, Mich. Also available in paper.
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Spagocci, S. "Fault tolerance issues in nanoelectronics." Thesis, University College London (University of London), 2008. http://discovery.ucl.ac.uk/14227/.

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The astonishing success story of microelectronics cannot go on indefinitely. In fact, once devices reach the few-atom scale (nanoelectronics), transient quantum effects are expected to impair their behaviour. Fault tolerant techniques will then be required. The aim of this thesis is to investigate the problem of transient errors in nanoelectronic devices. Transient error rates for a selection of nanoelectronic gates, based upon quantum cellular automata and single electron devices, in which the electrostatic interaction between electrons is used to create Boolean circuits, are estimated. On th
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39

Semple, James. "High-throughput large-area plastic nanoelectronics." Thesis, Imperial College London, 2016. http://hdl.handle.net/10044/1/39573.

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Large-area electronics (LAE) manufacturing has been a key focus of both academic and industrial research, especially within the last decade. The growing interest is born out of the possibility of adding attractive properties (flexibility, light weight or minimal thickness) at low cost to well-established technologies, such as photovoltaics, displays, sensors or enabling the realisation of emerging technologies such as wearable devices and the Internet of Things. As such there has been great progress in the development of materials specifically designed to be employed in solution processed (pla
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40

Hutchinson, G. D. "Superconducting nanoelectronics using controllable Josephson junctions." Thesis, University of Cambridge, 2006. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.604859.

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This dissertation describes the fabrication, measurement and modelling for a micrometer sized direct-current superconducting quantum interference device (DC-SQID), which had its critical current controlled by a process of non-equilibrium phonon (hot-phonon) irradiation from a nanofabricated gated structure. The method of control was achieved via close proximity, normal-metal constrictions that injected hot-phonons on the Dayem bridge Josephson junctions in the DC-SQUID. A hot electron population created these hot-phonons in the control layer’s normal-metal constrictions when a bias current was
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41

Tan, Yong-Tsong. "Nanoelectronics using polycrystalline and nanocrystalline silicon." Thesis, University of Cambridge, 2001. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.621321.

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42

ROTTA, DAVIDE. "Emerging devices and materials for nanoelectronics." Doctoral thesis, Università degli Studi di Milano-Bicocca, 2015. http://hdl.handle.net/10281/76048.

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Questa tesi analizza la possibile implementazione di due tipologie di dispositivi elettronici con funzionalità innovative: dispositivi per la computazione quantistica e transistors a film sottile. Negli ultimi decenni l’industria dei semiconduttori ha portato alla realizzazione di circuiti integrati con milioni di transistors e performance sempre migliori a costi contenuti. Tuttavia, questo processo di miniaturizzazione è giunto a un punto tale che i dispositivi elettronici sono ora composti da pochissimi atomi e ridurne ulteriormente le dimensioni sta diventando sempre più difficile. L’Intern
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Rice, John S. "Future satellite technology the role of nanoelectronics." Thesis, Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service, 1998. http://handle.dtic.mil/100.2/ADA355660.

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Thesis (M.S. in Applied Physics) Naval Postgraduate School, September 1998.<br>Thesis advisor(s): James Luscombe, Robert Armstead. "September 1998." Includes bibliographical references (p. 49-51). Also available online.
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44

Ayhan, Pinar. "Probabilistic CMOS (PCMOS) in the Nanoelectronics Regime." Diss., Georgia Institute of Technology, 2007. http://hdl.handle.net/1853/19877.

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Motivated by the necessity to consider probabilistic approaches to future designs, the main objective of this thesis was to develop and characterize energy efficient probabilistic CMOS (PCMOS) circuits that can be used to implement low energy computing platforms. The simplest circuit characterized was a PCMOS inverter (switch). An analytical model relating the energy consumption per switching (E) of this switch to its probability of correctness, p was derived. This characterization can also be used to evaluate the energy and performance savings that are achieved by PCMOS switch based computing
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45

Ingram, Ian David Victor. "New materials and processes for flexible nanoelectronics." Thesis, University of Manchester, 2013. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.588129.

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Planar electronic devices represent an attractive approach towards roll-to-roll printed electronics without the need for the sequential, precisely aligned, patterning steps inherent in the fabrication of conventional ‘3D’ electronic devices. Self-switching diodes (SSDs) and in-plane-gate field-effect transistors (IPG-FETs) can be patterned using a single process into a substrate precoated with semiconductor.These devices function in depletion mode, requiring the semiconductor to be doped in order for the devices to function. To achieve this, a reliable and controllable method was developed for
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46

Gaury, Benoit. "Emerging concepts in time-resolved quantum nanoelectronics." Thesis, Grenoble, 2014. http://www.theses.fr/2014GRENY026/document.

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Grâce aux progrès techniques récents, les sources d'électrons uniques sontpassées de la théorie au laboratoire. Des expériencesconceptuellement nouvelles où l'on sonde directement la dynamique quantiqueinterne des systèmes sont désormais possibles. Dans cette thèse nousdéveloppons les outils analytiques et numériques pour analyser et comprendre cesproblèmes. Les simulations requièrent une résolution spatiale appropriée pourles systèmes, et des temps simulés suffisament longs pour sonder leurs tempscaractéristiques. Jusqu'à présent l'approche théorique standard utilisée pour traiter de tels pro
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Weston, Joseph. "Numerical methods for time-resolved quantum nanoelectronics." Thesis, Université Grenoble Alpes (ComUE), 2016. http://www.theses.fr/2016GREAY040/document.

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De récents progrès dans la nanoélectronique quantique ont donné lieu à denouvelles expériences avec des sources cohérentes d'électrons unique. Lorsqu'undispositif électronique quantique est manipulé sur une échelle de temps pluscourte que le temps de vol caractéristique d'un électron à travers ledispositif, toute une gamme de possibilités qui sont conceptuellement nouvellesdeviennent possible. Pour traiter de telles situations physiques, des avancéescorrespondantes sont nécessaires dans les techniques de simulation, pour aiderà comprendre, ainsi qu'à concevoir, la prochaine génération d'expéri
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48

Rossignol, Benoît. "Time-resolved quantum nanoelectronics in electromagnetic environments." Thesis, Université Grenoble Alpes, 2020. http://www.theses.fr/2020GRALY004.

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La nanoélectronique quantique est dans une phase de grande expansion, soutenue principalement par le développement de l'informatique quantique. Une grande précision est nécessaire pour atteindre les objectifs actuels, mais d'un autre côté, les expériences sont aussi plus complexes que jamais. Les outils numériques semblent nécessaires pour réaliser la compréhension exigée tout en traitant une telle complexité. Les échelles de temps concernées sont de plus en plus courtes et se rapprochent des échelles de temps quantiques intrinsèques de l'appareil, comme le temps de vol. Les travaux antérieurs
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49

Vodenicarevic, Damir. "Rhythms and oscillations : a vision for nanoelectronics." Thesis, Université Paris-Saclay (ComUE), 2017. http://www.theses.fr/2017SACLS518/document.

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Avec l'avènement de l'"intelligence artificielle", les ordinateurs, appareils mobiles et objets connectés sont amenés à dépasser les calculs arithmétiques et logiques pour lesquels ils ont été optimisés durant des décennies, afin d'effectuer des tâches "cognitives" telles que la traduction automatique ou la reconnaissance d'images et de voix, et pour lesquelles ils ne sont pas adaptés. Ainsi, un super-calculateur peut-il consommer des mégawatts pour effectuer des tâches que le cerveau humain traite avec 20 watt. Par conséquent, des système de calcul alternatifs inspirés du cerveau font l'objet
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Liu, Jia. "Biomimetics through nanoelectronics: development of three-dimensional macroporous nanoelectronics for building smart materials, cyborg tissues and injectable biomedical electronics." Thesis, Harvard University, 2014. http://dissertations.umi.com/gsas.harvard:11510.

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Nanoscale materials enable unique opportunities at the interface between physical and life sciences. The interface between nanoelectronic devices and biological systems makes possible communication between these two diverse systems at the length scale relevant to biological functions. The development of a bottom-up paradigm allows the nanoelectronic units to be synthesized and patterned on unconventional substrates. In this thesis, I will focus on the development of three-dimensional (3D) nanoelectronics, which mimics the structure of porous biomaterials to explore new methods for seamless int
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