Статті в журналах з теми "Circuit reliability simulation"

Щоб переглянути інші типи публікацій з цієї теми, перейдіть за посиланням: Circuit reliability simulation.

Оформте джерело за APA, MLA, Chicago, Harvard та іншими стилями

Оберіть тип джерела:

Ознайомтеся з топ-50 статей у журналах для дослідження на тему "Circuit reliability simulation".

Біля кожної праці в переліку літератури доступна кнопка «Додати до бібліографії». Скористайтеся нею – і ми автоматично оформимо бібліографічне посилання на обрану працю в потрібному вам стилі цитування: APA, MLA, «Гарвард», «Чикаго», «Ванкувер» тощо.

Також ви можете завантажити повний текст наукової публікації у форматі «.pdf» та прочитати онлайн анотацію до роботи, якщо відповідні параметри наявні в метаданих.

Переглядайте статті в журналах для різних дисциплін та оформлюйте правильно вашу бібліографію.

1

Lei, Chi Un, K. L. Man, Eng Gee Lim, Nan Zhang, and Kai Yu Wan. "Development of a Reliability Course for Emerging Circuits and Systems." Advanced Materials Research 622-623 (December 2012): 1922–24. http://dx.doi.org/10.4028/www.scientific.net/amr.622-623.1922.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
This paper presents a curriculum design of a course about reliability of circuits and systems. Contents in the learning modules include failure mechanisms of electronics, reliability for electronic components and circuit systems and simulation for circuit reliability. Through learning modules, students can learn concepts about reliability in circuits and systems, as well as develop awareness to design a reliable circuit system.
2

Kim, Je-Hyuk, Youngjin Seo, Jun Tae Jang, Shinyoung Park, Dongyeon Kang, Jaewon Park, Moonsup Han, Changwook Kim, Dong-Wook Park, and Dae Hwan Kim. "Reliability-Aware SPICE Compatible Compact Modeling of IGZO Inverters on a Flexible Substrate." Applied Sciences 11, no. 11 (May 25, 2021): 4838. http://dx.doi.org/10.3390/app11114838.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Accurate circuit simulation reflecting physical and electrical stress is of importance in indium gallium zinc oxide (IGZO)-based flexible electronics. In particular, appropriate modeling of threshold voltage (VT) changes in different bias and bending conditions is required for reliability-aware simulation in both device and circuit levels. Here, we present SPICE compatible compact modeling of IGZO transistors and inverters having an atomic layer deposition (ALD) Al2O3 gate insulator on a polyethylene terephthalate (PET) substrate. Specifically, the modeling was performed to predict the behavior of the circuit using stretched exponential function (SEF) in a bending radius of 10 mm and operating voltages ranging between 4 and 8 V. The simulation results of the IGZO circuits matched well with the measured values in various operating conditions. It is expected that the proposed method can be applied to process improvement or circuit design by predicting the direct current (DC) and alternating current (AC) responses of flexible IGZO circuits.
3

Cao, Yu, Jyothi Velamala, Ketul Sutaria, Mike Shuo-Wei Chen, Jonathan Ahlbin, Ivan Sanchez Esqueda, Michael Bajura, and Michael Fritze. "Cross-Layer Modeling and Simulation of Circuit Reliability." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 33, no. 1 (January 2014): 8–23. http://dx.doi.org/10.1109/tcad.2013.2289874.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
4

Alexeyev, Alexander A., and Michael M. Green. "Secure Communications Based on Variable Topology of Chaotic Circuits." International Journal of Bifurcation and Chaos 07, no. 12 (December 1997): 2861–69. http://dx.doi.org/10.1142/s0218127497001941.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
A new technique for synchronization of chaotic circuits is proposed. This technique, based on varying a circuit's overall topology rather than varying a set of continuous parameters, offers a possible resolution to the tradeoff between security and synchronizability inherent in existing chaotic systems. The encryption key is represented by a mapping from a set of nodes to a set of switches in the circuit. This method significantly improves reliability and can be easily interfaced to digital control circuits.
5

Zhang, Yu, and Ji Dong Li. "Simulation Research of a Soft Power Bi-Directional DC-DC Converter." Advanced Materials Research 945-949 (June 2014): 2327–30. http://dx.doi.org/10.4028/www.scientific.net/amr.945-949.2327.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
A type of BUCK/BOOST bi-directional DC-DC topology for high power occasions was presented based on the main circuit topology shortcomings of conventional BUCK/BOOST bidirectional DC-DC converter by increasing the inductance, capacitance, diode auxiliary circuits, the work process of the main circuit BUCK BOOST in the simulation state was analyzed. Select multiple sets of parameters on simulation, observe the waveform ON and OFF of main power device to determine the appropriate auxiliary circuit parameter set. The results show that: The topology suppresses large current peak of the main power device and improve the reliability.
6

Li, Minghan, Chenglong Fu, Jingyi Huang, and Jiaxin Liu. "Reliability Evaluation Model of Distribution Network Based on Circuit Structure." Journal of Physics: Conference Series 2310, no. 1 (October 1, 2022): 012070. http://dx.doi.org/10.1088/1742-6596/2310/1/012070.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Abstract In order to meet the electricity requirements and improve the quality of distribution networks, it is essential to improve the reliability level of the power system. This paper established several mathematical models based on circuit analysis and computer simulation to realize the evaluation of distribution network reliability. Firstly, the Sequential Monte Carlo method was utilized to simulate the indicators of series and parallel circuits, and the Entropy Weight Method was adopted to weight the indicators. Then, simulation results were comprehensively evaluated using the Technique for Order Preference by Similarity to Ideal Solution (TOPSIS), and the evaluation model of distribution network reliability was obtained. The established mathematical model provided some guidance to construct an industrial distribution network and improve the reliability level of the power system.
7

NASEH, SASAN, and M. JAMAL DEEN. "RF CMOS RELIABILITY." International Journal of High Speed Electronics and Systems 11, no. 04 (December 2001): 1249–95. http://dx.doi.org/10.1142/s0129156401001088.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
In this chapter the effects of hot carrier on the reliability of NMOS transistors are investigated. First, it is explained why the hot carrier issue can be important in RF CMOS circuits. Important mechanisms of hot carrier generation are reviewed and some of the techniques used in the measurement of hot carrier damages are explained. Next, results of measurement of DC hot carrier stress on the NMOS transistors are presented. The main focus here is the RF performance of the NMOS devices and circuits mode of them, but DC parameters of the device such as its I-V characteristics and threshold voltage are presented, as they directly affect the RF performance. Finally, using the measurements of hot carrier effects on single NMOS transistors, the effects of hot carriers on three parameters of a low noise amplifier, matching, power gain and stability, are predicted using circuit simulation.
8

Суханова, Наталия, and Nataliya Sukhanova. "ELECTRONIC CIRCUIT FAILURE MODELING USING NEURAL NETWORKS." Bulletin of Bryansk state technical university 2018, no. 8 (October 25, 2018): 76–83. http://dx.doi.org/10.30987/article_5bb5e6f323cf39.47317213.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
The object of researches is electronic circuits. For elements of the circuit there are defined characteristics of input and output signals in a working condition and at a state of non-operability. The subject of researches is a reliability of electronic circuits (EC). The purpose of the work consists in the automation of reliability tests at the expense of the failure simulation of electronic circuit elements with the aid of artificial neural networks (ANN). There is developed a method for carrying out EC reliability tests with the use of automation means. During tests one simulates different failures of circuit elements. For element failure simulation there are used ANN trained fragments. The ANN fragments are trained with the use of the selection of input and output signals of the element in a working condition and at a state non-operability. For the signal formation of a working condition a signal generator is used. For the signal formation of a state of nonoperability the signals from outputs of a noise generator are added. To reduce time and costs for training there is offered for use the ANN of a special switch type which allows copying, replicating, modifying ANN, training and forming ANN from its fragments.
9

Chen, Jinjie. "A Simulation Research on the Grid-Connected Control Technology of Single-Phase Inverters Based on MATLAB." Journal of Electronic Research and Application 6, no. 4 (July 27, 2022): 7–12. http://dx.doi.org/10.26689/jera.v6i4.4154.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
This paper primarily discusses the main circuit of single-phase inverter circuits. It begins by introducing the research context and the significance of the subject, then discusses the topology of grid-connected single-phase inverter circuits, continues by discussing the control strategy for grid-connected single-phase inverter circuits, realizes a sinusoidal pulse width modulation (SPWM) signal generation circuit and an inverse control algorithm program, and finally ensures good output waveform and fast dynamic response. In view of the hysteresis feature of the grid voltage’s synchronous signal sampling circuit, the acquisition function in digital signal processing (DSP) control chips is applied, and the reasons for the hysteresis phenomenon are thoroughly investigated. The reliability of the SPWM control algorithm is revealed through the results.
10

Zandevakili, Hamed, Ali Mahani, and Mohsen Saneei. "An accurate and fast reliability analysis method for combinational circuits." COMPEL: The International Journal for Computation and Mathematics in Electrical and Electronic Engineering 34, no. 3 (May 5, 2015): 979–95. http://dx.doi.org/10.1108/compel-06-2014-0137.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Purpose – One of the main issues which microelectronics industry encounter is reliability as feature sizes scale down to nano-design level. The purpose of this paper is to provide a probabilistic transfer matrix based to find the accurate and efficient method of finding circuit’s reliability. Design/methodology/approach – The proposed method provides a probabilistic description of faulty behavior and is well-suited to reliability and error susceptibility calculations. The proposed method offers accurate circuit reliability calculations in the presence of reconvergent fanout. Furthermore, a binary probability matrix is used to not only resolve signals correlation problem but also improve the accuracy of the obtained reliability in the presence of reconverging signals. Findings – The results provide the accuracy and computation time of reliability evaluation for ISCAS85 benchmark schemes. Also, simulations have been conducted on some digital circuits involving LGSynth’91 circuits. Simulation results show that proposed solution is a fast method with less complexity and gives an accurate reliability value in comparison with other methods. Originality/value – The proposed method is the only scheme giving the low calculation time with high accuracy compared to other schemes. The library-based method also is able to evaluate the reliability of every scheme independent from its circuit topology. The comparison exhibits that a designer can save its evaluation time in terms of performance and complexity.
11

Fernández, R., R. Rodríguez, M. Nafría, and X. Aymerich. "DC broken down MOSFET model for circuit reliability simulation." Electronics Letters 41, no. 6 (2005): 368. http://dx.doi.org/10.1049/el:20057422.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
12

Li, X., J. Qin, B. Huang, X. Zhang, and J. B. Bernstein. "SRAM Circuit-Failure Modeling and Reliability Simulation With SPICE." IEEE Transactions on Device and Materials Reliability 6, no. 2 (June 2006): 235–46. http://dx.doi.org/10.1109/tdmr.2006.876568.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
13

Hsu, W. J., B. J. Sheu, S. M. Gowda, and C. G. Hwang. "Advanced integrated-circuit reliability simulation including dynamic stress effects." IEEE Journal of Solid-State Circuits 27, no. 3 (March 1992): 247–57. http://dx.doi.org/10.1109/4.121545.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
14

Zhou, Zhi Wen, Cai Xia Wang, and An Ren Ma. "Research on Coating Devices with Applied Technology in Magnetron Sputtering Regulated Switching Power Supply Design." Applied Mechanics and Materials 540 (April 2014): 134–37. http://dx.doi.org/10.4028/www.scientific.net/amm.540.134.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Magnetron power supply is one of the most important components in coating devices in applied technology. Magnetron regulated power supply with high power and high efficiency is studied and designed on the basis of high-frequency switching power supply technology. The principle of the main circuit and control circuit design are introduced. A MATLAB simulating model is composed to study parameters and waveforms of the designed circuits. The hardware circuit and software program are designed based on simulation results. The adjustment and display of the output voltage and the output current of the power supply under different work modes are achieved with TMS320F2812 DSP system. Practical applications confirm that the designed power supply has good constant current control effect, high reliability and working stability.
15

FAN, Yuyang, Zhi DENG, and Zihang LI. "Verification and reliability analysis of synchronizers in clock domain crossing." Xibei Gongye Daxue Xuebao/Journal of Northwestern Polytechnical University 40, no. 2 (April 2022): 369–76. http://dx.doi.org/10.1051/jnwpu/20224020369.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
There are a large number of multi-clock domain circuits in the airborne equipment of aircraft. When data is transmitted across the clock domain, meta-stability may occur, resulting in data transmission errors and reduced circuit reliability. However, due to the occasional and non-reproducible faults caused by metastability, and the high cost of existing cross-clock domain specific verification software, cross-clock domain circuit verification in three-mode redundancy scenarios is not supported. To solve this problem, a method that combines register transfer level (RTL) validation, board-level accelerated testing and computational evaluation based on traditional tools is presented. This method can detect the cross-clock domain transmission problems in three-mode application scenarios or normal scenarios and assess potential cross-clock domain transmission risks using generic simulation tools at an early stage of design. It reduces the cost of economy and time for high safety level airborne complex electronic verification, and improves the reliability of the circuit.
16

Chattopadhyay, Saranyu, Pranesh Santikellur, Rajat Subhra Chakraborty, Jimson Mathew, and Marco Ottavi. "A Conditionally Chaotic Physically Unclonable Function Design Framework with High Reliability." ACM Transactions on Design Automation of Electronic Systems 26, no. 6 (November 30, 2021): 1–24. http://dx.doi.org/10.1145/3460004.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Physically Unclonable Function (PUF) circuits are promising low-overhead hardware security primitives, but are often gravely susceptible to machine learning–based modeling attacks. Recently, chaotic PUF circuits have been proposed that show greater robustness to modeling attacks. However, they often suffer from unacceptable overhead, and their analog components are susceptible to low reliability. In this article, we propose the concept of a conditionally chaotic PUF that enhances the reliability of the analog components of a chaotic PUF circuit to a level at par with their digital counterparts. A conditionally chaotic PUF has two modes of operation: bistable and chaotic , and switching between these two modes is conveniently achieved by setting a mode-control bit (at a secret position) in an applied input challenge. We exemplify our PUF design framework for two different PUF variants—the CMOS Arbiter PUF and a previously proposed hybrid CMOS-memristor PUF, combined with a hardware realization of the Lorenz system as the chaotic component. Through detailed circuit simulation and modeling attack experiments, we demonstrate that the proposed PUF circuits are highly robust to modeling and cryptanalytic attacks, without degrading the reliability of the original PUF that was combined with the chaotic circuit, and incurs acceptable hardware footprint.
17

Liu, Xin Cheng, Min Zhu, and Zhi Hui Jing. "The Modeling of OTFT and the Measuring of Small Signal Detection Circuit." Advanced Materials Research 981 (July 2014): 62–65. http://dx.doi.org/10.4028/www.scientific.net/amr.981.62.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
In order to detect OTFT small signal dynamic characteristics of weak current, we designed the detection circuit. The current detection range of the circuit is 10-9~10-6A, circuit bandwidth reaches 10kHz.According to the data tested by copper pthalocyanine thin organic static induction transistor we prepared, an equivalent circuit for simulating its dynamic performances was built and the factors influencing the performance of the device was investigated. The simulation results and actual test results are basically identical,which show the reliability of organic thin film transistor equivalent circuit model. In addition, through analyzing the model structure and the simulation results, the grid schottky junction capacitance and the device current intensity are the important factors in determining the dynamic properties of organic thin film transistor.
18

More, S., M. Fulde, F. Chouard, and D. Schmitt-Landsiedel. "Reliability analysis of buffer stage in mixed signal application." Advances in Radio Science 9 (August 1, 2011): 225–30. http://dx.doi.org/10.5194/ars-9-225-2011.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Abstract. This paper discusses reliability analysis of a buffer circuit targeted for an analog to digital converter application. The circuit designed in a 32 nm high-κ metal gate CMOS technology was investigated by circuit simulation and sensitivity analysis. This analysis was conducted for realistic time varying (AC) stress. As aging effects, negative and positive bias temperature instability, conducting and non-conducting hot carrier injection are taken into consideration. The aging contributions of these effects on the different transistors in the buffer circuit and on different buffer performance figures are evaluated. Using these results, the impact of an aged buffer circuit on the performance of a successive approximation ADC circuit is evaluated. The most severely affected performance due to aging is amplifier offset, which leads to time varying gain error in the ADC circuit.
19

Kubiak, K., and W. K. Fuchs. "Rapid integrated-circuit reliability-simulation and its application to testing." IEEE Transactions on Reliability 41, no. 3 (1992): 458–65. http://dx.doi.org/10.1109/24.159821.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
20

Li, Xiaojun, Jin Qin, and Joseph B. Bernstein. "Compact Modeling of MOSFET Wearout Mechanisms for Circuit-Reliability Simulation." IEEE Transactions on Device and Materials Reliability 8, no. 1 (March 2008): 98–121. http://dx.doi.org/10.1109/tdmr.2008.915629.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
21

ZANDEVAKILI, HAMED, ALI MAHANI, and MOHSEN SANEEI. "PROBABILISTIC TRANSFER MATRIX WITH MIXED BINARY-DECIMAL CODING FOR LOGIC CIRCUIT RELIABILITY ANALYSIS." Journal of Circuits, Systems and Computers 22, no. 08 (September 2013): 1350064. http://dx.doi.org/10.1142/s0218126613500643.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Technology scale leads to increasing the vulnerability of new integrated logic circuits. The high-energy neutrons (present in terrestrial cosmic radiation) and alpha particles (that originate from impurities in the packaging materials) play important role in occurrence of transient faults which are effective factor for designing reliable integrated circuits. Thus, a fast and scalable method to obtain accurate reliability value is an issue to have a dependable logic circuit design. In this paper, a new fast and scalable method is proposed to calculate the circuit reliability in which the effects of nested reconvergent paths, as a main source of inaccuracy, is considered. In the presence of reconverging signals a binary probability matrix is used to resolve signals correlation problem and increase the accuracy of the obtained reliability. Also a new mixed binary-decimal code allocation is proposed to increase the scalability of the method and reduce the complexity of calculation. Simulation results show that our proposed solution is a fast method with less complexity and also gives an accurate reliability value in comparison with other methods.
22

Schlünder, C. "Device reliability challenges for modern semiconductor circuit design – a review." Advances in Radio Science 7 (May 19, 2009): 201–11. http://dx.doi.org/10.5194/ars-7-201-2009.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Abstract. Product development based on highly integrated semiconductor circuits faces various challenges. To ensure the function of circuits the electrical parameters of every device must be in a specific window. This window is restricted by competing mechanisms like process variations and device degradation (Fig. 1). Degradation mechanisms like Negative Bias Temperature Instability (NBTI) or Hot Carrier Injection (HCI) lead to parameter drifts during operation adding on top of the process variations. The safety margin between real lifetime of MOSFETs and product lifetime requirements decreases at advanced technologies. The assignment of tasks to ensure the product lifetime has to be changed for the future. Up to now technology development has the main responsibility to adjust the technology processes to achieve the required lifetime. In future, reliability can no longer be the task of technology development only. Device degradation becomes a collective challenge for semiconductor technologist, reliability experts and circuit designers. Reliability issues have to be considered in design as well to achieve reliable and competitive products. For this work, designers require support by smart software tools with built-in reliability know how. Design for reliability will be one of the key requirements for modern product designs. An overview will be given of the physical device damage mechanisms, the operation conditions within circuits leading to stress and the impact of the corresponding device parameter degradation on the function of the circuit. Based on this understanding various approaches for Design for Reliability (DfR) will be described. The function of aging simulators will be explained and the flow of circuit-simulation will be described. Furthermore, the difference between full custom and semi custom design and therefore, the different required approaches will be discussed.
23

Yao, Zhao. "Analysis of Control Strategy of Three-phase Bridge Fully Controlled Rectifier Circuit Based on PID Control." Highlights in Science, Engineering and Technology 17 (November 10, 2022): 328–35. http://dx.doi.org/10.54097/hset.v17i.2623.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
At the present stage of industrial production in China, rectifier circuits still have an important position, and their safe, reliable, and efficient operation is still a necessary issue to be explored in the development of power electronics technology. Therefore, this paper will build an improved three-phase bridge rectifier circuit based on the traditional three-phase bridge fully controlled rectifier circuit, replacing the thyristor with an insulated gate bipolar transistor (IGBT) under the same basic principle, so that it can be more easily controlled by industrial intelligence. The PID controller is introduced to make the output voltage of the rectifier circuit gradually converge to a certain value by continuously correcting the calculation of the trigger angle α and the calculation of the voltage and current values. The simulation results show that the PI-controlled three-phase bridge fully controlled rectifier circuit model established in the paper makes the output of the circuit eventually stabilize under the influence of the closed-loop control, and the simulation results reach the expected value and show strong robust stability. For industrial applications, improving the safety, reliability, efficiency, and flexibility of bridge rectifier circuits is of good reference in practical engineering applications.
24

Wang, Yimin, Yun Li, Yanbin Yang, and Wenchao Chen. "Hot Carrier Injection Reliability in Nanoscale Field Effect Transistors: Modeling and Simulation Methods." Electronics 11, no. 21 (November 4, 2022): 3601. http://dx.doi.org/10.3390/electronics11213601.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Hot carrier injection (HCI) can generate interface traps or oxide traps mainly by dissociating the Si-H or Si-O bond, thus affecting device performances such as threshold voltage and saturation current. It is one of the most significant reliability issues for devices and circuits. Particularly, the increase in heat generation per unit volume due to high integration density of advanced integrated circuits leads to a severe self-heating effect (SHE) of nanoscale field effect transistors (FETs), and low thermal conductivity of materials in nanoscale FETs further aggravates the SHE. High temperature improves the HCI reliability in the conventional MOSFET with long channels in which the energy of carriers can be relaxed. However, high temperature due to severe SHE deteriorates HCI reliability in nanoscale FETs, which is a big concern in device and circuit design. In this paper, the modeling and simulation methods of HCI in FETs are reviewed. Particularly, some recently proposed HCI models with consideration of the SHE are reviewed and discussed in detail.
25

Xu, Ji, Yaling Qin, Yongjiao Shi, Yutong Shi, Yang Yang, and Xiaobing Zhang. "Design and circuit simulation of nanoscale vacuum channel transistors." Nanoscale Advances 2, no. 8 (2020): 3582–87. http://dx.doi.org/10.1039/d0na00442a.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Nanoscale vacuum channel transistors (NVCTs) are promising candidates in electronics due to their high frequency, fast response and high reliability, and have attracted considerable attention for structural design and optimization.
26

Wahyudi, Bagus, and Hangga Wicaksono. "Validating the Reliability Simulation Using Bohlamp Circuit with Accelerated Life Test Method." Mathematical Modelling of Engineering Problems 9, no. 5 (December 13, 2022): 1327–34. http://dx.doi.org/10.18280/mmep.090522.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Learning media is very importance tools to achieved the learning outcome like capable to design reliability engineering system (RES). The students should be understanding with basic theory of reliability and also have technical skill based on need analysis. Unfortunately, the RES learning media are still not available specially to implement of several type of reliability system. Objective of the study is introducing reliability device model simulation with choice option series, parallel and combine series-parallel system. Method of the study are using accelerated life testing method (ALT) which has been analyzed with statistical method to estimate life-time at normal condition. Validating value of each reliability system are have similarity between experimental test (Re) and theoretical (Rt) i.e.: series (Rt=0.329; Re=0.359); parallel (Rt=0.976; Re=0.972.), and combined of series-parallel (Rt=0. 651; Re=0.686). The conclusion is the parallel have high-fidelity on application of reliability simulation with error 0.000409.
27

Głyda, Krzysztof, Andrzej Szelmanowski, Jarosław Sulkowski, and Andrzej Pazur. "Actions of the aviation on-board fire protection system caused by short circuits in control blocks." Journal of KONBiN 52, no. 4 (December 1, 2022): 177–96. http://dx.doi.org/10.2478/jok-2022-0049.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Abstract The article presents the results of simulation tests of the SSP-FK aviation fire protection system and identification of the main reasons of its false operation on many aeroplanes and helicopters of the Polish Armed Forces using a diagnostic simulator built at ITWL. The results of the performed statistical analyzes pointing to the execution blocks as the key factors in false fire signalling are discussed. Selected test results of the developed simulation model of the actuator block under electrical short-circuit conditions in its control circuits (particularly on printed circuit boards) are presented. The effectiveness of the proposed test method with a simulation model of a fire protection system, which can be used to train the engineering and aviation service and pilots and to support the work of the Aircraft Accident Investigation Commission, was pointed out.
28

Zhou, Jia, Xiao Long Tan, and Wen Bin Wang. "Research of Single Phase APFC." Applied Mechanics and Materials 556-562 (May 2014): 1541–44. http://dx.doi.org/10.4028/www.scientific.net/amm.556-562.1541.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
DC voltage, input voltage and current need testing for control circuit of general PFC circuit that makes circuit complex and high cost. And using of sensors decreases the reliability of circuit. Hence, simulation analysis of single phase APFC without DC voltage sensor is present in this paper.
29

Tahoori, Mehdi, and Mohammad Saber Golanbari. "Cross-Layer Reliability, Energy Efficiency, and Performance Optimization of Near-Threshold Data Paths." Journal of Low Power Electronics and Applications 10, no. 4 (December 3, 2020): 42. http://dx.doi.org/10.3390/jlpea10040042.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Modern electronic devices are an indispensable part of our everyday life. A major enabler for such integration is the exponential increase of the computation capabilities as well as the drastic improvement in the energy efficiency over the last 50 years, commonly known as Moore’s law. In this regard, the demand for energy-efficient digital circuits, especially for application domains such as the Internet of Things (IoT), has faced an enormous growth. Since the power consumption of a circuit highly depends on the supply voltage, aggressive supply voltage scaling to the near-threshold voltage region, also known as Near-Threshold Computing (NTC), is an effective way of increasing the energy efficiency of a circuit by an order of magnitude. However, NTC comes with specific challenges with respect to performance and reliability, which mandates new sets of design techniques to fully harness its potential. While techniques merely focused at one abstraction level, in particular circuit-level design, can have limited benefits, cross-layer approaches result in far better optimizations. This paper presents instruction multi-cycling and functional unit partitioning methods to improve energy efficiency and resiliency of functional units. The proposed methods significantly improve the circuit timing, and at the same time considerably limit leakage energy, by employing a combination of cross-layer techniques based on circuit redesign and code replacement techniques. Simulation results show that the proposed methods improve performance and energy efficiency of an Arithmetic Logic Unit by 19% and 43%, respectively. Furthermore, the improved performance of the optimized circuits can be traded to improving the reliability.
30

Liu, Hai Ke, Hai Yang, Ying Zhang, Yi Tao Jiang, and Su Juan Zhang. "Transmission Network Planning Based on Genetic Algorithm in Market Environment." Applied Mechanics and Materials 737 (March 2015): 273–77. http://dx.doi.org/10.4028/www.scientific.net/amm.737.273.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
This paper establishes a transmission network planning model under uncertainty market environment, and consider N-2 security of the double circuit lines on the same tower. The model is solved with the method of hierarchical genetic algorithm, finally get the future transmission network planning meet the need of reliability and the minimum cost of schemeunder uncertain environment .To build a simulation model, simulation the security impact of building circuits on the same tower to power transmission network planning.
31

Najm, Farid N., and Michael G. Xakellis. "Statistical Estimation of the ,Switching Activity in VLSI Circuits." VLSI Design 7, no. 3 (January 1, 1998): 243–54. http://dx.doi.org/10.1155/1998/46819.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Higher levels of integration have led to a generation of integrated circuits for which power dissipation and reliability are major design concerns. In CMOS circuits, both of these problems are directly related to the extent of circuit switching activity. The average number of transitions per second at a circuit node is a measure of switching activity that has been called the transition density. This paper presents a statistical simulation technique to estimate individual node transition densities in combinational logic circuits. The strength of this approach is that the desired accuracy and confidence can be specified up-front by the user. Another key feature is the classification of nodes into two categories: regular- and low-density nodes. Regular-density nodes are certified with user-specified percentage error and confidence levels. Low-density nodes are certified with an absolute error, with the same confidence. This speeds convergence while sacrificing percentage accuracy only on nodes which contribute little to power dissipation and have few reliability problems.
32

Zhang, Hong, Gui Xin Wang, Hao Yan, and Lu Zhou Zhang. "Research on the Half-Bridge Three-Level DC/DC Converter with High Frequency and High Voltage." Advanced Materials Research 732-733 (August 2013): 1175–78. http://dx.doi.org/10.4028/www.scientific.net/amr.732-733.1175.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
In this research, a high-voltage direct current zero voltage switching (ZVS) PWM half-bridge converter is proposed. The parameters of the converter as follows: the input voltage is up to 4000V;the output voltage is 600V.The new ZVS PWM TL converter has neutral point clamping diodes and flying capacitor. This research is going to analyze the working principle of circuit witch thus realizing the zero voltage switching and the circuit parameters selection. Moreover, circuits simulation is carried out by MATLAB to verify the reliability and feasibility of this DC/DC converter topology.
33

Wu, Yue Feng. "The Simulation Study of New Boost-ZVT Circuit Based on Pspice." Applied Mechanics and Materials 644-650 (September 2014): 3821–24. http://dx.doi.org/10.4028/www.scientific.net/amm.644-650.3821.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Because the shortcoming of the traditional Boost-ZVT has large shutdown losses for the auxiliary switch on hard-working, the circuit has disadvantage of low efficiency. The paper discusses a new Boost-ZVT circuit, and the new circuit designs the absorption circuit in the auxiliary switch circuit to achieve soft turn-off. Compared to ordinary Boost-ZVT circuit, all the switches work in a state of soft-switching for an improved Boost-ZVT circuit. So the new Boost-ZVT circuit can improve the efficiency of the system, at the same time it can eliminate the interference because of switch temperature rising, and can ensure the reliability of the whole system. Finally, the paper builds circuit model and make simulation based on PSPICE, and the simulation results show that the theoretical analysis is correct.
34

Kreischer, Christian, Stefan Kulig, and Carsten Göbel. "Applicability of Park transformation for the analysis of transient performance during subsynchronous resonances." Archives of Electrical Engineering 62, no. 3 (September 1, 2013): 401–15. http://dx.doi.org/10.2478/aee-2013-0032.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Abstract Long transmission lines have to be compensated to enhance the transport of active power. But a wrong design of the compensation may lead to subsynchronous resonances (SSR). For studies often park equivalent circuits are used. The parameters of the models are often determined analytically or by a three-phase short-circuit test. Models with this parameters give good results for frequencies of 50 Hz and 100 Hz resp. 60 Hz and 120 Hz. But SSR occurs at lower frequencies what arises the question of the reliability of the used models. Therefore in this publication a novel method for the determination of Park equivalent circuit parameters is presented. Herein the parameters are determined form time functions of the currents and the electromagnetic moment of the machine calculated by transient finite-element simulations. This parameters are used for network simulations and compared with the finite-element calculations. Compared to the parameters derived by a three-phase short-circuit a significant better accuracy of simulation results can be achieved by the presented method.
35

Verdingovas, Vadimas, Salil Joshy, Morten Stendahl Jellesen, and Rajan Ambat. "Analysis of surface insulation resistance related failures in electronics by circuit simulation." Circuit World 43, no. 2 (May 2, 2017): 45–55. http://dx.doi.org/10.1108/cw-09-2016-0040.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Purpose The purpose of this study is to show that the humidity levels for surface insulation resistance (SIR)-related failures are dependent on the type of activators used in no-clean flux systems and to demonstrate the possibility of simulating the effects of humidity and contamination on printed circuit board components and sensitive parts if typical SIR data connected to a particular climatic condition are available. This is shown on representative components and typical circuits. Design/methodology/approach A range of SIR values obtained on SIR patterns with 1,476 squares was used as input data for the circuit analysis. The SIR data were compared to the surface resistance values observable on a real device printed circuit board assembly. SIR issues at the component and circuit levels were analysed on the basis of parasitic circuit effects owing to the formation of a water layer as an electrical conduction medium. Findings This paper provides a summary of the effects of contamination with various weak organic acids representing the active components in no-clean solder flux residue, and demonstrates the effect of humidity and contamination on the possible malfunctions and errors in electronic circuits. The effect of contamination and humidity is expressed as drift from the nominal resistance values of the resistors, self-discharge of the capacitors and the errors in the circuits due to parasitic leakage currents (reduction of SIR). Practical/implications The methodology of the analysis of the circuits using a range of empirical leakage resistance values combined with the knowledge of the humidity and contamination profile of the electronics can be used for the robust design of a device, which is also important for electronic products relying on low current consumption for long battery lifetime. Originality/value Examples provide a basic link between the combined effect of humidity and contamination and the performance of electronic circuits. The methodology shown provides the possibility of addressing the climatic reliability of an electronic device at the early stage of device design by using typical SIR data representing the possible climate exposure.
36

Lei, Chengwei, and Weisong Tian. "Probability-Based Customizable Modeling and Simulation of Protective Devices in Power Distribution Systems." Energies 15, no. 1 (December 29, 2021): 199. http://dx.doi.org/10.3390/en15010199.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Fused contactors and thermal magnetic circuit breakers are commonly applied protective devices in power distribution systems to protect the circuits when short-circuit faults occur. A power distribution system may contain various makes and models of protective devices, as a result, customizable simulation models for protective devices are demanded to effectively conduct system-level reliable analyses. To build the models, thermal energy-based data analysis methodologies are first applied to the protective devices’ physical properties, based on the manufacturer’s time/current data sheet. The models are further enhanced by integrating probability tools to simulate uncertainties in real-world application facts, for example, fortuity, variance, and failure rate. The customizable models are expected to aid the system-level reliability analysis, especially for the microgrid power systems.
37

Wang, Chun Ying, and Jun Zhang. "Based on FPGA Design and Simulation of Function Signal Generator." Applied Mechanics and Materials 380-384 (August 2013): 3292–95. http://dx.doi.org/10.4028/www.scientific.net/amm.380-384.3292.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Based on direct digital frequency synthesizer ( DDS ) of the working principle, designfunction signal generator based on FPGA chip as the core, the application of Verilog language andQuartus II provided by software schematic design function, completed a system circuit design, using Modelsim on the circuit in the simulation, the simulation results are analyzed, the validationof the design method for the reliability and feasibility.
38

Danqing Chen, Erhong Li, E. Rosenbaum, and Sung-Mo Kang. "Interconnect thermal modeling for accurate simulation of circuit timing and reliability." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 19, no. 2 (2000): 197–205. http://dx.doi.org/10.1109/43.828548.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
39

Brambilla, A., A. Premoli, and G. Storti-Gajani. "Recasting modified nodal analysis to improve reliability in numerical circuit Simulation." IEEE Transactions on Circuits and Systems I: Regular Papers 52, no. 3 (March 2005): 522–34. http://dx.doi.org/10.1109/tcsi.2004.842869.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
40

AFACAN, Engin. "An efficient reliability simulation tool for lifetime-aware analog circuit synthesis." TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES 28, no. 4 (July 29, 2020): 2046–59. http://dx.doi.org/10.3906/elk-1910-22.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
41

Meng, Fangang, Shijing Wu, Fan Zhang, Zenglei Zhang, Jicai Hu, and Xiaoyong Li. "Modeling and Simulation of Flexible Transmission Mechanism with Multiclearance Joints for Ultrahigh Voltage Circuit Breakers." Shock and Vibration 2015 (2015): 1–17. http://dx.doi.org/10.1155/2015/392328.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
The transmission mechanism, of which the dynamic characteristics determine the reliability of the circuit breaker, is the principal component of the ultrahigh voltage (UHV) circuit breaker. The characteristics of transmission mechanism are quick motion, high sensibility, and high reliability. The transmission mechanism with multiclearance joints present strong no-linear vibration feature which strongly affects the reliability of the UHV circuit breaker. In this investigation, a planar rigid-flexible coupling model of the transmission mechanism considering the clearance joints and the flexibility of components is established by using ADAMS software. The dynamic contact model in clearance joints is performed, based on clearance vector model of clearance joint. Then, the reliability of the model is proved by means of comparing the results of experiments. The simulation results show that the dynamic response of the mechanism is greatly influenced by the clearance and the flexibility of components has a role of suspension for the mechanism. Moreover, the influence of the clearance size, input speed, and number of clearance joints on the dynamic characteristics of the mechanism are also investigated.
42

Zheng, Han, and Xiao Bo Gao. "Research on the Application of Chaotic Iteration Function of Heterogeneous Populations Mining Algorithm in Computer Based on Co-Evolution." Applied Mechanics and Materials 539 (July 2014): 194–98. http://dx.doi.org/10.4028/www.scientific.net/amm.539.194.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Based on the co-evolution theory, this paper establishes the mathematical model of heterogeneous populations, and joins the chaos function concept in the model, which makes the function have the effect of turning iterative nature of chaos, and designs computer digital output algorithm. In order to study the validity and reliability of the designed algorithm and mathematical model in this paper, with the combination of BSIM3 and MOSFET model, the paper designs a computer automatic control circuit, and the circuit is studied by numerical simulation. The Md-Vds curve can be seen that the numerical simulation result is consist with experimental results, which verify the validity of the algorithm. The computer control circuit I-VTH characteristic curve can be seen that the peak value of circuit fluctuation is consisting with the theoretical situation, which verified the reliability of the algorithm.
43

Zhang, Han, Qing Luo, Guo-Hua Zhou, and Yong Huang. "Research on isolation method of spacecraft reaction wheels using electromagnetic shunt damping." Journal of Physics: Conference Series 2368, no. 1 (November 1, 2022): 012028. http://dx.doi.org/10.1088/1742-6596/2368/1/012028.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
The spacecraft flywheel system is widely used in various space missions due to its cleanliness, high reliability and high control accuracy, such as spacecraft attitude control and large-angle turning maneuvers. However, current research agrees that the high-speed rotating flywheel system is one of the main sources of micro-vibration disturbances on spacecraft. In view of the variable speed characteristics of the flywheel, this paper proposes a new vibration isolation system based on Stewart vibration isolation platform and electromagnetic shunt damping (EMSD). Attempts to connect three circuits of pure resistance circuit, resistance-inductance circuit and resistance-inductance-capacitor circuit to the new vibration isolation system in order to improve the isolation performance. Through theoretical analysis and numerical simulation, the effect of circuit parameters on isolation performance of each circuit are studied. The results show that EMSD can significantly reduce the disturbance input of the flywheel, and frequency modulation can be achieved through the conversion circuit to avoid resonance.
44

Łyskawinski, Wiesław, Cezary Jędryczka, Dorota Stachowiak, Piotr Łukaszewicz, and Michał Czarnecki. "Finite element analysis and experimental verification of high reliability synchronous reluctance machine." Eksploatacja i Niezawodnosc - Maintenance and Reliability 24, no. 2 (April 22, 2022): 386–93. http://dx.doi.org/10.17531/ein.2022.2.20.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
The aim of this study was to investigate and analyse the synchronous reluctance machine. An accurate method for determining the lumped parameters of an equivalent circuit of the studied machine has been proposed. The method is based on the phase currents and voltages analysis at low slip operation. Experimental research of a synchronous reluctance machine is supplemented by simulation studies. The field-circuit model of electromagnetic phenomena in the considered motor was developed and used in simulation. The proposed method allows the numerical model to be verified by comparing the calculated and measured torqueangle characteristics of the machine. The test results obtained are presented and discussed. Achieved satisfactory concordance between simulation and experiment results proves that the proposed approach can be useful in the synthesis of reliable synchronous reluctance machines as well as in their control systems.
45

Sedlář, Tomáš, and Tibor Bachorec. "Multiphysical Simulations Help to Ensure Assembled Printed Circuit Board and Power Components Reliability." TRANSACTIONS ON ELECTRICAL ENGINEERING 8, no. 1 (March 30, 2020): 1–3. http://dx.doi.org/10.14311/tee.2019.1.001.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
Higher integration and reduced dimensions of components and printed circuit boards lead to rise of demands in precise design of electrical system. Numerical simulation enables designer to spot and repair errors in the electrical system without expensive prototyping and measuring. The paper summarizes possibilities of multiphysical analysis focused on problems with printed circuit boards and electrical power components with software ANSYS.
46

Leblebici, Y., and S. M. Kang. "Simulation of hot-carrier induced MOS circuit degradation for VLSI reliability analysis." IEEE Transactions on Reliability 43, no. 2 (June 1994): 197–206. http://dx.doi.org/10.1109/24.294990.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
47

Wenping Wang, V. Reddy, A. T. Krishnan, R. Vattikonda, S. Krishnan, and Yu Cao. "Compact Modeling and Simulation of Circuit Reliability for 65-nm CMOS Technology." IEEE Transactions on Device and Materials Reliability 7, no. 4 (December 2007): 509–17. http://dx.doi.org/10.1109/tdmr.2007.910130.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
48

Baoguang Yan, Qingguo Fan, J. B. Bernstein, Jin Qin, and Jun Dai. "Reliability Simulation and Circuit-Failure Analysis in Analog and Mixed-Signal Applications." IEEE Transactions on Device and Materials Reliability 9, no. 3 (September 2009): 339–47. http://dx.doi.org/10.1109/tdmr.2009.2020740.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
49

Bhanja, Mousumi, Surya Prakash Tamang, Ritika Das, and Baidyanath Ray. "Design Methodology of High Frequency M-ary ASK, FSK and QAM." Journal of Circuits, Systems and Computers 24, no. 10 (October 25, 2015): 1550152. http://dx.doi.org/10.1142/s0218126615501522.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
This paper proposes a high data rate, low-power, low-voltage design of OTA-based M-ary ASK, FSK and QAM modulator and demodulator circuits. Conventional D/A converter of M-ary circuit has been replaced with the operational transconductance amplifier-based n-bits to 2n level converter which operates with input frequencies up to 2.1 GHz. OTA-based oscillator and PLL is being designed for high speed M-ary FSK. Eye diagram analysis has been carried out, conforming a very low signal distortion. Theoretical analysis of bit error rate has been done. The circuit analysis and simulation results confirm the reliability and accuracy of the design. Effective layouts and die photographs of the proposed designs are also presented.
50

Tsou, Ming-Chang, and Ming-Tse Kuo. "Optimal Combination Design of a Light Emitting Diode Matrix Applicable to a Single-Stage Flyback Driver." Energies 13, no. 19 (October 6, 2020): 5209. http://dx.doi.org/10.3390/en13195209.

Повний текст джерела
Стилі APA, Harvard, Vancouver, ISO та ін.
Анотація:
The present study analyzed light emitting diodes (LEDs) as an output load and used a Taylor series to describe the characteristic curve based on the exponential characteristic of voltage and current. A prototype circuit of a flyback LED driver system was established to verify whether the theory is consistent with actual results. This study focused on the exponential relationship of LED voltage and current. Conventional simulations usually used linear models to present LED loads. However, the linear model resulted in considerable error between simulation and actual characteristics. Therefore, this study employed a Taylor series to describe the nonlinear characteristic of an LED load. Through precise calculations with Mathcad computation software, the error was effectively reduced. Moreover, the process clarified the influence of temperature on LEDs, which benefited the characteristic analysis of the entire system. Finally, a realized circuit of 120 W flyback LED drivers was established for conducting theory verification, including theoretic analysis and evaluation of the system design process of the flyback converter. The circuit simulation software SIMPLIS was used to demonstrate the system model, which enabled quick understanding of the system framework established in this study. Regarding LEDs, a commercially available aluminum luminaire was used as the output load. The measured results of the actual circuit and the simulation results were remarkably consistent. For the same system at the same temperature, the error between the simulation and actual results was less than 3%, which proved the reliability of the Taylor series simulation.

До бібліографії