Статті в журналах з теми "Flip-flop (electronics)"
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Mathis, Wolfgang. "100 years multivibrator-history, circuits and mathematical analysis." COMPEL - The international journal for computation and mathematics in electrical and electronic engineering 39, no. 3 (January 22, 2020): 725–37. http://dx.doi.org/10.1108/compel-10-2019-0411.
Lin, Dave Y. W., and Charles H. P. Wen. "A Delay-Adjustable, Self-Testable Flip-Flop for Soft-Error Tolerability and Delay-Fault Testability." ACM Transactions on Design Automation of Electronic Systems 26, no. 6 (June 28, 2021): 1–12. http://dx.doi.org/10.1145/3462171.
Ragavendran, U., and M. Ramachandran. "Low Power and Low Complexity Flip-Flop Design using MIFGMOS." International Journal of Engineering & Technology 7, no. 3.1 (August 4, 2018): 183. http://dx.doi.org/10.14419/ijet.v7i3.1.17233.
Guo, Wei Jia, Shu Bao Wang, Gui Jing Mei, and Xiu Mei Zhang. "Swift Self-Starting Design of Sequential Logic Circuit Based on Karnaugh Map." Applied Mechanics and Materials 220-223 (November 2012): 1008–11. http://dx.doi.org/10.4028/www.scientific.net/amm.220-223.1008.
Rompis, Lianly. "A RANDOM COUNTER IN USING SHIFT REGISTER AND ENCODER." Jurnal Ilmiah Realtech 14, no. 1 (April 30, 2018): 64–68. http://dx.doi.org/10.52159/realtech.v14i1.118.
Rahman, Aminur, Ian Jordan, and Denis Blackmore. "Qualitative models and experimental investigation of chaotic NOR gates and set/reset flip-flops." Proceedings of the Royal Society A: Mathematical, Physical and Engineering Sciences 474, no. 2209 (January 2018): 20170111. http://dx.doi.org/10.1098/rspa.2017.0111.
Prema, S., N. Karthikeyan, and S. Karthik. "Ultra-Low Power and High Sensitivity of Joint Clock Gating Based Dual Feedback Edge Triggered Flip Flop for Biomedical Imaging Applications." Journal of Medical Imaging and Health Informatics 11, no. 12 (December 1, 2021): 3215–22. http://dx.doi.org/10.1166/jmihi.2021.3919.
Hassan, Ahmad, Jean-Paul Noël, Yvon Savaria, and Mohamad Sawan. "Circuit Techniques in GaN Technology for High-Temperature Environments." Electronics 11, no. 1 (December 23, 2021): 42. http://dx.doi.org/10.3390/electronics11010042.
Wang, An Jing, and Yu Zhuo Fu. "Multi-Bit Flip-Flop Replacement Method Optimization and Synthesis Impact." Applied Mechanics and Materials 716-717 (December 2014): 1239–43. http://dx.doi.org/10.4028/www.scientific.net/amm.716-717.1239.
Komshina, A., S. Telibaev, and B. S. Mikhlin. "ASSEMBLING THE RS FLIP-FLOP ON CHIPS CONTAINING ELEMENTS OF "OR-NOT", "AND-NOT"." Informatics in school, no. 7 (November 17, 2018): 17–25. http://dx.doi.org/10.32517/2221-1993-2018-17-7-17-25.
CHANG, ROBERT C., L. C. HSU, and M. C. SUN. "A LOW-POWER AND HIGH-SPEED D FLIP-FLOP USING A SINGLE LATCH." Journal of Circuits, Systems and Computers 11, no. 01 (February 2002): 51–55. http://dx.doi.org/10.1142/s0218126602000239.
Liu, J. M., and Y. C. Chen. "Optical flip-flop." Electronics Letters 21, no. 6 (1985): 236. http://dx.doi.org/10.1049/el:19850169.
Gabrielli, Alessandro, Fabrizio Alfonsi, Alberto Annovi, Alessandra Camplani, and Alessandro Cerri. "Hardware Implementation Study of Particle Tracking Algorithm on FPGAs." Electronics 10, no. 20 (October 18, 2021): 2546. http://dx.doi.org/10.3390/electronics10202546.
Badugu, Divya Madhuri, Sunithamani S., Javid Basha Shaik, and Ramesh Kumar Vobulapuram. "Design of hardened flip-flop using Schmitt trigger-based SEM latch in CNTFET technology." Circuit World 47, no. 1 (June 1, 2020): 51–59. http://dx.doi.org/10.1108/cw-10-2019-0141.
Majeed, Ali, Esam Alkaldy, Mohd Zainal, and Danial Nor. "Novel Memory Structures in QCA Nano Technology." 3D SCEEER Conference sceeer, no. 3d (July 1, 2020): 119–24. http://dx.doi.org/10.37917/ijeee.sceeer.3rd.17.
Asthana, Amita, Dr Anil Kumar, Dr Preeta Sharan, and Dr Sumita Mishra. "Design of Arm Processor’s Elements Using QCA." International Journal of Engineering & Technology 7, no. 4.36 (December 9, 2018): 306. http://dx.doi.org/10.14419/ijet.v7i4.36.23793.
Duraivel, A. N., B. Paulchamy, and K. Mahendrakan. "Proficient Technique for High Performance Very Large-Scale Integration System to Amend Clock Gated Dual Edge Triggered Sense Amplifier Flip-Flop with Less Dissipation of Power Leakage." Journal of Nanoelectronics and Optoelectronics 16, no. 4 (April 1, 2021): 602–11. http://dx.doi.org/10.1166/jno.2021.2984.
Pal, Amrindra, Santosh Kumar, and Sandeep Sharma. "Design of Optical SR Latch and Flip-Flop Using Electro-Optic Effect Inside Lithium–Niobate-Based Mach–Zehnder Interferometers." Journal of Optical Communications 40, no. 2 (March 26, 2019): 119–34. http://dx.doi.org/10.1515/joc-2017-0053.
Lala, P. K., and A. Walker. "A Fine Grain Configurable Logic Block for Self-checking FPGAs." VLSI Design 12, no. 4 (January 1, 2001): 527–36. http://dx.doi.org/10.1155/2001/83474.
Stephan, G., B. Aissaoui, and A. Kellou. "A flip-flop interferometer." IEEE Journal of Quantum Electronics 23, no. 4 (April 1987): 458–60. http://dx.doi.org/10.1109/jqe.1987.1073366.
Zhuang, N., and H. Wu. "Novel ternary JKL flip-flop." Electronics Letters 26, no. 15 (1990): 1145. http://dx.doi.org/10.1049/el:19900741.
Li, X., S. Jia, X. Liang, and Y. Wang. "Self-blocking flip-flop design." Electronics Letters 48, no. 2 (2012): 82. http://dx.doi.org/10.1049/el.2011.2888.
Park, Jaeyoung, and Young Yim. "Fine-Grained Power Gating Using an MRAM-CMOS Non-Volatile Flip-Flop." Micromachines 10, no. 6 (June 20, 2019): 411. http://dx.doi.org/10.3390/mi10060411.
Xu, Daiguo, Shiliu Xu, and Yuxin Wang. "Improved self‐blocking flip‐flop design." Electronics Letters 52, no. 14 (July 2016): 1207–9. http://dx.doi.org/10.1049/el.2016.0836.
Kanjamala, A. P., and A. F. J. Levi. "Wavelength selective electro-optic flip-flop." Electronics Letters 34, no. 3 (1998): 299. http://dx.doi.org/10.1049/el:19980224.
Arunabala, Dr C., A. Lohithakshi, D. Jyothsna, CH Pranathi, and A. Navaneetha. "Design of Low Power and High-Speed Cmos D Flipflop using Supply Voltage Level (SVL) Methods." International Journal of Innovative Technology and Exploring Engineering 11, no. 5 (April 30, 2022): 32–36. http://dx.doi.org/10.35940/ijitee.e9850.0411522.
Koshak, Essam, Afzel Noore, and Rita Lovassy. "Intelligent reconfigurable universal fuzzy flip-flop." IEICE Electronics Express 7, no. 15 (2010): 1119–24. http://dx.doi.org/10.1587/elex.7.1119.
Monga, Kanika, Nitin Chaturvedi, and S. Gurunarayanan. "Energy-efficient data retention in D flip-flops using STT-MTJ." Circuit World 46, no. 4 (June 20, 2020): 229–41. http://dx.doi.org/10.1108/cw-09-2018-0073.
Saf’yannikov, N. M., and P. N. Bondarenko. "Flip-flop device with state actuation." Russian Microelectronics 38, no. 3 (May 2009): 219–22. http://dx.doi.org/10.1134/s1063739709030093.
Ashis Kumar Mandal. "All-optical Frequency Divider using TOAD based D-Flip-Flop." January 2021 7, no. 01 (January 29, 2021): 152–57. http://dx.doi.org/10.46501/ijmtst070133.
HU, YINGBO, and RUNDE ZHOU. "LOW CLOCK-SWING TSPC FLIP-FLOPS FOR LOW-POWER APPLICATIONS." Journal of Circuits, Systems and Computers 18, no. 01 (February 2009): 121–31. http://dx.doi.org/10.1142/s0218126609004971.
MONTEIRO, JOSÉ, SRINIVAS DEVADAS, and ABHIJIT GHOSH. "RETIMING SEQUENTIAL CIRCUITS FOR LOW POWER." International Journal of High Speed Electronics and Systems 07, no. 02 (June 1996): 323–40. http://dx.doi.org/10.1142/s0129156496000141.
Jin-Woo Han, Jae-Hyuk Ahn, and Yang-Kyu Choi. "FinFACT—Fin Flip-Flop Actuated Channel Transistor." IEEE Electron Device Letters 31, no. 7 (July 2010): 764–66. http://dx.doi.org/10.1109/led.2010.2048093.
Bhattacharjee, Pritam, and Alak Majumder. "A Variation-Aware Robust Gated Flip-Flop for Power-Constrained FSM Application." Journal of Circuits, Systems and Computers 28, no. 07 (June 27, 2019): 1950108. http://dx.doi.org/10.1142/s0218126619501081.
Zhao, Xianghong, Longhua Ma, Hongye Su, Jieyu Zhao, and Weiming Cai. "High-Performance Current-Mode Logic Ternary D Flip-Flop Based on Bipolar Complementary Metal Oxide Semiconductor." Journal of Nanoelectronics and Optoelectronics 16, no. 4 (April 1, 2021): 528–33. http://dx.doi.org/10.1166/jno.2021.2976.
Kaplan, A. M., G. P. Agrawal, and D. N. Maywar. "All-optical flip-flop operation of VCSOA." Electronics Letters 45, no. 2 (2009): 127. http://dx.doi.org/10.1049/el:20093124.
Lakys, Y., W. Zhao, J. O. Klein, and C. Chappert. "Low power, high reliability magnetic flip-flop." Electronics Letters 46, no. 22 (2010): 1493. http://dx.doi.org/10.1049/el.2010.2039.
Jian Zhou, Jin Liu, and Dian Zhou. "Reduced setup time static D flip-flop." Electronics Letters 37, no. 5 (2001): 279. http://dx.doi.org/10.1049/el:20010197.
Han, Seon-Ho, Yong-Sik Youn, Cheon-Soo Kim, Hyun-Ku Yu, and Mun-Yang Park. "Prescaler using complementary clocking dynamic flip-flop." Electronics Letters 39, no. 9 (2003): 709. http://dx.doi.org/10.1049/el:20030478.
Kulkarni, G., V. Naware, and M. Govindarajan. "Burst error generator using flip-flop metastability." Electronics Letters 35, no. 2 (1999): 108. http://dx.doi.org/10.1049/el:19990108.
ELGAMEL, M. A. "Noise Metrics in Flip-Flop Designs." IEICE Transactions on Information and Systems E88-D, no. 7 (July 1, 2005): 1501–5. http://dx.doi.org/10.1093/ietisy/e88-d.7.1501.
Wu, Shi De, Jin Feng Yang, and Ze Yu Ma. "A New Regulated Power Supply Design." Applied Mechanics and Materials 380-384 (August 2013): 3031–34. http://dx.doi.org/10.4028/www.scientific.net/amm.380-384.3031.
Natori, K. "Sensitivity of dynamic MOS flip-flop sense amplifiers." IEEE Transactions on Electron Devices 33, no. 4 (April 1986): 482–88. http://dx.doi.org/10.1109/t-ed.1986.22516.
Shaw, D. I., J. C. Bennett, and A. M. Clements. "Analysis of ‘D type’ flip-flop frequency changers." Electronics Letters 26, no. 24 (1990): 1995. http://dx.doi.org/10.1049/el:19901290.
Cisneros-Sinencio, Luis F., Alejandro Diaz-Sanchez, and Jaime Ramirez-Angulo. "FGMOS flip-flop for low-power signal processing." International Journal of Electronics 100, no. 12 (December 2013): 1683–89. http://dx.doi.org/10.1080/21681724.2013.766994.
Lee, M. "Design of CMOS constant switching current flip-flop." Electronics Letters 47, no. 16 (2011): 909. http://dx.doi.org/10.1049/el.2011.0502.
Wu, X., and J. Wei. "CMOS edge-triggered flip-flop using one latch." Electronics Letters 34, no. 16 (1998): 1581. http://dx.doi.org/10.1049/el:19981095.
Haomin, Wu, and Zhuang Nan. "Research into ternary edge-triggered JKL flip-flop." Journal of Electronics (China) 8, no. 3 (July 1991): 268–75. http://dx.doi.org/10.1007/bf02778378.
Namba, Kazuteru, Takashi Katagiri, and Hideo Ito. "Timing-Error-Detecting Dual-Edge-Triggered Flip-Flop." Journal of Electronic Testing 29, no. 4 (July 19, 2013): 545–54. http://dx.doi.org/10.1007/s10836-013-5392-x.
Weizhong Wang and Haiyan Gong. "Sense amplifier based RADHARD flip flop design." IEEE Transactions on Nuclear Science 51, no. 6 (December 2004): 3811–15. http://dx.doi.org/10.1109/tns.2004.839149.