Academic literature on the topic '3-Level Buck Converter'

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Journal articles on the topic "3-Level Buck Converter"

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Elgammal, Adel, and Curtis Boodoo. "Optimal Sliding Mode Control of Permanent Magnet Direct Drive Linear Generator for Grid-Connected Wave Energy Conversion." European Journal of Engineering and Technology Research 6, no. 2 (2021): 50–57. http://dx.doi.org/10.24018/ejers.2021.6.2.2362.

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the key goal of this article is on the design and optimum sliding mode control for Grid-Connected direct drive extraction method of ocean wave energy by Multi-Objective Particle Swarm Optimization (MOPSO). A Linear Permanent Magnet Generator simulates the ocean wave energy extraction system, driven by an Archimedes Wave Swing. Uncontrolled three-phase rectifiers, a three-level buck-boost converter and 3 level neutral point clamped inverter are planned grid integration of Wave Energy Conversion device. The technique monitors the three-level buck-boost converter service cycle linked to the PMLG output terminals and decides the optimum switching sequence of 3 level neutral point clamped inverter to enable the grid relation. Simulations using Matlab/Simulink were carried out to test working of the wave energy converter after the suggested optimal control method was applied under various operating settings. Various simulation test results indicate that the proposed optimum control system is tested in both normal and irregular ocean waves. And it has been shown that the control method of the MOPSO sliding mode is ideal for maximizing energy transfer efficiency. Better voltage management at the DC-link and for achieving greater controllability spectrum was accomplished by the proposed Duty-ratio optimal control system.
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Abdelhamid, Eslam, Giovanni Bonanno, Luca Corradini, Paolo Mattavelli, and Matteo Agostinelli. "Stability Properties of the 3-Level Flying Capacitor Buck Converter Under Peak or Valley Current Programmed Control." IEEE Transactions on Power Electronics 34, no. 8 (2019): 8031–44. http://dx.doi.org/10.1109/tpel.2018.2877943.

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Nagaraj, S., R. Ranihemamalini, and L. Rajaji. "Design and analysis of controllers for high voltage gain DC-DC converter for PV panel." International Journal of Power Electronics and Drive Systems (IJPEDS) 11, no. 2 (2020): 594. http://dx.doi.org/10.11591/ijpeds.v11.i2.pp594-604.

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Bidirectional high gain DC-DC buck boost converter is a virtual interface among PV source and inverter fed motor drive. In this article, a PV panel integrating a non-isolated bidirectional DC/DC converter that has high voltage gain voltage and a 3 phase three level DC/AC inverter is projected. It highlights the comparison between proportional integral controller (PIC), fractional order proportional integral derivative Controller (FOPIDC) and fuzzy logic controller (FLC) based Bidirectional DC/DC Power Converter System (BDDPCS). The design, model and simulation using SIMULINK of open loop BDDPCS and closed loop PIC, FOPIDC and FLC based BDDPCS are done and the results are discussed. The findings indicate higher performance for FLC based control of BDDPCS. The proposed BDDPCS has merits such as bidirectional power transferability, lesser hardware count with enhanced dynamic response. The hardware of BDDPCS is tested and the experiment result is compared in association with simulation results.
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Hariyawan, Mohammad Yanuar, Risanuri Hidayat, and Eka Firmansyah. "The Effects of Spread-Spectrum Techniques in Mitigating Conducted EMI to LED Luminance." International Journal of Electrical and Computer Engineering (IJECE) 6, no. 3 (2016): 1332. http://dx.doi.org/10.11591/ijece.v6i3.9528.

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Rapid voltage and current changes in recently ubiquitous LED driver have a potency to interfere other devices. Solutions with special converter design, component design, EMI filter, and spread-spectrum techniques have been proposed. Due to cost-size-weight constraints, spread-spectrum technique seems a potential candidate in alleviating EMI problem in LED application. In this paper, the effectiveness of conducted EMI suppression performance of the spread-spectrum technique is evaluated. Spread-spectrum techniques applied by giving disturbance to the system LED driver with 3 profile signals, filtered square, triangular, and sine disturbance signal to the switching pattern of a buck LED driver. From the test results, 472.5 kHz triangular and 525 kHz sine signal can reduce EMI about 42 dBuV while<br />the filtered square signal can reduce EMI 40.70 dBuV compare with fundamental constantfrequency reference 669 kHz. The average reduction in the power level of the third signal in<br />the frequency range of 199 kHz to 925 kHz for 5.154281 dBuV and the filtered square signal can reduce the average power level better than other signal disturbance of 5.852618 dBuV.<br />LED luminance decrease when the spread-spectrum technique is applied to the system about 2814 lux.
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Hariyawan, Mohammad Yanuar, Risanuri Hidayat, and Eka Firmansyah. "The Effects of Spread-Spectrum Techniques in Mitigating Conducted EMI to LED Luminance." International Journal of Electrical and Computer Engineering (IJECE) 6, no. 3 (2016): 1332. http://dx.doi.org/10.11591/ijece.v6i3.pp1332-1343.

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Rapid voltage and current changes in recently ubiquitous LED driver have a potency to interfere other devices. Solutions with special converter design, component design, EMI filter, and spread-spectrum techniques have been proposed. Due to cost-size-weight constraints, spread-spectrum technique seems a potential candidate in alleviating EMI problem in LED application. In this paper, the effectiveness of conducted EMI suppression performance of the spread-spectrum technique is evaluated. Spread-spectrum techniques applied by giving disturbance to the system LED driver with 3 profile signals, filtered square, triangular, and sine disturbance signal to the switching pattern of a buck LED driver. From the test results, 472.5 kHz triangular and 525 kHz sine signal can reduce EMI about 42 dBuV while<br />the filtered square signal can reduce EMI 40.70 dBuV compare with fundamental constantfrequency reference 669 kHz. The average reduction in the power level of the third signal in<br />the frequency range of 199 kHz to 925 kHz for 5.154281 dBuV and the filtered square signal can reduce the average power level better than other signal disturbance of 5.852618 dBuV.<br />LED luminance decrease when the spread-spectrum technique is applied to the system about 2814 lux.
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Liu, Xun, Philip K. T. Mok, Junmin Jiang, and Wing-Hung Ki. "Analysis and Design Considerations of Integrated 3-Level Buck Converters." IEEE Transactions on Circuits and Systems I: Regular Papers 63, no. 5 (2016): 671–82. http://dx.doi.org/10.1109/tcsi.2016.2556098.

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Yousef, Eyad Yousef Ibrahim, and Paulo César Vargas Luz. "Redução da capacitância de barramento em driver para alimentação de LEDS." Ciência e Natura 42 (February 7, 2020): 49. http://dx.doi.org/10.5902/2179460x40623.

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This paper presents the performance evaluation of control techniques for the reduction of capacitors in drivers for actuation LED.Through the active control of the driver output current, the ripple from the PFC stage of the current can be controlled, keeping itat levels appropriate to the technical standards, being IEC 61000-3-2 Class C and IEEE 1789. This control allows the outputvoltage ripple to vary at higher amplitude levels, allowing the use of a lower capacitance bus capacitor, therefore longer life usefuland reliability.The analyzed electronic system consists of the Buck-Boost converter was performed at the power control stagefor different bus voltages and output power. Different controller structures were analizes, in order to obtain an analysis of theinfluence of these controllers in the reduction of bus capacitance. Thus obtaining a greater ripple in the bus voltage, maintainingagreement with IEEE 1789 standard regarding current ripple limits on LEDs.
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Zuo, Liang, S. K. Islam, M. A. Huque, C. Su, B. J. Blalock, and L. M. Tolbert. "A Universal BCD-on-SOI Based High Temperature Short Circuit Protection for SiC Power Switches." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2010, HITEC (2010): 000349–54. http://dx.doi.org/10.4071/hitec-lzuo-tha15.

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In recent years, the rapid increase in the market for hybrid electric vehicles has generated great demand for low-cost, high-volume, high-temperature power converters that can work in harsh environment (temperature ≥ 150°C) conditions. Most of the commercially available power semiconductor devices and associated control electronics are rated for maximum of 85°C ambient temperature. Under this circumstance, wide bandgap (WBG) semiconductors have become a better alternative due to their ability to operate at much higher temperatures (≥500°C) than conventional bulk silicon based devices. As with any other power devices, SiC switches also require fault detection and protection mechanisms for their reliable application to real systems. One severe fault situation is the short circuit at the load end, which can cause very high surge currents that flow through the power switches. Quick detection and removal of the short circuit fault current by external circuitry is required to protect the power switch as well as the power converter module. This work presents a high-temperature (≥200°C), high-voltage short circuit protection (SCP) for SiC power devices. The circuit is designed using a resistor sensing method to provide protections for both “normally ON” and “normally OFF” SiC FET switches. A rail-to-rail input comparator is employed to ensure that the circuit operates under different power supply levels. The prototype circuit is implemented using a 0.8-micron, 2-poly, and 3-metal BCD-on-SOI process. The die size for the protection circuit is 0.52 mm2 (845 μm × 612 μm). The circuit has been successfully tested up to 200°C ambient temperature under power supplies ranging from 10 V to 30 V without any heat sink or cooling mechanism.
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Andzs, Martins, Ramunas Tupciauskas, Andris Veveris, and Janis Gravitis. "Impact of wood fraction, moisture and steam explosion on the development of an innovative insulation material." Environment. Technology. Resources. Proceedings of the International Scientific and Practical Conference 1 (June 16, 2015): 11. http://dx.doi.org/10.17770/etr2015vol1.210.

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<p class="R-AbstractKeywords"><span lang="EN-GB">The study shows development of an innovative bulk heat insulation material from grey alder (<em>Alnus incana</em> L. Moench) chips and birch (<em>Betula pendula, Betula verrucosa</em>) flakes as residues of plywood production. The research is actual for the plywood production companies and for producers that process grey alder chips to make an innovative products with high added value. Chips and flakes eco-efficient converted to fibrous mass by steam explosion (SE) technology at temperatures (T) of 200 to 235 °C and time interval of 0 to 5 min. Application of SE technology to obtain fibrous insulating material is in the news at a global level and has not been studied previously. The bulk density of raw and SE materials determined using standardised method specified in LVS EN 15103: 2010. The bulk density of SE materials studied depending on the raw material fraction and moisture as well as depending on the SE conditions. The lowest bulk density (53 kg m<sup>-3</sup>) achieved SE material of grey alder chips with 12% of raw moisture processed at T 235 °C for 1 min. This is the optimal result, which reveals the industrial competitiveness of bulk heat insulation materials and indicate the justification for the further examination.</span></p>
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Lin, Xiaobo, Lina Ma, Chaya Gopalan, and Richard E. Ostlund. "d-chiro-Inositol is absorbed but not synthesised in rodents." British Journal of Nutrition 102, no. 10 (2009): 1426–34. http://dx.doi.org/10.1017/s0007114509990456.

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d-chiro-inositol (DCI) and pinitol (1d-3-O-methyl-chiro-inositol) are distinctive inositols reported to possess insulin-mimetic properties. DCI-containing compounds are abundant in common laboratory animal feed. By GC–MS of 6 m-HCl hydrolysates, Purina Laboratory Rodent Diet 5001 (diet 5001) contained 0·23 % total DCI by weight with most found in the lucerne and soya meal components. In contrast, only traces of l-chiro-inositol were observed. The DCI moiety was present in a water-soluble non-ionic form of which most was shown to be pinitol. To measure the absorption of dietary inositols, rats were fed diet 5001 in a balance study or given purified pinitol or [2H6]DCI. More than 98 % of the total DCI fed to rats as diet 5001, purified pinitol or [2H6]DCI was absorbed from the gastrointestinal tract. Rats chronically on diet 5001 consumed 921 μmol total DCI/kg body weight per d but excreted less than 5·3 % in the stools and urine, suggesting that the bulk was metabolised. The levels of pinitol or DCI in plasma, stools or urine remained relatively stable in mice fed Purina PicoLab® Rodent Diet 20 5053 over a 5-week period, whereas these values declined to very low levels in mice fed a pinitol/DCI-deficient chemically defined diet. To test whether DCI was synthesised or converted from myo-inositol, mice were treated with heavy water or [2H6]myo-inositol. DCI was neither synthesised endogenously from 2H-labelled water nor converted from [2H6]myo-inositol. DCI and pinitol in rodents appear to be derived solely from the diet.
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Dissertations / Theses on the topic "3-Level Buck Converter"

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Cassidy, Brian Michael. "A Constant ON-Time 3-Level Buck Converter for Low Power Applications." Thesis, Virginia Tech, 2015. http://hdl.handle.net/10919/73211.

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Smart cameras operate mostly in sleep mode, which is light load for power supplies. Typical buck converter applications have low efficiency under the light load condition, primarily from their power stage and control being optimized for heavy load. The battery life of a smart camera can be extended through improvement of the light load efficiency of the buck converter. This thesis research investigated the first stage converter of a car black box to provide power to a microprocessor, camera, and several other peripherals. The input voltage of the converter is 12 V, and the output voltage is 5 V with the load range being 20 mA (100 mW) to 1000 mA (5000 mW). The primary design objective of the converter is to improve light load efficiency. A 3-level buck converter and its control scheme proposed by Reusch were adopted for the converter in this thesis. A 3-level buck converter has two more MOSFETs and one more capacitor than a synchronous buck converter. Q1 and Q2 are considered the top MOSFETs, while Q3 and Q4 are the synchronous ones. The extra capacitor is used as a second power source to supply the load, which is connected between the source of Q1 and the drain of Q2 and the source of Q3 and the drain of Q4. The methods considered to improve light load efficiency are: PFM (pulse frequency modulation) control scheme with DCM (discontinuous conduction mode) and use of Schottky diodes in lieu of the synchronous MOSFETs, Q3 and Q4. The 3-level buck converter operates in CCM for heavy load above 330 mA and DCM for light load below 330 mA. The first method uses a COT (constant on-time) valley current mode controller that has a built in inductor current zero-crossing detector. COT is used to implement PFM, while the zero-crossing detector allows for DCM. The increase in efficiency comes from reducing the switching frequency as the load decreases by minimizing switching and gate driving loss. The second method uses an external current sense amplifier and a comparator to detect when to shut down the gate drivers for Q3 and Q4. Schottky diodes in parallel with Q3 and Q4 carry the load current when the MOSFETs are off. This increases the efficiency through a reduction in switching loss, gate driving loss, and gate driver power consumption. The proposed converter is prototyped using discrete components. LTC3833 is used as the COT valley current mode controller, which is the center of the control scheme. The efficiency of the 3-level buck converter was measured and ranges from 82% to 95% at 100 mW and 5000 mW, respectively. The transient response of the converter shows no overshoot due to a 500 mA load step up or down, and the output voltage ripple is 30 mV. The majority of the loss comes from the external components, which include a D FF (D flip-flop), AND gate, OR gate, current sense chip, comparator, and four gate drivers. The proposed converter was compared to two off-the-shelf synchronous buck converters. The proposed converter has good efficiency and performance when compared to the other converters, despite the fact that the converter is realized using discrete components.<br>Master of Science
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Book chapters on the topic "3-Level Buck Converter"

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Villar Piqué, Gerard, and Eduard Alarcón. "3-Level Buck Converter Microelectronic Implementation." In CMOS Integrated Switching Power Converters. Springer New York, 2011. http://dx.doi.org/10.1007/978-1-4419-8843-0_7.

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Villar Piqué, Gerard, and Eduard Alarcón. "3-Level Buck Converter Design Space Exploration Results." In CMOS Integrated Switching Power Converters. Springer New York, 2011. http://dx.doi.org/10.1007/978-1-4419-8843-0_6.

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Villar Piqué, Gerard, and Eduard Alarcón. "3-Level Buck Converter Analysis and Specific Components Models." In CMOS Integrated Switching Power Converters. Springer New York, 2011. http://dx.doi.org/10.1007/978-1-4419-8843-0_5.

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Conference papers on the topic "3-Level Buck Converter"

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M S, Sunita, Mayur G D, Preet Bedi, Nagesh Verma, and Shashidhar Tantry. "50 MHz 3-Level Buck Converter with added Boost Converter." In 2020 International SoC Design Conference (ISOCC). IEEE, 2020. http://dx.doi.org/10.1109/isocc50952.2020.9333088.

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Cassidy, Brian M., Dong Sam Ha, and Qiang Li. "Constant ON-time 3-level buck converter for low power applications." In 2015 IEEE Energy Conversion Congress and Exposition. IEEE, 2015. http://dx.doi.org/10.1109/ecce.2015.7309861.

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Abdulslam, Abdullah, Baker Mohammad, Mohammad Ismail, and Yehea Ismail. "A simple hybrid 3-level buck-boost DC-DC converter with efficient PWM regulation scheme." In 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS). IEEE, 2015. http://dx.doi.org/10.1109/icecs.2015.7440325.

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Kim, Kiyeong, Hwan-Woo Shim, Antonio Ciccomancini Scogna, and Dong-Sub Kim. "SMPS noise modeling and analysis in mobiles at 3-level buck converter-based fast charging mode." In 2017 Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC). IEEE, 2017. http://dx.doi.org/10.1109/apemc.2017.7975469.

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Godycki, Waclaw, Bo Sun, and Alyssa Apsel. "Part-time resonant switching for light load efficiency improvement of a 3-level fully integrated buck converter." In ESSCIRC 2014 - 40th European Solid State Circuits Conference. IEEE, 2014. http://dx.doi.org/10.1109/esscirc.2014.6942047.

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Carstensen, Christoph, and Jurgen Biela. "Novel 3 level bidirectional buck converter with wide operating range for Hardware-in-the-Loop test systems." In 2012 EPE-ECCE Europe Congress. IEEE, 2012. http://dx.doi.org/10.1109/epepemc.2012.6397271.

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Abdelhamid, Eslam, Giovanni Bonanno, Luca Corradini, Paolo Mattavelli, and Matteo Agostinelli. "Stability Properties of the 3-Level Flying Capacitor Buck Converter Under Peak or Valley Current-Programmed-Control." In 2018 IEEE 19th Workshop on Control and Modeling for Power Electronics (COMPEL). IEEE, 2018. http://dx.doi.org/10.1109/compel.2018.8460065.

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Zhuang, Zhehan, Zheng Wang, and Qian Xie. "A 92%-Efficiency Hybrid Envelope Tracking Modulator Based on 3-Level Hysteresis-Controlled Buck Converter with Capacitor Current Integration Sensor." In 2020 IEEE 3rd International Conference on Electronics Technology (ICET). IEEE, 2020. http://dx.doi.org/10.1109/icet49382.2020.9119509.

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Villar, Gerard, and Eduard Alarcon. "Monolithic integration of a 3-level DCM-operated low-floating-capacitor buck converter for DC-DC step-down donversion in standard CMOS." In 2008 IEEE Power Electronics Specialists Conference - PESC 2008. IEEE, 2008. http://dx.doi.org/10.1109/pesc.2008.4592620.

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Karasawa, Yuki, Takanobu Fukuoka, and Kousuke Miyaji. "A 92.8% Efficiency Adaptive-On/Off-Time Control 3-Level Buck Converter for Wide Conversion Ratio with Shared Charge Pump Intermediate Voltage Regulator." In 2018 IEEE Symposium on VLSI Circuits. IEEE, 2018. http://dx.doi.org/10.1109/vlsic.2018.8502403.

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