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Journal articles on the topic '40~nm'

Author: Grafiati

Published: 25 May 2024

Last updated: 31 July 2025

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1

Durkan, C., та I. V. Shvets. "40 nm resolution in reflection-mode SNOM with λ = 685 nm". Ultramicroscopy 61, № 1-4 (1995): 227–31. http://dx.doi.org/10.1016/0304-3991(95)00114-x.

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2

Pezeshki, B., M. Zelinski, H. Zhao, and V. Agrawal. "40-mW 650-nm distributed feedback lasers." IEEE Photonics Technology Letters 10, no. 1 (1998): 36–38. http://dx.doi.org/10.1109/68.651093.

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3

Ono, M., M. Saito, T. Yoshitomi, C. Fiegna, T. Ohguro, and H. Iwai. "A 40 nm gate length n-MOSFET." IEEE Transactions on Electron Devices 42, no. 10 (1995): 1822–30. http://dx.doi.org/10.1109/16.464413.

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4

Park, Chaeeun, and Munkyo Seo. "A 140 GHz Low-Noise Amplifier in 40 nm CMOS." Journal of Korean Institute of Electromagnetic Engineering and Science 33, no. 4 (2022): 312–17. http://dx.doi.org/10.5515/kjkiees.2022.33.4.312.

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5

Wandt, D., M. Laschek, K. Przyklenk, A. Tünnermann, and H. Welling. "External cavity laser diode with 40 nm continuous tuning range around 825 nm." Optics Communications 130, no. 1-3 (1996): 81–84. http://dx.doi.org/10.1016/0030-4018(96)00171-x.

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6

Zaghib, Karim, Alain Mauger, Monika Kopec, Francois Gendron, and C. M. Julien. "Intrinsic Properties of 40 nm-sized LiFePO4 Particles." ECS Transactions 16, no. 42 (2019): 31–41. http://dx.doi.org/10.1149/1.3112726.

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7

Appenzeller, J., R. Martel, Ph Avouris, et al. "Sub-40 nm SOI V-groove n-MOSFETs." IEEE Electron Device Letters 23, no. 2 (2002): 100–102. http://dx.doi.org/10.1109/55.981319.

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8

Homulle, Harald, Fabio Sebastiano, and Edoardo Charbon. "Deep-Cryogenic Voltage References in 40-nm CMOS." IEEE Solid-State Circuits Letters 1, no. 5 (2018): 110–13. http://dx.doi.org/10.1109/lssc.2018.2875821.

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9

Hofmann, W., M. Müller, P. Wolf, et al. "40 Gbit/s modulation of 1550 nm VCSEL." Electronics Letters 47, no. 4 (2011): 270. http://dx.doi.org/10.1049/el.2010.3631.

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10

Takeuchi, Issei, Yosuke Shimamura, Yuki Kakami, et al. "Transdermal delivery of 40-nm silk fibroin nanoparticles." Colloids and Surfaces B: Biointerfaces 175 (March 2019): 564–68. http://dx.doi.org/10.1016/j.colsurfb.2018.12.012.

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11

Xing, Lilin, Jingbo Zhang, and Munkyo Seo. "D-Band Low-Noise Differential Amplifier in a 40-nm CMOS." Journal of Korean Institute of Electromagnetic Engineering and Science 35, no. 4 (2024): 303–10. http://dx.doi.org/10.5515/kjkiees.2024.35.4.303.

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12

Durán, Vicente, Peter A. Andrekson, and Víctor Torres-Company. "Electro-optic dual-comb interferometry over 40 nm bandwidth." Optics Letters 41, no. 18 (2016): 4190. http://dx.doi.org/10.1364/ol.41.004190.

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13

Gutierrez, Eric, Carlos Perez, Luis Hernandez, et al. "A Pulse Frequency Modulation VCO-ADC in 40 nm." IEEE Transactions on Circuits and Systems II: Express Briefs 66, no. 1 (2019): 51–55. http://dx.doi.org/10.1109/tcsii.2018.2837757.

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14

Liu, Yibo, Luhong Mao, and Baoyong Chi. "185–220 GHz wideband amplifier in 40 nm CMOS." Electronics Letters 54, no. 13 (2018): 802–4. http://dx.doi.org/10.1049/el.2018.1135.

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15

Zhao, Dixian, Shailesh Kulkarni, and Patrick Reynaert. "A 60-GHz Outphasing Transmitter in 40-nm CMOS." IEEE Journal of Solid-State Circuits 47, no. 12 (2012): 3172–83. http://dx.doi.org/10.1109/jssc.2012.2216692.

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16

Atef, Mohamed, Andreas Polzer, and Horst Zimmermann. "Avalanche Double Photodiode in 40-nm Standard CMOS Technology." IEEE Journal of Quantum Electronics 49, no. 3 (2013): 350–56. http://dx.doi.org/10.1109/jqe.2013.2246546.

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17

Cong, Jia, Dong Yan, Jiling Tang, Weilian Guo, and Xurui Mao. "Integrated Color Photodetectors in 40-nm Standard CMOS Technology." IEEE Photonics Technology Letters 31, no. 24 (2019): 1979–82. http://dx.doi.org/10.1109/lpt.2019.2952204.

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18

Suteewong, Teeraporn, Kai Ma, Jennifer E. Drews, et al. "Highly fluorescent sub 40-nm aminated mesoporous silica nanoparticles." Journal of Sol-Gel Science and Technology 74, no. 1 (2014): 32–38. http://dx.doi.org/10.1007/s10971-014-3567-2.

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19

Kakami, Yuki, Issei Takeuchi, and Kimiko Makino. "Percutaneous immunization with 40-nm antigen-encapsulated elastic liposomes." Colloids and Surfaces A: Physicochemical and Engineering Aspects 566 (April 2019): 128–33. http://dx.doi.org/10.1016/j.colsurfa.2019.01.023.

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20

Mansur, Dan. "A New 40-nm FPGA and ASIC Common Platform." IEEE Micro 29, no. 2 (2009): 46–53. http://dx.doi.org/10.1109/mm.2009.22.

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21

Ochiai, Y., S. Manako, S. Samukawa, K. Takeuchi, and T. Yamamoto. "Accurate nano-EB lithography for 40-nm gate MOSFETs." Microelectronic Engineering 30, no. 1-4 (1996): 415–18. http://dx.doi.org/10.1016/0167-9317(95)00276-6.

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22

Martinez-Lopez, A. G., A. Cerdeira, J. C. Tinoco, et al. "RF modeling of 40-nm SOI triple-gate FinFET." International Journal of Numerical Modelling: Electronic Networks, Devices and Fields 28, no. 4 (2014): 465–78. http://dx.doi.org/10.1002/jnm.2028.

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23

Coelho, M. F., M. A. Rivas, E. M. Nogueira, and T. P. Iglesias. "Permittivity of (40 nm and 80 nm) alumina nanofluids in ethylene glycol at different temperatures." Journal of Chemical Thermodynamics 158 (July 2021): 106423. http://dx.doi.org/10.1016/j.jct.2021.106423.

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24

Usami, Yoshihisa, Tetsuya Watanabe, Yoshinori Kanazawa, Kazuaki Taga, Hiroshi Kawai, and Kimio Ichikawa. "405 nm Laser Thermal Lithography of 40 nm Pattern Using Super Resolution Organic Resist Material." Applied Physics Express 2, no. 12 (2009): 126502. http://dx.doi.org/10.1143/apex.2.126502.

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25

Goldstein, John C., Brian D. McVey, and C. James Elliott. "Conceptual designs of a 50 nm FEL oscillator and a 20–40 nm SASE amplifier." Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 272, no. 1-2 (1988): 177–82. http://dx.doi.org/10.1016/0168-9002(88)90219-7.

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26

Tang, Ming, Xiaolong Tian, Xiaona Lu, et al. "Single-frequency 1060 nm semiconductor-optical-amplifier-based fiber laser with 40 nm tuning range." Optics Letters 34, no. 14 (2009): 2204. http://dx.doi.org/10.1364/ol.34.002204.

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27

Kim, Jaegwan, Changjung Lee, and Munkyo Seo. "A 130-GHz Low-Area Power Amplifier in 40-nm CMOS." Journal of Korean Institute of Electromagnetic Engineering and Science 34, no. 4 (2023): 310–16. http://dx.doi.org/10.5515/kjkiees.2022.34.4.310.

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28

Kim, Jaegwan, Changjung Lee, and Munkyo Seo. "A 130-GHz Low-Area Power Amplifier in 40-nm CMOS." Journal of Korean Institute of Electromagnetic Engineering and Science 34, no. 4 (2023): 310–16. http://dx.doi.org/10.5515/kjkiees.2023.34.4.310.

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29

Shuangyi Yan, 延双毅, 张建国 Jianguo Zhang, and 赵卫 Wei Zhao. "40-GHz wavelength tunable mode-locked SOA-based fiber laser with 40-nm tuning range." Chinese Optics Letters 6, no. 9 (2008): 676–78. http://dx.doi.org/10.3788/col20080609.0676.

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30

Tanaka, Hiroaki, Yasuyuki Miyamoto, Toshihiko Otake, Jiroo Yoshinaga, and Kazuhito Furuya. "Electrical Properties of 100 nm Pitch Cr/Au Fine Electrodes with 40 nm Width on GaInAs." Japanese Journal of Applied Physics 35, Part 2, No. 8A (1996): L964—L967. http://dx.doi.org/10.1143/jjap.35.l964.

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31

Zhao Junfa, 赵军发, 杨秀峰 Yang Xiufeng, 刘卓琳 Liu Zhuolin, 童峥嵘 Tong Zhengrong, 刘艳格 Liu Yange, and 赵启大 Zhao Qida. "Multiwavelength Brillouin/Erbium Fiber Source with 40 nm Tuning Range." Chinese Journal of Lasers 37, no. 10 (2010): 2482–86. http://dx.doi.org/10.3788/cjl20103710.2482.

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32

Melul, Franck, Vincenzo Della Marca, Marc Bocquet, et al. "Morphology and reliability aspects of 40 nm eSTM™ architecture." Microelectronics Reliability 126 (November 2021): 114266. http://dx.doi.org/10.1016/j.microrel.2021.114266.

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33

Sialm, G., C. Kromer, T. Morf, F. Ellinger, and H. Jäckel. "40 Gbit∕s limiting output buffer in 80 nm CMOS." Electronics Letters 41, no. 19 (2005): 1051. http://dx.doi.org/10.1049/el:20052172.

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34

Lee, K. J., R. LaComb, B. Britton, et al. "Silicon-Layer Guided-Mode Resonance Polarizer With 40-nm Bandwidth." IEEE Photonics Technology Letters 20, no. 22 (2008): 1857–59. http://dx.doi.org/10.1109/lpt.2008.2004777.

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35

Shin, Jinuk Luke, Dawei Huang, Bruce Petrick, et al. "A 40 nm 16-Core 128-Thread SPARC SoC Processor." IEEE Journal of Solid-State Circuits 46, no. 1 (2011): 131–44. http://dx.doi.org/10.1109/jssc.2010.2080491.

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36

Ko, Chun-Lin, Chun-Hsing Li, Chien-Nan Kuo, Ming-Ching Kuo, and Da-Chiang Chang. "A 210-GHz Amplifier in 40-nm Digital CMOS Technology." IEEE Transactions on Microwave Theory and Techniques 61, no. 6 (2013): 2438–46. http://dx.doi.org/10.1109/tmtt.2013.2260767.

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37

Aiello, Orazio, Paolo Crovetti, and Massimo Alioto. "Standard Cell-Based Ultra-Compact DACs in 40-nm CMOS." IEEE Access 7 (2019): 126479–88. http://dx.doi.org/10.1109/access.2019.2938737.

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38

Martín-González, M., A. L. Prieto, R. Gronsky, T. Sands, and A. M. Stacy. "High-Density 40 nm Diameter Sb-Rich Bi2xSbxTe3 Nanowire Arrays." Advanced Materials 15, no. 12 (2003): 1003–6. http://dx.doi.org/10.1002/adma.200304781.

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39

Hwang, JoonHo, and Munkyo Seo. "A 106~133 GHz Wideband Power Amplifier in 40-nm CMOS Process." Journal of Korean Institute of Electromagnetic Engineering and Science 35, no. 11 (2024): 880–87. https://doi.org/10.5515/kjkiees.2024.35.11.880.

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40

Park, Kangwoo, and Munkyo Seo. "A 64/144 GHz Dual-Band Amplifier in 40-nm CMOS Technology." Journal of Korean Institute of Electromagnetic Engineering and Science 36, no. 5 (2025): 436–44. https://doi.org/10.5515/kjkiees.2025.36.5.436.

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41

Zhang, Sheng, Ke Wei, Xiao-Hua Ma, et al. "Reduced reverse gate leakage current for GaN HEMTs with 3 nm Al/40 nm SiN passivation layer." Applied Physics Letters 114, no. 1 (2019): 013503. http://dx.doi.org/10.1063/1.5077050.

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42

Wang, Weihuai, Hao Jin, Shurong Dong, Lei Zhong, and Yan Han. "Study of drain-extended NMOS under electrostatic discharge stress in 28 nm and 40 nm CMOS process." Solid-State Electronics 116 (February 2016): 80–87. http://dx.doi.org/10.1016/j.sse.2015.11.033.

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43

Choi, Ye-Ji, Seuk-Won Kang, Kyu-Jin Choi, and Byung-Sung Kim. "Ka-Band Power Amplifier Design for Radar Transmitter Using 40-nm CMOS Process." Journal of Korean Institute of Electromagnetic Engineering and Science 35, no. 4 (2024): 347–50. http://dx.doi.org/10.5515/kjkiees.2024.35.4.347.

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44

Xiong, Xu, Xuecheng Du, Bo Zheng, et al. "Soft Error Sensitivity Analysis Based on 40 nm SRAM-Based FPGA." Electronics 11, no. 23 (2022): 3844. http://dx.doi.org/10.3390/electronics11233844.

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Soft errors induced by radiation are the major reliability threat for SRAM-based field-programmable gate arrays (FPGAs). A more detailed analysis of the soft error sensitivity of the 40 nm SRAM-based FPGA was performed. Experimental methods for the configurable logic module, configure memory cells, and block RAM have been introduced for measuring the single event effects (SEEs) induced by alpha particles using a 241Am radiation source. The single event upset (SEU) and single event functional interrupt (SEFI) cross sections of different functional blocks have been calculated to discuss the fail

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45

Ojeda-Rojas, Oscar A., Angela Maria M. Gonella-Diaza, Gustavo L. Sartorello, and Augusto H. Hauber Gameiro. "PSVIII-11 Agent-based simulation model to evaluate the economic performance of reproductive programs in beef cattle." Journal of Animal Science 99, Supplement_3 (2021): 428–29. http://dx.doi.org/10.1093/jas/skab235.768.

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Abstract The objective of this study was to create a stochastic, agent-based simulation model to compare the economic performance of reproductive strategies in beef cattle. The model was parameterized using data from a real herd and the scientific literature. The scenarios evaluated were: natural mating (NM) only (ONM); one timed artificial insemination (TAI) plus NM (1TAI+NM); two TAI plus NM, with 24, 32, and 40 days between TAI (2TAI/24+NM, 2TAI/32+NM, and 2TAI/40+NM, respectively); three TAI without NM, with 24, 32, and 40 days (3TAI/24, 3TAI/32, and 3TAI/40, respectively), and three TAI p

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46

Yoneda, Shinichi, Satoru Ito, Yukio Hayakawa, et al. "Newly developed process integration technologies for highly reliable 40 nm ReRAM." Japanese Journal of Applied Physics 58, SB (2019): SBBB06. http://dx.doi.org/10.7567/1347-4065/aafd8d.

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47

Zhou Hongjun, 周洪军, 王冠军 Wang Guanjun, 郑津津 Zheng Jinjin, 霍同林 Hou Tonglin, and 邱克强 Qiu Keqiang. "Suppression of HigherOrder Harmonics by Different Filter in 5~40 nm." Acta Optica Sinica 30, no. 9 (2010): 2753–56. http://dx.doi.org/10.3788/aos20103009.2753.

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48

Yoo, Seong Ho, Benjamin Y. H. Liu, James Sun, Natraj Narayanswami, and Gregory P. Thomes. "Particle Removal Efficiency Evaluation at 40 nm Using Haze Particle Standard." Solid State Phenomena 76-77 (January 2001): 259–62. http://dx.doi.org/10.4028/www.scientific.net/ssp.76-77.259.

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49

Kmon, P., R. Szczygieł, R. Kłeczek, et al. "Spectrum1k — integrated circuit for medical imaging designed in CMOS 40 nm." Journal of Instrumentation 17, no. 03 (2022): C03023. http://dx.doi.org/10.1088/1748-0221/17/03/c03023.

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Abstract We present a multichannel integrated circuit of pixel architecture designed in CMOS 40 nm technology. The chip is composed of 40 × 24 pixels of 75 µm pitch working in the single photon counting mode, each built of front-end amplifier, peak and hold detector, 6-bit analog to digital converter, and memory composed of 64 × 12-bit counters. Thanks to the proposed functionality it is possible to store in each pixel separately information of incoming particles energy spectrum. The chip is dedicated to operating with both electrons and holes of 2.2 ke−–35 ke− energy range. The IC occupies an

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50

Xu, Lei-jun, Zhi-jian Xie, Xue Bai, Qin Li, Bai-kang Wang, and Peng-cheng Yin. "Design of THz Monolithic Source and Detector in 40-nm CMOS." Journal of Infrared, Millimeter, and Terahertz Waves 42, no. 9-10 (2021): 1040–60. http://dx.doi.org/10.1007/s10762-021-00787-6.

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