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Journal articles on the topic 'Adaptive PLL'

Author: Grafiati

Published: 4 June 2021

Last updated: 14 February 2022

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1

Zhao, Lei, Lei Shi, and Congying Zhu. "New Nonlinear Second-Order Phase-Locked Loop with Adaptive Bandwidth Regulation." Electronics 7, no. 12 (2018): 346. http://dx.doi.org/10.3390/electronics7120346.

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Synchronization of large acquisition bandwidth brings great challenges to the traditional second-order phase-locked loop (PLL). To address the contradiction between acquisition bandwidth and noise suppression capability of the traditional PLL, a new second-order PLL coupled with a nonlinear element is proposed. The proposed nonlinear second-order PLL regulates the loop noise bandwidth adaptively by the nonlinear module. When a large input–output phase error occurs, this PLL reduces the frequency offset quickly by taking advantage of the large bandwidth. When the phase error is reduced by the loop control, the proposed PLL suppresses noises by using the small bandwidth to increase the tracking accuracy. Simulation results demonstrate that the tracking speed of the proposed PLL is increased considerably, and its acquisition bandwidth is increased to 18.8 kHz compared with that of the traditional second-order PLL (4 kHz).

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2

Luo, Zhibin, Jicheng Ding, and Lin Zhao. "Adaptive Gain Control Method of a Phase-Locked Loop for GNSS Carrier Signal Tracking." International Journal of Antennas and Propagation 2018 (2018): 1–14. http://dx.doi.org/10.1155/2018/6841285.

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The global navigation satellite system (GNSS) has been widely used in both military and civil fields. This study focuses on enhancing the carrier tracking ability of the phase-locked loop (PLL) in GNSS receivers for high-dynamic application. The PLL is a very popular and practical approach for tracking the GNSS carrier signal which propagates in the form of electromagnetic wave. However, a PLL with constant coefficient would be suboptimal. Adaptive loop noise bandwidth techniques proposed by previous researches can improve PLL tracking behavior to some extent. This paper presents a novel PLL with an adaptive loop gain control filter (AGCF-PLL) that can provide an alternative. The mathematical model based on second- and third-order PLL was derived. The error characteristics of the AGCF-PLL were also derived and analyzed under different signal conditions, which mainly refers to the different combinations of carrier phase dynamic and signal strength. Based on error characteristic curves, the optimal loop gain control method has been achieved to minimize tracking error. Finally, the completely adaptive loop gain control algorithm was designed. Comparable test results and analysis using the new method, conventional PLL, FLL-assisted PLL, and FAB-LL demonstrate that the AGCF-PLL has stronger adaptability to high target movement dynamic.

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3

Kubo, Hiroshi, and Ikuo Iizuka. "An adaptive phase-control digital pll." Electronics and Communications in Japan (Part I: Communications) 73, no. 12 (1990): 21–31. http://dx.doi.org/10.1002/ecja.4410731203.

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4

Kathiresan, Aravind Chellachi, Jeyaraj PandiaRajan, Asokan Sivaprakash, Thanikanti Sudhakar Babu, and Md Rabiul Islam. "An Adaptive Feed-Forward Phase Locked Loop for Grid Synchronization of Renewable Energy Systems under Wide Frequency Deviations." Sustainability 12, no. 17 (2020): 7048. http://dx.doi.org/10.3390/su12177048.

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Synchronization is a crucial problem in the grid-connected inverter’s control and operation. A phase-locked loop (PLL) is a typical grid synchronization strategy, which ought to have a high resistance to power system uncertainties since its sensitivity influences the generated reference signal. The traditional PLL catches the phase and frequency of the input signal via the feedback loop filter (LF). In general, to enhance the steady-state capability during distorted grid conditions generally, a filter tuned for nominal frequency is used. This PLL corrects large frequency deviations around the nominal frequency, which increases the PLL’s locking time. Therefore, this paper presents an adaptive feed-forward PLL, where the input signal frequency and phase under large frequency deviations are tracked precisely, which overcomes the above-mentioned limitations. The proposed adaptive PLL consists of a feedback loop that reduces the phase error. The feed-forward loop predicts the frequency and phase error, and the frequency adaptive FIR filter reduces the ripples in output, which is due to input distortions. The adaptive mechanism adjusts the gain of the filter in accordance with the supply frequency. This reduces the phase and frequency error and also decreases the locking time under wide frequency deviations. To verify the effectiveness of the proposed adaptive feed-forward PLL, the system was tested under different grid abnormal conditions. Further, the stability analysis has been carried out via a developed prototype test platform in the laboratory. To bring the proposed simulations into real-time implementations and for control strategies, an Altera Cyclone II field-programmable gate array (FPGA) board has been used. The obtained results of the proposed PLL via simulations and hardware are compared with conventional techniques, and it indicates the superiority of the proposed method. The proposed PLL effectively able to tackle the different grid uncertainties, which can be observed from the results presented in the result section.

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5

Hamood, Mostafa A., Ognjen Marjanovic, and Joaquin Carrasco. "Adaptive Impedance-Conditioned Phase-Locked Loop for the VSC Converter Connected to Weak Grid." Energies 14, no. 19 (2021): 6040. http://dx.doi.org/10.3390/en14196040.

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In this paper, an adaptive version of the impedance-conditioned phase-locked loop (IC-PLL), namely the adaptive IC-PLL (AIC-PLL), is proposed. The IC-PLL has recently been proposed to address the issue of synchronisation with a weak AC grid by supplementing the conventional synchronous reference frame phase-locked loop (SRF-PLL) with an additional virtual impedance term. The resulting IC-PLL aims to synchronise the converter to a remote and stronger point in the grid, hence increasing the upper bound on the achievable power transfer achieved by the VSC converter connected to the weak grid. However, the issue of the variable grid strength imposes another challenge in the operation of the IC-PLL. This is because the IC-PLL requires impedance estimation methods to estimate the value of the virtual impedance part. In AIC-PLL, the virtual impedance part is estimated by appending another dynamic loop in the exciting IC-PLL. In this method, an additional closed loop is involved so that the values of the virtual inductance and resistance are internally estimated and adapted. Hence, the VSC converter becomes effectively viable for the case of the grid strength variable, where the estimation of the grid impedance becomes unnecessary. The results show that the converter that relies on AIC-PLL has the ability to transfer power that is approximately equal to the theoretical maximum power while maintaining satisfactory dynamic performance.

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6

Yu, Linxin, and Dazhi Wang. "A Hybrid Filtering Stage-Based Rotor Position Estimation Method of PMSM with Adaptive Parameter." Sensors 21, no. 14 (2021): 4667. http://dx.doi.org/10.3390/s21144667.

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The performance of sensorless control in a permanent magnet synchronous machine (PMSM) highly depends on the accuracy of rotor position estimation. Owing to its strong robustness, phase-locked loop (PLL) is widely used in rotor position estimation. However, due to the influence of harmonics existing in back electromotive force (EMF), estimation error occurs by using PLL. In this paper, a hybrid filtering stage-based PLL is proposed to improve the rotor position estimation. Adaptive notch filters and moving average filters are integrated together to eliminate harmonic EMF. To make the method effective under varying speed conditions, adaptive parameters design guidelines are provided, considering dynamic performance under a wide operating range. The proposed method can accurately detect rotor position even under harmonic EMF disturbances. It can also adjust the frequency adaptively based on the rotating speed of the rotor, which means the estimation performance is not deteriorated under rotating speed changing conditions. The simulation results verify the effectiveness of the proposed method.

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7

Lin, Ming-Lang, Shu-Chuan Huang, and Jie-Cherng Liu. "Digital-only PLL with adaptive search step." International Journal of Electronics 101, no. 6 (2014): 865–76. http://dx.doi.org/10.1080/00207217.2014.896036.

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8

Raoof, M., and A. A. Suratgar. "Adaptive control of PLL using neural network." Journal of the Franklin Institute 346, no. 1 (2009): 81–93. http://dx.doi.org/10.1016/j.jfranklin.2008.06.009.

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9

Zhang, Lan Ying, and Hai Yang Liu. "Adaptive Bandwidth PLL Design Based on Fuzzy Logic Control." Applied Mechanics and Materials 543-547 (March 2014): 1393–96. http://dx.doi.org/10.4028/www.scientific.net/amm.543-547.1393.

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Based on fuzzy logic control adaptive bandwidth PLL design is presented for the problem of tracking poor stability and low accuracy when a certain type of radar tracking dynamic spacecraft. This method is mainly through fuzzy logic controller, adaptive level is determined by control rule of input respectively, and the outputs of rules are weighted combined to control the coefficient of loop filter, thus adjusting automatically the loop bandwidth, and enhancing the tracking stability of radar equipment and improving ranging accuracy. The simulation results show that the fuzzy logic control adaptive bandwidth PLL has higher tracking stability and accuracy.

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10

Du, Heng, Qiuye Sun, Qifu Cheng, Dazhong Ma, and Xu Wang. "An Adaptive Frequency Phase-Locked Loop Based on a Third Order Generalized Integrator." Energies 12, no. 2 (2019): 309. http://dx.doi.org/10.3390/en12020309.

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In this paper, the basic principle and characteristics of a phase-locked loop (PLL) in a single phase grid-connected system are analyzed, and this paper introduces one type virtual orthogonal voltage vector method based on a third order generalized integrator (TOGI) to construct an alpha and beta static coordinate system. The TOGI structure can eliminate the DC offset in a voltage signal or zero offset in the sampling process, and ensure the amplitude of the virtual orthogonal signal is consistent. At the same time, the adaptive frequency estimation unit is introduced, which can effectively deal with the power grid voltage frequency changes and ensure the accuracy of PLL. MATLAB (R2012a, MathWorks, Natick, MA, USA) is used to simulate the variation of power grid voltage frequency, DC component injection, harmonics injection and other parameters, and the performance of PLL is adequately verified. In addition, a 5kW single-phase energy router experimental platform is built to verify the proposed PLL. The experimental results show that the PLL can well track the frequency change of the grid voltage and eliminate the DC offset, so as to achieve accurate phase tracking.

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11

Bechouche, Ali, Djaffar Ould Abdeslam, Tahar Otmane-Cherif, and Hamid Seddiki. "Adaptive Neural PLL for Grid-connected DFIG Synchronization." Journal of Power Electronics 14, no. 3 (2014): 608–20. http://dx.doi.org/10.6113/jpe.2014.14.3.608.

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12

Özdemir, Ayhan, and Mehmet Taştan. "PLL Based Digital Adaptive Filter for Detecting Interharmonics." Mathematical Problems in Engineering 2014 (2014): 1–10. http://dx.doi.org/10.1155/2014/501781.

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Studies on the PLL (phase locked loop) based interharmonic measurements have been considerably increased recently. The method proposed in this study is a hybrid method based on the frequency analysis. The proposed method presents solutions for the leading problems about the interharmonic measurement, such as fundamental frequency shifting, spectral leakage, and picket-fence effect, using digital PLL and adaptive notch filter. In addition, a new approach is presented to solve the multizero crossing problem encountered in the analysis of the harmonic-interharmonic. Both simulative and field data tests have been performed to verify the effectiveness of the proposed method.

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13

Carugati, Ignacio, Patricio Donato, Sebastian Maestri, Daniel Carrica, and Mario Benedetti. "Frequency Adaptive PLL for Polluted Single-Phase Grids." IEEE Transactions on Power Electronics 27, no. 5 (2012): 2396–404. http://dx.doi.org/10.1109/tpel.2011.2172000.

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14

M. Arafa, Osama, M. E. Abdallah, and Ghada A. Abdel Aziz. "Frequency adaptive sliding fourier transform for synchronizing VSI to the grid." International Journal of Power Electronics and Drive Systems (IJPEDS) 10, no. 2 (2019): 1034. http://dx.doi.org/10.11591/ijpeds.v10.i2.pp1034-1048.

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Sliding Discrete Fourier Transform (SDFT) is very efficient regarding computational load and it possesses a very fast phase angle detection with excellent harmonic rejection at nominal frequency. However, at off-nominal frequency, SDFT generates errors in both magnitude and phase angle due to spectral leakage. This paper introduces a workaround for Fourier Transform to handle this disability under off-nominal frequency while avoiding variable-rate sampling. Sliding Fourier Transform (SFT) is used as a phase detector for a phase-locked loop whose output frequency is used to drive the SFT. The paper revisits the mathematics of Fourier Transform (FT) in a three-phase setting via a time-domain approach to show a newly proposed filtering technique for the double-frequency oscillation just by summing the FT sine/cosine filter outputs of the three individual phases. Also, the analysis aims to determine and correct the phase and magnitude errors under offnominal frequency operation. The proposed technique (SFT-PLL) is tested in real time on dSPACE DS1202 DSP using voltage vectors that are pregenerated to simulate the most adverse grid conditions. The testing scenarios compare the performance of the SFT-PLL with that of the Decoupled Stationary Reference Frame PLL (dαβPLL). The results prove that SFT-PLL is superior to dαβPLL.

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15

Silva, Marielle Jordane da, Sivia Costa Ferreira, Joaquim Paulo da Silva, Mariana Guimaraes dos Santos, Andre Luiz Paganotti, and Leonardo Maia Barbosa. "Equivalency between Adaptive Notch Filter PLL and Inverse Park PLL by Modeling and Parameter Adjustment." IEEE Latin America Transactions 18, no. 12 (2020): 2112–21. http://dx.doi.org/10.1109/tla.2020.9400439.

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16

Izah, Rofiatul, Subiyanto Subiyanto, and Dhidik Prastiyanto. "Improvement of DSOGI PLL Synchronization Algorithm with Filter on Three-Phase Grid-connected Photovoltaic System." Jurnal Elektronika dan Telekomunikasi 18, no. 1 (2018): 35. http://dx.doi.org/10.14203/jet.v18.35-45.

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Synchronous Reference Frame Phase Locked Loop (SRF PLL) has been widely used for synchronization three-phase grid-connected photovoltaic (PV) system. On the grid fault, SRF PLL distorted by negative sequence component and grid harmonic that caused an error in estimating parameter because of ripple and oscillation. This work combined SRF PLL with Dual Second Order Generalized Integrator (DSOGI) and filter to minimize ripple and minimize oscillation in the phase estimation and frequency estimation. DSOGI was used for filtering and obtaining the 90o shifted versions from the vαβ signals. These signals (vαβ) were generated from three phase grid voltage signal using Clarke transform. The vαβ signal was the inputs to the positive-sequence calculator (PSC). The positive-sequence vαβ was transformed to the dq synchronous reference frame and became an input to SRF-PLL to create the estimation frequency. This estimation frequency from SRF PLL was filtered by the low-pass filter to decrease grid harmonic. Moreover, the output of low-pass filter was a frequency adaptive. The performance of DSOGI PLL with filter is compared with DSOGI PLL, SRF PLL, and IEEE standard 1547(TM)-2003. The improvement of DSOGI PLL with filter gave better performances than DSOGI PLL and SRF PLLbecause it minimized ripples and oscillations in the phase and frequency estimations.

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17

Xiu, L., W. Li, J. Meiners, and R. Padakanti. "A Novel All-Digital PLL With Software Adaptive Filter." IEEE Journal of Solid-State Circuits 39, no. 3 (2004): 476–83. http://dx.doi.org/10.1109/jssc.2003.822780.

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18

Lou, Yannian, Chaojie Zhang, Xiaojun Jin, and Zhonghe Jin. "Method of adaptive PLL bandwidth adjustment without phase slipping." Journal of Systems Engineering and Electronics 25, no. 6 (2014): 949–58. http://dx.doi.org/10.1109/jsee.2014.00109.

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19

Luhtala, Roni, Henrik Alenius, and Tomi Roinila. "Practical Implementation of Adaptive SRF-PLL for Three-Phase Inverters Based on Sensitivity Function and Real-Time Grid-Impedance Measurements." Energies 13, no. 5 (2020): 1173. http://dx.doi.org/10.3390/en13051173.

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Rapidly increasing demand for renewable energy has created a need for the photovoltaic and wind farms to be placed in various locations that have diverse and possibly time-variant grid conditions. A mismatch between the grid impedance and output admittance of an inverter causes impedance-based stability issues, which appear as power quality problems and poor transient performance. Grid synchronization with phase-locked loop (PLL) introduces a negative-resistance-like behavior to inverter output admittance. High control bandwidth of the PLL makes the system sensitive to impedance-based stability issues when the inverter is connected to a weak grid that has high impedance. However, very conservative tunings lead to overly damped dynamic responses in strong grids, where the control performance and power quality can be improved by applying higher PLL control bandwidths. Continuous evaluation of grid conditions makes it possible to avoid the risk of instability and poor dynamic responses, as the inverter output admittance can be re-shaped online to continuously match the grid conditions. The present work proposes method for adaptive control of the PLL based on the real-time measurements of the grid impedance, applying pseudo-random binary sequence (PRBS) injections. The method limits the PLL bandwidth in weak grids to avoid stability issues and increases the control bandwidth in strong grids to improve voltage-tracking, and thus overall control performance. The method is verified through simulations and experimental laboratory tests in a kW-scale system. The results show that optimizing the PLL bandwidth with respect to the grid conditions is highly beneficial for system performance and stability.

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20

Li, Xing, and Hua Lin. "Stability Analysis of Grid-Connected Converters with Different Implementations of Adaptive PR Controllers under Weak Grid Conditions." Energies 11, no. 8 (2018): 2004. http://dx.doi.org/10.3390/en11082004.

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Adaptive proportional resonant (PR) controllers, whose resonant frequencies are obtained by the phase-locked loop (PLL), are employed in grid connected voltage source converters (VSCs) to improve the control performance in the case of grid frequency variations. The resonant frequencies can be estimated by either synchronous reference frame PLL (SRF-PLL) or dual second order generalized integrator frequency locked loop (DSOGI-FLL), and there are three different implementations of the PR controllers based on two integrators. Hence, in this paper, system stabilities of the VSC with different implementations of PR controllers and different PLLs under weak grid conditions are analyzed and compared by applying the impedance-based method. First, the αβ-domain admittance matrixes of the VSC are derived using the harmonic linearization method. Then, the admittance matrixes are compared with each other, and the influences of their differences on system stability are revealed. It is demonstrated that if DSOGI-FLL is used, stabilities of the VSC with different implementations of the PR controllers are similar. Moreover, the VSC using a DSOGI-FLL is more stable than that using a SRF-PLL. The simulation and experimental results are conducted to verify the correctness of theoretical analysis.

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21

Li, Chung-Yi. "Fast locking adaptive PLL using Dual-Edge Phase-Frequency Detector." Microelectronics Journal 46, no. 12 (2015): 1413–19. http://dx.doi.org/10.1016/j.mejo.2015.08.012.

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22

Jaeha Kim, M. A. Horowitz, and Gu-Yeon Wei. "Design of CMOS adaptive-bandwidth PLL/DLLs: a general approach." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 50, no. 11 (2003): 860–69. http://dx.doi.org/10.1109/tcsii.2003.819120.

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23

Liu, Yajiao, Suge Yue, Xupeng Han, and Jiaqi Liu. "A Fast-Lock Low-Jitter PLL Based Adaptive Bandwidth Technique." Journal of Physics: Conference Series 1087 (September 2018): 052029. http://dx.doi.org/10.1088/1742-6596/1087/5/052029.

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24

Tang, Y., M. Ismail, and S. Bibyk. "Adaptive Miller capacitor multiplier for compact on-chip PLL filter." Electronics Letters 39, no. 1 (2003): 43. http://dx.doi.org/10.1049/el:20030086.

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25

Li, Yunlu, Junyou Yang, Haixin Wang, Weichun Ge, and Yiming Ma. "Leveraging Hybrid Filter for Improving Quasi-Type-1 Phase Locked Loop Targeting Fast Transient Response." Energies 11, no. 9 (2018): 2472. http://dx.doi.org/10.3390/en11092472.

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In renewable energy generation applications, phase locked loop (PLL) is one of the most popular grid synchronization technique. The main objective of PLL is to rapidly and precisely extract phase and frequency especially when the grid voltage is under non-ideal conditions. This motivates the recent development of moving average filters (MAFs) based PLL in a quasi-type-1 system (i.e., QT1-PLL). Despite its success in certain applications, the transient response is still unsatisfactory, mainly due to the fact that the time delay caused by MAFs is still large. This has significantly limited the utilization of QT1-PLL, according to common grid codes such as German and Spanish grid codes. This challenge has been tackled in this paper. The basic idea is to develop a new hybrid filtering stage, consisting of adaptive notch filters (ANFs) and MAFs, arranged at the inner loop of QT1-PLL. Such an idea can greatly improve the transient response of QT1-PLL, owing to the fact that ANFs are utilized to remove the fundamental frequency negative voltage sequence (FFNS) component while other dominant harmonics can be removed by MAFs with a small time delay. By applying the proposed technique, the settling time is reduced to less than one cycle of grid frequency without any degradation in filtering capability. Moreover, the proposed PLL can be easily expanded to handle dc offset rejection. The effectiveness is validated by comprehensive experiments.

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26

Han, Yang, Lin Xu, Muhammad Mansoor Khan, Gang Yao, Li-Dan Zhou, and Chen Chen. "A novel synchronization scheme for grid-connected converters by using adaptive linear optimal filter based PLL (ALOF–PLL)." Simulation Modelling Practice and Theory 17, no. 7 (2009): 1299–345. http://dx.doi.org/10.1016/j.simpat.2009.05.004.

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27

Wang, Jingyu, Zhongbo Zhu, Changzhi Li, Jiangtao Huangfu, and Lixin Ran. "PLL-Based Self-Adaptive Resonance Tuning for a Wireless-Powered Potentiometer." IEEE Transactions on Circuits and Systems II: Express Briefs 60, no. 7 (2013): 392–96. http://dx.doi.org/10.1109/tcsii.2013.2258268.

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28

Ubukata, Takayuki, Shinya Kotosaka, and Hideyuki Ohtaki. "Trajectory Generation for Adaptive Motion by Phase Feedback - Synchronization of Multicycle Human Movement -." Journal of Robotics and Mechatronics 21, no. 3 (2009): 342–52. http://dx.doi.org/10.20965/jrm.2009.p0342.

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Synchronous motion is one of the important ability for the co-operation work by human. The focus of our research is to develop a robust and adaptive synchronous trajectory generation method for the robot. To be able to follow the uncertain action by human co-worker, the trajectory generation method must be required adaptability to frequency and phase of movement of human co-worker. Key techniques for our method are PLL (Phase Locked Loop), Fourier series approximation, wavelet transformation for trajectory. PLL technique achieves the phase synchronization with an arbitrary cyclic motion, like as human walking. Fourier series approximation of target trajectory allows us description of wide variety cyclic motion for the robot. More over, we can select the synchronous frequency from human movement with multiple cycles by wavelet transformation. The experiment of synchronization with 3-DOF manipulator and human demonstrator are carried out. As a result, we confirm synchronous performance and the effectiveness of proposed method.

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29

Purwanto, Aji, Iwan Setiawan, and Bambang Winardi. "DESAIN DAN IMPLEMENTASI SECOND ORDER GENERALIZED INTEGRATOR-PHASE LOCKED LOOP (SOGI-PLL) UNTUK TEGANGAN SATU FASA MENGGUNAKAN DSPIC30F4011 DENGAN KONTROL PROPORTIONAL INTEGRAL." TRANSIENT 7, no. 3 (2019): 729. http://dx.doi.org/10.14710/transient.7.3.729-736.

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Grid Side Converter (GSC) is a power converter device that have important role in electrical energy conversion systems especially in the utilization of renewable energy sources in order to be connected to the grid. Based on the grid connection requirements, the GSC should be able to operate even if the grid is experiencing interference. Based on the problem, the GSC control system technically should have ability to detect grid disturbances quickly by using Phase Locked Loop (PLL) method that can provide grid voltage information. Compared with other PLL algorithms, the Second Order Generalized Integrator-Phase Locked Loop (SOGI-PLL) has adaptive-filtering characteristics in adjusting phase information. The SOGI-PLL method in this final project will be implemented for single phase system using dsPIC30F4011 microcontroller with PI controller. PI controller is expected to make the system has a fast response to the changes that occur, because the purpose of the PLL’s own needs is to get the results of grid voltage information such as magnitude, frequency, and phase in realtime. As the results, the SOGI-PLL algorithm through the use of ZMPT101B sensor shows the magnitude, frequency, and phase information is suitable with the grid voltage. The result of phase estimation have also been implemented in the inverter product development project, so that the output voltage inverter is in phase with the grid voltage.

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30

Vukadinović, Dinko, Tien Duy Nguyen, Cat Ho Nguyen, Nhu Lan Vu, Mateo Bašić, and Ivan Grgić. "Hedge-Algebra-Based Phase-Locked Loop for Distorted Utility Conditions." Journal of Control Science and Engineering 2019 (March 3, 2019): 1–17. http://dx.doi.org/10.1155/2019/3590527.

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This paper presents the first application of the hedge-algebra theory in the field of grid synchronization. For this purpose, an optimized hedge-algebra controller (HAC) is developed and incorporated within the three-phase phase-locked loop (PLL) with moving average filters (MAFs) inside its feedback loop. Optimized fuzziness parameters and linguistic rule base of the HAC are obtained by a genetic algorithm using the integral of absolute error as the performance index during optimization. Calculated optimal parameter values of the HAC depend on the most frequently occurring disturbance in the electric grid. Two different PLL structures are proposed, depending on the types of disturbances occurring in the electric grid. The first structure is the conventional synchronous reference frame PLL with the nonadaptive MAF (i.e., MAF without order adjustment), but with the PI/PID controller in the phase loop replaced by the developed HAC. Such PLL structure is suitable for all analyzed disturbance types, expect for step-changes in the grid frequency. The second PLL structure introduces the adaptive MAF (i.e., MAF with order adjustment) and a new feedback signal in the output stage of the controller to achieve zero steady-state error in the case of step-changes in the grid frequency. The disturbance rejection capability of the two developed PLLs with the HAC (HAC-PLLs) is tested separately and compared experimentally with the PID- and fuzzy-controller-based PLLs.

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31

Xiao, Fei, Lei Yuan, and Ming Liang Chen. "Adaptive Sliding-Mode Observer Scheme for Sensorless Control of Low-Speed IPMSM Drive." Applied Mechanics and Materials 380-384 (August 2013): 536–40. http://dx.doi.org/10.4028/www.scientific.net/amm.380-384.536.

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This paper proposes an adaptive sliding-mode observer (SMO) for a low-speed interior permanent magnet synchronous motor (IPMSM) drive. In this paper, an adaptive SMO is employed to estimate the rotor speed and extended EMF, a soft phase locked loop (PLL) technology is used to estimate rotor position due to its strong robustness since under voltage phase unbalance or polluted and variable-frequency environment. The global asymptotic stability of the proposed adaptive SMO is verified using Lyapunov stability analysis with considering motor parameter variations. Simulation results are presented to verify the principles and to demonstrate the effectiveness of the proposed method.

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32

Zhang, Meiqing, and Li Sun. "PLL and Additional Frequency Control Constituting an Adaptive Synchronization Mechanism for VSCs." IEEE Transactions on Power Systems 35, no. 6 (2020): 4920–23. http://dx.doi.org/10.1109/tpwrs.2020.3020725.

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33

Hamed, Hany A., Ahmed F. Abdou, Ehab H. E. Bayoumi, and E. E. EL-Kholy. "Frequency Adaptive CDSC-PLL Using Axis Drift Control Under Adverse Grid Condition." IEEE Transactions on Industrial Electronics 64, no. 4 (2017): 2671–82. http://dx.doi.org/10.1109/tie.2016.2633524.

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34

Shakerighadi, Bahram, Esmaeil Ebrahimzadeh, Mads Graungaard Taul, Frede Blaabjerg, and Claus Leth Bak. "Modeling and Adaptive Design of the SRF-PLL: Nonlinear Time-Varying Framework." IEEE Access 8 (2020): 28635–45. http://dx.doi.org/10.1109/access.2020.2972345.

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35

Liu, P., P. Sun, J. Jung, and D. Heo. "PLL charge pump with adaptive body-bias compensation for minimum current variation." Electronics Letters 48, no. 1 (2012): 16. http://dx.doi.org/10.1049/el.2011.2835.

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36

WANG, Jianhua, Fangfang LUO, Qing DUAN, et al. "Power electronic transformer with adaptive PLL technique for voltage-disturbance ride through." Journal of Modern Power Systems and Clean Energy 6, no. 5 (2018): 1090–102. http://dx.doi.org/10.1007/s40565-017-0356-2.

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Cong, Li, Xin Li, Tian Jin, Song Yue, and Rui Xue. "An Adaptive INS-Aided PLL Tracking Method for GNSS Receivers in Harsh Environments." Sensors 16, no. 2 (2016): 146. http://dx.doi.org/10.3390/s16020146.

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Mansuri, M., and Chih-Kong Ken Yang. "A low-power adaptive bandwidth PLL and clock buffer with supply-noise compensation." IEEE Journal of Solid-State Circuits 38, no. 11 (2003): 1804–12. http://dx.doi.org/10.1109/jssc.2003.818300.

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Saxena, Hemant, Alka Singh, and Jitendra Nath Rai. "Adaptive spline-based PLL for synchronisation and power quality improvement in distribution system." IET Generation, Transmission & Distribution 14, no. 7 (2020): 1311–19. http://dx.doi.org/10.1049/iet-gtd.2019.0662.

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Chen, Shuo, Xiao Zhang, Xiang Wu, Guojun Tan, and Xianchao Chen. "Sensorless Control for IPMSM Based on Adaptive Super-Twisting Sliding-Mode Observer and Improved Phase-Locked Loop." Energies 12, no. 7 (2019): 1225. http://dx.doi.org/10.3390/en12071225.

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Abstract:

In traditional sensorless control of the interior permanent magnet synchronous motors(IPMSMs) for medium and high speed domains, a control strategy based on a sliding-mode observer(SMO) and phase-locked loop (PLL) is widely applied. A new strategy for IPMSM sensorless controlbased on an adaptive super-twisting sliding-mode observer and improved phase-locked loop isproposed in this paper. A super-twisting sliding-mode observer (STO) can eliminate the chatteringproblem without low-pass filters (LPFs), which is an effective method to obtain the estimated backelectromotive forces (EMFs). However, the constant sliding-mode gains in STO may causeinstability in the high speed domain and chattering in the low speed domain. The speed-relatedadaptive gains are proposed to achieve the accurate estimation of the observer in wide speed rangeand the corresponding stability is proved. When the speed of IPMSM is reversed, the traditionalPLL will lose its accuracy, resulting in a position estimation error of 180°. The improved PLL basedon a simple strategy for signal reconstruction of back EMF is proposed to ensure that the motor canrealize the direction switching of speed stably. The proposed strategy is verified by experimentaltesting with a 60-kW IPMSM sensorless drive.

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Nanda, Umakanta, and Debiprasad Priyabrata Acharya. "Adaptive PFD selection technique for low noise and fast PLL in multi-standard radios." Microelectronics Journal 64 (June 2017): 92–98. http://dx.doi.org/10.1016/j.mejo.2017.04.011.

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Vaucher, C. S. "An adaptive PLL tuning system architecture combining high spectral purity and fast settling time." IEEE Journal of Solid-State Circuits 35, no. 4 (2000): 490–502. http://dx.doi.org/10.1109/4.839909.

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Juan, Li, Zhang Huajiang, Zhao Feng, and Hong Zhiliang. "Adaptive digital calibration techniques for narrow band low-IF receivers with on-chip PLL." Journal of Semiconductors 30, no. 6 (2009): 065004. http://dx.doi.org/10.1088/1674-4926/30/6/065004.

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44

Sevilmiş, Fehmi, and Hulusi Karaca. "A fast hybrid PLL with an adaptive all-pass filter under abnormal grid conditions." Electric Power Systems Research 184 (July 2020): 106303. http://dx.doi.org/10.1016/j.epsr.2020.106303.

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Kornauth, Christoph, Charles Herbaux, Bernd Boidol, et al. "Combination of Venetoclax and Ibrutinib Increases bcl2-Dependent Apoptotic Priming, Reduces ITK-Phosphorylation and Is Clinically Promising in Relapsed/Refractory T-Prolymphocytic Leukemia." Blood 134, Supplement_1 (2019): 3965. http://dx.doi.org/10.1182/blood-2019-124392.

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Introduction T-cell prolymphocytic leukemia (T-PLL) is a rare and aggressive T-lymphoid malignancy with poor response to current treatment strategies. We recently demonstrated single agent activity of venetoclax in relapsed/refractory (r/r) T-PLL, however resistance developed on mono-therapy. We here set out to identify partners for an effective combinatorial treatment concept. Methods To overcome bcl-2 inhibitor resistance we utilized primary T-PLL patient samples and applied a combinatorial next-generation functional drug screen for venetoclax and 25 additional therapeutic agents (Fig.1a). Molecular mechanisms of drug combinations were evaluated by BH3-family member profiling and mass spectrometry. Protein expression was assessed by Western Blot and viability by AnnexinV/Hoechst staining. The best scoring combination was evaluated in two late stage r/r T-PLL patients. Results Pairwise combinations screen of venetoclax with candidate small molecule inhibitors and chemotherapeutic drugs on primary T-PLL cells revealed synergistic action of venetoclax with ibrutinib, idelalisib, and 5-azacytidine, and to lower extents Olaparib, Temsirolimus, Ruxolitinib and Belinostat whereas cisplatin antagonized the effect of venetoclax across all patient samples tested (Fig 1b). The combination of venetoclax and ibrutinib resulted in substantial reduction of viability in primary T-PLL cells (Fig 1c). BH3-profiling on primary T-PLL samples with and without ibrutinib treatment demonstrated enhanced overall priming with predominant increase of bcl-2 dependency upon ibrutinib treatment (Fig 1d). Addition of ibrutinib to venetoclax led to decreased phosphorylation of ITK in vivo (Fig 1e). Two patients suffering from r/r T-PLL after failing at least two treatment lines including alemtuzumab were treated with the combination of venetoclax and ibrutinib resulting in significant clinical responses with substantial drops in leukocytosis and LDH as well as substantial clinical improvement (Fig 2a, b). The dynamic BH3 profiling in samples taken from these patients confirmed that the addition of ibrutinib is indeed increasing overall priming and Bcl-2 dependency (Fig 2c, d). Conclusion Our findings suggest efficacy of combinatorial treatment of venetoclax with ibrutinib in T-PLL. Mechanistically, ibrutinib dephosphorylated ITK in T-PLL cells and, furthermore, enhanced BCL2 dependency, both, in-vivo and in-vitro. Patients treated with the combination venetoclax and ibrutinib experienced profound clinical responses which needs further evaluation in an prospective clinical study on a larger cohort of r/r T-PLL patients. Disclosures Herbaux: Abbvie: Honoraria; Janssen: Honoraria; Takeda: Honoraria; BMS: Honoraria; Gilead: Honoraria. Mayerhoefer:Siemens: Research Funding, Speakers Bureau; BMS: Speakers Bureau. Jaeger:Novartis, Roche, Sandoz: Consultancy; AbbVie, Celgene, Gilead, Novartis, Roche, Takeda Millennium: Research Funding; Amgen, AbbVie, Celgene, Eisai, Gilead, Janssen, Novartis, Roche, Takeda Millennium, MSD, BMS, Sanofi: Honoraria; Celgene, Roche, Janssen, Gilead, Novartis, MSD, AbbVie, Sanofi: Membership on an entity's Board of Directors or advisory committees. Davids:AbbVie, Acerta Pharma, Adaptive, Biotechnologies, Astra-Zeneca, Genentech, Gilead Sciences, Janssen, Pharmacyclics, TG therapeutics: Membership on an entity's Board of Directors or advisory committees; AbbVie, Astra-Zeneca, Genentech, Janssen, MEI, Pharmacyclics, Syros Pharmaceuticals, Verastem: Consultancy; Acerta Pharma, Ascentage Pharma, Genentech, MEI pharma, Pharmacyclics, Surface Oncology, TG Therapeutics, Verastem: Research Funding; Research to Practice: Honoraria. Staber:Takeda-Millenium: Honoraria, Membership on an entity's Board of Directors or advisory committees, Research Funding, Speakers Bureau; MSD: Honoraria, Speakers Bureau; Celgene: Honoraria, Membership on an entity's Board of Directors or advisory committees; AbbVie: Honoraria, Membership on an entity's Board of Directors or advisory committees, Speakers Bureau; Roche: Honoraria, Membership on an entity's Board of Directors or advisory committees, Research Funding, Speakers Bureau; Janssen: Honoraria, Speakers Bureau; Gilead: Honoraria, Membership on an entity's Board of Directors or advisory committees, Speakers Bureau. OffLabel Disclosure: Ibrutinib - BTK inhibitor Venetoclax - bcl2 inhibitor

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CHAU, YAWGENG A., and CHEN-FENG CHEN. "ON THE DESIGN OF ADAPTIVE-BANDWIDTH ALL-DIGITAL PHASE-LOCKED LOOPS." Journal of Circuits, Systems and Computers 20, no. 06 (2011): 1037–49. http://dx.doi.org/10.1142/s0218126611007748.

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The second-order adaptive-bandwidth all-digital phase-locked loop (ADB-ADPLL) is designed and analyzed by using a new design procedure. Based on a discrete-time analogy of a continuous-time PLL (CTPLL) with the z-transform, the design criterion of the ADB-ADPLL is derived and a design procedure is developed. Following the design criterion, the ADB-ADPLL can adapt its system parameters to balance the loop noise bandwidth and lock-in time. According to the design criterion, the ratio of the loop bandwidth to the reference input frequency can be maintained as a constant if the sampling frequency is a fixed multiplier of the input frequency. An example is given to illustrate the design procedure and simulation results are presented to validate the adaptive characteristics with respect to the phase noise and varying bands of input frequency.

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Swaminathan, Ashok, Kevin J. Wang, and Ian Galton. "A Wide-Bandwidth 2.4 GHz ISM Band Fractional-$N$ PLL With Adaptive Phase Noise Cancellation." IEEE Journal of Solid-State Circuits 42, no. 12 (2007): 2639–50. http://dx.doi.org/10.1109/jssc.2007.908763.

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Rao, Anand, Makram Mansour, Guneet Singh, Chee-How Lim, Rizwan Ahmed, and David R. Johnson. "A 4–6.4 GHz LC PLL With Adaptive Bandwidth Control for a Forwarded Clock Link." IEEE Journal of Solid-State Circuits 43, no. 9 (2008): 2099–108. http://dx.doi.org/10.1109/jssc.2008.2001870.

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Wang, Shiyuan, Amir Etemadi, and Miloš Doroslovački. "Adaptive cascaded Delayed Signal Cancellation PLL for three-phase grid under unbalanced and distorted condition." Electric Power Systems Research 180 (March 2020): 106165. http://dx.doi.org/10.1016/j.epsr.2019.106165.

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Zhang, Zhao, Liyuan Liu, Peng Feng, and Nanjian Wu. "A 2.4–3.6-GHz Wideband Subharmonically Injection-Locked PLL With Adaptive Injection Timing Alignment Technique." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25, no. 3 (2017): 929–41. http://dx.doi.org/10.1109/tvlsi.2016.2619362.

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