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Dissertations / Theses on the topic 'Analog and mixed-signal circuits. eng'

Author: Grafiati

Published: 4 June 2021

Last updated: 5 February 2022

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1

Liu, Zhi-Hong. "Mixed-signal testing of integrated analog circuits and modules." Ohio : Ohio University, 1999. http://www.ohiolink.edu/etd/view.cgi?ohiou1181174339.

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2

Oliveira, Vlademir de Jesus Silva. "Desenvolvimento de um sintetizador de freqüência de baixo custo em tecnologia CMOS /." Ilha Solteira : [s.n.], 2009. http://hdl.handle.net/11449/100280.

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Orientador: Nobuo Oki<br>Banca: Suely Cunha Amaro Mantovani<br>Banca: Jozué Vieira Filho<br>Banca: Marcelo Arturo Jara Perez<br>Banca: Paulo Augusto Dal fabbro<br>Resumo: Nesta tese, propõe-se um sintetizador de freqüência baseado em phase locked loops (PLL) usando uma arquitetura que utiliza um dual-path loop filter, constituído de componentes passivos e um integrador digital. A proposta é empregar técnicas digitais, para reduzir o custo da implementação do sintetizador de freqüência, e flexibilizar o projeto do loop filter, para possibilitar que a arquitetura opere em uma faixa de freqüência

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3

Kim, Tae Hong. "Electromagnetic Band Gap (EBG) synthesis and its application in analog-to-digital converter load boards." Diss., Georgia Institute of Technology, 2007. http://hdl.handle.net/1853/22712.

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With increase in frequency and convergence toward mixed signal systems, supplying stable voltages to integrated circuits and blocking noise coupling in the systems are major problems. Electromagnetic band gap (EBG) structures have been in the limelight for power/ground noise isolation in mixed signal applications due to their capability to suppress unwanted electromagnetic mode transmission in certain frequency bands. The EBG structures have proven effective in isolating the power/ground noise in systems that use a common power supply. However, while the EBG structures have the potential to pr

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4

Qureshi, Muhammad Shakeel. "Integrated front-end analog circuits for mems sensors in ultrasound imaging and optical grating based microphone." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/29613.

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Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009.<br>Committee Chair: Hasler, Paul; Committee Co-Chair: Degertekin, Levent; Committee Member: Anderson, David; Committee Member: Ayazi, Farrokh; Committee Member: Brand, Oliver; Committee Member: Hesketh, Peter. Part of the SMARTech Electronic Thesis and Dissertation Collection.

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5

Fayed, Ayman Adel. "Adaptive techniques for analog and mixed signal integrated circuits." Connect to this title online, 2004. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=osu1097519730.

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Thesis (Ph. D.)--Ohio State University, 2004.<br>Title from first page of PDF file. Document formatted into pages; contains xix, 232 p.; also includes graphics (some col.). Includes bibliographical references (p. 222-230).

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6

Variyam, Pramodchandran. "Efficient testing techniques for analog and mixed-signal circuits." Diss., Georgia Institute of Technology, 1999. http://hdl.handle.net/1853/13457.

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7

Fisher, Andrew N. "Efficient, sound formal verification for analog/mixed-signal circuits." Thesis, The University of Utah, 2016. http://pqdtopen.proquest.com/#viewpdf?dispub=10003590.

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<p> The increasing demand for smaller, more efficient circuits has created a need for both digital and analog designs to scale down. Digital technologies have been successful in meeting this challenge, but analog circuits have lagged behind due to smaller transistor sizes having a disproportionate negative affect. Since many applications require small, low-power analog circuits, the trend has been to take advantage of digital's ability to scale by replacing as much of the analog circuitry as possible with digital counterparts. The results are known as \emph{digitally-intensive analog/mixed-sig

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8

Hou, Junwei. "Concurrent fault simulation for mixed-signal circuits." Diss., Georgia Institute of Technology, 2001. http://hdl.handle.net/1853/15735.

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9

Chen, Jin. "Fault modeling and test techniques for analog and mixed-signal circuits /." Digital version accessible at:, 1998. http://wwwlib.umi.com/cr/utexas/main.

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10

Kasturi, Prasan. "A CAD tool for analog and mixed signal CMOS circuits /." View online ; access limited to URI, 2006. http://0-digitalcommons.uri.edu.helin.uri.edu/dissertations/AAI3248232.

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11

SAMPATH, HEMANTH KUMAR. "A MODULE GENERATION ENVIRONMENT FOR MIXED-SIGNAL CIRCUITS." University of Cincinnati / OhioLINK, 2003. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1052321882.

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12

KANKIPATI, SUNDER RAJAN. "MACRO MODEL GENERATION FOR SYNTHESIS OF ANALOG AND MIXED SIGNAL CIRCUITS." University of Cincinnati / OhioLINK, 2004. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1077297705.

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13

Sadeghi, Nima. "Design techniques for high-temperature analog and mixed-signal integrated circuits." Thesis, University of British Columbia, 2012. http://hdl.handle.net/2429/43092.

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Reliable high-temperature analog and mixed-signal CMOS circuits are required for several applications including aerospace, automotive control, oil field instrumentation, and pulp and paper digesters. In particular, in this work we focus on the design of key building blocks of a miniature sensor interface system that is intended to operate in a pulp and paper digester and collect and record sensory data such as pressure and temperature along its trajectory within the digester. The temperature inside the digester can be as high as 180℃. Design considerations and techniques for implementing these

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14

AGARWAL, NEETU. "ON FORMAL DEVELOPMENT OF ANALOG/DIGITAL INTERFACES IN MIXED-SIGNAL CIRCUITS." University of Cincinnati / OhioLINK, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1123772655.

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15

Zakizadeh, Jila. "Built-in self-test techniques for analog and mixed signal circuits." Thesis, University of Ottawa (Canada), 2005. http://hdl.handle.net/10393/27094.

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The present thesis attempts to develop new techniques for testing analog parts of embedded cores-based mixed signal integrated circuits and systems. In particular, the oscillation based test methodologies have been investigated in the thesis. In the oscillation based test methods, the circuit under test (CUT) is first converted to an oscillator in the test mode and the oscillation parameters, viz. frequency, amplitude, etc. are then measured. Any deviation of these parameters causes either the oscillation frequency of the converted CUT to differ from its nominal value, or the converted CUT sto

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16

Huynh, Sam DuPhat. "Testability analysis for mixed analog/digital circuit test generation and design for test /." Thesis, Connect to this title online; UW restricted, 1999. http://hdl.handle.net/1773/6134.

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17

Backenius, Erik. "Reduction of Substrate Noise in Mixed-Signal Circuits." Doctoral thesis, Linköping : Department of Electrical Engineering, Linköping University, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-8813.

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18

Liu, Dong. "Analog and mixed-signal test and fault diagnosis." Ohio : Ohio University, 2003. http://www.ohiolink.edu/etd/view.cgi?ohiou1177701780.

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19

Backenius, Erik. "On Reduction of Substrate Noise in Mixed-Signal Circuits." Licentiate thesis, Linköping : Department of electrical engineering, Linköpings universitet, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-6526.

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20

Ul, Asad Hafiz. "Formal verification of analog and mixed signal circuits using deductive and bounded approaches." Thesis, City University London, 2016. http://openaccess.city.ac.uk/15185/.

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This thesis presents novel formal verification techniques to verify the important property of inevitability of states in analog and mixed signal (AMS) circuits. Two techniques to verify the inevitability of phase locking in a Charge Pump Phase Lock Loop (PLL) circuit are presented: mixed deductivebounded and deductive-only verification approaches. The deductive-bounded approach uses Lyapunov-like certificates with bounded advection of sets to verify the inevitability of phase locking. The deductive-only technique uses a combination of Lyapunov and Escape certificates to verify the inevitabilit

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21

Hedayati, Raheleh. "High-Temperature Analog and Mixed-Signal Integrated Circuits in Bipolar Silicon Carbide Technology." Doctoral thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-213697.

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Silicon carbide (SiC) integrated circuits (ICs) can enable the emergence of robust and reliable systems, including data acquisition and on-site control for extreme environments with high temperature and high radiation such as deep earth drilling, space and aviation, electric and hybrid vehicles, and combustion engines. In particular, SiC ICs provide significant benefit by reducing power dissipation and leakage current at temperatures above 300 °C compared to the Si counterpart. In fact, Si-based ICs have a limited maximum operating temperature which is around 300 °C for silicon on insulator (S

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22

YELAMANCHILI, VEENA RAO. "A SIMULATION AND PERFORMANCE ESTIMATION SYSTEM FOR ANALOG AND MIXED SIGNAL SYSTEMS." University of Cincinnati / OhioLINK, 2003. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1068671449.

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23

Bhattacharya, Sambuddha. "Template-driven parasitic-aware optimization of analog/RF IC layouts /." Thesis, Connect to this title online; UW restricted, 2005. http://hdl.handle.net/1773/6121.

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24

Zou, Jun. "Hierarchical optimization of large-scale analog, mixed-signal circuits based-on Pareto-optimal fronts." München Verl. Dr. Hut, 2009. http://d-nb.info/995735654/04.

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25

Choi, Jung Hyun. "Mixed-signal analog-digital circuits design on the pre-diffused digital array using trapezoidal association of transistors." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2001. http://hdl.handle.net/10183/2884.

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The mixed-signal and analog design on a pre-diffused array is a challenging task, given that the digital array is a linear matrix arrangement of minimum-length transistors. To surmount this drawback a specific discipline for designing analog circuits over such array is required. An important novel technique proposed is the use of TAT (Trapezoidal Associations of Transistors) composite transistors on the semi-custom Sea-Of-Transistors (SOT) array. The analysis and advantages of TAT arrangement are extensively analyzed and demonstrated, with simulation and measurement comparisons to equivalent s

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26

Petta, Angelo Carleton University Dissertation Engineering Electrical. "Design and implementation of the analog signal processing circuits for a single chip mixed analog/digital mobile radio baseband data demodulator." Ottawa, 1990.

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27

al-Sarʻāwī, Said Fares. "Design techniques for low power mixed analog-digital circuits with application to smart wireless systems /." Title page, contents and abstract only, 2003. http://web4.library.adelaide.edu.au/theses/09PH/09pha461.pdf.

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28

Son, Kyung-Im. "A multi-class, multi-dimensional classifier as a topology selector for analog circuit design / by Kyung-Im Son." Thesis, Connect to this title online; UW restricted, 1998. http://hdl.handle.net/1773/5919.

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29

Graham, David W. "A Biologically Inspired Front End for Audio Signal Processing Using Programmable Analog Circuitry." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/11549.

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This research focuses on biologically inspired audio signal processing using programmable analog circuitry. This research is inspired by the biology of the human cochlea since biology far outperforms any engineered system at converting audio signals into meaningful electrical signals. The human cochlea efficiently decomposes any sound into the respective frequency components by harnessing the resonance nature of the basilar membrane, essentially forming a bank of bandpass filters. In a similar fashion, this work revolves around developing a filter bank composed of continuous-time, low-power

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30

Hooper, Mark S. "Submicron CMOS programmable analog floating-gate circuits and arrays using DC-DC converters." Diss., Available online, Georgia Institute of Technology, 2005, 2005. http://etd.gatech.edu/theses/available/etd-12032004-155022/unrestricted/Hooper%5FMark%5FS%5F200505%5Fphd.pdf.

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Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2005.<br>Kucic, Matthew, Committee Member ; Hasler, Paul, Committee Chair ; Heck, Bonnie, Committee Member ; Cressler, John, Committee Member ; Anderson, David, Committee Member. Vita. Includes bibliographical references.

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31

More, Shailesh [Verfasser], Doris [Akademischer Betreuer] Schmitt-Landsiedel, and Helmut [Akademischer Betreuer] Gräb. "Aging Degradation and Countermeasures in Deep-submicrometer Analog and Mixed Signal Integrated Circuits / Shailesh More. Gutachter: Helmut Gräb ; Doris Schmitt-Landsiedel. Betreuer: Doris Schmitt-Landsiedel." München : Universitätsbibliothek der TU München, 2012. http://d-nb.info/1024354938/34.

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32

Hiorns, R. E. "D.S.P. of circuit design for P.W.M. D/A conversion." Thesis, King's College London (University of London), 1994. https://kclpure.kcl.ac.uk/portal/en/theses/dsp-of-circuit-design-for-pwm-da-conversion(5da641f8-747f-42ff-be70-c0e0bed22676).html.

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33

Bartholomew, David Ray. "Design of a High Speed Mixed Signal CMOS Mutliplying Circuit." Diss., CLICK HERE for online access, 2004. http://contentdm.lib.byu.edu/ETD/image/etd362.pdf.

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34

Sadeghifar, Mohammad Reza. "On High-Speed Digital-to-Analog Converters and Semi-Digital FIR Filters." Licentiate thesis, Linköpings universitet, Elektroniska Kretsar och System, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-114274.

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High-speed and high-resolution digital-to-analog converters (DACs) are vital components in all telecommunication systems. Radio-frequency digital-to-analog converter (RFDAC) provides high-speed and high-resolution conversion from digital domain to an analog signal. RFDACs can be employed in direct-conversion radio transmitter architectures. The idea of RFDAC is to utilize an oscillatory pulse-amplitude modulation instead of the conventional zero-order hold pulse amplitude modulation, which results in DAC output spectrum to have high energy high-frequency lobe, other than the Nyquist main lobe.

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35

Devarakond, Shyam Kumar. "Signature driven low cost test, diagnosis and tuning of wireless systems." Diss., Georgia Institute of Technology, 2013. http://hdl.handle.net/1853/47594.

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With increased and varied performance demands, it is essential that complex multi-standard radio/systems coexist on a same chip. To have cost and performance benefits, these analog/RF systems are implemented in scaled nanometer nodes. At these nodes, the high level of variability in process variations is making the task of manufacturing high fidelity systems a challenge leading to yield and reliability issues. Hence, in the post-manufacturing phase, test and diagnosis steps are critical to identify the cause and effect of the process variations. Further, intelligent post-manufacturing tuning t

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36

Lao, Eric. "Placement et routage de circuits mixtes analogiques-numériques CMOS." Electronic Thesis or Diss., Sorbonne université, 2018. http://www.theses.fr/2018SORUS575.

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Avec l’évolution des procédés technologiques d’intégration, le traitement numérique devient de plus en plus rapide tout en coûtant moins en surface et en consommation d’énergie. La diminution des dimensions est effectuée au détriment de la précision des blocs analogiques. L’idée est de bénéficier des performances offertes par les circuits numériques pour relâcher les spécifications des blocs analogiques et gagner ainsi globalement en surface et consommation. Or les concepteurs de circuits mixtes analogiques-numériques sont confrontés à une situation où ils doivent choisir entre un flot puremen

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37

Yu, Xinyu. "High-temperature Bulk CMOS Integrated Circuits for Data Acquisition." Case Western Reserve University School of Graduate Studies / OhioLINK, 2006. http://rave.ohiolink.edu/etdc/view?acc_num=case1144420886.

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38

Oliveira, Vlademir de Jesus Silva [UNESP]. "Desenvolvimento de um sintetizador de freqüência de baixo custo em tecnologia CMOS." Universidade Estadual Paulista (UNESP), 2009. http://hdl.handle.net/11449/100280.

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Made available in DSpace on 2014-06-11T19:30:32Z (GMT). No. of bitstreams: 0 Previous issue date: 2009-11-25Bitstream added on 2014-06-13T21:01:20Z : No. of bitstreams: 1 oliveira_vjs_dr_ilha.pdf: 2584742 bytes, checksum: ae7b3113a196a5051a808dbb371dece4 (MD5)<br>Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)<br>Nesta tese, propõe-se um sintetizador de freqüência baseado em phase locked loops (PLL) usando uma arquitetura que utiliza um dual-path loop filter, constituído de componentes passivos e um integrador digital. A proposta é empregar técnicas digitais, para reduzi

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39

Li, Yao. "Proposition d'extension à SystemC-AMS pour la modélisation, la conception et la vérification de systèmes mixtes analogiques-numériques." Thesis, Paris 6, 2015. http://www.theses.fr/2015PA066190.

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Parmi les produits électroniques de l’industrie des semi-conducteurs, les applications mixtes numériques-analogiques (AMS) représentent une part de marché à forte croissance. Le principal problème pour la conception de systèmes AMS est l’absence de flot de conception standard, puisque les blocs AMS ne peuvent pas être synthétisés de façon systématique `a partir d’une spécification de haut niveau en l’absence d’information au niveau transistor. Par ailleurs, il est très difficile de modéliser les caractéristiques au niveau transistor dans des descriptions comportementales de plus haut niveau (s

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40

Terlemez, Bortecene. "Oscillation Control in CMOS Phase-Locked Loops." Diss., Georgia Institute of Technology, 2004. http://hdl.handle.net/1853/4841.

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Recent advances in voltage-controlled oscillator (VCO) design and the trend of CMOS processing indicate that the oscillator control is quickly becoming one of the forefront problems in high-frequency and low-phase-noise phase-locked loop (PLL) design. This control centric study explores the limitations and challenges in high-performance analog charge-pump PLLs when they are extended to multiple gigahertz applications. Several problems with performance enhancement and precise oscillator control using analog circuits in low-voltage submicron CMOS processes, coupled with the fact that analo

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41

Dubois, Matthieu. "Méthodologie d'estimation des métriques de test appliquée à une nouvelle technique de BIST de convertisseur SIGMA / DELTA." Phd thesis, Université de Grenoble, 2011. http://tel.archives-ouvertes.fr/tel-00633056.

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L'expansion du marché des semi-conducteurs dans tous les secteurs d'activité résulte de la capacité de créer de nouvelles applications grâce à l'intégration de plus en plus de fonctionnalités sur une surface de plus en plus faible. Pour chaque entreprise, la compétitivité dépend du coût de fabrication mais aussi de la fiabilité du produit. Ainsi, la phase de test d'un circuit intégré, et plus particulièrement des circuits analogiques et mixtes, est le facteur prédominant dans les choix d'un compromis entre ces deux critères antagonistes, car son coût est désormais proche du coût de production.

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42

Lin, Jun Weir, and 林俊偉. "Fault Diagnosis for Analog and Mixed Signal Circuits." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/05208080634141915186.

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博士<br>國立交通大學<br>電子工程系<br>91<br>This dissertation studies four subjects of the analog and mixed signal circuit diagnosis. The first subject is a fault diagnosis method for the linear analog circuit in the discretized domain for which the computation effort is saved. The second subject is an efficient test and diagnosis scheme for the feedback type of analog circuits with minimal added circuits. The third subject is a design for diagnosis scheme for the phase-locked loop (PLL) circuit. The fourth one is a method for the code edge estimation for the DAC/ADC using a statistical successive approxim

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43

Deng, Yue. "SAT-based Verification for Analog and Mixed-signal Circuits." Thesis, 2012. http://hdl.handle.net/1969.1/ETD-TAMU-2012-05-11221.

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The wide application of analog and mixed-signal (AMS) designs makes the verification of AMS circuits an important task. However, verification of AMS circuits remains as a significant challenge even though verification techniques for digital circuits design have been successfully applied in the semiconductor industry. In this thesis, we propose two techniques for AMS verification targeting DC and transient verifications, respectively. The proposed techniques leverage a combination of circuit modeling, satisfiability (SAT) and circuit simulation techniques. For DC verification, we first build

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44

Lin, Yu. "Yield and performance enhancement of analog and mixed signal circuits /." 2006.

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45

Kulkarni, Raghavendra Laxman. "Analog Baseband Filters and Mixed Signal Circuits for Broadband Receiver Systems." Thesis, 2011. http://hdl.handle.net/1969.1/ETD-TAMU-2011-12-10550.

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Data transfer rates of communication systems continue to rise fueled by aggressive demand for voice, video and Internet data. Device scaling enabled by modern lithography has paved way for System-on-Chip solutions integrating compute intensive digital signal processing. This trend coupled with demand for low power, battery-operated consumer devices offers extensive research opportunities in analog and mixed-signal designs that enable modern communication systems. The first part of the research deals with broadband wireless receivers. With an objective to gain insight, we quantify the impact o

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46

Meng-Lin, Wu. "An Analog/Mixed-Signal Circuits Macromodel Technique for Yield Analysis Applications." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2909200611422300.

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47

Meng-Lin, Wu, and 吳孟霖. "An Analog/Mixed-Signal Circuits Macromodel Technique for Yield Analysis Applications." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/72622898939897154053.

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碩士<br>國立臺灣大學<br>電子工程學研究所<br>95<br>As the IC fabrication technology advances, the transistor feature size keeps shrinking and it is possible now to integrate a complete system on a chip. However, as the device size decreases, the inevitable process variations become an important factor of manufacturing yield. Under the influence of process variations, the performances of the fabricated IC''s deviate from those of the nominal design. As a result, some IC''s may still function, but their specifications are out of the acceptable range. Monte Carlo simulation is a commonly used technique for yield

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48

Singh, Amandeep. "Behavioral Model Equivalence Checking for Large Analog Mixed Signal Systems." Thesis, 2011. http://hdl.handle.net/1969.1/ETD-TAMU-2011-05-9379.

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This thesis proposes a systematic, hierarchical, optimization based semi-formal equivalence checking methodology for large analog/mixed signal systems such as phase locked loops (PLL), analog to digital convertors (ADC) and input/output (I/O) circuits. I propose to verify the equivalence between a behavioral model and its electrical implementation over a limited, but highly likely, input space defined as the Constrained Behavioral Input Space. Furthermore, I clearly distinguish between the behavioral and electrical domains and define mapping functions between the two domains to allow for calcu

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49

"Aging Predictive Models and Simulation Methods for Analog and Mixed-Signal Circuits." Master's thesis, 2011. http://hdl.handle.net/2286/R.I.9148.

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abstract: Negative bias temperature instability (NBTI) and channel hot carrier (CHC) are important reliability issues impacting analog circuit performance and lifetime. Compact reliability models and efficient simulation methods are essential for circuit level reliability prediction. This work proposes a set of compact models of NBTI and CHC effects for analog and mixed-signal circuit, and a direct prediction method which is different from conventional simulation methods. This method is applied in circuit benchmarks and evaluated. This work helps with improving efficiency and accuracy of circu

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50

Bie, Jony Shiang Lin, and 白祥麟. "Design of a Mixed Signal Analog-Digital Simulator for CMOS VLSI Circuits." Thesis, 1993. http://ndltd.ncl.edu.tw/handle/63874370076687970747.

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碩士<br>國立交通大學<br>電子研究所<br>81<br>The mixed-mode simulator is currently one of the most efficit tools for timing verification of analog-digital CMOS VLSI circuits. We have developed a mixed-mode simulator by combining the conventional circuit level simulation techniques, sampled- data level circuit techniques for analog circuit simulation and the gate level techniques for digital circuit simulation based on the event-driven concept. A new scheme at the macrocell level is propose

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