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Journal articles on the topic 'Analog and RF'

Author: Grafiati
Published: 4 June 2021
Last updated: 18 February 2022

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1

OKADA, Kenichi. "Digitally Assisted Analog and RF Circuits." IEICE Transactions on Electronics E98.C, no. 6 (2015): 461–70. http://dx.doi.org/10.1587/transele.e98.c.461.

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2

Mostafanezhad, Isar, and Olga Boric-Lubecke. "An RF Based Analog Linear Demodulator." IEEE Microwave and Wireless Components Letters 21, no. 7 (July 2011): 392–94. http://dx.doi.org/10.1109/lmwc.2011.2154318.

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3

Musayev, Javid, and Antonio Liscidini. "A Quantized Analog RF Front End." IEEE Journal of Solid-State Circuits 54, no. 7 (July 2019): 1929–40. http://dx.doi.org/10.1109/jssc.2019.2914576.

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4

Muhammad, Khurram, Thomas Murphy, and Robert Bogdan Staszewski. "Verification of Digital RF Processors: RF, Analog, Baseband, and Software." IEEE Journal of Solid-State Circuits 42, no. 5 (May 2007): 992–1002. http://dx.doi.org/10.1109/jssc.2007.894327.

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5

Deng, Jun, Liang Zhou, Xiao Zong Huang, Xu Huang, Yu Jing Li, Lin Tao Liu, and Yi Tao. "Study of System Modeling and Simulation Based on Mixed Domain for Analog-Digital Mixed SoC." Applied Mechanics and Materials 423-426 (September 2013): 2688–92. http://dx.doi.org/10.4028/www.scientific.net/amm.423-426.2688.

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The design of digital-analog mixed SoC involves RF/analog and digital domains, how to effectively improve the design reliability and to reduce the development cycles has become a research hotspot. This paper establishes the appropriate behavioral models of RF / analog / digital IP modules, and carries out the behavioral simulation based on the built mixed-domain simulation platform and the behavioral libraries of RF/analog/digital IP module, which enhances the reliability and stability of mixed SoC design, and reduces the design cycle. Those explorations may be helpful to the designers of digital-analog mixed SoC.
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6

OKUBO, NAOFUMI. "Notice the Analog Circuit Technology. RF Systems Need Analog Circuit Technologies." Journal of the Institute of Electrical Engineers of Japan 118, no. 7/8 (1998): 422–25. http://dx.doi.org/10.1541/ieejjournal.118.422.

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7

Bruines, Joop J. P. "Process outlook for analog and RF applications." Microelectronic Engineering 54, no. 1-2 (December 2000): 35–48. http://dx.doi.org/10.1016/s0167-9317(00)80057-x.

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8

Cooklev, Todor, Robert Normoyle, and David Clendenen. "The VITA 49 Analog RF-Digital Interface." IEEE Circuits and Systems Magazine 12, no. 4 (2012): 21–32. http://dx.doi.org/10.1109/mcas.2012.2221520.

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9

Lim, Tao Chuan, Emilie Bernard, Olivier Rozeau, Thomas Ernst, Bernard Guillaumot, Nathalie Vulliet, Christel Buj-Dufournet, et al. "Analog/RF Performance of Multichannel SOI MOSFET." IEEE Transactions on Electron Devices 56, no. 7 (July 2009): 1473–82. http://dx.doi.org/10.1109/ted.2009.2021438.

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10

Wang, Yiqi, Mengxin Liu, Jinshun Bi, and Zhengsheng Han. "PDSOI DTMOS for analog and RF application." Journal of Semiconductors 32, no. 5 (May 2011): 054004. http://dx.doi.org/10.1088/1674-4926/32/5/054004.

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11

Rehman, Saeed Ur, Shafiq Alam, and Iman T. Ardekani. "An Overview of Radio Frequency Fingerprinting for Low-End Devices." International Journal of Mobile Computing and Multimedia Communications 6, no. 3 (July 2014): 1–21. http://dx.doi.org/10.4018/ijmcmc.2014070101.

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RF fingerprinting is proposed as a means of providing an additional layer of security for wireless devices. A masquerading or impersonation attacks can be prevented by establishing the identity of wireless transmitter using unique transmitter RF fingerprint. Unique RF fingerprints are attributable to the analog components (digital-to-analog converters, band-pass filters, frequency mixers and power amplifiers) present in the RF front ends of transmitters. Most of the previous researches have reported promising results with an accuracy of up to 99% using high-end receivers (e.g. Giga-sampling rate oscilloscopes, spectrum and vector signal analysers) to validate the proposed techniques. However, practical implementation of RF fingerprinting would require validation with low-end (low-cost) devices that also suffers from impairments due to the presence of analog components in the front end of its receiver. This articles provides the analysis and implementation of RF fingerprinting using low-cost receivers and challenges associated with it.
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12

Baral, Biswajit, Sudhansu Mohan Biswal, Debashis De, and Angsuman Sarkar. "Radio frequency/analog and linearity performance of a junctionless double gate metal–oxide–semiconductor field-effect transistor." SIMULATION 93, no. 11 (April 20, 2017): 985–93. http://dx.doi.org/10.1177/0037549717704308.

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The analog/radio frequency (RF) and linearity performance of a junctionless double gate metal–oxide–semiconductor field-effect transistor (JL DGMOS) is investigated using the numerical TCAD device simulator. JL DGMOSs have shown great promise for high-performance digital applications due to their superior short channel effect performance and ease of fabrication. In analog and RF circuit applications, linearity testing and RF performance is a major issue that is encountered due to non-linear behavior of the devices. Therefore, in this paper, different RF/analog and linearity performance figures of merits such as transconductance, intrinsic gain, the transconductance generation factor, the cut off frequency, the maximum frequency of oscillation, the gain bandwidth product, the variable intercept point of second order, the variable intercept point of third order, inter modulation distortion, the third-order intercept point, and 1-dB compression have been presented. Moreover, the effect of gate-length downscaling on these performance parameters has been carried out. The results indicate that the down scaled JL DGMOS shows great promise to become a competitive contender for analog/mixed signal system on chip applications by demonstrating a significant improvement in its RF performance with gate-length downscaling.
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13

Pan, Renjian, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng, and Xin Li. "Analog/RF Post-silicon Tuning via Bayesian Optimization." ACM Transactions on Design Automation of Electronic Systems 25, no. 1 (January 29, 2020): 1–17. http://dx.doi.org/10.1145/3365577.

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14

Jaehyok Yi, Youngoo Yang, Myungkyu Park, Wonwoo Kang, and Bumman Kim. "Analog predistortion linearizer for high-power RF amplifiers." IEEE Transactions on Microwave Theory and Techniques 48, no. 12 (2000): 2709–13. http://dx.doi.org/10.1109/22.899034.

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15

Debaillie, Bjorn, Dirk-Jan van den Broek, Cristina Lavin, Barend van Liempd, Eric A. M. Klumperink, Carmen Palacios, Jan Craninckx, Bram Nauta, and Aarno Parssinen. "Analog/RF Solutions Enabling Compact Full-Duplex Radios." IEEE Journal on Selected Areas in Communications 32, no. 9 (September 2014): 1662–73. http://dx.doi.org/10.1109/jsac.2014.2330171.

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16

Razavi, B. "CMOS technology characterization for analog and RF design." IEEE Journal of Solid-State Circuits 34, no. 3 (March 1999): 268–76. http://dx.doi.org/10.1109/4.748177.

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17

Tai, Chih-Hsuan, Jyi-Tsong Lin, and Yi-Chuen Eng. "RF/Analog Performance of Novel Junctionless Vertical MOSFETs." Integrated Ferroelectrics 129, no. 1 (January 2011): 45–51. http://dx.doi.org/10.1080/10584587.2011.576899.

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18

Chang, Henry, and Ken Kundert. "Verification of Complex Analog and RF IC Designs." Proceedings of the IEEE 95, no. 3 (March 2007): 622–39. http://dx.doi.org/10.1109/jproc.2006.889384.

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19

Ghosh, Sayani, Kalyan Koley, Samar K. Saha, and Chandan K. Sarkar. "Heterostructure Ge-Body pTFETs for Analog/RF Applications." IEEE Journal of the Electron Devices Society 8 (2020): 1202–9. http://dx.doi.org/10.1109/jeds.2020.3025545.

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20

Léger, Gildas, and Carsten Wegener. "Guest Editorial: Analog, Mixed-Signal and RF Testing." Journal of Electronic Testing 32, no. 4 (July 18, 2016): 405–6. http://dx.doi.org/10.1007/s10836-016-5608-y.

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21

Barragan, Manuel J., and William R. Eisenstadt. "Guest Editorial: Analog, Mixed-Signal and RF Testing." Journal of Electronic Testing 33, no. 3 (May 2, 2017): 281–82. http://dx.doi.org/10.1007/s10836-017-5663-z.

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22

Chung, Yong-Duck, Young-Shik Kang, Kwang-Seong Choi, Sung-Bock Kim, and Jeha Kim. "Analog characteristics of electroabsorption modulator for RF/optic conversion; RF gain and IMD3." Microwave and Optical Technology Letters 48, no. 6 (2006): 1151–55. http://dx.doi.org/10.1002/mop.21564.

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23

Dmitriev, A. S., A. I. Panas, S. O. Starkov, and L. V. Kuzmin. "Experiments on RF Band Communications Using Chaos." International Journal of Bifurcation and Chaos 07, no. 11 (November 1997): 2511–27. http://dx.doi.org/10.1142/s0218127497001680.

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24

Nguyen, Van Tam, Frederic Villain, and Yann Le Guillou. "Cognitive Radio RF: Overview and Challenges." VLSI Design 2012 (May 22, 2012): 1–13. http://dx.doi.org/10.1155/2012/716476.

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Cognitive radio system (CRS) is a radio system which is aware of its operational and geographical environment, established policies, and its internal state. It is able to dynamically and autonomously adapt its operational parameters and protocols and to learn from its previous experience. Based on software-defined radio (SDR), CRS provides additional flexibility and offers improved efficiency to overall spectrum use. CRS is a disruptive technology targeting very high spectral efficiency. This paper presents an overview and challenges of CRS with focus on radio frequency (RF) section. We summarize the status of the related regulation and standardization activities which are very important for the success of any emerging technology. We point out some key research challenges, especially implementation challenges of cognitive radio (CR). A particular focus is on RF front-end, transceiver, and analog-to-digital and digital-to-analog interfaces which are still a key bottleneck in CRS development.
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25

Harame, D. L., K. M. Newton, R. Singh, S. L. Sweeney, S. E. Strang, J. B. Johnson, S. M. Parker, et al. "Design automation methodology and rf/analog modeling for rf CMOS and SiGe BiCMOS technologies." IBM Journal of Research and Development 47, no. 2.3 (March 2003): 139–75. http://dx.doi.org/10.1147/rd.472.0139.

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26

TANAKA, Satoshi. "Evolutional Trend of Mixed Analog and Digital RF Circuits." IEICE Transactions on Electronics E92.C, no. 6 (2009): 757–68. http://dx.doi.org/10.1587/transele.e92.c.757.

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27

MASUI, Shoichi, and Takayuki KONISHI. "RF/Analog Circuit Design in Scaled Digital CMOS Technology." Journal of The Institute of Electrical Engineers of Japan 131, no. 1 (2011): 30–33. http://dx.doi.org/10.1541/ieejjournal.131.30.

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28

Cheng, Kwang-Ting (Tim), and Hsiu-Ming (Sherman) Chang. "Recent Advances in Analog, Mixed-Signal, and RF Testing." IPSJ Transactions on System LSI Design Methodology 3 (2010): 19–46. http://dx.doi.org/10.2197/ipsjtsldm.3.19.

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29

Rich, D. A., M. S. Carroll, M. R. Frei, T. G. Ivanov, M. Mastrapasqua, S. Moinian, A. S. Chen, et al. "BiCMOS technology for mixed-digital, analog, and RF applications." IEEE Microwave Magazine 3, no. 2 (June 2002): 44–55. http://dx.doi.org/10.1109/mmw.2002.1004051.

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30

Chauhan, Yogesh Singh, Sriramkumar Venugopalan, Maria-Anna Chalkiadaki, Muhammed Ahosan Ul Karim, Harshit Agarwal, Sourabh Khandelwal, Navid Paydavosi, et al. "BSIM6: Analog and RF Compact Model for Bulk MOSFET." IEEE Transactions on Electron Devices 61, no. 2 (February 2014): 234–44. http://dx.doi.org/10.1109/ted.2013.2283084.

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31

KIM, J., Y. D. CHUNG, K. S. CHOI, Y. S. KANG, and K. I. CHO. "Characteristics of 60 GHz Analog RF-Optic Transceiver Module." IEICE Transactions on Electronics E90-C, no. 2 (February 1, 2007): 359–64. http://dx.doi.org/10.1093/ietele/e90-c.2.359.

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32

Afacan, Engin. "Inversion coefficient optimization based Analog/RF circuit design automation." Microelectronics Journal 83 (January 2019): 86–93. http://dx.doi.org/10.1016/j.mejo.2018.11.015.

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33

Kupp, Nathan, He Huang, Yiorgos Makris, and Petros Drineas. "Improving Analog and RF Device Yield through Performance Calibration." IEEE Design & Test of Computers 28, no. 3 (May 2011): 64–75. http://dx.doi.org/10.1109/mdt.2010.119.

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34

Natarajan, Vishwanath, Shreyas Sen, Aritra Banerjee, Abhijit Chatterjee, Ganesh Srinivasan, and Friedrich Taenzler. "Analog Signature- Driven Postmanufacture Multidimensional Tuning of RF Systems." IEEE Design & Test of Computers 27, no. 6 (November 2010): 6–17. http://dx.doi.org/10.1109/mdt.2010.123.

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35

Singh, Jagar, J. Ciavatti, K. Sundaram, J. S. Wong, A. Bandyopadhyay, X. Zhang, S. Li, et al. "14-nm FinFET Technology for Analog and RF Applications." IEEE Transactions on Electron Devices 65, no. 1 (January 2018): 31–37. http://dx.doi.org/10.1109/ted.2017.2776838.

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36

Raskin, Jean‐Pierre. "Silicon‐on‐insulator MOSFETs models in analog/RF domain." International Journal of Numerical Modelling: Electronic Networks, Devices and Fields 27, no. 5-6 (November 28, 2013): 707–35. http://dx.doi.org/10.1002/jnm.1950.

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37

Subramanian, Vaidy, Bertrand Parvais, Jonathan Borremans, Abdelkarim Mercha, Dimitri Linten, Piet Wambacq, Josine Loo, et al. "Planar Bulk MOSFETs Versus FinFETs: An Analog/RF Perspective." IEEE Transactions on Electron Devices 53, no. 12 (December 2006): 3071–79. http://dx.doi.org/10.1109/ted.2006.885649.

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38

Garcia-Rodriguez, Adrian, Vijay Venkateswaran, Pawel Rulikowski, and Christos Masouros. "Hybrid Analog–Digital Precoding Revisited Under Realistic RF Modeling." IEEE Wireless Communications Letters 5, no. 5 (October 2016): 528–31. http://dx.doi.org/10.1109/lwc.2016.2598777.

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39

Magueta, R., V. Mendes, D. Castanheira, A. Silva, R. Dinis, and A. Gameiro. "Iterative Multiuser Equalization for Subconnected Hybrid mmWave Massive MIMO Architecture." Wireless Communications and Mobile Computing 2017 (2017): 1–13. http://dx.doi.org/10.1155/2017/9171068.

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Millimeter waves and massive MIMO are a promising combination to achieve the multi-Gb/s required by future 5G wireless systems. However, fully digital architectures are not feasible due to hardware limitations, which means that there is a need to design signal processing techniques for hybrid analog-digital architectures. In this manuscript, we propose a hybrid iterative block multiuser equalizer for subconnected millimeter wave massive MIMO systems. The low complexity user-terminals employ pure-analog random precoders, each with a single RF chain. For the base station, a subconnected hybrid analog-digital equalizer is designed to remove multiuser interference. The hybrid equalizer is optimized using the average bit-error-rate as a metric. Due to the coupling between the RF chains in the optimization problem, the computation of the optimal solutions is too complex. To address this problem, we compute the analog part of the equalizer sequentially over the RF chains using a dictionary built from the array response vectors. The proposed subconnected hybrid iterative multiuser equalizer is compared with a recently proposed fully connected approach. The results show that the performance of the proposed scheme is close to the fully connected hybrid approach counterpart after just a few iterations.
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40

Jeha Kim, Young-Shik Kang, Yong-Duck Chung, and Kwang-Seong Choi. "Development and RF characteristics of analog 60-GHz electroabsorption modulator module for RF/optic conversion." IEEE Transactions on Microwave Theory and Techniques 54, no. 2 (February 2006): 780–87. http://dx.doi.org/10.1109/tmtt.2005.863067.

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41

Devgan, Paul. "A Review of Optoelectronic Oscillators for High Speed Signal Processing Applications." ISRN Electronics 2013 (April 29, 2013): 1–16. http://dx.doi.org/10.1155/2013/401969.

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The Optoelectronic Oscillator (OEO) was first demonstrated in 1996 as a low phase noise RF source. Low phase noise RF sources have uses for multiple applications, ranging from analog to digital converters to radar to metrology. In the past sixteen years, the OEO has been shown to be useful for other signal processing applications. This paper will provide a background of the OEO’s principles of operation, as well as multiple examples of signal processing applications where the OEO can be used. The OEO can be applied to both analog and digital problems, providing new techniques to solve these challenges.
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42

Ayesha, Areeba, MuhibUr Rahman, Amir Haider, and Shabbir Majeed Chaudhry. "On Self-Interference Cancellation and Non-Idealities Suppression in Full-Duplex Radio Transceivers." Mathematics 9, no. 12 (June 20, 2021): 1434. http://dx.doi.org/10.3390/math9121434.

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One of the major impediments in the design and operation of a full-duplex radio transceiver is the presence of self-interference (SI), that is, the transceiver’s transmitted signal, 60–100 dB stronger than the desired signal of interest. To reduce the SI signal below the receiver’s sensitivity before coupling it to the receiver, radio frequency (RF)/analog domain cancellation is carried out. Even after SI cancellation to the required level in the analog domain, the residual SI signal still exits and lowers the transceiver’s performance. For residual SI cancellation, a digital domain cancellation is carried out. RF impairments are the major obstacle in the residual SI cancellation path in the digital domain. Linearization of RF impairments such as IQ mixer imbalance in the transmitter and receiver chain, non-linear PA with memory, and non-linear LNA are also carried out. Performance evaluation of the proposed techniques is carried out based on SINR, the power of different SI signal components, PSD, output to input relationship, SNR vs. BER, spectrum analyzer, constellation diagram, and link budget analysis. The proposed techniques provide attractive RF/analog SI cancellation of up to 80–90 dB, digital residual SI cancellation of up to 35 to 40 dB, total SI cancellation of up to 110 to 130 dB, and an SINR improvement of up to 50 dB.
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43

Hefnawi, Mostafa. "Hybrid Beamforming for Millimeter-Wave Heterogeneous Networks." Electronics 8, no. 2 (January 28, 2019): 133. http://dx.doi.org/10.3390/electronics8020133.

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Heterogeneous networks (HetNets) employing massive multiple-input multiple-output (MIMO) and millimeter-wave (mmWave) technologies have emerged as a promising solution to enhance the network capacity and coverage of next-generation 5G cellular networks. However, the use of traditional fully-digital MIMO beamforming methods, which require one radio frequency (RF) chain per antenna element, is not practical for large-scale antenna arrays, due to the high cost and high power consumption. To reduce the number of RF chains, hybrid analog and digital beamforming has been proposed as an alternative structure. In this paper, therefore, we consider a HetNet formed with one macro-cell base station (MBS) and multiple small-cell base stations (SBSs) equipped with large-scale antenna arrays that employ hybrid analog and digital beamforming. The analog beamforming weight vectors of the MBS and the SBSs correspond to the the best-fixed multi-beams obtained by eigendecomposition schemes. On the other hand, digital beamforming weights are optimized to maximize the receive signal-to-interference-plus-noise ratio (SINR) of the effective channels consisting of the cascade of the analog beamforming weights and the actual channel. The performance is evaluated in terms of the beampatterns and the ergodic channel capacity and shows that the proposed hybrid beamforming scheme achieves near-optimal performance with only four RF chains while requiring considerably less computational complexity.
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44

Bojja Venkatakrishnan, Satheesh, Elias A. Alwan, and John L. Volakis. "Challenges in Clock Synchronization for On-Site Coding Digital Beamformer." International Journal of Reconfigurable Computing 2017 (2017): 1–8. http://dx.doi.org/10.1155/2017/7802735.

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Typical radio frequency (RF) digital beamformers can be highly complex. In addition to a suitable antenna array, they require numerous receiver chains, demodulators, data converter arrays, and digital signal processors. To recover and reconstruct the received signal, synchronization is required since the analog-to-digital converters (ADCs), digital-to-analog converters (DACs), field programmable gate arrays (FPGAs), and local oscillators are all clocked at different frequencies. In this article, we present a clock synchronization topology for a multichannel on-site coding receiver (OSCR) using the FPGA as a master clock to drive all RF blocks. This approach reduces synchronization errors by a factor of 8, when compared to conventional digital beamformer.
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45

Wambacq, Piet, Bob Verbruggen, Karen Scheir, Jonathan Borremans, Morin Dehan, Dimitri Linten, Vincent De Heyn, et al. "The Potential of FinFETs for Analog and RF Circuit Applications." IEEE Transactions on Circuits and Systems I: Regular Papers 54, no. 11 (November 2007): 2541–51. http://dx.doi.org/10.1109/tcsi.2007.907866.

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46

Hsieh, Yi-Keng, Ya-Ru Wu, Po-Chih Ku, and Liang-Hung Lu. "An Analog On-Line Gain Calibration Loop for RF Amplifiers." IEEE Transactions on Circuits and Systems I: Regular Papers 62, no. 8 (August 2015): 2003–12. http://dx.doi.org/10.1109/tcsi.2015.2440736.

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47

Yuan, Jun, and Jason C. S. Woo. "Nanoscale MOSFET with Split-Gate Design for RF/Analog Application." Japanese Journal of Applied Physics 43, no. 4B (April 27, 2004): 1742–45. http://dx.doi.org/10.1143/jjap.43.1742.

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48

Gupta, Shikhar, and Ashutosh Nandi. "Temperature analysis of underlap GAA-SNWTs for analog/RF applications." Microelectronics Journal 90 (August 2019): 58–62. http://dx.doi.org/10.1016/j.mejo.2019.05.012.

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49

Qiang Zhu Zhu and Yang Xu. "Quadrature Sampling for Built-In Analog/RF IC Spectrum Test." IEEE Transactions on Circuits and Systems II: Express Briefs 57, no. 5 (May 2010): 384–88. http://dx.doi.org/10.1109/tcsii.2010.2047322.

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50

Webster, Dallas, Rick Hudgens, and Donald Lie. "Replacing Error Vector Magnitude Test with RF and Analog BISTs." IEEE Design & Test of Computers 28, no. 6 (November 2011): 66–75. http://dx.doi.org/10.1109/mdt.2011.1.

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