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Relevant bibliographies by topics / Analog circuits / Dissertations / Theses

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Dissertations / Theses on the topic 'Analog circuits'

Author: Grafiati

Published: 4 June 2021

Last updated: 25 July 2025

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1

Fayed, Ayman Adel. "Adaptive techniques for analog and mixed signal integrated circuits." Connect to this title online, 2004. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=osu1097519730.

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Thesis (Ph. D.)--Ohio State University, 2004.<br>Title from first page of PDF file. Document formatted into pages; contains xix, 232 p.; also includes graphics (some col.). Includes bibliographical references (p. 222-230).

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2

Kuznetsov, Eugene. "Trust in analog : analog circuit techniques for reducing the risk of malicious circuits and software." Thesis, Massachusetts Institute of Technology, 2011. http://hdl.handle.net/1721.1/66431.

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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.<br>Cataloged from PDF version of thesis.<br>Includes bibliographical references (p. 47).<br>Malicious circuits and software present a significant security risk, especially in control applications. This work is concerned with increasing the trustworthiness of control circuitry by reducing its complexity. The security benefits of substituting analog control techniques in place of digital control are analyzed, and both discrete and integrated circuit designs are demonstrated.<br>by

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3

Bhattacharya, Sambuddha. "Template-driven parasitic-aware optimization of analog/RF IC layouts /." Thesis, Connect to this title online; UW restricted, 2005. http://hdl.handle.net/1773/6121.

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4

Hong, Seong-Kwan. "Performance driven analog layout compiler." Diss., Georgia Institute of Technology, 1994. http://hdl.handle.net/1853/15037.

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5

Ravinuthula, Vishnu. "Time-mode circuits for analog computation." [Gainesville, Fla.] : University of Florida, 2006. http://purl.fcla.edu/fcla/etd/UFE0015625.

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6

Raahemi, Bijan. "Analysis of analog sampled data circuits." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk3/ftp04/nq21384.pdf.

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7

Knight, Clinton D. "WWW-based testing of analog circuits." Diss., Georgia Institute of Technology, 1999. http://hdl.handle.net/1853/14863.

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8

Auckloo, Sheik Mamode Akeel. "Analog frontend circuits for avalanche photodiodes." Thesis, University of Sheffield, 2016. http://etheses.whiterose.ac.uk/17129/.

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The aims of this work is to design low noise electronics for optical sensing and X‐ray spectroscopy using Sheffield‐grown Avalanche photodiodes(APD). A transimpedance amplifier(TIA) for a 2.0 μm LIDAR system is designed and tested as part of a project funded by ESA. Numerical analysis is provided for the TIA in addition to SPICE and experimental analysis. Characterisation of the TIA shows that a noise equivalent power of less than 100 fW/√Hz can be achieved with an optimised InAs APD. Preliminary results of a TIA‐InAs module at 2.0 μm is presented. A low noise charge sensitive preamplifier(CSP

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9

Papadantonakis, Karl Spyros Martin Alain J. "Rigorous analog verification of asynchronous circuits /." Diss., Pasadena, Calif. : Caltech, 2006. http://resolver.caltech.edu/CaltechETD:etd-01132006-152609.

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10

Borkowski, Peter (Peter Joseph) 1963 Carleton University Dissertation Engineering Electrical. "Gallium arsenide analog circuits for high-speed analog-to-digital conversion." Ottawa.:, 1989.

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11

Mantooth, Homer Alan. "Higher level modeling of analog integrated circuits." Diss., Georgia Institute of Technology, 1990. http://hdl.handle.net/1853/14951.

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12

Tavakoli, Dastjerdi Maziar 1976. "Analog VLSI circuits for inertial sensory systems." Thesis, Massachusetts Institute of Technology, 2001. http://hdl.handle.net/1721.1/86766.

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Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2001.<br>Includes bibliographical references (leaves 67-68).<br>by Maziar Tavakoli Dastjerdi.<br>S.M.

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13

Vichik, Sergey. "Quadratic and linear optimization with analog circuits." Thesis, University of California, Berkeley, 2016. http://pqdtopen.proquest.com/#viewpdf?dispub=10086165.

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<p> In this work we propose and investigate a new method of solving quadratic and linear optimization problems using analog electrical circuits instead of digital computation.</p><p> We present the design of an analog circuit which solves Quadratic Programming (QP) or Linear Programming (LP) problems. In particular, the steady-state circuit voltages are the components of the QP (LP) optimal solution. The thesis shows how to construct the circuit and provides a proof of equivalence between the circuit and the QP (LP) problem.</p><p> We study the stability of the analog optimization circuit.

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14

Starzyk, Janusz A. "Topological analysis and diagnosis of analog circuits." Praca habilitacyjna, Wydawnictwo Politechniki Śląskiej, 2007. https://delibra.bg.polsl.pl/dlibra/docmetadata?showContent=true&id=25471.

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15

Das, Angan. "Algorithms for Topology Synthesis of Analog Circuits." University of Cincinnati / OhioLINK, 2008. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1227204301.

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16

Huang, Shu-Chuan. "Systematic design solutions for analog VLSI circuits /." The Ohio State University, 1994. http://rave.ohiolink.edu/etdc/view?acc_num=osu1487850665560538.

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17

BONIFAZI, MAURIZIO. "Analog circuits design for cellular neural network." Doctoral thesis, Università degli Studi di Roma "Tor Vergata", 2008. http://hdl.handle.net/2108/705.

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Il paradigma delle Reti Neurali Artificiali (ANN) consiste nell’applicazione del modello neurale “biologico” per la risoluzione di problemi che spesso sono troppo complessi per un’architettura di Von Neumann. La letteratura offre differenti approcci per l’implementazione di ANN. Qualche implementazione è di tipo software, altre sono soluzioni circuitali come circuiti digitali full-custom o FPGA (Field Programmable Gate Array), come pure circuiti analogici, e il tipo di implementazione di certo dipende dal tempo di esecuzione adeguato al tipo di applicazione. Questa tesi riguarda la progettaz

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18

ZURLA, RICCARDO. "Analog Circuits Design for Non-Volatile Memories." Doctoral thesis, Università degli studi di Pavia, 2018. http://hdl.handle.net/11571/1214898.

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STMicroelectronics has developed a test chip, Spider-Mem, containing several instances of a 32 KB PCM array macrocell to experimentally characterize the phase change memory cells and investigate its performance when placed in an integrated circuit. This work focuses on the design of analog blocks involved in the programming operation of the phase change memory. A voltage regulator was designed in order to supplies the programming circuitry with an accurate voltage to guarantee the correct operation over the requested power supplies range and temperature interval. The voltage regulator include

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19

Lui, Siu-hong. "Analog circuit design by nonconvex polynomial optimization two design examples /." Click to view the E-thesis via HKUTO, 2007. http://sunzi.lib.hku.hk/HKUTO/record/B39557418.

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20

Hamanaka, Cristian Otsuka. "Projeto de circuitos para geração de tensão de referência em sistemas receptores/transmissores RF." Universidade de São Paulo, 2007. http://www.teses.usp.br/teses/disponiveis/3/3140/tde-09012008-164614/.

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Este trabalho consiste no projeto de uma Fonte de Tensão de Referência CMOS com coeficiente de temperatura inferior a 50 ppm/ºC. Esta fonte deve ser aplicada em receptores/transmissores de radio freqüência mas pode também ser utilizada em qualquer sistema analógico. A tecnologia utilizada foi a CMOS 0,35 µm da AMS (Austria Micro Systems) com quatro níveis de metal e dois de silício policristalino. A fonte de tensão implementada é do tipo Bandgap e utiliza dispositivos MOS em inversão fraca, um transistor bipolar parasitário e resistores de silício policristalino de alta resistividade. No circ

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21

Solda', Silvia. "Design of low-power analog circuits for analog decoding and wireless sensors nodes." Doctoral thesis, Università degli studi di Padova, 2009. http://hdl.handle.net/11577/3426488.

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The first part of this work concerns analog decoding. It presents the design of the I/O interface for a fully analog iterative decoder for a serially concatenated convolutional code and of a fully analog Trellis Coded Modulation (TCM) decoder for error correction in multi-level (ML) flash memories. The iterative decoder represents a significant step ahead in the evolution of analog decoders due to its reconfigurability in both block length and code rate. Moreover, with an efficiency of 2.1nJ/bit, it outperforms digital decoders with the same block length of a factor up to 50. The potential per

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22

Dai, Hong. "Development of a decomposition approach for testing large analog circuits." Ohio : Ohio University, 1989. http://www.ohiolink.edu/etd/view.cgi?ohiou1172006982.

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23

Najafizadeh, Laleh. "Design of analog circuits for extreme environment applications." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/31796.

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Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2010.<br>Committee Chair: Cressler, John; Committee Member: Papapolymerou, John; Committee Member: Shen, Shyh-Chiang; Committee Member: Steffes, Paul; Committee Member: Zhou, Hao Min. Part of the SMARTech Electronic Thesis and Dissertation Collection.

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24

Gordon, Christal. "Bio-inspired, bio-compatible, reconfigurable analog CMOS circuits." Diss., Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/37222.

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This work details CMOS, bio-inspired, bio-compatible circuits which were used as synapses between an artificial neuron and a living neuron and between two living neurons. An intracellular signal from a living neuron was amplified, an integrate-and-fire neuron was used as a simple processing element to detect the spikes, and an artificial synapse was used to send outputs to another living neuron. The key structure is an electronic synapse which is based around a floating-gate pFET. The charge on the floating-gate is analogous to the synaptic weight and can be modified. This modification c

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25

El-Gamal, Mohamed A. "Fault location and parameter identification in analog circuits." Ohio : Ohio University, 1990. http://www.ohiolink.edu/etd/view.cgi?ohiou1172776742.

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26

Voorakaranam, Ramakrishna. "Signature based testing of analog and RF circuits." Diss., Georgia Institute of Technology, 2002. http://hdl.handle.net/1853/15009.

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27

Mason, J. S. B. "Analog Design within High Speed Serial Interface Circuits." Thesis, Oxford Brookes University, 2008. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.493433.

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The serial interface is a pervasive component within many electronic products and will be familiar to users of personal computers and modern electronic devices. Over the last twenty years, the serial interface or link has developed from a specialist electronic subsystem for computer and telecommunication systems to an essential building block for modern electronic products ranging from disk storage devices to home entertainment consoles. The high speed serial interface (HSS!) offers fast data transfer at relatively low cost and is now an semiconductor vendors supplying chips to original equipm

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28

Zhang, Lihong [Verfasser]. "Layout Synthesis of Analog Integrated Circuits / Lihong Zhang." Aachen : Shaker, 2003. http://d-nb.info/1179024044/34.

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29

Vigoda, Benjamin William 1973. "Continuous-time analog circuits for statistical signal processing." Thesis, Massachusetts Institute of Technology, 2003. http://hdl.handle.net/1721.1/62962.

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Thesis (Ph. D.)--Massachusetts Institute of Technology, School of Architecture and Planning, Program in Media Arts and Sciences, 2003.<br>Vita.<br>Includes bibliographical references (p. 205-209).<br>This thesis proposes an alternate paradigm for designing computers using continuous-time analog circuits. Digital computation sacrifices continuous degrees of freedom. A principled approach to recovering them is to view analog circuits as propagating probabilities in a message passing algorithm. Within this framework, analog continuous-time circuits can perform robust, programmable, high-speed, lo

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30

Ferraria, Telmo Filipe Pereira. "Verification of analog circuits in power-down mode." Master's thesis, Faculdade de Ciências e Tecnologia, 2013. http://hdl.handle.net/10362/9956.

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Dissertação para obtenção do Grau de Mestre em Engenharia Eletrotécnica e Computadores<br>The energy efficiency and optimization are two important points of analog circuits. With purpose to reduce the power consumption, most of these circuits are equipped with power-down features, which means the circuits are idle when they are not used. In power-down mode internal nodes can have floating states which results in an increase of the transistor degradation. In this thesis a computer program that checks the node voltage levels and the state of the transistors in power-down mode is presented.

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31

Motamed, Ali. "Low-voltage analog VLSI circuits and signal processing /." The Ohio State University, 1996. http://rave.ohiolink.edu/etdc/view?acc_num=osu1487942182325593.

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32

Teo, Jonathan Jin Yuan. "Synthetic analog feedback control circuits in living cells." Thesis, Massachusetts Institute of Technology, 2019. https://hdl.handle.net/1721.1/122722.

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Thesis: Ph. D., Massachusetts Institute of Technology, Computational and Systems Biology Program, 2019<br>Cataloged from PDF version of thesis.<br>Includes bibliographical references (pages 141-151).<br>Models of biochemical reaction networks in cells are important for advancing our understanding of complex biological systems and for designing functional synthetic biological circuits. However, most models are based on a deterministic digital framework that is largely incompatible with nonlinear dynamics, stochastics, high-order feedback, cross talk, loading, and resource consumption in biology

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33

DE, CANIO FRANCESCO. "HIGH DENSITY ANALOG CIRCUITS FOR SEMICONDUCTOR PIXEL DETECTORS." Doctoral thesis, Università degli studi di Pavia, 2017. http://hdl.handle.net/11571/1203339.

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The research activity carried out in this work is relevant to the design and characterization of high density analog circuits for semiconductor pixel detectors. This activity has been developed in the framework of the CERN RD53 collaboration, whose aim is the design of the next generation of hybrid pixel readout chips for the ATLAS and CMS phase 2 pixel upgrades. In this work, the development of two IP blocks is presented and discussed. In particular, a rad-hard bandgap voltage reference and a differential IO link have been designed and characterized. They will be included in the RD53A demonst

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34

Devarayanadurg, Giri V. "Test selection and fault simulation for analog integrated circuits /." Thesis, Connect to this title online; UW restricted, 2001. http://hdl.handle.net/1773/6040.

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35

Cheung, Wing-tai. "Geometric programming and signal flow graph assisted design of interconnect and analog circuits." Click to view the E-thesis via HKUTO, 2007. http://sunzi.lib.hku.hk/HKUTO/record/B39558526.

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36

Wilson, Denise M. "Analog VLSI architecture for chemical sensing microsystems." Diss., Georgia Institute of Technology, 1995. http://hdl.handle.net/1853/13322.

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37

Sabzavari, Abbas Mostafavi. "Fault simulation and diagnosis in analog electronic systems." Thesis, University of Exeter, 1988. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.328233.

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38

Farquhar, Ethan David. "Summary and Impact of Large Scale Field-Programmable Analog Neuron Arrays (FPNAs)." Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/14003.

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This work lays out the development of a reconfigurable electronic system, which is composed of biologically relevant circuits. This system has been termed a Field-Programmable Neuron Array (FPNA) and is analogous to the more familiar Field-Programmable Gate Array (FPGA) and Field-Programmable Analog Array (FPAA). At the core of the system is an array of output somas based on previously developed bio-physically based channel models. Linking them together is a complex 2D dendrite matrix, FPAA-like floating-gate routing, and associated support circuitry. Several levels of generality give thi

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39

Twigg, Christopher M. "Floating Gate Based Large-Scale Field-Programmable Analog Arrays for Analog Signal Processing." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/11601.

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Large-scale reconfigurable and programmable analog devices provide a new option for prototyping and synthesizing analog circuits for analog signal processing and beyond. Field-programmable analog arrays (FPAAs) built upon floating gate transistor technologies provide the analog reconfigurability and programmability density required for large-scale devices on a single integrated circuit (IC). A wide variety of synthesized circuits, such as OTA followers, band-pass filters, and capacitively coupled summation/difference circuits, were measured to demonstrate the flexibility of FPAAs. Three gen

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40

Liu, Zhi-Hong. "Mixed-signal testing of integrated analog circuits and modules." Ohio : Ohio University, 1999. http://www.ohiolink.edu/etd/view.cgi?ohiou1181174339.

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41

Variyam, Pramodchandran. "Efficient testing techniques for analog and mixed-signal circuits." Diss., Georgia Institute of Technology, 1999. http://hdl.handle.net/1853/13457.

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42

Tenten, Wilfried. "Improved analog to digital converter circuits using CMOS technology." Thesis, University of Bath, 1990. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.329619.

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43

Stehr, Guido. "On the performance space exploration of analog integrated circuits." [S.l.] : [s.n.], 2005. http://deposit.ddb.de/cgi-bin/dokserv?idn=97820073X.

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44

Yuan, Fei. "Noise, sensitivity, and distortion analysis of switched analog circuits." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1999. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape8/PQDD_0007/NQ44783.pdf.

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45

Yoon, Heebyung. "Fault detection and identification techniques for embedded analog circuits." Diss., Georgia Institute of Technology, 1998. http://hdl.handle.net/1853/13041.

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46

Li, Harry W. "A noniterative DC analysis program for analog integrated circuits." Diss., Georgia Institute of Technology, 1992. http://hdl.handle.net/1853/15977.

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47

Pehl, Michael [Verfasser]. "Discrete Sizing of Analog Integrated Circuits / Christian Michael Pehl." München : Verlag Dr. Hut, 2013. http://d-nb.info/103184385X/34.

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48

Koziol, Scott Michael. "Reconfigurable analog circuits for path planning and image processing." Diss., Georgia Institute of Technology, 2013. http://hdl.handle.net/1853/52931.

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Path planning and image processing are critical signal processing tasks for robots, autonomous vehicles, animated characters, etc. The ultimate goal of the path planning problem being addressed in this dissertation is how to use a reconfigurable Analog Very Large Scale Integration (AVLSI) circuit to plan a path for a Micro Aerial Vehicle (MAV) (or similar power constrained ground or sea robot) through an environment in an effort to conserve its limited battery resources. Path planning can be summarized with the following three tasks given that states, actions, an initial state, and a goal stat

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49

O'Halloran, Micah G. (Micah Galletta) 1978. "A clock-based analog memory element for integrated circuits." Thesis, Massachusetts Institute of Technology, 2002. http://hdl.handle.net/1721.1/87317.

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Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2002.<br>Includes bibliographical references (leaves 117-118).<br>by Micah G. O'Halloran.<br>S.M.

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50

Fisher, Andrew N. "Efficient, sound formal verification for analog/mixed-signal circuits." Thesis, The University of Utah, 2016. http://pqdtopen.proquest.com/#viewpdf?dispub=10003590.

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<p> The increasing demand for smaller, more efficient circuits has created a need for both digital and analog designs to scale down. Digital technologies have been successful in meeting this challenge, but analog circuits have lagged behind due to smaller transistor sizes having a disproportionate negative affect. Since many applications require small, low-power analog circuits, the trend has been to take advantage of digital's ability to scale by replacing as much of the analog circuitry as possible with digital counterparts. The results are known as \emph{digitally-intensive analog/mixed-sig

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