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Relevant bibliographies by topics / Analog Integrated Circuit Design / Dissertations / Theses

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Dissertations / Theses on the topic 'Analog Integrated Circuit Design'

Author: Grafiati

Published: 4 June 2021

Last updated: 25 July 2025

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1

Hu, Zongqi. "Analog integrated circuit design of hypertrellis decoders /." View abstract or full-text, 2003. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202003%20HU.

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2

Lui, Siu-hong. "Analog circuit design by nonconvex polynomial optimization two design examples /." Click to view the E-thesis via HKUTO, 2007. http://sunzi.lib.hku.hk/HKUTO/record/B39557418.

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3

Lui, Siu-hong, and 呂小康. "Analog circuit design by nonconvex polynomial optimization: two design examples." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2007. http://hub.hku.hk/bib/B39557418.

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4

Fayed, Ayman Adel. "Adaptive techniques for analog and mixed signal integrated circuits." Connect to this title online, 2004. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=osu1097519730.

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Thesis (Ph. D.)--Ohio State University, 2004.<br>Title from first page of PDF file. Document formatted into pages; contains xix, 232 p.; also includes graphics (some col.). Includes bibliographical references (p. 222-230).

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5

Fei, Haibo. "High linearity analog and mixed-signal integrated circuit design." [Ames, Iowa : Iowa State University], 2007.

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6

Hong, Seong-Kwan. "Performance driven analog layout compiler." Diss., Georgia Institute of Technology, 1994. http://hdl.handle.net/1853/15037.

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7

Cheung, Wing-tai. "Geometric programming and signal flow graph assisted design of interconnect and analog circuits." Click to view the E-thesis via HKUTO, 2007. http://sunzi.lib.hku.hk/HKUTO/record/B39558526.

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8

Bhattacharya, Sambuddha. "Template-driven parasitic-aware optimization of analog/RF IC layouts /." Thesis, Connect to this title online; UW restricted, 2005. http://hdl.handle.net/1773/6121.

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9

Su, Wenjun. "Design and development of high CMRR wide bandwidth instrumentation amplifiers." Thesis, Oxford Brookes University, 1997. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.364097.

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10

Odame, Kofi. "Exploiting device nonlinearity in analog circuit design." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/29751.

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Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009.<br>Committee Chair: Hasler, Paul; Committee Member: Anderson, David; Committee Member: Butera, Robert; Committee Member: Minch, Bradley; Committee Member: Taylor, David. Part of the SMARTech Electronic Thesis and Dissertation Collection.

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11

Wemple, Ivan L. "Parasitic substrate modeling for monolithic mixed analog/digital circuit design and verification /." Thesis, Connect to this title online; UW restricted, 1996. http://hdl.handle.net/1773/5944.

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12

Ale, Anil Kumar. "Comparison and Evaluation of Existing Analog Circuit Simulator using Sigma-Delta Modulator." Thesis, University of North Texas, 2006. https://digital.library.unt.edu/ark:/67531/metadc5422/.

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In the world of VLSI (very large scale integration) technology, there are many different types of circuit simulators that are used to design and predict the circuit behavior before actual fabrication of the circuit. In this thesis, I compared and evaluated existing circuit simulators by considering standard benchmark circuits. The circuit simulators which I evaluated and explored are Ngspice, Tclspice, Winspice (open source) and Spectre® (commercial). I also tested standard benchmarks using these circuit simulators and compared their outputs. The simulators are evaluated using design metrics i

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13

張永泰 and Wing-tai Cheung. "Geometric programming and signal flow graph assisted design of interconnect and analog circuits." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2007. http://hub.hku.hk/bib/B39558526.

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14

Shana'a, Osama K. "Circuit Implementation of a High-speed Continuous-time Current-mode Field Programmable Analog Array (FPAA)." PDXScholar, 1996. https://pdxscholar.library.pdx.edu/open_access_etds/5103.

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The growing interest in programmable analog circuits has led to the development of Field Programmable Analog Arrays (FPAAs). An FPAA consists of: 1) a programmable cell that can be reconfigured to perform several analog functions. 2) an architecture that interconnects a number of copies of the programmable cell. In this thesis, the full monolithic circuit implementation of the analog part of the programmable cell is presented. Chapter I gives an introduction to the idea of FPAA and introduces the FPAA architecture and the cell block diagram. Chapter II deals with the design and verification of

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15

Hernandez, Garduno David. "Analog integrated circuit design techniques for high-speed signal processing in communications systems." [College Station, Tex. : Texas A&M University, 2006. http://hdl.handle.net/1969.1/ETD-TAMU-1104.

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16

Makris, Costas A. "Analogue integrated circuit design : automation and techniques." Thesis, Imperial College London, 1992. http://hdl.handle.net/10044/1/7598.

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17

Elshamy, Mohamed. "Design for security in mixed analog-digital integrated circuits." Electronic Thesis or Diss., Sorbonne université, 2021. http://www.theses.fr/2021SORUS093.

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Récemment, les coûts faramineux d'une usine de fabrication de semi-conducteurs ont contraint de nombreuses entreprises à renoncer à avoir leur usine en propre. En externalisant la fabrication de CI/PI à des sociétés tierces, le procédé de fabrication a été confié à des sociétés potentiellement peu fiables. Il en résulte des menaces de sécurité pour l'industrie des semi-conducteurs, telles que la contrefaçon, la rétro-ingénierie et l'insertion de HT. Dans cette thèse, nous proposons une contre-mesure anti-piratage pour protéger les CI/PI AMS, une nouvelle attaque HT pour les CI/PI AMS et une no

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18

Baskaya, Ismail Faik. "Physical design automation for large scale field programmable analog arrays." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/31810.

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Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2010.<br>Committee Chair: David V Anderson; Committee Co-Chair: Sung Kyu Lim; Committee Member: Aaron Lanterman; Committee Member: Abhijit Chatterjee; Committee Member: Daniel Foty; Committee Member: Paul Hasler. Part of the SMARTech Electronic Thesis and Dissertation Collection.

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19

Layton, Kent D. "Low-voltage analog CMOS architectures and design methods /." Diss., CLICK HERE for online access, 2007. http://contentdm.lib.byu.edu/ETD/image/etd2141.pdf.

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20

Chowdhury, M. Foysol. "An expert system for analogue integrated circuit layout design." Thesis, University of Essex, 1991. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.303493.

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21

Sadeghi, Nima. "Design techniques for high-temperature analog and mixed-signal integrated circuits." Thesis, University of British Columbia, 2012. http://hdl.handle.net/2429/43092.

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Reliable high-temperature analog and mixed-signal CMOS circuits are required for several applications including aerospace, automotive control, oil field instrumentation, and pulp and paper digesters. In particular, in this work we focus on the design of key building blocks of a miniature sensor interface system that is intended to operate in a pulp and paper digester and collect and record sensory data such as pressure and temperature along its trajectory within the digester. The temperature inside the digester can be as high as 180℃. Design considerations and techniques for implementing these

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22

Colombo, Dalton Martini. "Design of analog integrated circuits aiming characterization of radiation and noise." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2015. http://hdl.handle.net/10183/133731.

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Esta tese de doutorado trata de dois desafios que projetistas de circuitos integrados analógicos enfrentam quando estimando a confiabilidade de transistores fabricados em modernos processos CMOS: radiação e ruído flicker. Em relação a radiação, o foco desde trabalho é a Dose Total Ionizante (TID): acumulação de dose ionizante (elétrons e prótons) durante um longo período de tempo nas camadas isolantes dos dispositivos, então resultando na degradação dos parâmetros elétricos (por exemplo, a tensão de limiar e as correntes de fuga). Este trabalho apresenta um caso de estudo composto por circuito

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23

Michael, Christopher I. "Statistical modeling for computer-aided design of analog MOS integrated circuits /." The Ohio State University, 1991. http://rave.ohiolink.edu/etdc/view?acc_num=osu1487688973683252.

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24

Wu, Pan. "The Design of High-Frequency Continuous-Time Integrated Analog Signal Processing Circuits." PDXScholar, 1993. https://pdxscholar.library.pdx.edu/open_access_etds/1162.

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High-performance, high-frequency operational transconductance amplifiers (OTAs) are very important elements in the design of high-frequency continuous-time integrated analog signal processing circuits, because resistors, inductors, integrators, mutators, buffers, multipliers, and filters can be built by OTAs and capacitors. The critical considerations for OTA design are linearity, tuning, frequency response, output impedance, power supply rejection (PSR) and common-mode rejection (CMR). For linearity considerations, two different methods are proposed. One uses cross-coupled pairs (CMOS or NMOS

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25

Son, Kyung-Im. "A multi-class, multi-dimensional classifier as a topology selector for analog circuit design / by Kyung-Im Son." Thesis, Connect to this title online; UW restricted, 1998. http://hdl.handle.net/1773/5919.

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26

Winder, C. L. "A high-level design interface for analogue silicon compilation." Thesis, University of Essex, 1989. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.235122.

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27

Aluru, Gunasekhar. "Exploring Analog and Digital Design Using the Open-Source Electric VLSI Design System." Thesis, University of North Texas, 2016. https://digital.library.unt.edu/ark:/67531/metadc849770/.

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The design of VLSI electronic circuits can be achieved at many different abstraction levels starting from system behavior to the most detailed, physical layout level. As the number of transistors in VLSI circuits is increasing, the complexity of the design is also increasing, and it is now beyond human ability to manage. Hence CAD (Computer Aided design) or EDA (Electronic Design Automation) tools are involved in the design. EDA or CAD tools automate the design, verification and testing of these VLSI circuits. In today’s market, there are many EDA tools available. However, they are very expen

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28

Palakurthi, Praveen Kumar. "Design of a low voltage analog to digital converter." To access this resource online via ProQuest Dissertations and Theses @ UTEP, 2009. http://0-proquest.umi.com.lib.utep.edu/login?COPT=REJTPTU0YmImSU5UPTAmVkVSPTI=&clientId=2515.

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29

Fiedorow, Pawel. "Etude et optimisation de structures intégrées analogiques en vue de l'amélioration du facteur de mérite des amplificateurs opérationnels." Thesis, Lyon, INSA, 2012. http://www.theses.fr/2012ISAL0061.

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Rail à rail entrée - sortie, classe AB, faible consommation sont autant de critères que le concepteur d'amplificateur opérationnel (AOP) intègre pour réaliser une cellule analogique performante. Pour un AOP standard, l'accent n'est pas porté sur une caractéristique particulière mais sur l’ensemble de celle-ci. Dans le but d'augmenter le nombre de fonction par circuit intégré, la tension d'alimentation des AOPs ainsi que leur consommation en courant tendent à diminuer. L'objectif des circuits réalisés est de doubler le facteur de mérite des circuits déjà présents dans le portefeuille de STMicro

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30

Xu, Ping. "High-frequency Analog Voltage Converter Design." PDXScholar, 1994. https://pdxscholar.library.pdx.edu/open_access_etds/4891.

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For many high-speed, high-performance circuits, purely differential inputs are needed. This project focuses on building high-speed voltage converters which can transfer a single-ended signal to a purely differential signal, or a differential input signal to a single-ended signal. Operational transconductance amplifier (OTAs) techniques are widely used in high-speed continuous-time integrated analog signal processing (ASP) circuits because resistors, inductors, integrators, buffers, multipliers and filters can be built by OT As and capacitors. Taking advantage of OT As, very-high-speed voltage

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31

Gu, Quan. "An analogue integrated circuit design for laser doppler blood flow measurement." Thesis, University of Nottingham, 2007. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.580293.

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Laser Doppler Blood Flowmetry (LDF) is a non-invasive optical technique for measuring microvascular blood flow in tissue. The existing LDF systems employ either scanning techniques or full-field imaging using discrete devices and digital signal processing units. However, the scanning systems have limitations in their imaging speed. The discrete full-field systems are not compact and at present are limited in bandwidth. This work deals with the design of a LDF system implemented with analogue integrated circuits. The design starts with the investigation of the design of each building block requ

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32

Okobiah, Oghenekarho. "Geostatistical Inspired Metamodeling and Optimization of Nanoscale Analog Circuits." Thesis, University of North Texas, 2014. https://digital.library.unt.edu/ark:/67531/metadc500074/.

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The current trend towards miniaturization of modern consumer electronic devices significantly affects their design. The demand for efficient all-in-one appliances leads to smaller, yet more complex and powerful nanoelectronic devices. The increasing complexity in the design of such nanoscale Analog/Mixed-Signal Systems-on-Chip (AMS-SoCs) presents difficult challenges to designers. One promising design method used to mitigate the burden of this design effort is the use of metamodeling (surrogate) modeling techniques. Their use significantly reduces the time for computer simulation and design sp

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33

Chong, Joseph. "CMOS Receiver Design for Optical Communications over the Data-Rate of 20 Gb/s." Diss., Virginia Tech, 2018. http://hdl.handle.net/10919/83608.

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Circuits to extend operation data-rate of a optical receiver is investigated in the dissertation. A new input-stage topology for a transimpedance amplifier (TIA) is designed to achieve 50% higher data-rate is presented, and a new architecture for clock recovery is proposed for 50% higher clock rate. The TIA is based on a gm-boosted common-gate amplifier. The input-resistance is reduced by modifying a transistor at input stage to be diode-connected, and therefore lowers R-C time constant at the input and yielding higher input pole frequency. It

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34

Yengui, Firas. "Contribution aux méthodologies et outils d’aide à la conception de circuits analogiques." Thesis, Lyon, INSA, 2013. http://www.theses.fr/2013ISAL0098/document.

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A la différence de la conception numérique, la conception analogique souffre d’un réel retard au niveau de la solution logicielle qui permet une conception à la fois rapide et fiable. Le dimensionnement de circuits analogiques exige en effet un nombre assez élevé de simulations et de vérifications et dépend beaucoup de l’expertise du concepteur. Pour pallier à ce retard, des outils de conception automatique basés sur des algorithmes d’optimisation locale et globale sont développés. Ces outils restent encore immatures car ils n’offrent que des réponses partielles aux questions du dimensionnemen

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35

Marble, William Joel. "Design and Analysis of Charge-Transfer Amplifiers for Low-Power Analog-to-Digital Converter Applications." BYU ScholarsArchive, 2004. https://scholarsarchive.byu.edu/etd/35.

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The demand for low-power A/D conversion techniques has motivated the exploration of charge-transfer amplifiers (CTAs) to construct efficient, precise voltage comparators. Despite notable advantages over classical, continuous-time architectures, little is understood about the dynamic behavior of CTAs or their utility in precision A/D converters. Accordingly, this dissertation presents several advancements related to the design and analysis of charge-transfer amplifiers for low-power data conversion. First, an analysis methodology is proposed which leads to a deterministic model of the voltage

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36

Gray, Jordan D. "Large scale reconfigurable analog system design enabled through floating-gate transistors." Diss., Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/34660.

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This work is concerned with the implementation and implication of non-volatile charge storage on VLSI system design. To that end, the floating-gate pFET (fg-pFET) is considered in the context of large-scale arrays. The programming of the element in an efficient and predictable way is essential to the implementation of these systems, and is thus explored. The overhead of the control circuitry for the fg-pFET, a key scalability issue, is examined. A light-weight, trend-accurate model is absolutely necessary for VLSI system design and simulation, and is also provided. Finally, several reconfigura

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37

Loikkanen, M. (Mikko). "Design and compensation of high performance class AB amplifiers." Doctoral thesis, University of Oulu, 2010. http://urn.fi/urn:isbn:9789514261770.

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Abstract Class A and class AB operational amplifiers are an essential part of a mixed- signal chip, where they are used as active filter sub-blocks, compensators, reference current generators and voltage buffers, to name just a few of many applications. For analog circuits such as operational amplifiers a mixed-signal chip is a very unfriendly operating environment, where the power supply is often corrupted by high current switching circuits. In addition, power supply voltages for analog blocks are shrinking, because of the deployment of new battery technologies and fine line length integrated

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38

Asar, Sita Madhu. "An Audio Processing System as an Example of Modern Circuit Board Design." The Ohio State University, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=osu1480588012253634.

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39

Killens, Jacob. "Utilizing standard CMOS process floating gate devices for analog design." Master's thesis, Mississippi State : Mississippi State University, 2001. http://library.msstate.edu/etd/show.asp?etd=etd-04092001-110957.

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40

Ramakrishnan, Shubha. "A system design approach to neuromorphic classifiers." Diss., Georgia Institute of Technology, 2013. http://hdl.handle.net/1853/51718.

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This work considers alternative strategies to mainstream digital approaches to signal processing - namely analog and neuromorphic solutions, for increased computing efficiency. In the context of a speech recognizer application, we use low-power analog approaches for the signal conditioning and basic auditory feature extraction, while using a neuromorphic IC for building a dendritic classifier that can be used as a low-power word spotter. In doing so, this work also aspires to posit the significance of dendrites in neural computation.

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41

Brady, Philomena C. "Offset correction in flash ADCs using floating-gate circuits." Thesis, Georgia Institute of Technology, 2003. http://hdl.handle.net/1853/14832.

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42

al-Sarʻāwī, Said Fares. "Design techniques for low power mixed analog-digital circuits with application to smart wireless systems /." Title page, contents and abstract only, 2003. http://web4.library.adelaide.edu.au/theses/09PH/09pha461.pdf.

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43

Valdes, Garcia Alberto. "System-level design and RF front-end implementation for a 3-10ghz multiband-ofdm ultrawideband receiver and built-in testing techniques for analog and rf integrated circuits." Texas A&M University, 2003. http://hdl.handle.net/1969.1/5757.

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This work consists of two main parts: a) Design of a 3-10GHz UltraWideBand (UWB) Receiver and b) Built-In Testing Techniques (BIT) for Analog and RF circuits. The MultiBand OFDM (MB-OFDM) proposal for UWB communications has received significant attention for the implementation of very high data rate (up to 480Mb/s) wireless devices. A wideband LNA with a tunable notch filter, a downconversion quadrature mixer, and the overall radio system-level design are proposed for an 11-band 3.4-10.3GHz direct conversion receiver for MB-OFDM UWB implemented in a 0.25mm BiCMOS process. The packaged IC inclu

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44

Brotman, Susan Rose. "The Evaluation of Device Model Dependence in the Design of a High-Frequency, Analog, CMOS Transconductance-C Filter." PDXScholar, 1994. https://pdxscholar.library.pdx.edu/open_access_etds/4701.

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It is important to have the ability to predict the effects of device model variation when designing integrated transconductance-C type active filters. Applying these filters to integrated circuit design has become increasingly popular due to its ease of implementation in monolithic form. With the introduction of fully automated design tools, predictable behavior of high-level variables becomes still more important. The purpose of this study is to evaluate the process parameter spread of analog device models to determine the effect on the design parameters of an active filter. This information'

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45

FARY, FEDERICO. "Integrated Circuits Design in Down-scaled Technologies for Wireless Applications." Doctoral thesis, Università degli Studi di Milano-Bicocca, 2021. http://hdl.handle.net/10281/301984.

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Negli ultimi 30 anni, l’elettronica per le Telecomunicazioni Wireless si è dimostrata una delle forze trainanti nello sviluppo delle nuove tecnologie Complementary Metal-OxideSemiconductor (CMOS). Questa piccola branca del vasto mondo dell’elettronica è infatti in grado di smuovere, in tutto il mondo, miliardi di dollari, molti dei quali inevitabilmente finiscono per finanziare gli avanzati progetti di ricerca in grado di rispondere alle domande del Mercato. In tutto il mondo, le persone chiedono nuovi dispositivi portatili, più performanti, più veloci, più affidabili, che consumino poca poten

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46

Qiu, Fengjing. "Analog very large scale integrated circuits design of two-phase and multi-phase voltage doublers with frequency regulation." Ohio : Ohio University, 1999. http://www.ohiolink.edu/etd/view.cgi?ohiou1175632756.

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47

Zhong, Jian Yu. "Design of high-speed power-efficient SAR-type ADCs." Thesis, University of Macau, 2017. http://umaclib3.umac.mo/record=b3691882.

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48

Liu, Shaolong. "SAR ADCs Design and Calibration in Nano-scaled Technologies." Research Showcase @ CMU, 2017. http://repository.cmu.edu/dissertations/1073.

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The rapid progress of scaling and integration of modern complimentary metal oxide semiconductor (CMOS) technology motivates the replacement of traditional analog signal processing by digital alternatives. Thus, analog-to-digital converters (ADCs), as the interfaces between the analog world and the digital one, are driven to enhance their performance in terms of speed, resolution and power efficiency. However, in the presence of imperfections of device mismatch, thermal noise and reduced voltage headroom, efficient ADC design demands new strategies for design, calibration and optimization. Amon

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49

Larsen, Frode. "Bipolar device characterization and design in CMOS technologies for the design of high-performance low-cost BiCMOS analog integrated circuits /." The Ohio State University, 1994. http://rave.ohiolink.edu/etdc/view?acc_num=osu1487857546387163.

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50

Marble, William J. "Design and analysis of charge-transfer amplifiers for low-power analog-to-digital converter applications /." Diss., CLICK HERE for online access, 2004. http://contentdm.lib.byu.edu/ETD/image/etd418.pdf.

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