Relevant bibliographies by topics / Analog multiplexer

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  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers

Academic literature on the topic 'Analog multiplexer'

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Published: 3 June 2025
Last updated: 22 June 2025

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Journal articles on the topic "Analog multiplexer"

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ANDANG, ASEP, RENDI PRIYATNA, and FIRMANSYAH MAULANA SUGIARTANA NURSUWARS. "Multiplikasi Input Analog pada PLC menggunakan Multiplekser IC74HC4067." ELKOMIKA: Jurnal Teknik Energi Elektrik, Teknik Telekomunikasi, & Teknik Elektronika 9, no. 4 (2021): 813. http://dx.doi.org/10.26760/elkomika.v9i4.813.

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ABSTRAKKebutuhan sistem otomasi untuk pekerjaan tentu sangat dituntut untuk menjadi lebih efektif dan efisien seperti halnya pemanfaatan PLC dalam bidang industri untuk menjalankan segala aktifitas menjadi otomatis, terkadang sistem ADC (analog to digital converter) pada PLC itu terbatas, dan harus diberi tambahan ekstensi eksternal yang dijual terpisah di masing-masing vendor. Tentunya harganya juga terkadang lebih mahal dari pada Unit pemrosesnya, hal ini yang sering menjadi sebuah pertimbangan. Contoh nya sistem ADC pada PLC CP1L-E memiliki 2 kanal. Oleh karena itu penelitian ini dilakukan, dengan melakukan perancangan multiplekser dan demultiplekser analog dengan memanfaatkan IC 74HC4067, hasil dari penelitian ini dalam 1 kanal input analog PLC CP1L-E dapat menjadi 16 kanal input dengan waktu pensaklaran direkomendasikan diatas 0,1detik / kanal berdasarkan hasil selisih pembacaan nilai ADC dibandingkan dengan tanpa melalui multiplekser berkisar antara 0,00% sampai 1,969%, dan multiplekser ini direkomendasikan untuk penggunaan sinyal input pada tegangan0 sampai 5 volt.Kata kunci: ADC, Multiplekser,Demultiplekser, IC CD74HC4067, PLC ABSTRACTThe need for automation systems for work is certainly highly demanded to be more effective and efficient as well as the use of PLCs in the industrial sector to carry out all activities automatically, sometimes the ADC (analog to digital converter) system on the PLC is limited, and must be given additional external extensions that are sold separately for each vendor. Of course the price is also sometimes more expensive than the processing unit, this is often a consideration. For example, the ADC system on the CP1L-E PLC has 2 channels. Therefore, this research was carried out, by designing an analog multiplexer and demultiplexer using IC 74HC4067, the results of this study in 1 analog input channel PLC CP1L-E can be 16 input channels with recommended switching times above 0.1 seconds / channel based on the results of the difference. The reading of the ADC value compared to without going through the multiplexer ranges from 0.00% to 1.969%, and this multiplexer is recommended for the use of input signals at a voltage of 0 to 5 volts.Keywords: ADC, Multiplexer, Demultiplexer, IC CD74HC4067, PLC
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Reyneri, L. M. "Analog multiplexer for cryogenic applications." Cryogenics 29, no. 5 (1989): 540–45. http://dx.doi.org/10.1016/0011-2275(89)90103-3.

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Watson, Jeff, Stephen Kavanagh, and Stephen Nugent. "High Precision Analog Multiplexers Enable Multi-Channel Data Acquisition in High Temperature Environments." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2016, HiTEC (2016): 000035–39. http://dx.doi.org/10.4071/2016-hitec-35.

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Abstract A growing number of industries are calling for low power electronics that operate reliably at temperatures of 175C and higher. Many of these applications require a precision data acquisition signal chain in order to digitize analog data so that it can be collected and processed. We previously presented a characterized signal chain for a single channel of analog to digital conversion designed around a 600ks ps SAR ADC. However, many systems have a multitude of sensor signals that must be acquired at varying sample rates. In this work we discuss two new analog multiplexers rated for 175°C/210°C that allow multiple analog signals to be connected to the ADC input, enabling the design of a precision multi-channel data acquisition system. One multiplexer is designed on a robust dielectrically isolated process for high performance and low leakage over temperature, and one multiplexer is optimized for low power, low voltage applications. We will examine the architecture of these two integrated circuits, review the characterization over temperature and discuss example application signal chains.
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Chase, R. L., and I. F. Corbett. "Analog Multiplexer for the Aleph Electromagnetic Calorimeter." IEEE Transactions on Nuclear Science 32, no. 1 (1985): 645–48. http://dx.doi.org/10.1109/tns.1985.4336914.

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Zhang, Xue Feng, and Hong Xia Luo. "A Multi-Channel Data Acquisition System and its Performance Analysis Method Based on FPGA." Advanced Materials Research 490-495 (March 2012): 37–41. http://dx.doi.org/10.4028/www.scientific.net/amr.490-495.37.

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The multiplexer act as the inputs of analog signals, enabling multi-channel analog signal acquisition; then filtered through a certain signal processing to ensure the most effective analog signals into the ADC; after conversion, the digital output is saved in the temporary buffer zone of the FPGA. The whole process is controlled by the FPGA. Finally, apply to the DAC-ADC joint debugging, in compare to the results, 14bit precision is guaranteed.
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Ornatskyi, D., L. Kuzmych, and V. Kvasnikov. "The Analogue Interface for Remote Measurements Using Multiplexer and Resistive Strain Gauges." Metrology and instruments, no. 6 (December 28, 2018): 9–12. http://dx.doi.org/10.33955/2307-2180(6)2018.9-12.

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An analogue interface circuit that contains a mea­suring chain, a transmitter, the input of which is connected to a DC source through an analog demultiplexer, and the outputs of the measuring chain through the analog multiplexer are connected to the measuring amplifier, and a two-channel analog-digital converter with simultaneous sampling is developed. The measuring chain is made in the form of three resistive current dividers, where one divider is formed by a resistive strain gauge and adjusting resistor, and two others — exemplary resistors. This work is aimed at finding possibilities for increasing the accuracy of measurements and interfering analog interfaces for remote measurements using resistive strain gauges by introducing a new structural scheme, which is shown on the Fig.2.
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Ornatskyi, D., L. Kuzmych, and V. Kvasnikov. "Simulation of the Analogue Interface for Remote Measurements Using Multiplexer and Resistive Strain Gauges." Metrology and instruments, no. 1 (March 25, 2019): 31–36. http://dx.doi.org/10.33955/2307-2180(1)2019.31-36.

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The simulation of the analog interface circuit based on the measuring amplifier with differential inputs and the ultrasonic scheme and algorithm of non — destructive additive — multiplicative correction have been made. Such schematic of the analog interface reduces the influence of input correlated noise of operational amplifiers and network drives on the «general» resistance.
 The Fig. 1 shows us the Schematic of the electrical functional analog interface for remote measurement using multiplexer and resistive strain gauges, which contains a measuring chain, a transmitter, the input of which is connected to a DC source through an analog demultiplexer, and the outputs of the measuring chain through the analog multiplexer are connected to the measuring amplifier, and a two-channel analog-digital converter with simultaneous sampling. The measuring chain is made in the form of three resistive current dividers, where one divider is formed by a resistive strain gauge and adjusting resistor, and two others — exemplary resistors.
 At the Fig. 2 we can see the electric model of the measuring channel in the software Elektronic Workbench.
 From the analysis of the simulation results it was found that the random additive component of the error would dominate. Since in the simulation of the only random component of the error there is a quantization error, the use of the differential method of measuring the output voltage will significantly improve the metrological characteristics.
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Huang, Xiao Zong, Lun Cai Liu, Wen Gang Huang, et al. "A Multiplexer with Split Devices for High Channel Isolation." Applied Mechanics and Materials 644-650 (September 2014): 3678–81. http://dx.doi.org/10.4028/www.scientific.net/amm.644-650.3678.

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A multiplexer with split devices for high channel isolation was proposed in this paper. The multiplexer is the most essential circuitry for multi-channel video signal acquisition systems. In the multi-channel applications, high isolation performance is required basically for the efficient signal processing. The noise propagation between channels is unexpected. The split devices technique is employed in the design work. Redundant transistors are inserted between the split cells to realize the noise grounded. This multiplexer is simulated and verified in the commercial CMOS process, and the isolation of more than 70dB was achieved. It has been embedded in a multi-channel analog signal processing system.
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Bansal, Malti, Harmandeep Singh, and Gaurav Sharma. "A Taxonomical Review of Multiplexer Designs for Electronic Circuits & Devices." June 2021 3, no. 2 (2021): 77–88. http://dx.doi.org/10.36548/jei.2021.2.001.

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This research paper reviews and briefly discusses about the multiplexers and demultiplexers. This research paper aims to explore the history of multiplexers, types of multiplexers, applications and the real-time use cases of multiplexers. Furthermore, it also includes a brief introduction on the different multiplexing techniques employed in analog and digital electronics, ongoing research studies and future research scope for multiplexers.
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MUTOH, Atsuo, and Shuichi NITTA. "Analog Switches with Amplification Function and Its Application to Multiplexer." Transactions of the Society of Instrument and Control Engineers 29, no. 11 (1993): 1251–60. http://dx.doi.org/10.9746/sicetr1965.29.1251.

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Dissertations / Theses on the topic "Analog multiplexer"

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BONIFAZI, MAURIZIO. "Analog circuits design for cellular neural network." Doctoral thesis, Università degli Studi di Roma "Tor Vergata", 2008. http://hdl.handle.net/2108/705.

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Il paradigma delle Reti Neurali Artificiali (ANN) consiste nell’applicazione del modello neurale “biologico” per la risoluzione di problemi che spesso sono troppo complessi per un’architettura di Von Neumann. La letteratura offre differenti approcci per l’implementazione di ANN. Qualche implementazione è di tipo software, altre sono soluzioni circuitali come circuiti digitali full-custom o FPGA (Field Programmable Gate Array), come pure circuiti analogici, e il tipo di implementazione di certo dipende dal tempo di esecuzione adeguato al tipo di applicazione. Questa tesi riguarda la progettazione di nuovi circuiti analogici adattati per le Reti Neurali. In particolare, saranno utilizzate le Reti Neurali Cellulari (CNN) proposte nel 1981 dal Prof. L.O.Chua (University of California – Berkeley). Il “Laboratorio di Circuiti” dell’Università di Roma “Tor Vergata” ha progettato e realizzato alcuni chip analogici dedicati a questo tipo di Reti Neurali. Questi chip appartengono alla famiglia “Digital Programmable CNN” (DPCNN) e presentano principalmente due caratteristiche: la programmabilità digitale dei pesi sinaptici come una particolare architettura orientata ad una struttura interconnessa (cioè connettendo tra loro più di questi chip è possibile realizzare reti di grande dimensione). In questa tesi viene data una visione di insieme sulle ANN, sulle CNN e sulle Star-CNN: cosa sono, come funzionano ed a cosa servono. In perticolare verrà descritta la famiglia DP-CNN. Questa tesi propone una nuova architettura chiamata TD-CNN (Time Division CNN), che sfrutta una particolare strategia mirata a ridurra l’area di occupazione su silicio di una cella elementare, per aumentare l’integrabilità della rete. Oltretutto la stessa strategia a divisione di tempo verrà applicata alle TD-Star CNN. In particolare questi circuiti sono le non-linerità digitalmente programmabili (cioè DPTA – Digital Programmable Transconductance Amplifier e DPTA – Digital Programmable Transconductance Comparator) e circuiti particolari per la multiplazione (DM-SH – Dynamic Mirror Sample and Hold e DM-MUX – Dynamic Mirror Multiplexer). Sono mostrate alcune simulazioni dei circuiti per permettere lo studio di queste nuove architetture, e la modifica delle dinamiche introdotte dalla strategia a divisione di tempo.<br>The Artificial Neural Network (ANN) paradigm consists of the application of biological “neural” models to the solution of particular problems that often are very hard to solve for the classical “Von Neumann” architectures. Different are the approaches proposed in literature for the implementation of an ANN. Some of them are software implementations only while, others are circuital solutions as full custom digital circuits or programmed FPGAs (Field Programmable Gate Array) as well as analogue circuits and the typology of the implementation certainly depends on the length of the processing time that you believe adequate for the particular application. This thesis is focused on the design of new analogue circuits well suited for Neural Network applications. In particular, the class of the Cellular Neural Networks (CNN), proposed in 1981 by Prof. L.O.Chua (University of California - Berkeley), will be exploited. In this area, the “Laboratorio Circuiti” at University of Rome “Tor Vergata” designed and manufactured several analogue chips devoted to this class of Neural Networks. These chips belong to the Digital Programmable CNN (DPCNN) chip family and present two main features: the digital programmability of the synaptic weights as well as a special architecture oriented to an interconnection structure (i.e. it is possible to carry out large network by connecting together more of these chips). In this thesis work you will find an overview about the Artificial Neural Network, the Cellular Neural Network and the Star Cellular Neural Network: what they are, how they work and why they are useful. In particular, the DP-CNN chip family will be deeply described. This thesis proposes the TD-CNN (Time Division CNN), a particular design strategy, devoted to reduce the silicon area occupation of the a elementary cell in order to improve the VLSI integrability of the network. Moreover, the same time-division strategy will be applied to TD-Star CNN. In particular, these circuits consist of the digitally programmable non-linearity circuits (i.e. the Digital Programmable Transconductance Amplifier - DPTA and Digital Programmable Transconductance Comparator – DTPC) and special circuit for to carry out the multiplexing feature (i.e. the Dynamic Mirror Sample and Hold – DM-SH and the Multiplexer – DM-MUX). Several circuital simulations will be shown in order to study the behavior of this modified architecture and the modifications on the dynamics introduced by the time division strategy.
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Cox, Corry. "IMPLEMENTING A TACTICAL TELEMETRY STYSTEM FOR MULTIPLE LAUNCH ROCKET SYSTEM (MLRS) STOCKPILE RELIABILITY TESTING." International Foundation for Telemetering, 2004. http://hdl.handle.net/10150/604935.

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International Telemetering Conference Proceedings / October 18-21, 2004 / Town & Country Resort, San Diego, California<br>The Precision Fires Rocket and Missile Systems (PFRMS) Program Office continually undertakes Stockpile Reliability Testing (SRP) to ensure the validity of the accumulated weapons and increase the she lf life of these weapon systems. MLRS is a legacy weapon system that has been undergoing SRP testing for over 20 years. The PFRMS Program Office has a need for a miniature Tactical Telemetry System that will monitor the fuze performance of the MLRS Rocket during SRP testing. This paper will address a technical approach of how a small Tactical Telemetry System could be built to meet this requirement. The Tactical Telemetry system proposed in this paper will monitor fuze functions, operate across the wide environmental spectrum of the SRP tests, and physically fit in the nose area without altering the overall tactical rocket appearance or operation.
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Bougan, Timothy B. "“DATA DIGITIZING UNIT” ELIMINATES THE NEED FOR ANALOG RECORDERS." International Foundation for Telemetering, 1996. http://hdl.handle.net/10150/608382.

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International Telemetering Conference Proceedings / October 28-31, 1996 / Town and Country Hotel and Convention Center, San Diego, California<br>Today’s telemetry environment is becoming increasingly digital. Highly reliable and relatively inexpensive digital recorders readily available, and most telemetry facilities are migrating away from the older analog recorders which are difficult to calibrate and expensive to maintain. Unfortunately, most site managers find they still have one or more “legacy” signals (such as FM-FM, PAM, and pre-detect PCM) that still require analog recording. To exclusively use digital recorders the TM site must integrate some device to convert the analog signals to digital format before recording. Until recently, the TM site managers had very few options short of building custom equipment to convert and capture the legacy signals. One solution available from Racal (for their Storeplex digital recorder) is to purchase their Analog Record/Play Signal Module. Unfortunately, their module uses a 16-bit Sigma-Delta converter and has a maximum bandwidth of 45.5 KHz, which is woefully inadequate for many analog signals. Other manufacturers offer similar solutions with similar bandwidth restrictions. Another solution is to purchase a multiplexor “front-end” which is capable of mixing multiple signal types (both digital and analog) on to the recorder’s serial-digital data stream. This option can provide higher analog bandwidths, but represents a significant investment (greater than $100K and often more than the recorder itself). This paper discusses the conceptualization, design, and performance of a unit to fill the gap between the low-bandwidth analog channel module and the high-end signal multiplexors. We will discuss how high-speed field-programmable gate arrays (FPGAs) can be configured to provide a low-cost interface between the digital recorder and the analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) to capture and playback the analog signals. Our design focuses on achieving the maximum possible bandwidth for each analog signal while ensuring that IRIG-A or IRIG-B timecode are recorded simultaneously (so the analog signals can be later synchronized with their digital counterparts). We have found that such a solution permits multiple analog signals from 400 KHz up to 3 MHz to be easily and inexpensively recorded on the current generation of digital recorders. Our conclusions show that such a device can permit most telemetry sites to transition completely to more reliable, cheaper, and easier-to-maintain digital recorders.
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Park, Seungmyon 1977. "Analysis and simulation of a CIC-filter-based multiplexed-input sigma-delta analog-to-digital converter." Thesis, Massachusetts Institute of Technology, 2001. http://hdl.handle.net/1721.1/86678.

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Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2001.<br>Includes bibliographical references (leaves 80-81).<br>by Seungmyon Park.<br>M.Eng.
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Elisejev, Svjatoslav, and Mikael Stegman. "Införandet av Multiplex Power-metodenför att kontrollera FM-deviationenvid radiosändningar inom Sverige." Thesis, KTH, Media Technology and Graphic Arts, Media, 2009. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-12166.

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<p>Detta examensarbete presenterar en utvärdering av konsekvenser som kan uppstå vid Införandet av Multiplex Power-mättmetoden för att kontrollera FM-deviation vid radiosändningar i Sverige.</p><p>Metoden är beskriven i en publicerad standard från ITU: ITU-R BS.412-9. Metoden, även kallad Multiplex Power, är en begränsningsstandard för analog (terrestrial) FM sändning på VHF band. Skälet att införa Multiplex Power mätning är att man genom metoden både kan minska grannkanalinterferenserna och samtidigt jämna ut de stora variationerna i de upplevda ljudnivåerna som finns mellan de olika FM-stationerna. Denna mätmetod går ut på att man samplar värden på deviation, lagrar samplen och räknar ut ett medelvärde av energin under ett intervall av 60 sekunder. Detta energivärde jämförs med en referensnivå, som i ITU-normen definieras som +/-19kHz toppdeviation vid 400 Hz modulationssignal. Skillnaden detta referensvärde kan anges i dB av instrumentet, som en enskild siffra vilkets värde skrivs dynamiskt över tid.</p><p>För att kunna utvärdera metoden genomfördes ett lyssningsexperiment. I experimentet användes ljudfiler som är processade enligt hur dagens normer tillämpas i Sverige och ljudfiler som är processade för att följa BS.412-9-normen. Som tillvägagångssätt användes ett webbformulär och en databas. Testpersoner kunde utföra lyssningen och notera resultatet som sedan lagrades för vidare beräkningar. Ljudfilerna och tillhörande mätningsvärden från lyssningsexperimentet användes sedan för att utvärdera resultatet.</p><br>QC 20100707
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Strayer, Kraig Edward. "A LC-MS/MS-Based Method for the Multiplex Detection of 24 Fentanyl Analogs and Metabolites in Whole Blood at Sub ng mL-1 Concentrations." Wright State University / OhioLINK, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=wright1527173022936317.

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Chen, Bao-Lin, and 陳保霖. "Design of Analog Multiplexer in a Resistor-String DAC." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/91193213759212072170.

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碩士<br>國立中央大學<br>電機工程研究所<br>95<br>This paper aims to implement an analog multiplexer by using only NMOS pass transistor as switching gate.Two types of structures including multi-stages and single-stage are compared to evaluate their circuit performance. For these analog multiplexers, glitch analysis is proposed and applied to explore the factor of inaccuracy of voltage level due to switching. It is shown that the mechanism of pre-charge will cause a serious glitch effect on the critical path of a multi-stages analog multiplexer. Finally the single-stage structure is adopted. By optimizing the design of the corresponding decoders, the glitch can be significantly reduced from 13.3 VLSB for multi-stages to 0.5 VLSB for single-stage.
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Wang, Deng-Shian, and 王登賢. "A High-Voltage Multiplexer and A Successive-Approximation Register Analog to Digital Converter for BMS." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/28138434795346363350.

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碩士<br>國立中山大學<br>電機工程學系研究所<br>101<br>This thesis includes two designs: A high-voltage (HV) multiplexer and a successive-approximation register ADC for Battery Management Systems (BMS). The proposed designs are implemented by using TSMC 0.25 μm 60V HV CMOS process, and verified by physical measurements. Though the first topic presents a high-voltage multiplexer which is fabricated using an advanced high-voltage (HV) semiconductor process, the HV process usually is constrained by the voltage drop limitation between gate and source of HV CMOS transistors. To overcome such a limitation, a high-voltage switch is proposed in this work, including two gate voltage drivers and a buck converter driving the HV devices without causing any over-voltage hazard. Based on the system requirements, the output range of the HV multiplexer should be covered by the input range of the following ADC. The multiplexer employs a divider &; subtracter and a multiplier to carry out such a function. The entire design is designed for the voltage detection circuit in the Battery Management Systems, where the voltage detection error is verified to be less than 10 mV by simulations. The second topic discloses a successive-approximation register ADC for the voltage detection as well in the Battery Management Systems. Due to the gentle variation of the battery voltage characteristic, an ADC with 20 KHz sampling rate and 12–bit resolution is proposed and used in the detection circuit. To reduce the capacitor size in the ADC, a single capacitor array based on the charge redistribution architecture is used in the proposed ADC. By the simulation results, the integral nonlinearity (INL) and the differential nonlinearity (DNL) of the proposed ADC are both less than two LSBs such that the error is less than 1 mV.
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Wu, Yi-lun, and 吳依倫. "A High Voltage Operational Amplifier with Rail-to-rail Input and Output Ranges and an 8:1 Analog High Voltage Multiplexer." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/u349mb.

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碩士<br>國立中山大學<br>電機工程學系研究所<br>102<br>One of the key techniques of electric vehicles (EVs) is battery management systems, which demand the development of battery modules, the measurement circuits of batteries, and so on. This thesis investigates a high-voltage operational amplifier with rail-to-rail input and output ranges, and an 8:1 analog high-voltage multiplexer for the battery voltage measurement. This thesis proposes a high-voltage operational amplifier with rail-to-rail input and output ranges to meet the required amplifier for the aforementioned technology. It also carries out the signal transfer circuit design for battery management systems, such as subtractor, analog to digital converter. Since the input range of the design could be up to 30 V, and the output range is 0 ∼ 29.57 V, ADC with a high input range is no longer needed hereby. Although the dc gain is 41 dB, the gain error can be corrected by using low-bit ADCs. Finally, this design is expected for battery management systems to attain accurate SOC estimation . Another key circuit is the high-voltage multiplexer. This thesis proposes a 8:1 highvoltage analog multiplexer which can be used to measure the voltage of a single cell in a battery string. If the battery modules consists of eight batteries connected in series and the voltage of a battery cell is 2.5 V to 4.5 V, the input voltage range is 0 ∼ 36 V. To resolve the high input voltage problem, this thesis demonstrates a 8:1 high-voltage analog multiplexer, where the output voltage range is in line with SAR ADC input voltage range of 1.5 ∼ 3.5 V.
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Hu, Yi, and 胡毅. "A Receiver with Over-Voltage Protection for FlexRay Systems and an 8:1 High-Voltage Analog Multiplexer for Battery Management Systems." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/66622507074125531530.

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碩士<br>國立中山大學<br>電機工程學系研究所<br>101<br>The research of this thesis is mainly focused on automotive electronics including two topics, a Receiver (Rx) with over-voltage protection for FlexRay systems and an 8:1 high-voltage analog multiplexer (HV MUX) for Battery Management Systems (BMS) of Electric Vehicles (EVs). The first topic discloses a Receiver with over-voltage protection for FlexRay systems, which is a networking standard for automotives. The proposed design is complied with the FlexRay electrical physical layer specification V3.0.1. The Receiver provides a data rate of 10 Mbps with -10 V ~ +15 V input common mode voltage (uCM) operating in the range of -40 °C ~ +150 °C. An over-voltage protection circuit is included in this Receiver, which is capable of rejecting over-voltage surges up to ±60 V. This design was implemented using TSMC 0.18 μm CMOS HV mixed-signal based generationⅡBCD technology. The second topic presents an 8:1 high-voltage analog multiplexer for Battery Management Systems. This design is a HV MUX for battery voltage measurement systems, which can detect the battery voltages from a battery module. In this thesis, the testing vehicle is a battery module composed of 8 Li-ion batteries in series. The operating voltage range for each Li-ion battery is 2 V ~ 3.65 V. Thus, the highest input voltage for this HV MUX is 29.2 V, and the output range is 1 V ~ 2 V. HV switches and HV subtractors are also proposed to resolve the high input voltage problem of HV MUX. Finally, a battery voltage measurement system was realized by integrateing this 8:1 HV MUX with a 2nd-order Delta-Sigma ADC and an oscillator. This battery voltage measurement system was carried out on silicon using TSMC 1P3M 0.25 μm 60V HV CMOS technology.
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Books on the topic "Analog multiplexer"

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United States Institute for Theatre Technology. DMX512/1990: Digital data transmission standard for dimmers and controllers ; [and] AMX192 : analog multiplex data transmission standard for dimmers and controllers. USITT, 1990.

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Ezhil, Susainathan. MUX8RHA 8-Channel Analog Multiplexer. Microchip Technology Incorporated, 2020.

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Silvers, Michael Steven. The design and testing of an analog optical communication link capable of the simultaneous transmission of four frequency division multiplexed audio signals. 1987.

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Book chapters on the topic "Analog multiplexer"

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Amaral, José Franco M., Jorge Luís M. Amaral, Cristina C. Santini, Marco A. C. Pacheco, Ricardo Tanscheit, and Moisés H. Szwarcman. "Intrinsic Evolution of Analog Circuits on a Programmable Analog Multiplexer Array." In Computational Science - ICCS 2004. Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-24688-6_164.

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Ray, Madhu Kumari, Sanjay Kumar Surshetty, Vidhusi Goel, Deepak Prasad, and Vijay Nath. "Design of 4-Bit Multiplexer-Based Encoder for Analog to Digital Converter." In Lecture Notes in Electrical Engineering. Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-5546-6_79.

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Yi, Chang-Han, Robert Schlabbach, Holger Kroth, and Heinrich Klar. "An improved multiplexed resistive network for analog image preprocessing." In Lecture Notes in Computer Science. Springer Berlin Heidelberg, 1997. http://dx.doi.org/10.1007/bfb0020309.

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Nayak, Debasis, Brenna Weadick, and Rajgopal Govindarajan. "Combination of Tissue Microarray Profiling and Multiplexed IHC Approaches to Investigate Transport Mechanism of Nucleoside Analog Drug Resistance." In Cancer Systems and Integrative Biology. Springer US, 2023. http://dx.doi.org/10.1007/978-1-0716-3163-8_8.

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Hoskins, Kevin R. "A versatile 8-channel multiplexer." In Analog Circuit Design. Elsevier, 2015. http://dx.doi.org/10.1016/b978-0-12-800001-4.00369-0.

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"D An oscilloscope multiplexer." In Analog and Hybrid Computer Programming. De Gruyter, 2023. http://dx.doi.org/10.1515/9783110787733-015.

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"APPENDIX D. An oscilloscope multiplexer." In Analog and Hybrid Computer Programming. De Gruyter Oldenbourg, 2020. http://dx.doi.org/10.1515/9783110662207-013.

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Cox, Frank, and John Wright. "Tiny RGB video multiplexer switches pixels at 100MHz." In Analog Circuit Design. Elsevier, 2015. http://dx.doi.org/10.1016/b978-0-12-800001-4.00323-9.

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"DAQ analog multiplexer heating lement square metal bar e." In Mathematical and Experimental Modeling of Physical and Biological Processes. Chapman and Hall/CRC, 2009. http://dx.doi.org/10.1201/b17175-10.

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Kester, Walt. "Analog Switches and Multiplexers." In Data Conversion Handbook. Elsevier, 2005. http://dx.doi.org/10.1016/b978-075067841-4/50030-0.

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Conference papers on the topic "Analog multiplexer"

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Van Vonno, N. W., W. H. Newman, L. G. Pearce, E. J. Thomson, and M. L. Campanella. "Combined Total Dose and Displacement Damage Testing of the ISL71831SEH 32-Channel Analog Multiplexer." In 2024 IEEE Radiation Effects Data Workshop (REDW) (in conjunction with 2024 NSREC). IEEE, 2024. http://dx.doi.org/10.1109/redw61286.2024.10759161.

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Gupta, Harshvardhan, Andrew Cochran, Zabir Ahmed, Maysamreza Chamanzar, and Gianluca Piazza. "Silicon NEMS Optomechanic Modulator for Multiplexed Recording of Electrophysiological Neural Signals." In CLEO: Applications and Technology. Optica Publishing Group, 2024. http://dx.doi.org/10.1364/cleo_at.2024.ath4b.5.

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We present a novel NEMS Optomechanic modulator on a silicon photonics platform capable of resolving sub-millivolt analog signals, making it suitable for the recording and multiplexing of electrophysiological neural signals.
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Dass, Devika, Anil Raj Gautum, Lakshmi Narayanan Venkatasubramani, et al. "Hybrid Digital PAM and 60 GHz Analog Radio over Fiber Optical Spectrum as a Service Applications." In Photonic Networks and Devices. Optica Publishing Group, 2024. http://dx.doi.org/10.1364/networks.2024.neth1c.3.

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We experimentally study transmission of digitally multiplexed 15 GBd PAM-8, wideband 16-QAM OFDM (WiGig) and narrowband 64-QAM OFDM (5G NR) waveforms over a 10 km fiber, undergoing up-conversion to 60 GHz and achieving FEC limited performance.
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Rozpedek, Filip, Kaushik P. Seshadreesan, Paul Polakos, Liang Jiang, and Saikat Guha. "All-photonic GKP-qubit repeater using analog-information-assisted multiplexed entanglement ranking." In Quantum 2.0. Optica Publishing Group, 2024. http://dx.doi.org/10.1364/quantum.2024.qm5a.4.

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We propose a novel strategy of using the bosonic Gottesman-Kitaev-Preskill (GKP) code in a repeater architecture with multiplexing. We also quantify the number of GKP qubits needed for the implementation of our scheme.
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Rozpedek, Filip, Kaushik P. Seshadreesan, Paul Polakos, Liang Jiang, and Saikat Guha. "All-photonic GKP-qubit repeater using analog-information-assisted multiplexed entanglement ranking." In CLEO: Fundamental Science. Optica Publishing Group, 2024. http://dx.doi.org/10.1364/cleo_fs.2024.ff1h.5.

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We propose a novel strategy of using the bosonic Gottesman-Kitaev-Preskill (GKP) code in a repeater architecture with multiplexing. We also quantify the number of GKP qubits needed for the implementation of our scheme.
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Bal, Arpit, Aayush Shrivastava, and Laxmeesha Somappa. "Performance Evaluation of Chopping and Auto-Zeroing based Time-Division Multiplexed High-Density Analog Front-End for Neural Recording." In 2024 IEEE Biomedical Circuits and Systems Conference (BioCAS). IEEE, 2024. https://doi.org/10.1109/biocas61083.2024.10798379.

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Liu, Rui, Siheng Lei, and Huan Hu. "A Voltage Domain Code Division Multiplex Based Analog Front End For Energy-Efficient Multi-channel Bio-potential Acquisition." In 2024 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA). IEEE, 2024. https://doi.org/10.1109/icta64028.2024.10860325.

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Zhang, Yunfan, Tiegen Liu, Cenqin Jin, et al. "Impact of Analogue-to-Digital Converters on Multi-Channel Digital Nonlinearity Compensation in $200\ \text{Gbits}/\mathrm{s}/\lambda$ Polarization-Multiplexed QAM Transmission Systems." In 2024 22nd International Conference on Optical Communications and Networks (ICOCN). IEEE, 2024. http://dx.doi.org/10.1109/icocn63276.2024.10648508.

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Ryan, Rodger, J. Shukla, James Long, and Ken Gilliland. "JNT multiplexer and analog input processor." In Proceedings of the eighth symposium on space nuclear power systems. AIP, 1991. http://dx.doi.org/10.1063/1.40072.

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Syed, Akbar, Ken Gilliland, and Jaikaran N. Shukla. "SP-100 Position Multiplexer and Analog Input Processor." In 27th Intersociety Energy Conversion Engineering Conference (1992). SAE International, 1992. http://dx.doi.org/10.4271/929233.

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