Relevant bibliographies by topics / Analog-to-digital converters for imaging applications

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Academic literature on the topic 'Analog-to-digital converters for imaging applications'

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Published: 4 June 2021
Last updated: 11 February 2022

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Journal articles on the topic "Analog-to-digital converters for imaging applications"

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Pratte, Jean-François, Frédéric Nolet, Samuel Parent, Frédéric Vachon, Nicolas Roy, Tommy Rossignol, Keven Deslandes, Henri Dautet, Réjean Fontaine, and Serge A. Charlebois. "3D Photon-To-Digital Converter for Radiation Instrumentation: Motivation and Future Works." Sensors 21, no. 2 (January 16, 2021): 598. http://dx.doi.org/10.3390/s21020598.

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Analog and digital SiPMs have revolutionized the field of radiation instrumentation by replacing both avalanche photodiodes and photomultiplier tubes in many applications. However, multiple applications require greater performance than the current SiPMs are capable of, for example timing resolution for time-of-flight positron emission tomography and time-of-flight computed tomography, and mitigation of the large output capacitance of SiPM array for large-scale time projection chambers for liquid argon and liquid xenon experiments. In this contribution, the case will be made that 3D photon-to-digital converters, also known as 3D digital SiPMs, have a potentially superior performance over analog and 2D digital SiPMs. A review of 3D photon-to-digital converters is presented along with various applications where they can make a difference, such as time-of-flight medical imaging systems and low-background experiments in noble liquids. Finally, a review of the key design choices that must be made to obtain an optimized 3D photon-to-digital converter for radiation instrumentation, more specifically the single-photon avalanche diode array, the CMOS technology, the quenching circuit, the time-to-digital converter, the digital signal processing and the system level integration, are discussed in detail.
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Postek, M. T., and A. E. Vladar. "The bright future of digital imaging in scanning electron microscopy." Proceedings, annual meeting, Electron Microscopy Society of America 51 (August 1, 1993): 768–69. http://dx.doi.org/10.1017/s0424820100149672.

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One of the major advancements applied to scanning electron microscopy (SEM) during the past 10 years has been the development and application of digital imaging technology. Advancements in technology, notably the availability of less expensive, high-density memory chips and the development of high speed analog-to-digital converters, mass storage and high performance central processing units have fostered this revolution. Today, most modern SEM instruments have digital electronics as a standard feature. These instruments, generally have 8 bit or 256 gray levels with, at least, 512 × 512 pixel density operating at TV rate. In addition, current slow-scan commercial frame-grabber cards, directly applicable to the SEM, can have upwards of 12-14 bit lateral resolution permitting image acquisition at 4096 × 4096 resolution or greater. The two major categories of SEM systems to which digital technology have been applied are:In the analog SEM system the scan generator is normally operated in an analog manner and the image is displayed in an analog or "slow scan" mode.
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Postek, M. T., and A. E. Vladar. "The Bright Future of Digital Imaging in Scanning Electron Microscopy." Microscopy Today 2, no. 4 (July 1994): 19–20. http://dx.doi.org/10.1017/s1551929500065573.

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One of the major advancements applied to scanning electron microscopy (SEM) during the past 10 years has been the development and application of digital imaging technology. Advancements in technology, notably the availability of less expensive, high-density memory chips and the development of high speed analog-to-digital converters, mass storage and high performance central processing units have fostered this revolution. Today, most modern SEM instruments have digital electronics as a standard feature. These instruments, generally have 8 bit or 256 gray levels with, at least, 512 X 512 pixel density operating at TV rate. In addition, current slow-scan commercial frame-grabber cards, directly applicable to the SEM, can have upwards of 12-14 bit lateral resolution permitting image acquisition at 4096 X 4096 resolution or greater.
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Würfel, D., M. Ruß, R. Lerch, D. Weiler, P. Yang, and H. Vogt. "An uncooled VGA-IRFPA with novel readout architecture." Advances in Radio Science 9 (July 29, 2011): 107–10. http://dx.doi.org/10.5194/ars-9-107-2011.

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Abstract. An uncooled VGA Infrared Focal Plane Array (IRFPA) based on microbolometers with a pixel pitch of 25 μm for thermal imaging applications is presented. The IRFPA has a 16-bit digital video data output at a frame rate of 30 Hz. Thousands of Analog to Digital Converters (ADCs) are located under the microbolometer array. One ADC consists of a Sigma-Delta-Modulator (SDM) of 2nd order and a decimation filter. It is multiplexed for a certain amount of microbolometers arranged in a so called "cluster". In the 1st stage of the SDM the microbolometer current is integrated time-continuously. The feedback is applied using a switchable current source. First measurements of Noise Equivalent Temperature Difference (NETD) as a key parameter for IRFPAs will be presented.
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Chuirazzi, William, Aaron Craft, Burkhard Schillinger, Steven Cool, and Alessandro Tengattini. "Boron-Based Neutron Scintillator Screens for Neutron Imaging." Journal of Imaging 6, no. 11 (November 19, 2020): 124. http://dx.doi.org/10.3390/jimaging6110124.

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In digital neutron imaging, the neutron scintillator screen is a limiting factor of spatial resolution and neutron capture efficiency and must be improved to enhance the capabilities of digital neutron imaging systems. Commonly used neutron scintillators are based on 6LiF and gadolinium oxysulfide neutron converters. This work explores boron-based neutron scintillators because 10B has a neutron absorption cross-section four times greater than 6Li, less energetic daughter products than Gd and 6Li, and lower γ-ray sensitivity than Gd. These factors all suggest that, although borated neutron scintillators may not produce as much light as 6Li-based screens, they may offer improved neutron statistics and spatial resolution. This work conducts a parametric study to determine the effects of various boron neutron converters, scintillator and converter particle sizes, converter-to-scintillator mix ratio, substrate materials, and sensor construction on image quality. The best performing boron-based scintillator screens demonstrated an improvement in neutron detection efficiency when compared with a common 6LiF/ZnS scintillator, with a 125% increase in thermal neutron detection efficiency and 67% increase in epithermal neutron detection efficiency. The spatial resolution of high-resolution borated scintillators was measured, and the neutron tomography of a test object was successfully performed using some of the boron-based screens that exhibited the highest spatial resolution. For some applications, boron-based scintillators can be utilized to increase the performance of a digital neutron imaging system by reducing acquisition times and improving neutron statistics.
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Rothberg, Jonathan M., Tyler S. Ralston, Alex G. Rothberg, John Martin, Jaime S. Zahorian, Susan A. Alie, Nevada J. Sanchez, et al. "Ultrasound-on-chip platform for medical imaging, analysis, and collective intelligence." Proceedings of the National Academy of Sciences 118, no. 27 (July 1, 2021): e2019339118. http://dx.doi.org/10.1073/pnas.2019339118.

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Over the past half-century, ultrasound imaging has become a key technology for assessing an ever-widening range of medical conditions at all stages of life. Despite ultrasound’s proven value, expensive systems that require domain expertise in image acquisition and interpretation have limited its broad adoption. The proliferation of portable and low-cost ultrasound imaging can improve global health and also enable broad clinical and academic studies with great impact on the fields of medicine. Here, we describe the design of a complete ultrasound-on-chip, the first to be cleared by the Food and Drug Administration for 13 indications, comprising a two-dimensional array of silicon-based microelectromechanical systems (MEMS) ultrasonic sensors directly integrated into complementary metal–oxide–semiconductor-based control and processing electronics to enable an inexpensive whole-body imaging probe. The fabrication and design of the transducer array with on-chip analog and digital circuits, having an operating power consumption of 3 W or less, are described, in which approximately 9,000 seven-level feedback-based pulsers are individually addressable to each MEMS element and more than 11,000 amplifiers, more than 1,100 analog-to-digital converters, and more than 1 trillion operations per second are implemented. We quantify the measured performance and the ability to image areas of the body that traditionally takes three separate probes. Additionally, two applications of this platform are described—augmented reality assistance that guides the user in the acquisition of diagnostic-quality images of the heart and algorithms that automate the measurement of cardiac ejection fraction, an indicator of heart health.
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Hu, Chang-Lin, Guo-Zua Wu, Chih-Chi Chang, and Meng-Lin Li. "Acoustic-Field Beamforming for Low-Power Portable Ultrasound." Ultrasonic Imaging 43, no. 4 (May 6, 2021): 175–85. http://dx.doi.org/10.1177/01617346211013473.

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Portable ultrasound has been extensively used for diagnostic applications in health monitoring, emergency rooms, and ambulances. However, these handheld ultrasound systems may suffer from heat and battery issues attributed to the large power consumption of the transmitter. Additionally, the largest portion of the direct current (DC) power consumption can be attributed to the amplifier in the digital-to-analog converter (DAC) of the transmitter and to the analog-to-digital converter (ADC) of the receiver. Therefore, the number of transmit/receive channels in a portable ultrasound instrument is one of the crucial design factors regarding heat and battery related issues. To address these problems, we propose an acoustic-field beamforming (AFB) technique for low-power portable ultrasound systems with a single receive and five transmit channels. Finally, the simulation, experimental, and in vivo results verified the feasibility of this approach.
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Blanchard, François, Joel Edouard Nkeck, Dominique Matte, Riad Nechache, and David G. Cooke. "A Low-Cost Terahertz Camera." Applied Sciences 9, no. 12 (June 21, 2019): 2531. http://dx.doi.org/10.3390/app9122531.

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Cost effective imaging is required for a wide range of scientific and engineering applications. For electromagnetic waves in the terahertz (THz) frequency range, a key missing element that has prevented widespread applications in this spectral range is an inexpensive and efficient imaging device. In recent years, vanadium oxide based thermal sensors have rapidly entered the market for night vision capability. At the same time, sensors based on this technology have been applied to the THz domain, but with two orders of magnitude larger pricing range. Here we show that, with a simple modification, a commercially available thermal imaging camera can function as a THz imaging device. By comparing a commercially available THz camera and this low-cost device, we identify the main sensitivity difference is not attributed to anything intrinsic to the devices, but rather to the analog-to-digital converter and dynamic background subtraction capability. This demonstration of a low-cost THz camera may aid in the rapid development of affordable THz imaging solutions for industrial and scientific applications.
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Milatz, Marius. "Application of single-board computers in experimental research on unsaturated soils." E3S Web of Conferences 195 (2020): 02022. http://dx.doi.org/10.1051/e3sconf/202019502022.

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In this contribution, the application of single-board computers for the investigation of the hydro-mechanical behaviour of unsaturated granular soils is presented. Single-board computers, such as the Raspberry Pi or Arduino, have recently experienced a hype of applications in school and university teaching, in the maker scene, amongst hobbyists, but also in research. In combination with easy to learn and open programming languages, such as Python, individual experimental set-ups for research in unsaturated soil mechanics, using actuators and sensors can be easily developed with the help of different programmable hardware, such as stepper motors, analog-to-digital converters and other controller boards. For the experimental application in imaging of unsaturated granular soils by computed tomography (CT), we present a miniaturized uniaxial compression device for the measurement of unsaturated shear strength and capillary cohesion in CT-experiments. The device has already been applied for CT-imaging of the development of water distribution and capillary bridges in between different shear steps. Furthermore, a new fully programmable hydraulic experimental set-up for the automated investigation of transient hydraulic paths of the water retention curve of granular media is presented. Both devices have been developed in the framework of the Raspberry Pi single-board computer and Python programming language with simple and relatively inexpensive hardware components. In addition to the technical development of the testing devices, experimental results of the hydro-mechanical behaviour of unsaturated sand and glass beads, derived from uniaxial compression tests and water retention tests, will be presented.
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Li, Ya Qin, Dan Chen, and Cao Yuan. "An Improved Hardware System of Excitations Pulse on X-Waves with Direct Digital Synthesizer." Applied Mechanics and Materials 329 (June 2013): 382–86. http://dx.doi.org/10.4028/www.scientific.net/amm.329.382.

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Limited diffracting waves such X-wave have great potential applications in the enlargement of the field depth in acoustic imaging systems. In practice, the generation of real time X-wave ultrasonic fields is a complex technology which involves precise and specific voltage for the excitations for each distinct array element. In order to simplify hardware system of excitations pulse in X-wave, the complex excitations were instead by simple driving, which combination of rectangular and triangular driving pulses. The improved hardware system consists a computer for communication with the circuit, universal serial bus (USB) based micro controller unit (MCU) for data transmission, field programmable gate array (FPGA) based Direct Digital Synthesizer (DDS), 12-bit digital-to-analog (D/A) converter and a two stage amplifier. DDS generate arbitrary waveforms with a single, fixed-frequency reference clock, which satisfy the need of complex excitations pulse of X-wave. From the simulations of hard system, the difference of waveforms at different radius between theoretical waves is reduced in 0.41%.
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Dissertations / Theses on the topic "Analog-to-digital converters for imaging applications"

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Mahsereci, Yigit Uygar. "A Successive Approximation Register Analog-to-digital Converter For Low Cost Microbolometers." Master's thesis, METU, 2012. http://etd.lib.metu.edu.tr/upload/12614031/index.pdf.

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Commercialization of infrared (IR) vision is of vital importance for many applications, such as automobile and health care. The main obstacle in front of the further spread of this technology is the high price. The cost reduction is achieved by placing on-chip electronics and diminishing the camera size, where one of the important components is the analog-to-digital converter (ADC). This thesis reports the design of a successive approximation register (SAR) ADC for low-cost microbolometers and its test electronics. Imaging ADCs are optimized only for the specific application in order to achieve the lowest power, yet the highest performance. The successive approximation architecture is chosen, due to its low-power, small-area nature, high resolution potential, and the achievable speed, as the ADC needs to support a 160x120 imager at a frame rate of 25 frames/sec (fps). The resolution of the ADC is 14 bit at a sampling rate of 700 Ksample/sec (Ksps). The noise level is at the order of 1.3 LSBs. The true resolution of the ADC is set to be higher than the need of the current low-cost microbolometers, so that it is not the limiting factor for the overall noise specifications. The design is made using a 0.18µ
m CMOS process, for easy porting of design to the next generation low-cost microbolometers. An optional dual buffer approach is used for improved linearity, a modified, resistive digital-to-analog converter (DAC) is used for enhanced digital correction, and a highly configurable digital controller is designed for on-silicon modification of the device. Also, a secondary 16-bit high performance ADC with the same topology is designed in this thesis. The target of the high resolution ADC is low speed sensors, such as temperature sensors or very small array sizes of infrared sensors. Both of the SAR ADCs are designed without switched capacitor circuits, the operation speed can be minimized as low as DC if an extremely low power operation is required. A compact test setup is designed and implemented for the ADC. It consists of a custom designed proximity card, an FPGA card, and a PC. The proximity card is designed for high resolution ADC testing and includes all analog utilities such as voltage references, voltage regulators, digital buffers, high resolution DACs for reference generation, voltage buffers, and a very high resolution &Delta
-&Sigma
DAC for input voltage generation. The proximity card is fabricated and supports automated tests, because many components surrounding the ADC are digitally controllable. The FPGA card is selected as a commercially available card with USB control. The full chip functionalities and performances of both ADCs are simulated. The complete layouts of both versions are finished and submitted to the foundry. The ADC prototypes consist of more than 7500 transistors including the digital circuitry. The power dissipation of the 16-bit ADC is around 10mW, where the 14-bit device consumes 30mW. Each of the dies is 1mm x 5mm, whereas the active circuits occupy around 0.5mm x 1.5mm silicon area. These chips are the first steps in METU for the realization of the digital-in digital-out low cost microbolometers and low cost sensors.
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Zhang, Dai. "Ultra-Low-Power Analog-to-Digital Converters for Medical Applications." Doctoral thesis, Linköpings universitet, Elektroniska komponenter, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-110387.

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Biomedical systems are commonly attached to or implanted into human bodies, and powered by harvested energy or small batteries. In these systems, analog-to-digital converters (ADCs) are key components as the interface between the analog world and the digital domain. Conversion of the low frequency bioelectric signals does not require high speed, but ultralow- power operation. This combined with the required conversion accuracy makes the design of such ADCs a major challenge. Among prevalent ADC architectures, the successiveapproximation-register (SAR) ADC exhibits significantly high energy efficiency due to its good trade-offs among power consumption, conversion accuracy, and design complexity. This thesis examines the physical limitations and investigates the design methodologies and circuit techniques for low-speed and ultra-low-power SAR ADCs. The power consumption of SAR ADC is analyzed and its lower bounds are formulated. At low resolution, power is bounded by minimum feature sizes; while at medium to high resolution, power is bounded by thermal noise and capacitor mismatch. In order to relax the mismatch requirement on the capacitor sizing while still ensuring enough linearity for high resolution, a bottom-up weight calibration technique is further proposed. It utilizes redundancy generated by a non-binary-weighted capacitive network, and measures the actual weights of more significant capacitors using less significant capacitors. Three SAR ADCs have been implemented. The first ADC, fabricated in a 0.13μm CMOS process, achieves 9.1ENOB with 53-nW power consumption at 1kS/s. The main key to achieve the ultra-low-power operation turns out to be the maximal simplicity in the ADC architecture and low transistor count. In addition, a dual-supply voltage scheme allows the SAR digital logic to operate at 0.4V, reducing the overall power consumption of the ADC by 15% without any loss in performance. Based on the understanding from the first ADC and motivated by the predicted power bounds, the second ADC, a single-supply 9.1-ENOB SAR ADC in 65nm CMOS process has been further fabricated. It achieves a substantial (94%) improvement in power consumption with 3-nW total power at 1kS/s and 0.7V. Following the same concept of imposing maximal simplicity in the ADC architecture and taking advantage of the smaller feature size, the ultra-low-power consumption is achieved by a matched splitarray capacitive DAC, a bottom-plate full-range input-sampling scheme, a latch-based SAR control logic, and a multi-VT design approach. The third ADC fabricated in 65nm CMOS process targets at a higher resolution of 14b and a wider bandwidth of 5KHz. It achieves 12.5ENOB  with 1.98-μW power consumption at 0.8V and 10kS/s. To achieve the high resolution, the ADC implements a uniform-geometry non-binary-weighted capacitive DAC and employs a secondary-bit approach to dynamically shift decision levels for error correction. Moreover, a comparator with bias control utilizes the redundancy to reduce the power consumption.
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Gustafsson, E. Martin I. "Reconfigurable Analog to Digital Converters for Low Power Wireless Applications." Doctoral thesis, Kista : KTH School of Information and Communication Technology, 2008. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-4774.

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Serrano, Guillermo J. "Floating-gate digital to analog converter for retinal implant applications." Thesis, Georgia Institute of Technology, 2003. http://hdl.handle.net/1853/13312.

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Tao, Sha. "Power-Efficient Continuous-Time Incremental Sigma-Delta Analog-to-Digital Converters." Doctoral thesis, KTH, Integrerade komponenter och kretsar, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-164282.

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Over the past decade, there has been a growing interest in the devel- opment of integrated circuits (ICs) for wearable or implantable biosensors, aiming at providing personalized healthcare services and reducing the health-care expenses. In biosensor ICs, the analog-to-digital converter (ADC) is a key building block that acts as a bridge between analog signals and digital processors. Since most of the biosensors are attached to or implanted in hu- man bodies and powered by either portable batteries or harvested energy, ultra-low-power operation is often required. The stringent power budget im- poses challenges in designing power-efficient ADCs, especially when targeting high-resolution. Among different ADC architectures, the Sigma-Delta (Σ∆) ADC has emerged as the most suitable for low-power, high-resolution appli- cations. This thesis aims to enhance the power efficiency of continuous-time (CT) incremental Σ∆ (IΣ∆) ADCs by exploring design techniques at both architectural and circuit levels. The impact of feedback DACs in CT IΣ∆ ADCs is investigated, so as to provide power-efficient feedback DAC solutions, suitable for biosensor ap- plications. Different DAC schemes are examined analytically considering the trade-off between timing error sensitivity and power consumption. The an- alytical results are verified through behavioral simulations covering both the conventional and incremental Σ∆ modes. Additionally, by considering a typi- cal biosensor application, different feedback DACs are further compared, aim- ing to offer a reference for selecting a power-efficient DAC scheme. A two-step CT IΣ∆ ADC is proposed, analyzed, implemented and tested, with the objective of offering flexible and power-efficient A/D conversion in neural recording systems. By pipelining two CT IΣ∆ ADCs, the pro- posed ADC can achieve high-resolution without sacrificing the conversion rate. Power-efficient circuits are proposed to implement the active blocks of the proposed ADC. The feasibility and power efficiency of the two-step CT IΣ∆ ADC are validated by measurement results. Furthermore, enhancement techniques from both the architecture and circuit perspectives are discussed and implemented, which are validated by post-layout simulations. A comparative study of several CT IΣ∆ ADC architectures is presented, aiming to boost the power efficiency by reducing the number of cycles per con- version while benefiting from the advantage of CT implementation. Five CT IΣ∆ ADC architectures are analyzed and simulated to evaluate their effective- ness under ideal conditions. Based on the theoretical results, a second-order CT IΣ∆ ADC and an extended-range CT IΣ∆ ADC are selected as implemen- tation case studies together with the proposed two-step CT IΣ∆ ADC. The impact of critical circuit non-idealities is investigated. The three ADCs are then implemented and fabricated on a single chip. Experimental results reveal that the three prototype ADCs improve considerably the power efficiency of existing CT IΣ∆ ADCs while being very competitive when compared to all types of the state-of-the-art IΣ∆ ADCs.

QC 20150422

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Soell, Sven. "Theory and applications of delta-sigma analogue-to-digital converters without negative feedback." Thesis, Connect to e-thesis, 2008. http://theses.gla.ac.uk/369/.

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Thesis (Ph.D.) - University of Glasgow, 2008.
Ph.D. thesis submitted to the Department of Electronics and Electrical Engineering, Faculty of Engineering, University of Glasgow, 2008. Includes bibliographical references. Print version also available.
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Sutula, Stepan. "Low-power high-resolution cmos switched-capacitor delta-sigma analog-to-digital converters for sensor applications." Doctoral thesis, Universitat Autònoma de Barcelona, 2015. http://hdl.handle.net/10803/667348.

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Aquesta tesi doctoral explora mètodes per augmentar tant l'eficiència energètica com la resolució de convertidors analògic-digital (ADCs) Delta-Sigma de condensadors commutats mitjançant innovadors circuits CMOS de baix consum. En aquest sentit, s'ha prioritzat un alt rendiment, fiabilitat i baixos costos de fabricació dels circuits, així com un flux de disseny simple per ser reutilitzat per la comunitat científica. S'ha escollit l'arquitectura Delta-Sigma per la seva simplicitat i la tolerància a les imperfeccions dels seus blocs bàsics. La recerca de circuits presentada utilitza tècniques de condensadors commutats per aconseguir un aparellament adequat entre els dispositius i per tenir dependència només de la fluctuació del rellotge extern. Les tècniques de disseny de circuits analògics de baix corrent desenvolupades tenen com a objectiu l'eficiència energètica, aprofitant les regions d'inversió feble i moderada d'operació del transistor MOS. També s'investiguen nous amplificadors operacionals Classe AB com a elements actius, tractant d'utilitzar energia només durant les transicions dinàmiques, el que redueix el consum de potència a nivell de circuit. Els circuits no utilitzats durant un determinat període de temps es desactiven, reduint així el consum de potència a nivell de sistema i minimitzant el nombre de dispositius de commutació en el camí de senyal. S'ha millorat la fiabilitat dels circuits proposats evitant els elevadors de tensió o altres tècniques que poden incrementar els voltatges d'operació més enllà del d'alimentació nominal de la tecnologia CMOS utilitzada. A més, per incrementar el rendiment de producció dels ADCs resultants, s'ha enfocat la recerca de disseny sobre noves topologies de circuits amb una baixa sensibilitat a les variacions tant del procés de fabricació com de la temperatura. Un modulador Delta-Sigma de 96.6 dB de SNDR, 50 kHz d'ample de banda, 1.8 V i 7.9 mW per a ADCs s'ha implementat en una tecnologia estàndard CMOS de 0.18 µm basat en les novetats proposades. Els resultats de les mesures indiquen la millora de l'estat de l'art d'ADCs d'alta resolució sense elevadors de tensió del senyal de rellotge, calibratge o compensació digital, fet que beneficia una àmplia gamma d'aplicacions de sensors intel·ligents. Una altra contribució en el marc d'aquest treball de recerca és la millora dels amplificadors operacionals de Classe AB d'una sola etapa exclusivament MOS. Els amplificadors commutats de mirall variable desenvolupats, amb la seva remarcable eficiència de corrent i compensació intrínseca de freqüència juntament amb un fons d'escala i un guany de llaç obert grans, són adequats per a un ample ventall d'aplicacions de baix consum i d'alta precisió més enllà de l'àmbit
This PhD thesis explores methods to increase both the power efficiency and the resolution of switched-capacitor Delta-Sigma analog-to-digital converters (ADCs) by employing novel CMOS low-power circuits. A high circuit performance, reliability, low manufacturing costs and a simple design flow to be reused by the scientific community are prioritized. The Delta-Sigma architecture is chosen because of its simplicity and tolerance for its basic block imperfections. The presented circuit research makes use of switched-capacitor techniques to achieve an appropriate matching between the devices and to be dependent only on the external clock jitter. The developed low-current analog circuit techniques target power efficiency, taking advantage of the weak- and moderate-inversion regions of the MOS transistor operation. Novel Class-AB operational amplifiers are also investigated as active elements, trying to use energy only for dynamic transitions, thus reducing power consumption at the circuit level. The circuits unused during a certain period of time are switched off, thus reducing power consumption at the system level and minimizing the number of signal-path switching devices. The circuit reliability is improved by avoiding bootstrapping or other techniques which may increase the operation voltages beyond the nominal supply of the target CMOS technology. Furthermore, the design research also focuses on new circuit topologies with a low sensitivity to both process and temperature deviations in order to increase the yield of the resulting ADCs. A 96.6-dB-SNDR 50-kHz-BW 1.8-V 7.9-mW Delta-Sigma modulator for ADCs is implemented in a standard 0.18-µm CMOS technology based on the proposed novelties. The measurement results indicate the improvement of the state of the art of high-resolution ADCs without clock bootstrapping, calibration or digital compensation, benefiting a wide range of smart sensing applications. Another contribution made in the scope of this research work is the improvement of MOS-only single-stage Class-AB operational amplifiers. The developed switched variable-mirror amplifiers, with their remarkable current efficiency and intrinsic frequency compensation together with high full-scale value and open-loop gain, are suitable for low-power high-precision applications extending beyond the specific area of ADCs, such as digital-to-analog converters (DACs), filters or generators.
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Marble, William J. "Design and analysis of charge-transfer amplifiers for low-power analog-to-digital converter applications /." Diss., CLICK HERE for online access, 2004. http://contentdm.lib.byu.edu/ETD/image/etd418.pdf.

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Lee, Sang Min. "A CMOS analog pulse compressor with a low-power analog-to-digital converter for MIMO radar applications." Diss., Georgia Institute of Technology, 2010. http://hdl.handle.net/1853/42875.

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Multiple-input multiple-output (MIMO) radars, which utilize multiple transmitters and receivers to send and receive independent waveforms, have been actively investigated as a next generation radar technology inspired by MIMO techniques in communication theory. Complementary metal-oxide-semiconductor (CMOS) technology offers an opportunity for dramatic cost and size reduction for a MIMO array. However, the resulting formidable signal processing burden has not been addressed properly and remains a challenge. On the other hand, from a block-level point of view, an analog-to-digital converter (ADC) is required for mixed-signal processing to convert analog signals to digital signals, but an ADC occupies a significant portion of a system's budget. Therefore, improvement of an ADC will greatly enhance various trade-offs. This research presents an alternative and viable approach for a MIMO array from a system architecture point of view, and also develops circuit level improvement techniques for an ADC. This dissertation presents a fully-integrated analog pulse compressor (APC) based on an analog matched filter in a mixed signal domain as a key block for the waveform diversity MIMO radar. The performance gain of the proposed system is mathematically presented, and the proposed system is successfully implemented and demonstrated from the block level to the system level using various waveforms. Various figures of merit are proposed to aid system evaluations. This dissertation also presents a low-power ADC based on an asynchronous sample-and-hold multiplying SAR (ASHMSAR) with an enhanced input range dynamic comparator as a key element of a future system. Overall, with the new ADC, a high level of system performance without severe penalty on power consumption is expected. The research in this dissertation provides low-cost and low-power MIMO solutions for a future system by addressing both system issues and circuit issues comprehensively.
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Jalali, Farahani Bahar. "Adaptive digital calibration techniques for high speed, high resolution SIGMA DELTA ADCs for broadband wireless applications." Columbus, Ohio : Ohio State University, 2005. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=osu1133192371.

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Books on the topic "Analog-to-digital converters for imaging applications"

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Ohnhäuser, Frank. Analog-Digital Converters for Industrial Applications Including an Introduction to Digital-Analog Converters. Berlin, Heidelberg: Springer Berlin Heidelberg, 2015. http://dx.doi.org/10.1007/978-3-662-47020-6.

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Mustafa, M. A. Microcomputer interfacing and applications. 2nd ed. Oxford: Newnes, 1994.

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International Conference on Advanced A/D and D/A Conversion Techniques and their Applications (3rd 1999 University of Strathclyde). Third International Conference on Advanced A/D and D/A Conversion Techniques and their Applications, 27-28 July 1999. [London]: [Institution of Electrical Engineers], 1999.

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Engineers, Institution of Electrical, ed. The 5th IEE international conference on ADDA 2005: Advanced A/D and D/A conversion techniques and their applications : University of Limerick, Limerick, Ireland : 25-27 July 2005. London: Institution of Electrical Engineers, 2005.

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Vankka, Jouko. Direct Digital Synthesizers: Theory, Design and Applications. Boston, MA: Springer US, 2001.

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I, Halonen K. A., ed. Direct digital synthesizers: Theory, design, and applications. Boston: Kluwer Academic Publishers, 2001.

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Ohnhäuser, Frank. Analog-Digital Converters for Industrial Applications Including an Introduction to Digital-Analog Converters. Springer Vieweg, 2015.

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Advanced A/d And D/a Conversion Techniques And Their Applications. Not Avail, 2005.

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Cmos Data Converters Phase-Locked Loops and Their Applications. Taylor & Francis Group, 2018.

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I, Bourdopoulos George, ed. Delta-Sigma modulators: Modeling, design and applications. London: Imperial College Press, 2003.

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Book chapters on the topic "Analog-to-digital converters for imaging applications"

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Ohnhäuser, Frank. "Digital-to-Analog Converters." In Analog-Digital Converters for Industrial Applications Including an Introduction to Digital-Analog Converters, 305–28. Berlin, Heidelberg: Springer Berlin Heidelberg, 2015. http://dx.doi.org/10.1007/978-3-662-47020-6_7.

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Ohnhäuser, Frank. "Basics on Delta-Sigma Converters." In Analog-Digital Converters for Industrial Applications Including an Introduction to Digital-Analog Converters, 207–35. Berlin, Heidelberg: Springer Berlin Heidelberg, 2015. http://dx.doi.org/10.1007/978-3-662-47020-6_4.

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Ohnhäuser, Frank. "Advanced SAR ADC Design." In Analog-Digital Converters for Industrial Applications Including an Introduction to Digital-Analog Converters, 119–206. Berlin, Heidelberg: Springer Berlin Heidelberg, 2015. http://dx.doi.org/10.1007/978-3-662-47020-6_3.

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Ohnhäuser, Frank. "Introduction." In Analog-Digital Converters for Industrial Applications Including an Introduction to Digital-Analog Converters, 1–49. Berlin, Heidelberg: Springer Berlin Heidelberg, 2015. http://dx.doi.org/10.1007/978-3-662-47020-6_1.

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Ohnhäuser, Frank. "ADCs Based on Successive Approximation." In Analog-Digital Converters for Industrial Applications Including an Introduction to Digital-Analog Converters, 51–118. Berlin, Heidelberg: Springer Berlin Heidelberg, 2015. http://dx.doi.org/10.1007/978-3-662-47020-6_2.

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Ohnhäuser, Frank. "Continuous-Time Delta-Sigma ADCs." In Analog-Digital Converters for Industrial Applications Including an Introduction to Digital-Analog Converters, 237–65. Berlin, Heidelberg: Springer Berlin Heidelberg, 2015. http://dx.doi.org/10.1007/978-3-662-47020-6_5.

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Ohnhäuser, Frank. "External Driver Circuitry and Test of ADCs." In Analog-Digital Converters for Industrial Applications Including an Introduction to Digital-Analog Converters, 267–304. Berlin, Heidelberg: Springer Berlin Heidelberg, 2015. http://dx.doi.org/10.1007/978-3-662-47020-6_6.

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Xing, Xinpeng, Peng Zhu, and Georges Gielen. "A/D Converters and Applications." In Design of Power-Efficient Highly Digital Analog-to-Digital Converters for Next-Generation Wireless Communication Systems, 13–35. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-66565-8_2.

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Bajdechi, Ovidiu, and Johan H. Huijsing. "Sigma-Delta ADC for Audio Applications." In Systematic Design of Sigma-Delta Analog-to-Digital Converters, 121–41. Boston, MA: Springer US, 2004. http://dx.doi.org/10.1007/978-1-4020-7946-7_6.

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Li, J., X. Zeng, and Y. Guo. "Low-Power Analog-to-Digital Converters (ADCs) for Mobile Broadcasting Applications." In Handbook of Mobile Broadcasting, 213–38. Auerbach Publications, 2008. http://dx.doi.org/10.1201/9781420053890-9.

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Conference papers on the topic "Analog-to-digital converters for imaging applications"

1

Konuk, Baris, and Serkan Ender Hakyemez. "Performance analysis of analog-to-digital converters." In 2012 20th Signal Processing and Communications Applications Conference (SIU). IEEE, 2012. http://dx.doi.org/10.1109/siu.2012.6204425.

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Gupta, Deepnarayan, Amol A. Inamdar, Dmitri E. Kirichenko, Alan M. Kadin, and Oleg A. Mukhanov. "Superconductor analog-to-digital converters and their applications." In 2011 IEEE/MTT-S International Microwave Symposium - MTT 2011. IEEE, 2011. http://dx.doi.org/10.1109/mwsym.2011.5972910.

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Gupta, D., A. Inamdar, D. E. Kirichenko, A. M. Kadin, and O. A. Mukhanov. "Superconductor analog-to-digital converters and their applications." In 2011 IEEE/MTT-S International Microwave Symposium - MTT 2011. IEEE, 2011. http://dx.doi.org/10.1109/mwsym.2011.5973407.

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Yu, R. "Multi-gigasample per second analog-to digital converters and digital-to-analog converters implemented in an AlGaAs/GaAs HBT technology." In Third International Conference on Advanced A/D and D/A Conversion Techniques and their Applications. IEE, 1999. http://dx.doi.org/10.1049/cp:19990452.

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Grace, Carl R., Peter Denes, Dario Gnani, Henrik von der Lippe, and Jean-Pierre Walder. "Code-density calibration of Nyquist-rate analog-to-digital converters." In 2012 IEEE Nuclear Science Symposium and Medical Imaging Conference (2012 NSS/MIC). IEEE, 2012. http://dx.doi.org/10.1109/nssmic.2012.6551183.

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Imai, Yuuki, Tohru Ishihara, Hidetoshi Onodera, Akihiko Shinya, Shota Kita, Kengo Nozaki, Kenta Takata, and Masaya Notomi. "An Optical Parallel Multiplier Using Nanophotonic Analog Adders and Optoelectronic Analog-to-Digital Converters." In CLEO: Applications and Technology. Washington, D.C.: OSA, 2018. http://dx.doi.org/10.1364/cleo_at.2018.jw2a.50.

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Van Rethy, Jelle, Maarten De Smedt, Marian Verhelst, and Georges Gielen. "Predictive sensing in analog-to-digital converters for biomedical applications." In 2013 International Symposium on Signals, Circuits and Systems (ISSCS). IEEE, 2013. http://dx.doi.org/10.1109/isscs.2013.6651263.

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Zjajo, Amir, and Jose Pineda de Gyvez. "Calibration and Debugging of Multi-step Analog to Digital Converters." In 2008 4th IEEE International Symposium on Electronic Design, Test and Applications (DELTA '08). IEEE, 2008. http://dx.doi.org/10.1109/delta.2008.82.

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Panicacci, Roger, Bedabrata Pain, Zhimin Zhou, Junichi Nakamura, and Eric R. Fossum. "Progress in voltage and current mode on-chip analog-to-digital converters for CMOS image sensors." In Electronic Imaging: Science & Technology, edited by Constantine N. Anagnostopoulos, Morley M. Blouke, and Michael P. Lesser. SPIE, 1996. http://dx.doi.org/10.1117/12.236120.

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Wibbenmeyer, J., and C. I. H. Chen. "Built-in self-test for analog-to-digital converters in SoC applications." In 31st Annual Conference of IEEE Industrial Electronics Society, 2005. IECON 2005. IEEE, 2005. http://dx.doi.org/10.1109/iecon.2005.1569250.

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