Journal articles: 'Analog-to-digital converters for imaging applications'

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Pratte, Jean-François, Frédéric Nolet, Samuel Parent, Frédéric Vachon, Nicolas Roy, Tommy Rossignol, Keven Deslandes, Henri Dautet, Réjean Fontaine, and Serge A. Charlebois. "3D Photon-To-Digital Converter for Radiation Instrumentation: Motivation and Future Works." Sensors 21, no. 2 (January 16, 2021): 598. http://dx.doi.org/10.3390/s21020598.

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Analog and digital SiPMs have revolutionized the field of radiation instrumentation by replacing both avalanche photodiodes and photomultiplier tubes in many applications. However, multiple applications require greater performance than the current SiPMs are capable of, for example timing resolution for time-of-flight positron emission tomography and time-of-flight computed tomography, and mitigation of the large output capacitance of SiPM array for large-scale time projection chambers for liquid argon and liquid xenon experiments. In this contribution, the case will be made that 3D photon-to-digital converters, also known as 3D digital SiPMs, have a potentially superior performance over analog and 2D digital SiPMs. A review of 3D photon-to-digital converters is presented along with various applications where they can make a difference, such as time-of-flight medical imaging systems and low-background experiments in noble liquids. Finally, a review of the key design choices that must be made to obtain an optimized 3D photon-to-digital converter for radiation instrumentation, more specifically the single-photon avalanche diode array, the CMOS technology, the quenching circuit, the time-to-digital converter, the digital signal processing and the system level integration, are discussed in detail.

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Postek, M. T., and A. E. Vladar. "The bright future of digital imaging in scanning electron microscopy." Proceedings, annual meeting, Electron Microscopy Society of America 51 (August 1, 1993): 768–69. http://dx.doi.org/10.1017/s0424820100149672.

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One of the major advancements applied to scanning electron microscopy (SEM) during the past 10 years has been the development and application of digital imaging technology. Advancements in technology, notably the availability of less expensive, high-density memory chips and the development of high speed analog-to-digital converters, mass storage and high performance central processing units have fostered this revolution. Today, most modern SEM instruments have digital electronics as a standard feature. These instruments, generally have 8 bit or 256 gray levels with, at least, 512 × 512 pixel density operating at TV rate. In addition, current slow-scan commercial frame-grabber cards, directly applicable to the SEM, can have upwards of 12-14 bit lateral resolution permitting image acquisition at 4096 × 4096 resolution or greater. The two major categories of SEM systems to which digital technology have been applied are:In the analog SEM system the scan generator is normally operated in an analog manner and the image is displayed in an analog or "slow scan" mode.

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Postek, M. T., and A. E. Vladar. "The Bright Future of Digital Imaging in Scanning Electron Microscopy." Microscopy Today 2, no. 4 (July 1994): 19–20. http://dx.doi.org/10.1017/s1551929500065573.

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One of the major advancements applied to scanning electron microscopy (SEM) during the past 10 years has been the development and application of digital imaging technology. Advancements in technology, notably the availability of less expensive, high-density memory chips and the development of high speed analog-to-digital converters, mass storage and high performance central processing units have fostered this revolution. Today, most modern SEM instruments have digital electronics as a standard feature. These instruments, generally have 8 bit or 256 gray levels with, at least, 512 X 512 pixel density operating at TV rate. In addition, current slow-scan commercial frame-grabber cards, directly applicable to the SEM, can have upwards of 12-14 bit lateral resolution permitting image acquisition at 4096 X 4096 resolution or greater.

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Würfel, D., M. Ruß, R. Lerch, D. Weiler, P. Yang, and H. Vogt. "An uncooled VGA-IRFPA with novel readout architecture." Advances in Radio Science 9 (July 29, 2011): 107–10. http://dx.doi.org/10.5194/ars-9-107-2011.

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Abstract. An uncooled VGA Infrared Focal Plane Array (IRFPA) based on microbolometers with a pixel pitch of 25 μm for thermal imaging applications is presented. The IRFPA has a 16-bit digital video data output at a frame rate of 30 Hz. Thousands of Analog to Digital Converters (ADCs) are located under the microbolometer array. One ADC consists of a Sigma-Delta-Modulator (SDM) of 2nd order and a decimation filter. It is multiplexed for a certain amount of microbolometers arranged in a so called "cluster". In the 1st stage of the SDM the microbolometer current is integrated time-continuously. The feedback is applied using a switchable current source. First measurements of Noise Equivalent Temperature Difference (NETD) as a key parameter for IRFPAs will be presented.

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Chuirazzi, William, Aaron Craft, Burkhard Schillinger, Steven Cool, and Alessandro Tengattini. "Boron-Based Neutron Scintillator Screens for Neutron Imaging." Journal of Imaging 6, no. 11 (November 19, 2020): 124. http://dx.doi.org/10.3390/jimaging6110124.

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In digital neutron imaging, the neutron scintillator screen is a limiting factor of spatial resolution and neutron capture efficiency and must be improved to enhance the capabilities of digital neutron imaging systems. Commonly used neutron scintillators are based on 6LiF and gadolinium oxysulfide neutron converters. This work explores boron-based neutron scintillators because 10B has a neutron absorption cross-section four times greater than 6Li, less energetic daughter products than Gd and 6Li, and lower γ-ray sensitivity than Gd. These factors all suggest that, although borated neutron scintillators may not produce as much light as 6Li-based screens, they may offer improved neutron statistics and spatial resolution. This work conducts a parametric study to determine the effects of various boron neutron converters, scintillator and converter particle sizes, converter-to-scintillator mix ratio, substrate materials, and sensor construction on image quality. The best performing boron-based scintillator screens demonstrated an improvement in neutron detection efficiency when compared with a common 6LiF/ZnS scintillator, with a 125% increase in thermal neutron detection efficiency and 67% increase in epithermal neutron detection efficiency. The spatial resolution of high-resolution borated scintillators was measured, and the neutron tomography of a test object was successfully performed using some of the boron-based screens that exhibited the highest spatial resolution. For some applications, boron-based scintillators can be utilized to increase the performance of a digital neutron imaging system by reducing acquisition times and improving neutron statistics.

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Rothberg, Jonathan M., Tyler S. Ralston, Alex G. Rothberg, John Martin, Jaime S. Zahorian, Susan A. Alie, Nevada J. Sanchez, et al. "Ultrasound-on-chip platform for medical imaging, analysis, and collective intelligence." Proceedings of the National Academy of Sciences 118, no. 27 (July 1, 2021): e2019339118. http://dx.doi.org/10.1073/pnas.2019339118.

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Over the past half-century, ultrasound imaging has become a key technology for assessing an ever-widening range of medical conditions at all stages of life. Despite ultrasound’s proven value, expensive systems that require domain expertise in image acquisition and interpretation have limited its broad adoption. The proliferation of portable and low-cost ultrasound imaging can improve global health and also enable broad clinical and academic studies with great impact on the fields of medicine. Here, we describe the design of a complete ultrasound-on-chip, the first to be cleared by the Food and Drug Administration for 13 indications, comprising a two-dimensional array of silicon-based microelectromechanical systems (MEMS) ultrasonic sensors directly integrated into complementary metal–oxide–semiconductor-based control and processing electronics to enable an inexpensive whole-body imaging probe. The fabrication and design of the transducer array with on-chip analog and digital circuits, having an operating power consumption of 3 W or less, are described, in which approximately 9,000 seven-level feedback-based pulsers are individually addressable to each MEMS element and more than 11,000 amplifiers, more than 1,100 analog-to-digital converters, and more than 1 trillion operations per second are implemented. We quantify the measured performance and the ability to image areas of the body that traditionally takes three separate probes. Additionally, two applications of this platform are described—augmented reality assistance that guides the user in the acquisition of diagnostic-quality images of the heart and algorithms that automate the measurement of cardiac ejection fraction, an indicator of heart health.

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Hu, Chang-Lin, Guo-Zua Wu, Chih-Chi Chang, and Meng-Lin Li. "Acoustic-Field Beamforming for Low-Power Portable Ultrasound." Ultrasonic Imaging 43, no. 4 (May 6, 2021): 175–85. http://dx.doi.org/10.1177/01617346211013473.

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Portable ultrasound has been extensively used for diagnostic applications in health monitoring, emergency rooms, and ambulances. However, these handheld ultrasound systems may suffer from heat and battery issues attributed to the large power consumption of the transmitter. Additionally, the largest portion of the direct current (DC) power consumption can be attributed to the amplifier in the digital-to-analog converter (DAC) of the transmitter and to the analog-to-digital converter (ADC) of the receiver. Therefore, the number of transmit/receive channels in a portable ultrasound instrument is one of the crucial design factors regarding heat and battery related issues. To address these problems, we propose an acoustic-field beamforming (AFB) technique for low-power portable ultrasound systems with a single receive and five transmit channels. Finally, the simulation, experimental, and in vivo results verified the feasibility of this approach.

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Blanchard, François, Joel Edouard Nkeck, Dominique Matte, Riad Nechache, and David G. Cooke. "A Low-Cost Terahertz Camera." Applied Sciences 9, no. 12 (June 21, 2019): 2531. http://dx.doi.org/10.3390/app9122531.

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Cost effective imaging is required for a wide range of scientific and engineering applications. For electromagnetic waves in the terahertz (THz) frequency range, a key missing element that has prevented widespread applications in this spectral range is an inexpensive and efficient imaging device. In recent years, vanadium oxide based thermal sensors have rapidly entered the market for night vision capability. At the same time, sensors based on this technology have been applied to the THz domain, but with two orders of magnitude larger pricing range. Here we show that, with a simple modification, a commercially available thermal imaging camera can function as a THz imaging device. By comparing a commercially available THz camera and this low-cost device, we identify the main sensitivity difference is not attributed to anything intrinsic to the devices, but rather to the analog-to-digital converter and dynamic background subtraction capability. This demonstration of a low-cost THz camera may aid in the rapid development of affordable THz imaging solutions for industrial and scientific applications.

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Milatz, Marius. "Application of single-board computers in experimental research on unsaturated soils." E3S Web of Conferences 195 (2020): 02022. http://dx.doi.org/10.1051/e3sconf/202019502022.

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In this contribution, the application of single-board computers for the investigation of the hydro-mechanical behaviour of unsaturated granular soils is presented. Single-board computers, such as the Raspberry Pi or Arduino, have recently experienced a hype of applications in school and university teaching, in the maker scene, amongst hobbyists, but also in research. In combination with easy to learn and open programming languages, such as Python, individual experimental set-ups for research in unsaturated soil mechanics, using actuators and sensors can be easily developed with the help of different programmable hardware, such as stepper motors, analog-to-digital converters and other controller boards. For the experimental application in imaging of unsaturated granular soils by computed tomography (CT), we present a miniaturized uniaxial compression device for the measurement of unsaturated shear strength and capillary cohesion in CT-experiments. The device has already been applied for CT-imaging of the development of water distribution and capillary bridges in between different shear steps. Furthermore, a new fully programmable hydraulic experimental set-up for the automated investigation of transient hydraulic paths of the water retention curve of granular media is presented. Both devices have been developed in the framework of the Raspberry Pi single-board computer and Python programming language with simple and relatively inexpensive hardware components. In addition to the technical development of the testing devices, experimental results of the hydro-mechanical behaviour of unsaturated sand and glass beads, derived from uniaxial compression tests and water retention tests, will be presented.

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Li, Ya Qin, Dan Chen, and Cao Yuan. "An Improved Hardware System of Excitations Pulse on X-Waves with Direct Digital Synthesizer." Applied Mechanics and Materials 329 (June 2013): 382–86. http://dx.doi.org/10.4028/www.scientific.net/amm.329.382.

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Limited diffracting waves such X-wave have great potential applications in the enlargement of the field depth in acoustic imaging systems. In practice, the generation of real time X-wave ultrasonic fields is a complex technology which involves precise and specific voltage for the excitations for each distinct array element. In order to simplify hardware system of excitations pulse in X-wave, the complex excitations were instead by simple driving, which combination of rectangular and triangular driving pulses. The improved hardware system consists a computer for communication with the circuit, universal serial bus (USB) based micro controller unit (MCU) for data transmission, field programmable gate array (FPGA) based Direct Digital Synthesizer (DDS), 12-bit digital-to-analog (D/A) converter and a two stage amplifier. DDS generate arbitrary waveforms with a single, fixed-frequency reference clock, which satisfy the need of complex excitations pulse of X-wave. From the simulations of hard system, the difference of waveforms at different radius between theoretical waves is reduced in 0.41%.

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Ximenes, Augusto, Preethi Padmanabhan, and Edoardo Charbon. "Mutually Coupled Time-to-Digital Converters (TDCs) for Direct Time-of-Flight (dTOF) Image Sensors." Sensors 18, no. 10 (October 11, 2018): 3413. http://dx.doi.org/10.3390/s18103413.

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Direct time-of-flight (dTOF) image sensors require accurate and robust timing references for precise depth calculation. On-chip timing references are well-known and understood, but for imaging systems where several thousands of pixels require seamless references, area and power consumption limit the use of more traditional synthesizers, such as phase/delay-locked loops (PLLs/DLLs). Other methods, such as relative timing measurement (start/stop), require constant foreground calibration, which is not feasible for outdoor applications, where conditions of temperature, background illumination, etc. can change drastically and frequently. In this paper, a scalable reference generation and synchronization is provided, using minimum resources of area and power, while being robust to mismatches. The suitability of this approach is demonstrated through the design of an 8 × 8 time-to-digital converter (TDC) array, distributed over 1.69 mm2, fabricated using TSMC 65 nm technology (1.2 V core voltage and 4 metal layers—3 thin + 1 thick). Each TDC is based on a ring oscillator (RO) coupled to a ripple counter, occupying a very small area of 550 μ m2, while consuming 500 μ W of power, and has 2 μ s range, 125 ps least significant bit (LSB), and 14-bit resolution. Phase and frequency locking among the ROs is achieved, while providing 18 dB phase noise improvement over an equivalent individual oscillator. The integrated root mean square (RMS) jitter is less than 9 ps, the instantaneous frequency variation is less than 0.11%, differential nonlinearity (DNL) is less than 2 LSB, and integral nonlinearity (INL) is less than 3 LSB.

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Griffiths, A. D., J. Herrnsdorf, J. J. D. McKendry, M. J. Strain, and M. D. Dawson. "Gallium nitride micro-light-emitting diode structured light sources for multi-modal optical wireless communications systems." Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences 378, no. 2169 (March 2, 2020): 20190185. http://dx.doi.org/10.1098/rsta.2019.0185.

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Gallium nitride-based light-emitting diodes (LEDs) have revolutionized the lighting industry with their efficient generation of blue and green light. While broad-area (square millimetre) devices have become the dominant LED lighting technology, fabricating LEDs into micro-scale pixels (micro-LEDs) yields further advantages for optical wireless communications (OWC), and for the development of smart-lighting applications such as tracking and imaging. The smaller active areas of micro-LEDs result in high current density operation, providing high modulation bandwidths and increased optical power density. Fabricating micro-LEDs in array formats allows device layouts to be tailored for target applications and provides additional degrees of freedom for OWC systems. Temporal and spatial control is crucial to use the full potential of these micro-scale sources, and is achieved by bonding arrays to pitch-matched complementary metal-oxide-semiconductor control electronics. These compact, integrated chips operate as digital-to-light converters, providing optical signals from digital inputs. Applying the devices as projection systems allows structured light patterns to be used for tracking and self-location, while simultaneously providing space-division multiple access communication links. The high-speed nature of micro-LED array devices, combined with spatial and temporal control, allows many modes of operation for OWC providing complex functionality with chip-scale devices. This article is part of the theme issue ‘Optical wireless communication’.

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Wepman, J. A. "Analog-to-digital converters and their applications in radio receivers." IEEE Communications Magazine 33, no. 5 (May 1995): 39–45. http://dx.doi.org/10.1109/35.393000.

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Stojce Ilcev, Dimov. "Introduction to stand alone data converters review, analysis and design orientation." International Journal of Engineering & Technology 9, no. 3 (September 30, 2020): 820. http://dx.doi.org/10.14419/ijet.v9i3.31057.

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This paper includes a basic review, analysis, and interesting insights, oriented to designers when power consumption is a critical constraint, of Stand-Alone Data Converters. These data converters are an indispensable part of the analog design technique and the only bridge to establish an adequate communication link between analog and digital devices. In fact, this article is dedicated to showing the principal types of the analog-to-digital converters (ADC) and digital-to-analog converters (DAC) families of data converters popular in modern analog design techniques. In fact, these data converters are also cost-effective devices because of the huge number of existing and newly developed solutions with their significant practical features providing more relevant applications in specific type of ADC or DAC process. The overview of data conversion, ADC and DAC data converters, communication bus to Micro Controller Units (MCU), and benefits of data conversion are described.

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Murphy, James. "Development of high performance analog-to-digital converters for defense applications." Computer Standards & Interfaces 21, no. 2 (June 1999): 98. http://dx.doi.org/10.1016/s0920-5489(99)91920-7.

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Ulyashin, Aleksander, and Aleksander Velichko. "Comparative analysis of methods for constructing analog-to-digital converters." Transaction of Scientific Papers of the Novosibirsk State Technical University, no. 4 (December 18, 2020): 38–49. http://dx.doi.org/10.17212/2307-6879-2020-4-38-49.

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This paper is devoted to the comparative analysis of modern integrated analog-to-digital converters (ADCs). At the moment, a number of foreign companies, such as Analog Devices, Texas Instruments and Microchip, produce ADCs in integrated design. Each manufacturer uses its own method of implementing the device. The main task of such devices is to convert voltage to binary code. ADCs are used wherever it is necessary to receive an analog signal and process it in digital form. Examples include applications such as communications and telecommunications, various radio systems, and measurement technology. Very important characteristics of such equipment are dynamic range, ease of implementation and speed. The means of analog-to-digital conversion are constantly being improved, which leads to an increase in the speed of the converters and the frequency band of the converted signals, an increase in the dynamic range, sensitivity and accuracy of the ADC. Significant interest in high-speed ADCs with a large dynamic range is explained by the fact that in the vast majority of telecommunications and radio engineering systems, direct signal conversion schemes without intermediate frequency conversion are increasingly used. Broadband applications have also been developed. The main requirement in these applications is the high sensitivity and wide dynamic range of the transducer for simultaneous detection of strong and weak signals. In this paper, a comparative analysis of the main types of analog-to-digital converters offered on the market is carried out in order to identify the most optimal construction method for using it in modern equipment.

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Kelly, Brandon M., Alexander T. DiLello, and David W. Graham. "Reconfigurable Analog Preprocessing for Efficient Asynchronous Analog-to-Digital Conversion." Journal of Low Power Electronics and Applications 9, no. 3 (August 12, 2019): 25. http://dx.doi.org/10.3390/jlpea9030025.

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Wearable medical devices, wireless sensor networks, and other energy-constrained sensing devices are often concerned with finding specific data within more-complex signals while maintaining low power consumption. Traditional analog-to-digital converters (ADCs) can capture the sensor information at a high resolution to enable a subsequent digital system to process for the desired data. However, traditional ADCs can be inefficient for applications that only require specific points of data. This work offers an alternative path to lower the energy expenditure in the quantization stage—asynchronous content-dependent sampling. This asynchronous sampling scheme is achieved by pairing a flexible analog front-end with an asynchronous successive-approximation ADC and a time-to-digital converter. The versatility and reprogrammability of this system allows a multitude of event-driven, asynchronous, or even purely data-driven quantization methods to be implemented for a variety of different applications. The system, fabricated in standard 0.5 μ m and 0.35 μ m processes, is demonstrated along with example applications with voice, EMG, and ECG signals.

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Kidder, G. W. "Resolution improvement by modulation of analog-to-digital converters." Bioinformatics 4, no. 3 (1988): 331–35. http://dx.doi.org/10.1093/bioinformatics/4.3.331.

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FEELY, ORLA, and LEON O. CHUA. "NONLINEAR DYNAMICS OF A CLASS OF ANALOG-TO-DIGITAL CONVERTERS." International Journal of Bifurcation and Chaos 02, no. 02 (June 1992): 325–40. http://dx.doi.org/10.1142/s021812749200032x.

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Oversampled sigma-delta modulators are finding widespread use in audio and other signal processing applications, due to their simple structure and robustness to circuit imperfections. Exact analyses of the system are complicated by the presence of a discontinuous nonlinear element—a one-bit quantizer. In this paper, we study the dynamics of the one-dimensional mapping which models the behavior of the single-loop modulator. This mapping has a discontinuity at the origin and constant slope at all other points. With slope one, the dynamics in the region of interest reduce to those of the rotation of the circle. With slope less than one, almost all system inputs give rise to globally asymptotically stable periodic orbits. We emphasize the case with slope greater than one, and explain the structure of the resultant bifurcation diagram. A symbolic dynamics based study allows us to explain the self-similarity of the dynamics and the nature of chaos in the system.

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Takahashi, Tomomi, Takashi Oshima, and Taizo Yamawaki. "Novel Digitally Assisted High-Speed High-Resolution Analog-to-Digital Converters." Journal of The Institute of Image Information and Television Engineers 64, no. 2 (2010): 241–43. http://dx.doi.org/10.3169/itej.64.241.

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Quenzer-Hohmuth, Samuel, Thoralf Rosahl, Steffen Ritzmann, and Bernhard Wicht. "Challenges and implementation aspects of switched-mode power supplies with digital control for automotive applications." Advances in Radio Science 14 (September 28, 2016): 85–90. http://dx.doi.org/10.5194/ars-14-85-2016.

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Abstract. Switched-mode power supplies (SMPS) convert an input DC-voltage into a higher or lower output voltage. In automotive, analog control is mostly used in order to keep the required output voltages constant and resistant to disturbances. The design of robust analog control for SMPS faces parameter variations of integrated and external passive components. Using digital control, parameter variations can be eliminated and the required area for the integrated circuit can be reduced at the same time. Digital control design bears challenges like the prevention of limit cycle oscillations and controller-wind-up. This paper reviews how to prevent these effects. Digital control loops introduce new sources for dead times in the control loop, for example the latency of the analog-to-digital-converter (ADC). Dead times have negative influence on the stability of the control loop, because they lead to phase delays. Consequently, low latency is one of the key requirements for analog-to-digital-converters in digitally controlled SMPS. Exploiting the example of a 500 kHz-buck converter with a crossover frequency of 70 kHz, this paper shows that the 5 µs-latency of a ΔΣ-analog-to-digital-converter leads to a reduction in phase margin of 126°. The latency is less critical for boost converters because of their inherent lower crossover frequencies. Finally, the paper shows a comparison between analog and digital control of SMPS with regard to chip area and test costs.

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Yurish, Sergey Y. "Advanced Analog-to-Digital Conversion Using Voltage-to-Frequency Converters for Remote Sensors." Key Engineering Materials 381-382 (June 2008): 623–26. http://dx.doi.org/10.4028/www.scientific.net/kem.381-382.623.

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This paper presents an advanced analog-to-digital conversion technique based on a voltage-to-frequency-to-digital conversion that is suitable for remote sensors, telemetry applications and multichannel data acquisition systems. A voltage-to-frequency conversion part can be based, for example, on high performance, charge-balance voltage-to-frequency converter (VFC), where monostable is replaced by a bistable, driven by an external clock, or other existing high performance VFCs. The frequency-to-digital converter “bottleneck” problem in such promised ADC scheme was solved due to proposed advanced method of the dependent count for frequency-to-digital conversion. This ADC technique lets receive many advantages such as high accuracy, relatively low power consumption, low cost solution, wide dynamic range, great stability and faster conversion time in comparison with existing VFC-based techniques. The conversion rate (6.25 µs to 6.25 ms) in such ADC scheme is programmable, non-redundant, shorter than for pulse counting technique and comparable with successive-approximation and Σ- ADC.

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Freitas, Luis Miguel Carvalho, and Fernando Morgado-Dias. "Design Improvements on Fast, High-Order, Incremental Sigma-Delta ADCs for Low-Noise Stacked CMOS Image Sensors." Electronics 10, no. 16 (August 11, 2021): 1936. http://dx.doi.org/10.3390/electronics10161936.

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Modern CMOS imaging devices are present everywhere, in the form of line, area and depth scanners. These image devices can be used in the automotive field, in industrial applications, in the consumer’s market, and in various medical and scientific areas. Particularly in industrial and scientific applications, the low-light noise performance or the high dynamic-range features are often the cases of interest, combined with low power dissipation and high frame rates. In this sense, the noise floor performance and the power consumption are the focus of this work, given that both are interlinked and play a direct role in the remaining sensor features. It is known that thermal and flicker noise sources are the main contributors to the degradation of the sensor performance, concerning the sensor output image noise. This paper presents an indirect way to reduce both the thermal and the flicker noise contributions by using thin-oxide low voltage supply column readout circuits and fast 3rd order incremental sigma-delta converters with noise shaping capabilities (to provide low noise output digital samples—74 μVrms; 0.7 e−rms; at 105 μV/e−), and thus performing correlated double sampling in a short time (19 μs), while dissipating significant low power (346 μW). Throughout the extensive parametric transistor-level simulations, the readout path produced 1.2% non-linearity, with a competitive saturation capacity (6.5 ke−) pixel. In addition, this paper addresses the readout parallelism as the main point of interest, decoupling resolution from the image noise and the frame rate, at virtually any array resolution. The design and simulations were performed with Virtuoso 6.17 tools (Cadence Design Systems, San Jose, CA, USA) using Spectre models from TS18IS Image Sensor 0.18 µm Process Development Kit (Tower Jazz Semiconductor, Migdal Haemek, Israel).

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Sharma, Sonia, Chieh-An Cheng, Svette Reina Merden Santiago, Denice N. Feria, Chi-Tsu Yuan, Sheng-Hsiung Chang, Tai-Yuan Lin, and Ji-Lin Shen. "Aggregation-induced negative differential resistance in graphene oxide quantum dots." Physical Chemistry Chemical Physics 23, no. 31 (2021): 16909–14. http://dx.doi.org/10.1039/d1cp01529j.

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Lewis, S. H. "Optimizing the stage resolution in pipelined, multistage, analog-to-digital converters for video-rate applications." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 39, no. 8 (1992): 516–23. http://dx.doi.org/10.1109/82.168943.

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Watson, Jeff, and Maithil Pachchigar. "A Low Power, Precision SAR Analog to Digital Converter for High Temperature Applications." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, HITEC (January 1, 2014): 000053–57. http://dx.doi.org/10.4071/hitec-ta26.

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A growing number of industries are calling for low power electronics that operate reliably at temperatures of 175°C and higher. Many of these applications require a precision data acquisition signal chain in order to digitize analog data so that it can be collected and processed. Designing circuits that meet these needs can be very challenging, requiring a data converter that can deliver high performance and reliability in these harsh environments. There are currently a very limited number of integrated circuits commercially available that are specified for operation at these temperatures, and no low power precision data converters with sample rates greater than 100kSPS. This paper presents a new 210°C rated precision analog to digital converter capable of sample rates up to 600 kSPS with 16 bit resolution while maintaining low power consumption and packaged in a small form factor. We will explore the converter architecture of this ADC, present initial test results, and show how high reliability is achieved through qualification and advanced packaging techniques.

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Devgan, Paul. "A Review of Optoelectronic Oscillators for High Speed Signal Processing Applications." ISRN Electronics 2013 (April 29, 2013): 1–16. http://dx.doi.org/10.1155/2013/401969.

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The Optoelectronic Oscillator (OEO) was first demonstrated in 1996 as a low phase noise RF source. Low phase noise RF sources have uses for multiple applications, ranging from analog to digital converters to radar to metrology. In the past sixteen years, the OEO has been shown to be useful for other signal processing applications. This paper will provide a background of the OEO’s principles of operation, as well as multiple examples of signal processing applications where the OEO can be used. The OEO can be applied to both analog and digital problems, providing new techniques to solve these challenges.

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LEUNG, F. H. F., L. K. WONG, P. K. S. TAM, and H. K. LAM. "REALIZATION OF ANALOG FUZZY LOGIC CONTROL FOR PWM BOOST CONVERTERS." Journal of Circuits, Systems and Computers 08, no. 03 (June 1998): 411–19. http://dx.doi.org/10.1142/s0218126698000213.

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Fuzzy logic controllers (FLCs) have been widely used in many applications. However, they are usually implemented digitally by expensive digital signal processors (DSPs), and the performance is restricted by the sampling period. These disadvantages have limited the applications of FLCs to industrial systems such as switch mode power converters. In this paper, an analog FLC implemented by low-cost devices is proposed. Through analog circuitry, features such as membership function shaping, rule inference and defuzzification are realized. The controller is successfully applied to regulate a PWM boost converter with satisfactory performance.

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Momeni, Mahdi, and Mohammad Yavari. "Shifting the sampled input signal in successive approximation register analog‐to‐digital converters to reduce the digital‐to‐analog converter switching energy and area." International Journal of Circuit Theory and Applications 48, no. 11 (July 26, 2020): 1873–86. http://dx.doi.org/10.1002/cta.2852.

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Stankus, Martin, Michal Prauzek, and Jakub Jirka. "Universal Wireless System for Advanced Biomedical Applications." Applied Mechanics and Materials 330 (June 2013): 1049–53. http://dx.doi.org/10.4028/www.scientific.net/amm.330.1049.

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This paper deals with implementation of wireless communication into a biomedical system including presentation of acquired experience. The aim of the paper is usage of universal wireless system for advanced biomedical applications. There are many biomedical applications with prospect of implementation of wireless communication. IEEE 802.11 wireless module WISMC01 by Laird is one of commercially available wireless solutions. Module provides various communication interfaces and inputs - RS232, analog to digital converters and digital GPIO pins among others. Module supports proprietal scripting language for user defined scripts. Various aspects of hardware and software development and wireless security are discussed in this paper.

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Alvero-Gonzalez, Leidy Mabel, Victor Medina, Vahur Kampus, Susana Paton, Luis Hernandez, and Eric Gutierrez. "Ring-Oscillator with Multiple Transconductors for Linear Analog-to-Digital Conversion." Electronics 10, no. 12 (June 11, 2021): 1408. http://dx.doi.org/10.3390/electronics10121408.

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This paper proposes a new circuit-based approach to mitigate nonlinearity in open-loop ring-oscillator-based analog-to-digital converters (ADCs). The approach consists of driving a current-controlled oscillator (CCO) with several transconductors connected in parallel with different bias conditions. The current injected into the oscillator can then be properly sized to linearize the oscillator, performing the inverse current-to-frequency function. To evaluate the approach, a circuit example has been designed in a 65-nm CMOS process, leading to a more than 3-ENOB enhancement in simulation for a high-swing differential input voltage signal of 800-mVpp, with considerable less complex design and lower power and expected area in comparison to state-of-the-art circuit based solutions. The architecture has also been checked against PVT and mismatch variations, proving to be highly robust, requiring only very simple calibration techniques. The solution is especially suitable for high-bandwidth (tens of MHz) medium-resolution applications (10–12 ENOBs), such as 5G or Internet-of-Things (IoT) devices.

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Moosazadeh, Tohid, and Mohammad Yavari. "A pseudo-differential current-reuse structure for opamp-sharing pipelined analog-to-digital converters." International Journal of Circuit Theory and Applications 43, no. 7 (February 27, 2014): 917–28. http://dx.doi.org/10.1002/cta.1983.

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Nazarathy, Moshe, and Ioannis Tomkos. "Accurate Power-Efficient Format-Scalable Multi-Parallel Optical Digital-to-Analogue Conversion." Photonics 8, no. 2 (February 4, 2021): 38. http://dx.doi.org/10.3390/photonics8020038.

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In optical transmitters generating multi-level constellations, optical modulators are preceded by Electronic Digital-to-Analog-Converters (eDAC). It is advantageous to use eDAC-free Optical Analog to Digital Converters (oDAC) to directly convert digital bitstreams into multilevel PAM/QAM optical signals. State-of-the-art oDACs are based on Segmented Mach-Zehnder-Modulators (SEMZM) using multiple modulation segments strung along the MZM waveguides to serially accumulate binary-modulated optical phases. Here we aim to assess performance limits of the Serial oDACs (SEMZM) and introduce an alternative improved Multi-Parallel oDAC (MPoDAC) architecture, in particular based on arraying multiple binary-driven MZMs in parallel: Multi-parallel MZM (MPMZM) oDAC. We develop generic methodologies of oDAC specification and optimization encompassing both SEMZM and MPMZM options in Direct-Detection (DD) and Coherent-Detection (COH) implementations. We quantify and compare intrinsic performance limits of the various serial/parallel DD/COH subclasses for general constellation orders, comparing with the scant prior-work on the multi-parallel option. A key finding: COH-MPMZM is the only class synthesizing ‘perfect’ (equi-spaced max-full-scale) constellations while maximizing energy-efficiency-SEMZM/MPMZM for DD are less accurate when maximal energy-efficiency is required. In particular, we introduce multiple variants of PAM4|8 DD and QAM16|64 COH MPMZMs, working out their accuracy vs. energy-efficiency-and-complexity tradeoffs, establishing their format-reconfigurability (format-flexible switching of constellation order and/or DD/COH).

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Ta, Van-Thanh, Van-Phuc Hoang, Van-Phu Pham, and Cong-Kha Pham. "An Improved All-Digital Background Calibration Technique for Channel Mismatches in High Speed Time-Interleaved Analog-to-Digital Converters." Electronics 9, no. 1 (January 1, 2020): 73. http://dx.doi.org/10.3390/electronics9010073.

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The time-interleaved analog-to-digital converters (TIADCs), performance is seriously affected by channel mismatches, especially for the applications in the next-generation communication systems. This work presents an improved all-digital background calibration technique for TIADCs by combining the Hadamard transform for calibrating gain and timing mismatches and averaging for offset mismatch cancellation. The numerical simulation results show that the proposed calibration technique completely suppresses the spurious images due to the channel mismatches at the output spectrum, which increases the spurious-free dynamic range (SFDR) and signal-to-noise and distortion ratio (SNDR) by 74 dB and 43.7 dB, respectively. Furthermore, the hardware co-simulation on the field programmable gate array (FPGA) platform is performed to confirm the effectiveness of the proposed calibration technique. The simulation and experimental results clarify the improvement of the proposed calibration technique in the TIADC’s performance.

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Kumar Y, L. V. Santosh. "Design and Implementation of SAR-ADC for Medical Electronic Applications." International Journal of Advanced Research in Computer Science and Software Engineering 8, no. 5 (June 2, 2018): 55. http://dx.doi.org/10.23956/ijarcsse.v8i5.665.

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in today’s advance electronic and communication systems the role of high accuracy analog to digital converters are of great importance. Nowadays, a larger percentage of mixed-signal applications requires for health care systems. Also the speed of the chosen ADC design matters a lot as we are connected with the real world signals. SAR based ADC will provides us a better solution for various analog to digital systems. It is an essential device whenever data from the analog world, through sensors or transducers, should be digitally processed or when transmitting data between chips through either long-range wireless links or high-speed transmission between chips on the same printed circuit board. The paper projects up down and ring counter as a logic for successive approximation register (SAR logic for a ADC that is one of the best suited for low power. Here the resolution is of 4-bit and a power consumption of few milli watts. SAR ADC is implemented in 45 nm nano-meter scaling technology CMOS technology with a power supply of 0.5v by maintaining 4:1 w/l ratio.

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Lee, Jieun, Changmin Choi, Sungwook Park, In-Young Chung, Chang-Joon Kim, Byung-Gook Park, Dong Myong Kim, and Dae Hwan Kim. "Ultra-energy-efficient analog-to-digital converters based on single-electron transistor/CMOS hybrid technology for biomedical applications." Semiconductor Science and Technology 24, no. 11 (October 9, 2009): 115007. http://dx.doi.org/10.1088/0268-1242/24/11/115007.

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Yadav, Nandakishor, Youngbae Kim, Mahmoud Alashi, and Kyuwon Ken Choi. "Sensitive, Linear, Robust Current-To-Time Converter Circuit for Vehicle Automation Application." Electronics 9, no. 3 (March 16, 2020): 490. http://dx.doi.org/10.3390/electronics9030490.

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Voltage-to-time and current-to-time converters have been used in many recent works as a voltage-to-digital converter for artificial intelligence applications. In general, most of the previous designs use the current-starved technique or a capacitor-based delay unit, which is non-linear, expensive, and requires a large area. In this paper, we propose a highly linear current-to-digital converter. An optimization method is also proposed to generate the optimal converter design containing the smallest number of PMOS and sensitive circuits such as a differential amplifier. This enabled our design to be more stable and robust toward negative bias temperature instability (NBTI) and process variation. The proposed converter circuit implements the point-wise conversion from current-to-time, and it can be used directly for a variety of applications, such as analog-to-digital converters (ADC), used in built-in computational random access (C-RAM) memory. The conversion gain of the proposed circuit is 3.86 ms/A, which is 52 times greater than the conversion gains of state-of-the-art designs. Further, various time-to-digital converter (TDC) circuits are reviewed for the proposed current-to-time converter, and we recommend one circuit for a complete ADC design.

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Cardarilli, Gian Carlo, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Matta, Marco Re, Sergio Spanò, and Lorenzo Simone. "Efﬁcient FPGA implementation of high speed digital delay for wideband beamforming using parallel architectures." Bulletin of Electrical Engineering and Informatics 8, no. 2 (June 1, 2019): 422–27. http://dx.doi.org/10.11591/eei.v8i2.1483.

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In this paper, the authors present an FPGA implementation of a digital delay for beamforming applications. The digital delay is based on a Parallel Farrow Filter. Such architecture allows to reach a very high processing rate with wideband signals and it is suitable to be used with Time-Interleaved Analog to Digital Converters (TI-ADC). The proposed delay has been simulated in MATLAB, implemented on FPGA and characterized in terms of amplitude and phase response, maximum clock frequency and area.

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Yin, Y., H. Klar, and P. Wennekers. "A 8X Oversampling Ratio, 14bit, 5-MSamples/s Cascade 3-1 Sigma-delta Modulator." Advances in Radio Science 3 (May 12, 2005): 277–80. http://dx.doi.org/10.5194/ars-3-277-2005.

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Abstract. A 14-b, 5-MHz output-rate cascaded 3-1 sigma-delta analog-to-digital converters (ADC) has been developed for broadband communication applications, and a novel 4th-order noise-shaping is obtained by using the proposed architecture. At a low oversampling ratio (OSR) of 8, the ADC achieves 91.5dB signal-to-quantization ratio (SQNR), in contrast to 71.8dB of traditional 2-1-1 cascaded sigma-delta ADC in 2.5-MHz bandwidth and over 80dB signal-to-noise and distortion (SINAD) even under assumptions of awful circuit non-idealities and opamp non-linearity. The proposed architecture can potentially operates at much more high frequencies with scaled IC technology, to expand the analog-to-digital conversion rate for high-resolution applications.

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Kumar, Manoj, and Raj Kumar. "A Ultra Low Power 12 Bit Successive Approximation Register for Bio-Medical Applications." International Journal of Engineering & Technology 7, no. 3.16 (July 26, 2018): 98. http://dx.doi.org/10.14419/ijet.v7i3.4.16192.

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Successive Approximation Register (SAR) analog to digital Converters (ADC) is favorable choice for the high resolution. As resolution of ADC increases, the no. of redundant cycles increases which increases power. So the Paper presents clock gated ADC with no redundant cycles/transition cycles for low power requirement and comparison between without Clock Gating and Clock Gated SAR. Using Simulation, Power consumption for Clock gated SAR 736.1nW at 1.8V power supply where as without Clock Gating SAR consumption is 54µW at 1.8 power supply.

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Mfana, Hasan, and Ali. "Odd/Even Order Sampling Soft-Core Architecture towards Mixed Signals Fourth Industrial Revolution (4IR) Applications." Energies 12, no. 23 (November 29, 2019): 4567. http://dx.doi.org/10.3390/en12234567.

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Digitization is at the center of fourth industrial revolution (4IR) with previously analog systems being digitized through an analog-to-digital converter. In addition, 4IR applications such as fifth generation (5G) Cellular Networks Technology and Cognitive Electronic Warfare (EW) at some point interface digitally through an analog-to-digital converter. Efficient use of digital resources such as memory, largely depends on the signal sampling design of analog-to-digital converters. Existing even order sampling has been found to perform better than traditional sampling techniques. Research on the efficiency of a digital interface with a 4IR platform is still in its infancy. This paper presents a performance study of three sampling techniques: the proposed new and novel odd/even order sampling architecture, existing Mod-∆, and traditional 1st order delta-sigma, to address this. Step-size signal-to-noise (SNR), dynamic range, and sampling frequency are also studied. It was found that the proposed new and novel odd/even order sampling achieved an SNR performance of 6 dB in comparison to 18 dB for Mod-∆. Sampling frequency findings indicated that the proposed new and novel odd/even order sampling achieved a sampling frequency of 2 kHz in comparison to 8 kHz from a traditional 1st order sigma-delta. Dynamic range findings indicated that the proposed odd/even order sampling has achieved a dynamic range of 1.088 volts/ms in comparison to 1.185 volts/ms from a traditional 1st order sigma-delta. Findings have indicated that the proposed odd/even order sampling has superior SNR and sampling frequency performances, while the dynamic range is reduced by 8%.

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Murthy Dumpala, Ramana, and . "Technique to Improve SNR for Sigma Delta Adcs for Audio Signals." International Journal of Engineering & Technology 7, no. 3.6 (July 4, 2018): 91. http://dx.doi.org/10.14419/ijet.v7i3.6.14946.

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A RISR architecture for Sigma-delta analog to digital converters with modified noise transfer function to obtain a better performance in terms of SNR is proposed. Cascading of two modified second order modulators are done to achieve 4th order modulator. Behavioral simulations are done to study the performance of feed-forward and the modified cascaded architecture. They are designed to operate at 1.28MHz clock frequency for audio applications (OSR of 32). It is noted that SNR of 115dB is achieved by cascading of two Modified second order RISR architectures which is 8dB more than the normal RISR architecture.

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Heydenreich, Markus, Remco van der Hofstad, and Georgi Radulov. "FUNCTIONALS OF BROWNIAN BRIDGES ARISING IN THE CURRENT MISMATCH IN D/A CONVERTERS." Probability in the Engineering and Informational Sciences 23, no. 1 (November 13, 2008): 149–72. http://dx.doi.org/10.1017/s0269964809000114.

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Digital-to-analog converters (DAC) transform signals from the abstract digital domain to the real analog world. In many applications, DACs play a crucial role. Due to variability in the production, various errors arise that influence the performance of the DAC. We focus on the current errors, which describe the fluctuations in the currents of the various unit current elements in the DAC. A key performance measure of the DAC is the Integrated Nonlinearity (INL), which we study in this article. There are several DAC architectures. The most widely used architectures are the thermometer and the binary and the segmented architectures. We study the two extreme architectures, namely the thermometer and the binary architectures. We assume that the current errors are independent and identically normally distributed and reformulate the INL as a functional of a Brownian bridge. We then proceed by investigating these functionals. For the thermometer case, the functional is the maximal absolute value of the Brownian bridge, which has been investigated in the literature. For the binary case, we investigate properties of the functional, such as its mean, variance, and density.

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Price, R. L. "Practical considerations and applications of digital imaging in a core microscopy facility." Proceedings, annual meeting, Electron Microscopy Society of America 54 (August 11, 1996): 606–7. http://dx.doi.org/10.1017/s0424820100165495.

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The Integrated Microscopic Analysis Facility (IMAF) at the University of South Carolina School of Medicine is a core research and imaging facility that provides service for the faculty, staff and students of the medical school and associated hospitals. The IMAF currently houses one scanning and two transmission electron microscopes, a confocal scanning laser microscope, and several image processing computers and programs. While not yet totally converted to digital technology, we have been successful in introducing digital imaging to several areas of our imaging capabilities during the last few years. The purpose of this abstract and subsequent presentation is to present some practical considerations and problems we have encountered in the conversion of the IMAF to digital imaging microscopy, and to present brief results from some projects which were not possible before the introduction of digital imaging to the facility.There is little doubt that in the past few years one of the major advances for those of us who work in the areas of light and electron microscopy has been the development of digital imaging technology.

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Allén, Markus, Jaakko Marttila, and Mikko Valkama. "Modeling and mitigation of nonlinear distortion in wideband A/D converters for cognitive radio receivers." International Journal of Microwave and Wireless Technologies 2, no. 2 (April 2010): 183–92. http://dx.doi.org/10.1017/s1759078710000292.

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This article discusses the reduction of nonlinearities in analog-to-digital (A/D) converters using digital signal processing (DSP). Also modeling of certain essential nonlinearities is considered in detail. The main focus is on wideband radio receivers, such as the emerging cognitive radio applications, where a collection of signals at different frequency channels is converted to digital domain as a whole. Therefore, the overall dynamic range can easily be in the order of tens of dBs and thus even mild nonlinear distortion can cause strong carriers to block weaker signal bands. In this article, a mathematical model for clipping distortion due to improper input signal conditioning is derived through Fourier analysis. Additionally, stemming from the analysis an adaptive DSP-based post-processing method for reducing the effects of clipping and integral nonlinearity (INL) in A/D converters is presented with illustrative examples using both computer simulations and laboratory radio signal measurements.

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Wang, Hui, Zhengshi Liu, Bin Zhu, and Quanjun Song. "Multiple Harmonics Fitting Algorithms Applied to Periodic Signals Based on Hilbert-Huang Transform." Journal of Sensors 2013 (2013): 1–9. http://dx.doi.org/10.1155/2013/580152.

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A new generation of multipurpose measurement equipment is transforming the role of computers in instrumentation. The new features involve mixed devices, such as kinds of sensors, analog-to-digital and digital-to-analog converters, and digital signal processing techniques, that are able to substitute typical discrete instruments like multimeters and analyzers. Signal-processing applications frequently use least-squares (LS) sine-fitting algorithms. Periodic signals may be interpreted as a sum of sine waves with multiple frequencies: the Fourier series. This paper describes a new sine fitting algorithm that is able to fit a multiharmonic acquired periodic signal. By means of a “sinusoidal wave” whose amplitude and phase are both transient, the “triangular wave” can be reconstructed on the basis of Hilbert-Huang transform (HHT). This method can be used to test effective number of bits (ENOBs) of analog-to-digital converter (ADC), avoiding the trouble of selecting initial value of the parameters and working out the nonlinear equations. The simulation results show that the algorithm is precise and efficient. In the case of enough sampling points, even under the circumstances of low-resolution signal with the harmonic distortion existing, the root mean square (RMS) error between the sampling data of original “triangular wave” and the corresponding points of fitting “sinusoidal wave” is marvelously small. That maybe means, under the circumstances of any periodic signal, that ENOBs of high-resolution ADC can be tested accurately.

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Lin, Chih-Hsuan, and Kuei-Ann Wen. "An Innovative Successive Approximation Register Analog-to-Digital Converter for a Nine-Axis Sensing System." Journal of Low Power Electronics and Applications 11, no. 1 (January 9, 2021): 3. http://dx.doi.org/10.3390/jlpea11010003.

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With nine-axis sensing systems in 5G smartphones, mobile power consumption has become increasingly important, and ultra-low-power (ULP) sensor circuits can decrease power consumption to tens of microwatts. This paper presents an innovative successive approximation register analog-to-digital converter, which comprises fine (three most significant bits (MSBs) plus course conversion (11 least significant bits (LSBs)) capacitive digital-to-analog converters (CDACs), ULP, four-mode reconfigurable resolution (9, 10, 11, or 12 bits), an internally generated clock, meta-detection, the switching base midpoint voltage (Vm) (SW-B-M), bit control logic, multi-phase control logic, fine (three MSBs) plus course conversion (11 LSBs) switch control logic, phase control logic, and an input signal plus negative voltage (VI + NEG) voltage generator. Then, the mechanism of the discrete Fourier transform (DFT)-based calibration is applied. The scalable voltage technique was used, and the analog/digital voltage was Vanalog (1.5 V) and Vdigital (0.9 V) to meet the specifications of the nine-axis ULP sensing system. The CDACs can reconfigure four-mode resolutions, 9–12 bits, for use in nine-axis sensor applications. The corresponding dynamic signal-to-noise and distortion ratio performance was 50.78, 58.53, 62.42, and 66.51 dB. In the 12-bit mode, the power consumption of the ADC was approximately 2.7 μW, and the corresponding figure of merit (FoM) was approximately 30.5 fJ for each conversion step.

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Lin, Chih-Hsuan, and Kuei-Ann Wen. "An Innovative Successive Approximation Register Analog-to-Digital Converter for a Nine-Axis Sensing System." Journal of Low Power Electronics and Applications 11, no. 1 (January 9, 2021): 3. http://dx.doi.org/10.3390/jlpea11010003.

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With nine-axis sensing systems in 5G smartphones, mobile power consumption has become increasingly important, and ultra-low-power (ULP) sensor circuits can decrease power consumption to tens of microwatts. This paper presents an innovative successive approximation register analog-to-digital converter, which comprises fine (three most significant bits (MSBs) plus course conversion (11 least significant bits (LSBs)) capacitive digital-to-analog converters (CDACs), ULP, four-mode reconfigurable resolution (9, 10, 11, or 12 bits), an internally generated clock, meta-detection, the switching base midpoint voltage (Vm) (SW-B-M), bit control logic, multi-phase control logic, fine (three MSBs) plus course conversion (11 LSBs) switch control logic, phase control logic, and an input signal plus negative voltage (VI + NEG) voltage generator. Then, the mechanism of the discrete Fourier transform (DFT)-based calibration is applied. The scalable voltage technique was used, and the analog/digital voltage was Vanalog (1.5 V) and Vdigital (0.9 V) to meet the specifications of the nine-axis ULP sensing system. The CDACs can reconfigure four-mode resolutions, 9–12 bits, for use in nine-axis sensor applications. The corresponding dynamic signal-to-noise and distortion ratio performance was 50.78, 58.53, 62.42, and 66.51 dB. In the 12-bit mode, the power consumption of the ADC was approximately 2.7 μW, and the corresponding figure of merit (FoM) was approximately 30.5 fJ for each conversion step.

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Cheng, Zeng, M. Jamal Deen, and Hao Peng. "A Low-Power Gateable Vernier Ring Oscillator Time-to-Digital Converter for Biomedical Imaging Applications." IEEE Transactions on Biomedical Circuits and Systems 10, no. 2 (April 2016): 445–54. http://dx.doi.org/10.1109/tbcas.2015.2434957.

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Zuo, Xiao Qiong, and Ya Xian Liu. "Precise Time Measurement Using CTMU." Applied Mechanics and Materials 214 (November 2012): 232–36. http://dx.doi.org/10.4028/www.scientific.net/amm.214.232.

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Numerous applications require very precise time measurement. Usually, the measurement accuracy is increased by improve the MCU MIPS. It will take the high cost and current consumption, and the accuracy is limited in the MCU MIPS. Using CTMU channels work in conjunction with Analog to Digital converters, the high precise time measurement with low cost MCU can be achieved, and make the time measurement resolution to 1 nanosecond. CTMU module is available in many Microchip microcontrollers.

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Journal articles on the topic 'Analog-to-digital converters for imaging applications'

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