Academic literature on the topic 'Asymmetrical Hybrid Multilevel Inverter'
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Journal articles on the topic "Asymmetrical Hybrid Multilevel Inverter"
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Kumar, Satish, and M. Sasi Kumar. "Asymmetric hybrid multilevel inverter with reduced harmonic using hybrid modulation technique." International Journal of Power Electronics and Drive Systems (IJPEDS) 11, no. 2 (June 1, 2020): 605. http://dx.doi.org/10.11591/ijpeds.v11.i2.pp605-610.
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<span>This paper studies the Asymmetric cascaded three phase multilevel inverter developed with hybrid modulation technique applied for an industrial application. The aim of this paper to reduce the Total harmonics distortion in the cascaded multi level inverter by introducing the new concept to develop the three phase CMLI. This inverter has two segments, one segment has H-bridge inverter and another segment has sequential arrangement of power semi conductor switches with asymmetrical voltage source in the ratio of 1:2. Similarly develop the segments for other phases. This new topology is called as Hybrid MLI. This hybrid MLI is used to reduce the no of semiconductor device requirement and the Total harmonics distortion. The inverter is controlled by Phase disposition (PD) and alternative phase opposition disposition PWM technique (APOD). This control technique is used to minimize the current harmonic and increase the system performance. The circuit is simulated using Matlab circuit and its performance is compared using PD and APOD PWM techniques and verified with simulation results.</span><p> </p>
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Arun, Vijayakumar, N. M. G. Kumar, and Natarajan Prabaharan. "A hybrid reference pulse width modulation technique for binary source multilevel inverter." International Journal of Power Electronics and Drive Systems (IJPEDS) 13, no. 2 (June 1, 2022): 980. http://dx.doi.org/10.11591/ijpeds.v13.i2.pp980-987.
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The article presents a seven-level reduced switch asymmetrical multilevel inverter with two different methods of pulse width modulation (PWM) techniques. Phase disposition (PD) PWM and hybrid variable-frequency phase disposition PWM (HVFPD-PWM) are the two different PWM methods for making the quality of output voltage waveform. In the first method, the unipolar sine reference with triangular carriers is used. In the second method, the hybrid unipolar reference (sinusoidal with trapezoidal) is proposed with variable frequency carriers to generate the switching pulses for asymmetric multilevel inverter (MLI). The main objective of this proposed method is to reduce the total harmonic distortion in the output voltage waveforms. A comprehensive comparison of the proposed HVFPD-PWM and the conventional PD-PWM with asymmetrical seven-level inverter is presented to show the enriched performances of the proposed method. The performance and viability of the suggested PWM are evaluated through simulation and experimental results using an asymmetrical seven-level inverter. The total harmonic distortion for the proposed PWM method (16.95%) is significantly reduced as compared with the conventional PWM method (18.01%) at the modulation index of one.
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Foti, Salvatore, Antonio Testa, Giacomo Scelba, Salvatore De Caro, and Giuseppe Scarcella. "Self-Sensing Control of Open-End Winding PMSMs Fed by an Asymmetrical Hybrid Multilevel Inverter." Energies 15, no. 9 (April 26, 2022): 3166. http://dx.doi.org/10.3390/en15093166.
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The paper presents a self-sensing control technique for a special type of multilevel motor drive featuring an Open-end Winding Permanent-Magnet Synchronous Motor fed on one side by a main multilevel inverter (MLI) and on the other side by an auxiliary two-level inverter (TLI). In order to minimize the power losses, the MLI manages the machine active power operating at a low-switching frequency. The TLI instead acts as an active power filter and operates at a higher switching frequency and a lower DC-Bus voltage than the MLI. The current control task is shared between the two inverters, as a predictive action is exerted by the MLI, while a feedback action is accomplished by the TLI. Common sensorless rotor position estimation techniques cannot be straightforwardly applied on such a system, due to the particular drive structure. Therefore, a specific technique has been carried out, able to ensure satisfactory efficiency and control performance in all the operating speed ranges by optimally exploiting the different features of the two inverters. Simulation and experimental results confirm the effectiveness of the proposed approach.
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Foti, Salvatore, Antonio Testa, Giacomo Scelba, Salvatore De Caro, and Giuseppe Scarcella. "Self-Sensing Control of Open-End Winding PMSMs Fed by an Asymmetrical Hybrid Multilevel Inverter." Energies 15, no. 9 (April 26, 2022): 3166. http://dx.doi.org/10.3390/en15093166.
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The paper presents a self-sensing control technique for a special type of multilevel motor drive featuring an Open-end Winding Permanent-Magnet Synchronous Motor fed on one side by a main multilevel inverter (MLI) and on the other side by an auxiliary two-level inverter (TLI). In order to minimize the power losses, the MLI manages the machine active power operating at a low-switching frequency. The TLI instead acts as an active power filter and operates at a higher switching frequency and a lower DC-Bus voltage than the MLI. The current control task is shared between the two inverters, as a predictive action is exerted by the MLI, while a feedback action is accomplished by the TLI. Common sensorless rotor position estimation techniques cannot be straightforwardly applied on such a system, due to the particular drive structure. Therefore, a specific technique has been carried out, able to ensure satisfactory efficiency and control performance in all the operating speed ranges by optimally exploiting the different features of the two inverters. Simulation and experimental results confirm the effectiveness of the proposed approach.
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Han, Jingang, Pinxuan Zhao, Gang Yao, Hao Chen, Yide Wang, Mohamed Benbouzid, and Tianhao Tang. "Model predictive current control of asymmetrical hybrid cascaded multilevel inverter." Journal of Power Electronics 22, no. 4 (February 10, 2022): 580–92. http://dx.doi.org/10.1007/s43236-022-00389-y.
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Srinivasan, Ganesh Kumar, Marco Rivera, Vijayaraja Loganathan, Dhanasekar Ravikumar, and Balaji Mohan. "Trends and Challenges in Multi-Level Inverter with Reduced Switches." Electronics 10, no. 4 (February 3, 2021): 368. http://dx.doi.org/10.3390/electronics10040368.
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Multilevel inverter had been paid a lot of attention from the academia and research community in recent times due to its role in high and medium power applications. In this paper, a detailed survey is made on the recently designed multilevel inverter to find the suitability of the inverters for particular applications. Research is performed on various types of multilevel inverters such as: Symmetric, asymmetric, hybrid and modularized multilevel inverter in order to identify the issues in generating more levels at the output. A summary of various issues in multilevel inverter with reduced switch count is provided, so that a novel topology of multilevel inverter can be designed in future. Further, an 81-level switched ladder multilevel inverter using unidirectional and bidirectional switches is designed. Simulation work is carried out using Matlab/Simulink in order to validate the performance of the inverter with change in resistive load and impedance load. The output of the 81-level inverter is fed to a 110 V, 186.5 W single phase induction motor in order to study the characteristics, further speed control of motor is performed by varying the input voltage of the motor and the results are presented.
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Pavan M and Dr. Madhusudhana J. "Design and simulation of an asymmetrical 23-level inverter with modulation Techniques." International Journal for Modern Trends in Science and Technology 9, no. 01 (January 25, 2023): 32–36. http://dx.doi.org/10.46501/ijmtst0901006.
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For medium voltage, high power regulation the Multilevel Inverters (MLI) are attracting industry and academic researchers. MLI generates the desired output in the form of stepped waveforms with reduced harmonics. The MLI is expected to be realised using a variety of traditional topologies. Traditional MLIs have the disadvantage of requiring additional components, which increases the complexity of gate pulse production. As a result, MLI's overall costs will rise. This research proposes a hybrid topology to alleviate these drawbacks. With the increase in the number of steps in output voltage, the number of dc sources, power switching devices, converter cost, and space required is significantly reduced compared to typical MLIs. The design and simulation of a hybrid converter using several types of PWM approaches are covered in this work. This hybrid converter combines a T-Type structure and a half bridge inverter that is back-to-back connected. The proposed construction is designed and simulated by MATLAB Simulink software. The proposed 23 level inverter circuit is designed and simulated by Equal phase angle modulation technique and half height modulation technique, THD is compared.
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Kumar, Devineni Gireesh, Aman Ganesh, Nagineni Venkata Sireesha, Sainadh Singh Kshatri, Sachin Mishra, Naveen Kumar Sharma, Mohit Bajaj, Hossam Kotb, Ahmad H. Milyani, and Abdullah Ahmed Azhari. "Performance Analysis of an Optimized Asymmetric Multilevel Inverter on Grid Connected SPV System." Energies 15, no. 20 (October 17, 2022): 7665. http://dx.doi.org/10.3390/en15207665.
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The purpose of this research is to develop an efficient single-phase grid-connected PV system using a better performing asymmetrical multilevel inverter (AMI). Circuit component reduction, harmonic reduction, and grid integration are critical criteria for better inverter efficiency. The proposed inverter’s optimized topology requires seven unidirectional switches, three symmetric dc sources, and three diodes to produce an asymmetric fifteen level output; whereas, the same configuration will generate 7, 11, and 15-level output with an appropriate choice of dc source magnitudes. It is possible to reduce inverter losses and boost efficiency by decreasing the number of switches used. The integration of an asymmetric 15-level inverter with a grid-connected solar photovoltaic system is discussed in this article. A grid-connected solar photovoltaic (GCSPV) system is modelled and simulated using an asymmetric 15-level inverter. The dc sources of the 15-level inverter are replaced with PV sources. The results were analyzed with different operating temperatures and solar irradiance conditions. The GCSPV system is controlled by a closed-loop control system using Particle Swarm Optimization (PSO), Harris Hawk Optimization (HHO), and Hybrid Particle Swarm Optimization-Genetic Algorithm (PSOGA) based Proportional plus Integral (PI) controllers. Grid voltage, grid current, grid power, and total harmonic distortion (THD) of grid currents were analyzed. The performance of the 15-level asymmetric inverter was evaluated by comparing the THD of the grid current and the efficiency of the grid-connected photovoltaic system.
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Ramya, M., P. Usha Rani, G. Ganesan @ Subramanian, and K. Ramash Kumar. "Neural network controller based sequential switch cascaded H-bridge multilevel inverter." International Journal of Engineering & Technology 7, no. 2.8 (March 19, 2018): 592. http://dx.doi.org/10.14419/ijet.v7i2.8.10527.
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This paper presents a novel cascaded multilevel inverter structure with reduced devices. This structure is termed as sequential switch cascaded multilevel inverter. The basic asymmetrical hybrid circuit is described and is capable of generating 17 voltage levels. The various modes of deriving 17 levels are explained and the proposed topology is compared with existing topologies in various aspects. Neural network controller can be used to generate the gating pulses. The algorithm can be trained online by using back propagation algorithm and also an algorithm to determine the number of levels, maximum voltage ratings and power loss is explained. The simulation can be done by MATLAB Simulink.
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Foti, Salvatore, Giacomo Scelba, Antonio Testa, and Angelo Sciacca. "An Averaged-Value Model of an Asymmetrical Hybrid Multi-Level Rectifier." Energies 12, no. 4 (February 13, 2019): 589. http://dx.doi.org/10.3390/en12040589.
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The development and the validation of an averaged-value mathematical model of an asymmetrical hybrid multi-level rectifier is presented in this work. Such a rectifier is composed of a three-level T-type unidirectional rectifier and of a two-level inverter connected to an open-end winding electrical machine. The T-type rectifier, which supplies the load, operates at quite a low switching frequency in order to minimize inverter power losses. The two-level inverter is instead driven by a standard sinusoidal pulse width modulation (SPWM) technique to suitably shape the input current. The two-level inverter also plays a key role in actively balancing the voltage across the DC bus capacitors of the T-type rectifier, making unnecessary additional circuits. Such an asymmetrical structure achieves a higher efficiency compared to conventional PWM multilevel rectifiers, even considering extra power losses due to the auxiliary inverter. In spite of its advantageous features, the asymmetrical hybrid multi-level rectifier topology is a quite complex system, which requires suitable mathematical tools for control and optimization purposes. This paper intends to be a step in this direction by deriving an averaged-value mathematical model of the whole system, which is validated through comparison with other modeling approaches and experimental results. The paper is mainly focused on applications in the field of electrical power generation; however, the converter structure can be also exploited in a variety of grid-connected applications by replacing the generator with a transformer featuring an open-end secondary winding arrangement.
Dissertations / Theses on the topic "Asymmetrical Hybrid Multilevel Inverter"
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Nami, Alireza. "A new multilevel converter configuration for high power and high quality applications." Thesis, Queensland University of Technology, 2010. https://eprints.qut.edu.au/33216/1/Alireza_Nami_Thesis.pdf.
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The Queensland University of Technology (QUT) allows the presentation of theses for the Degree of Doctor of Philosophy in the format of published or submitted papers, where such papers have been published, accepted or submitted during the period of candidature. This thesis is composed of ten published /submitted papers and book chapters of which nine have been published and one is under review. This project is financially supported by an Australian Research Council (ARC) Discovery Grant with the aim of investigating multilevel topologies for high quality and high power applications, with specific emphasis on renewable energy systems. The rapid evolution of renewable energy within the last several years has resulted in the design of efficient power converters suitable for medium and high-power applications such as wind turbine and photovoltaic (PV) systems. Today, the industrial trend is moving away from heavy and bulky passive components to power converter systems that use more and more semiconductor elements controlled by powerful processor systems. However, it is hard to connect the traditional converters to the high and medium voltage grids, as a single power switch cannot stand at high voltage. For these reasons, a new family of multilevel inverters has appeared as a solution for working with higher voltage levels. Besides this important feature, multilevel converters have the capability to generate stepped waveforms. Consequently, in comparison with conventional two-level inverters, they present lower switching losses, lower voltage stress across loads, lower electromagnetic interference (EMI) and higher quality output waveforms. These properties enable the connection of renewable energy sources directly to the grid without using expensive, bulky, heavy line transformers. Additionally, they minimize the size of the passive filter and increase the durability of electrical devices. However, multilevel converters have only been utilised in very particular applications, mainly due to the structural limitations, high cost and complexity of the multilevel converter system and control. New developments in the fields of power semiconductor switches and processors will favor the multilevel converters for many other fields of application. The main application for the multilevel converter presented in this work is the front-end power converter in renewable energy systems. Diode-clamped and cascade converters are the most common type of multilevel converters widely used in different renewable energy system applications. However, some drawbacks – such as capacitor voltage imbalance, number of components, and complexity of the control system – still exist, and these are investigated in the framework of this thesis. Various simulations using software simulation tools are undertaken and are used to study different cases. The feasibility of the developments is underlined with a series of experimental results. This thesis is divided into two main sections. The first section focuses on solving the capacitor voltage imbalance for a wide range of applications, and on decreasing the complexity of the control strategy on the inverter side. The idea of using sharing switches at the output structure of the DC-DC front-end converters is proposed to balance the series DC link capacitors. A new family of multioutput DC-DC converters is proposed for renewable energy systems connected to the DC link voltage of diode-clamped converters. The main objective of this type of converter is the sharing of the total output voltage into several series voltage levels using sharing switches. This solves the problems associated with capacitor voltage imbalance in diode-clamped multilevel converters. These converters adjust the variable and unregulated DC voltage generated by renewable energy systems (such as PV) to the desirable series multiple voltage levels at the inverter DC side. A multi-output boost (MOB) converter, with one inductor and series output voltage, is presented. This converter is suitable for renewable energy systems based on diode-clamped converters because it boosts the low output voltage and provides the series capacitor at the output side. A simple control strategy using cross voltage control with internal current loop is presented to obtain the desired voltage levels at the output voltage. The proposed topology and control strategy are validated by simulation and hardware results. Using the idea of voltage sharing switches, the circuit structure of different topologies of multi-output DC-DC converters – or multi-output voltage sharing (MOVS) converters – have been proposed. In order to verify the feasibility of this topology and its application, steady state and dynamic analyses have been carried out. Simulation and experiments using the proposed control strategy have verified the mathematical analysis. The second part of this thesis addresses the second problem of multilevel converters: the need to improve their quality with minimum cost and complexity. This is related to utilising asymmetrical multilevel topologies instead of conventional multilevel converters; this can increase the quality of output waveforms with a minimum number of components. It also allows for a reduction in the cost and complexity of systems while maintaining the same output quality, or for an increase in the quality while maintaining the same cost and complexity. Therefore, the asymmetrical configuration for two common types of multilevel converters – diode-clamped and cascade converters – is investigated. Also, as well as addressing the maximisation of the output voltage resolution, some technical issues – such as adjacent switching vectors – should be taken into account in asymmetrical multilevel configurations to keep the total harmonic distortion (THD) and switching losses to a minimum. Thus, the asymmetrical diode-clamped converter is proposed. An appropriate asymmetrical DC link arrangement is presented for four-level diode-clamped converters by keeping adjacent switching vectors. In this way, five-level inverter performance is achieved for the same level of complexity of the four-level inverter. Dealing with the capacitor voltage imbalance problem in asymmetrical diodeclamped converters has inspired the proposal for two different DC-DC topologies with a suitable control strategy. A Triple-Output Boost (TOB) converter and a Boost 3-Output Voltage Sharing (Boost-3OVS) converter connected to the four-level diode-clamped converter are proposed to arrange the proposed asymmetrical DC link for the high modulation indices and unity power factor. Cascade converters have shown their abilities and strengths in medium and high power applications. Using asymmetrical H-bridge inverters, more voltage levels can be generated in output voltage with the same number of components as the symmetrical converters. The concept of cascading multilevel H-bridge cells is used to propose a fifteen-level cascade inverter using a four-level H-bridge symmetrical diode-clamped converter, cascaded with classical two-level Hbridge inverters. A DC voltage ratio of cells is presented to obtain maximum voltage levels on output voltage, with adjacent switching vectors between all possible voltage levels; this can minimize the switching losses. This structure can save five isolated DC sources and twelve switches in comparison to conventional cascade converters with series two-level H bridge inverters. To increase the quality in presented hybrid topology with minimum number of components, a new cascade inverter is verified by cascading an asymmetrical four-level H-bridge diode-clamped inverter. An inverter with nineteen-level performance was achieved. This synthesizes more voltage levels with lower voltage and current THD, rather than using a symmetrical diode-clamped inverter with the same configuration and equivalent number of power components. Two different predictive current control methods for the switching states selection are proposed to minimise either losses or THD of voltage in hybrid converters. High voltage spikes at switching time in experimental results and investigation of a diode-clamped inverter structure raised another problem associated with high-level high voltage multilevel converters. Power switching components with fast switching, combined with hard switched-converters, produce high di/dt during turn off time. Thus, stray inductance of interconnections becomes an important issue and raises overvoltage and EMI issues correlated to the number of components. Planar busbar is a good candidate to reduce interconnection inductance in high power inverters compared with cables. The effect of different transient current loops on busbar physical structure of the high-voltage highlevel diode-clamped converters is highlighted. Design considerations of proper planar busbar are also presented to optimise the overall design of diode-clamped converters.
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Muñoz, Ramirez Oscar Mauricio. "Contributions on spectral control for the asymmetrical full bridge multilevel inverter." Doctoral thesis, Universitat Rovira i Virgili, 2010. http://hdl.handle.net/10803/8476.
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Las topologías de circuitos inversores multinivel pueden trabajar a tensiones y potencias mayores que las alcanzadas por convertidores convencionales de dos niveles. Además, la conversión multinivel reduce la distorsión armónica de las variables de salida y en algunos casos, a pesar del aumento de elementos de conmutación, también reduce las pérdidas de conversión al incrementarse el número de niveles. La reducción de distorsión alcanzada por el número de niveles puede aprovecharse para reducir las pérdidas de conmutación disminuyendo la frecuencia de las señales portadoras. Para reducir aún más esta frecuencia sin degradar el espectro, nosotros controlamos las pendientes de las portadoras triangulares. Primero se han desarrollado dos modelos analíticos para predecir el espectro del voltage de salida, dependiendo de: el índice de modulación MA, la razón de distribución de voltaje K de las fuentes de alimentación , y las cuatro pendientes de las portadoras{r1, r2, r3, r4}. El primer modelo considera el Muestreo Natural y se basa en Series Dobles de Fourier (SDF) mientras que el segundo modelo, utiliza la Serie Sencilla de Fourier (SSF) introduciendo el concepto de Muestreo Pseudo-Natural, una aproximación digital de la modulación natural. Ambos modelos son programados en Matlab, verificados con Pspice y validados con un prototipo experimental que contiene un modulador digital implementado con DSP.
La concordancia entre las modulaciones natural y pseudo-natural, asi como entre sus respectivos modelos, es aprovechada por un algorítmo genético (AG) donde la THD es la función costo a reducir. Después de varios ensayos y de sintonizar el AG, se genera una matriz que contiene conjuntos de portadoras optimizadas dentro un rango específico de las variables {MA,K} y es probada con un segundo prototipo en lazo cerrado. Un lazo lento digital modifica las portadoras creadas por un dsPIC en modulaciones PWM; estas son demoduladas y sus amplitudes corregidas por un lazo de acción anticipada. Estas portadoras se comparan con una referencia sinusoidal que a su vez es modificada por variables de estado, generando finalmente la modulación multinivel en lazo cerrado. Los resultados finales demuestran la fiabilidad de la reducción de armónicos usando la programación de las pendientes de las portadoras.
Palabras claves: inversor multinivel, PWM, distorsión armónica, modelo espectral, pendiente de portadora, conjunto de portadoras, distribución de niveles, Serie Doble de Fourier, Serie Simple de Fourier, muestreo natural, muestreo regular, muestreo pseudo-natural , Algoritmos Genéticos.
Multilevel inverter (MI) topologies can work at higher voltage and higher power than conventional two-level converters. In addition, multilevel conversion reduces the output variables harmonic distortion and, sometimes, in spite of the devices-count increment, the conversion losses can also decrease by increasing the number of levels. The harmonic distortion reduction achieved by increasing the number of levels, can be used to further reducing the switching losses by decreasing the inverter carrier frequencies. To reduce even more the switching frequency without degrading output spectrum, we control the triangular carrier waveforms slopes.
First, to achieve this target, two analytical models have been created in order to predict the inverter output voltage spectrum, depending on diverse parameters: the amplitude modulation index MA, the voltage distribution K of the inverter input sources, and the four carrier slopes {r1, r2, r3, r4}. The first model considers Natural Sampling and is based on Double Fourier Series (DFS) whereas the second model based on Simple Fourier Series (SFS), introduces the concept of Pseudo-Natural Sampling, as a digital approximation of the natural modulation. Both models are programmed in Matlab, verified with Pspice simulations and validated with a first experimental prototype with a DSP digital modulator.
The good agreement between natural and pseudo-natural modulations, as well as their respective DFS and SFS models, is exploited by a Genetic Algorithm (GA) application where THD is the cost function to minimize. After testing and properly tuning the GA, a framework matrix containing the optimized carriers set for a specific range of variables {MA,K} is generated and then, tested with a second, closed-loop prototype. A slow digital loop modifies the carrier slopes created by dsPIC microcontroller as PWM modulations, whose amplitude, once demodulated, are affected by a feed-forward loop. These carriers, compared with a sinusoidal reference, state-feedback modified, generate finally the closed-loop multilevel modulation. The final results demonstrates the feasibility of harmonic reduction by means of carrier slopes programming.
Keywords: multilevel inverter, PWM, harmonic distortion, spectral modeling, carrier slope, carriers set, level distribution, Double Fourier Series, Simple Fourier Series, natural sampling, regular sampling, pseudo-natural sampling, Genetic Algorithms.
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Ahmed, Eshita. "Hybrid Renewable Energy System Using Doubly-Fed Induction Generator and Multilevel Inverter." Thesis, North Dakota State University, 2012. https://hdl.handle.net/10365/26501.
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The proposed hybrid system generates AC power by combining solar and wind energy converted by a doubly-fed induction generator (DFIG). The DFIG, driven by a wind turbine, needs rotor excitation so the stator can supply a load or the grid. In a variable-speed wind energy system, the stator voltage and its frequency vary with wind speed, and in order to keep them constant, variable-voltage and variable-frequency rotor excitation is to be provided. A power conversion unit supplies the rotor, drawing power either from AC mains or from a PV panel depending on their availability. It consists of a multilevel inverter which gives lower harmonic distortion in the stator voltage. Maximum power point tracking techniques have been implemented for both wind and solar power. The complete hybrid renewable energy system is implemented in a PSIM-Simulink interface and the wind energy conversion portion is realized in hardware using dSPACE controller board.
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Al, Shammeri Bashar Mohammed Flayyih. "A novel induction heating system using multilevel neutral point clamped inverter." Thesis, University of Plymouth, 2017. http://hdl.handle.net/10026.1/8305.
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This thesis investigates a novel DC/AC resonant inverter of Induction Heating (IH) system presenting a Multilevel Neutral Point Clamped (MNPCI) topology, as a new part of power supply design. The main function of the prototype is to provide a maximum and steady state power transfer from converter to the resonant load tank, by achieving zero current switching (ZCS) with selecting the best design of load tank topology, and utilizing the advantage aspects of both the Voltage Fed Inverter (VFI) and Current Fed Inverter (CFI) kinds, therefore it can considered as a hybrid-inverter (HVCFI) category . The new design benefits from series resonant inverter design through using two bulk voltage source capacitors to feed a constant voltage delivery to the MNPCI inverter with half the DC rail voltage to decrease the switching losses and mitigate the over voltage surge occurred in inverter switches during operation which may cause damage when dealing with high power systems. Besides, the design profits from the resonant load topology of parallel resonant inverter, through using the LLC resonant load tank. The design gives the advantage of having an output current gain value of about Quality Factor (Q) times the inverter current and absorbs the parasitic components. On the contrary, decreasing inverter current means decreasing the switching frequency and thus, decreasing the switching losses of the system. This aspect increases the output power, which increases the heating efficiency. In order for the proposed system to be more reliable and matches the characteristics of IH process , the prototype is modelled with a variable LLC topology instead of fixed load parameters with achieving soft switching mode of ZCS and zero voltage switching (ZVS) at all load conditions and a tiny phase shift angle between output current and voltage, which might be neglected. To achieve the goal of reducing harmonic distortion, a new harmonic control modulation is introduced, by controlling the ON switching time to obtain minimum Total Harmonic Distortion (THD) content accompanied with optimum power for heating energy.
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Liu, Libo [Verfasser]. "A hybrid cascaded multilevel inverter using variable DC-link voltage technique for battery electric vehicles / Libo Liu." Ulm : Universität Ulm, 2021. http://d-nb.info/1226855814/34.
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Silva, Ranoyca Nayana Alencar LeÃo e. "Inversor MultinÃvel HÃbrido SimÃtrico TrifÃsico de Cinco NÃveis Baseado na Topologias Half-Bridge/ANPC." Universidade Federal do CearÃ, 2013. http://www.teses.ufc.br/tde_busca/arquivo.php?codArquivo=9817.
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CoordenaÃÃo de AperfeiÃoamento de Pessoal de NÃvel SuperiorEste trabalho apresenta uma topologia de inversor multinÃvel hÃbrido simÃtrico trifÃsico de cinco nÃveis, concebido a partir das estruturas meia ponte e inversor com grampeamento ativo do neutro, adequado para aplicaÃÃes com alta tensÃo e alta potÃncia. SÃo apresentados os possÃveis estados de comutaÃÃo, lÃgica de acionamento, cÃlculo dos esforÃos nos semicondutores, assim como um estudo de perdas. Duas estratÃgias de modulaÃÃo sÃo selecionadas possibilitando a operaÃÃo concomitante de metade dos interruptores em baixa frequÃncia (60 Hz) e a outra em alta frequÃncia (1020 Hz), reduzindo o nÃmero de comutaÃÃes, consequentemente as perdas nos semicondutores e o conteÃdo harmÃnico da tensÃo de saÃda. Para validar a proposta, foi desenvolvido um protÃtipo com potÃncia de 7,5 kVA e tensÃo de saÃda eficaz de linha 380 V. AlÃm disso, à apresentada a implementaÃÃo de ambas as modulaÃÃes no dispositivo lÃgico programÃvel escolhido, FPGA. Os resultados experimentais da estrutura trifÃsica validam a topologia proposta. A estrutura, operando com a modulaÃÃo baseada na PD-PWM, apresentou DHT de 29,71% e WTHD de 1,93%, enquanto que a baseada na CSV-PWM apresentou DHT de 38,45% e WTHD de 7,21%. AlÃm disso, o rendimento da estrutura proposta à superior se comparado ao da topologia Half-Bridge/NPC, conforme esperado em funÃÃo das perdas na estrutura Half-Bridge/NPC serem maiores e mal distribuÃdas.
This work presents a new topology of a hybrid five-level inverter, conceived from the halfbridge and active neutral point clamped structures, suitable for high-voltage, high-power applications. The possible commutation stages, the switching drive logic, the semiconductors stresses mathematical analysis, and the losses study are presented. Two modulation techniques were selected in order to allow low-frequency (60 Hz) switches operate together with high-frequency switches (1020 Hz), reducing the number of commutations and, consequently, the overall losses and the output voltage total harmonic distortion. In order to validate the proposal, it was developed a 7.5 kVA prototype and AC line output voltage of 380 V. The digital implementation from both modulation techniques on the chosen programmable logic device FPGA is also presented. The experimental results relative to the three-phase structure validate the proposed topology. The topology, operating with the modulation based on Sinusoidal In-Phase Disposition - PWM, presented a THD of 29.71%, and WTHD of 1.93%, while the one based on the Centered Space Vector - PWM presented a THD of 38.45%, and a WTHD of 7.21%. Besides, the overall efficiency is superior when compared to the Half-Bridge/NPC topology, as expected, due to the fact that losses on this structure are higher and misdistributed.
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Erroui, Najoua. "High power conversion chain for hybrid aircraft propulsion." Thesis, Toulouse, INPT, 2019. http://www.theses.fr/2019INPT0106.
Full textAbstract:
Ces dernières années, l’utilisation des systèmes de transport aérien s'est considérablement amplifié. Par conséquent, les considérations environnementales actuelles poussent à réduire leur utilisation. Des projets tels que Clean Sky 2 tentent d’apporter une réponse à ce problème, en proposant une réduction des émissions de CO2 et des nuisances sonores. Le recours à l’hybridation de la propulsion des avions réduirait ces émissions en réduisant la taille et la masse des systèmes et en utilisant des systèmes électriques plus efficaces ce qui permettrai d’augmenter le nombre de passager. Cela permettrait de réduire la consommation de carburant et donc les émissions polluantes. Ces travaux s'inscrivent dans le cadre du projet européen HASTECS Clean Sky 2 qui vise à optimiser l'ensemble de la chaîne électrique de l'avion à propulsion hybride en intégrant toutes les contraintes aéronautiques telles que les décharges partielles pour les équipements électriques placés en zone non pressurisée. Le projet HASTECS s'est fixé le défi de doubler la densité de puissance des machines électriques pour passer de 5 kW/kg à 10 kW/kg, y compris leur refroidissement, tandis que pour l'électronique de puissance, avec son système de refroidissement, le but sera de passer à 15 kW/kg en 2025 et à 25 kW/kg en 2035. Pour augmenter la densité de puissance, la masse du système de refroidissement doit être diminuée dans un premier temps soit en optimisant ses composants, ce qui est fait par le 4ème lot de travail (WP4), soit en réduisant les pertes. La réduction des pertes de l'onduleur pourrait être obtenue en utilisant de semi-conducteurs de faible calibre en tension, en jouant sur les stratégies de modulation ou en utilisant des semi-conducteurs plus performants. La première option peut être faite en utilisant des architectures multi-niveaux pour éviter l'association en série direct. Contrairement à l'association directe en série, l'association parallèle est plus facile à gérer en termes de commande de interrupteurs, ce qui a été autorisé dans nos études. Plusieurs topologies d'onduleurs (topologies à 2, 3 et 5 niveaux) et stratégies de modulation (PWM, injection de troisième harmonique, PWM discontinu et pleine onde) ont été comparées en utilisant plusieurs technologies de semi-conducteurs pour choisir la solution la plus performante en termes de rendement et de densité de puissance. Pour le profil de mission considéré, l'onduleur pourrait être dimensionné pour le point de puissance maximum (décollage) ou la phase de vol la plus longue (croisière). Une étude comparative des stratégies de modulation a été réalisée pour mettre en évidence la structure et la modulation présentant les meilleures performances afin de minimiser les pertes pour les points de dimensionnement choisis en utilisant les topologies les plus intéressantes pour le profil de mission étudié en utilisant deux configurations différentes de bobinage du moteur électrique proposées par le WP1Recently, the use of air transport systems has increased considerably. Therefore, the current environmental considerations are pushing to reduce their ecological impact. Projects such as Clean Sky 2 provide an answer to this problem, by proposing a reduction in CO2 emissions and noise pollution. The development of a hybrid-electric aircraft would reduce these emissions by reducing the size and weight of the systems and using more efficient electrical systems. This would reduce fuel consumption and therefore pollutant emissions. This work takes part into HASTECS Clean Sky 2 European project which aims to optimize the complete electrical chain of the hybrid aircraft integrating all aeronautical constraints such as partial discharges for electrical equipment placed in the non-pressurized zone. HASTECS project has set itself the challenge of doubling the specific power of electric machines including their cooling from 5 kW/kg to 10 kW/kg, while the power electronics, with their cooling system, would evolve from 15 kW/kg in 2025 to 25 kW/kg in 2035. To increase the specific power, the cooling system mass should be decreased either by optimizing its components which is done by the 4th work package (WP4) or by reducing power losses. Inverter losses reduction could be achieved by using small voltage rating components, by playing on modulation strategies or by using more performant semiconductors. The first option could be done by using multilevel architectures to avoid the direct series association. Unlike direct series association, the parallel one is easier to manage in terms of switches command so it was allowed in our studies. Several inverter topologies (2-, 3- and 5-level topologies) and modulation strategies (PWM, third harmonic injection, discontinuous PWM and full-wave) were compared using several semiconductors generations to choose the most performant solution in terms of efficiency and specific power. For the considered mission profile, the inverter could be sized for the maximum power point (takeoff) or the most extended flight phase (cruise). A comparative study of modulation strategies was carried out to highlight the structure and modulation presenting the best performance to minimize the losses for the chosen sizing points using most interesting topologies for the studied mission profile using two electrical motor windings configurations proposed by WP1
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Boora, Arash Abbasalizadeh. "Flexible high-power multi DC-DC converters for train systems." Thesis, Queensland University of Technology, 2010. https://eprints.qut.edu.au/33208/1/Arash_Boora_Thesis.pdf.
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This thesis reports on the investigations, simulations and analyses of novel power electronics topologies and control strategies. The research is financed by an Australian Research Council (ARC) Linkage (07-09) grant. Therefore, in addition to developing original research and contributing to the available knowledge of power electronics, it also contributes to the design of a DC-DC converter for specific application to the auxiliary power supply in electric trains. Specifically, in this regard, it contributes to the design of a 7.5 kW DC-DC converter for the industrial partner (Schaffler and Associates Ltd) who supported this project. As the thesis is formatted as a ‘thesis by publication’, the contents are organized around published papers. The research has resulted in eleven papers, including seven peer reviewed and published conference papers, one published journal paper, two journal papers accepted for publication and one submitted journal paper (provisionally accepted subject to few changes). In this research, several novel DC-DC converter topologies are introduced, analysed, and tested. The similarity of all of the topologies devised lies in their ‘current circulating’ switching state, which allows them to store some energy in the inductor, as extra inductor current. The stored energy may be applied to enhance the performance of the converter in the occurrence of load current or input voltage disturbances. In addition, when there is an alternating load current, the ability to store energy allows the converter to perform satisfactorily despite frequently and highly varying load current. In this research, the capability of current storage has been utilised to design topologies for specific applications, and the enhancement of the performance of the considered applications has been illustrated. The simplest DC-DC converter topology, which has a ‘current circulating’ switching state, is the Positive Buck-Boost (PBB) converter (also known as the non-inverting Buck-Boost converter). Usually, the topology of the PBB converter is operating as a Buck or a Boost converter in applications with widely varying input voltage or output reference voltage. For example, in electric railways (the application of our industrial partner), the overhead line voltage alternates from 1000VDC to 500VDC and the required regulated voltage is 600VDC. In the course of this research, our industrial partner (Schaffler and Associates Ltd) industrialized a PBB converter–the ‘Mudo converter’–operating at 7.5 kW. Programming the onboard DSP and testing the PBB converter in experimental and nominal power and voltage was part of this research program. In the earlier stages of this research, the advantages and drawbacks of utilization of the ‘current circulating’ switching state in the positive Buck-Boost converter were investigated. In brief, the advantages were found to be robustness against input voltage and current load disturbances, and the drawback was extra conduction and switching loss. Although the robustness against disturbances is desirable for many applications, the price of energy loss must be minimized to attract attention to the utilization of the PBB converter. In further stages of this research, two novel control strategies for different applications were devised to minimise the extra energy loss while the advantages of the positive Buck-Boost converter were fully utilized. The first strategy is Smart Load Controller (SLC) for applications with pre-knowledge or predictability of input voltage and/or load current disturbances. A convenient example of these applications is electric/hybrid cars where a master controller commands all changes in loads and voltage sources. Therefore, the master controller has a pre-knowledge of the load and input voltage disturbances so it can apply the SLC strategy to utilize robustness of the PBB converter. Another strategy aiming to minimise energy loss and maximise the robustness in the face of disturbance is developed to cover applications with unexpected disturbances. This strategy is named Dynamic Hysteresis Band (DHB), and is used to manipulate the hysteresis band height after occurrence of disturbance to reduce dynamics of the output voltage. When no disturbance has occurred, the PBB converter works with minimum inductor current and minimum energy loss. New topologies based on the PBB converter have been introduced to address input voltage disturbances for different onboard applications. The research shows that the performance of applications of symmetrical/asymmetrical multi-level diode-clamped inverters, DC-networks, and linear-assisted RF amplifiers may be enhanced by the utilization of topologies based on the PBB converter. Multi-level diode-clamped inverters have the problem of DC-link voltage balancing when the power factor of their load closes to unity. This research has shown that this problem may be solved with a suitable multi-output DC-DC converter supplying DClink capacitors. Furthermore, the multi-level diode-clamped inverters supplied with asymmetrical DC-link voltages may improve the quality of load voltage and reduce the level of Electromagnetic Interference (EMI). Mathematical analyses and experiments on supplying symmetrical and asymmetrical multi-level inverters by specifically designed multi-output DC-DC converters have been reported in two journal papers. Another application in which the system performance can be improved by utilization of the ‘current circulating’ switching state is linear-assisted RF amplifiers in communicational receivers. The concept of ‘linear-assisted’ is to divide the signal into two frequency domains: low frequency, which should be amplified by a switching circuit; and the high frequency domain, which should be amplified by a linear amplifier. The objective is to minimize the overall power loss. This research suggests using the current storage capacity of a PBB based converter to increase its bandwidth, and to increase the domain of the switching converter. The PBB converter addresses the industrial demand for a DC-DC converter for the application of auxiliary power supply of a typical electric train. However, after testing the industrial prototype of the PBB converter, there were some voltage and current spikes because of switching. To attenuate this problem without significantly increasing the switching loss, the idea of Active Gate Signalling (AGS) is presented. AGS suggests a smart gate driver that selectively controls the switching process to reduce voltage/current spikes, without unacceptable reduction in the efficiency of switching.
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FOTI, SALVATORE. "Multi-Level Inverters exploiting an Open-end Winding configuration." Doctoral thesis, 2017. http://hdl.handle.net/11570/3104638.
Full textAbstract:
Multilevel converters are becoming more and more popular, overcoming some key limitations of conventional two-level structures in handling medium voltages and high voltage gradients. Today they provide the ground for the realization of high efficiency energy conversion systems for medium voltage applications, such as pumps, compressors, extruders, fans, grinding mills, rolling mills, conveyors, crushers, blast furnace blowers, gas turbine starters, mixers, mine hoists, reactive power compensation, marine propulsion, wind energy conversion, and railway traction. A detailed overview of multilevel converters is provided in Chapter 1, while, the state of the art of Open-end Winding Systems is described in Chapter 2. The last systems can be considered as special multilevel inverter structures, tailored around an electrical machine fed from both the ends of the stator, or primary, winding. Overvoltage phenomena generated in industrial motor drives at motor terminals by long feeding cables are investigated in Chapter 3 and an Open-end Winding configuration approach is presented to actively mitigate them. Moreover, an adaptive algorithm is described to make independent the active overvoltage mitigation from system parameters. The main contribution of this work is the development of a new multilevel inverter topology, the Asymmetrical Hybrid Multilevel Inverter (AHMLI), which is introduced in Chapter 4. According to the AHMLI structure, an open-end winding machine (motor, generator or transformer) is supplied on one end by a main multilevel converter, fully managing the active power stream, and, on the other end by an auxiliary two level inverter. This acts as an active power filter, suitably shaping the electrical machine phase current. A mathematical analysis of the proposed structure is first provided, followed by an exhaustive comparison between AHMLI and conventional multilevel structures, emphasizing advantages in terms of efficiency and output current THD. Voltage and current control systems, optimally coping with key characteristics of the AHMLI structure are carried out and an original input capacitors voltage equalization technique is also presented. The application of the AHMLI concept to industrial induction motor drives is then evaluated by simulation and experimental test. A possible exploitation of the AHMLI approach in the realization of photovoltaic and wind plants, as well as STATCOM devices is also assessed. Moreover, a high efficiency three phase rectifier for high speed generation systems exploiting the AHMLI configuration is carried out. Finally, the application of the AHMLI approach to Multiple Motor Drive systems is proposed in Chapter 5. Two new topologies are presented, namely: Open-end Winding Multi Motor Single Converter (MMSC) and Open-end Winding Multi Motor Multi Converter (MMMC). Both configurations exploit the AHMLI structure but the MMMC exploits a five-leg two level inverter to independently control the stator currents of two induction motors.
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Wang, Chi-Yuan, and 王智源. "Design of Grid-Connected Hybrid Multilevel Inverter." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/bqu3d9.
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碩士國立虎尾科技大學
機械與機電工程研究所
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This thesis proposed a hybrid multi-level inverters having 3 inverters in series with distinct dc link voltages to generate 13 voltage levels in order to reduce output voltage and current distortion and power switch stress and switching frequency. Therefore, EMI (Electro Magnetic Interference) can be alleviated due to lower switching frequency. The experiments are conducted to show the performance of the proposed hybrid multi-level inverters that in stand-alone system to reduce the voltage distortion significantly in load-variation, rectifier load, and phase-controlled load conditions; for the grid-tied system, the output current is closed to sinusoidal waveform and current ripple is reduced as well.
Book chapters on the topic "Asymmetrical Hybrid Multilevel Inverter"
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Das, Madan Kumar, Parusharamulu Buduma, Perwez Alam, and Sukumar Mishra. "Generalized Hybrid Symmetrical and Asymmetrical Multilevel Inverter Topology with Reduced Number of Switches." In Advances in Sustainability Science and Technology, 81–94. Singapore: Springer Singapore, 2022. http://dx.doi.org/10.1007/978-981-16-9033-4_7.
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Satyanarayana, G., and K. Lakshmi Ganesh. "Grid Integration of Hybrid Generation Scheme for Optimal Switching Pattern Based Asymmetrical Multilevel Inverter." In Lecture Notes in Electrical Engineering, 295–303. New Delhi: Springer India, 2014. http://dx.doi.org/10.1007/978-81-322-2119-7_30.
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Kala, V., and C. Bhuvaneswari. "Asymmetrical Multilevel Inverter Using Renewable Energy System." In Advances in Intelligent Systems and Computing, 1205–14. New Delhi: Springer India, 2016. http://dx.doi.org/10.1007/978-81-322-2656-7_110.
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Yusop, Nur Iffah Amirah, Naziha Ahmad Azli, and Norjulia Mohamad Nordin. "An Asymmetrical Multilevel Inverter in Photovoltaic (PV) Application." In 10th International Conference on Robotics, Vision, Signal Processing and Power Applications, 293–98. Singapore: Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-13-6447-1_37.
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Madhusudhana, J., Mohamed Rafiq A. Chapparband, and P. S. Puttaswamy. "Design and Development of 15-Level Asymmetrical Cascaded Multilevel Inverter." In Lecture Notes in Electrical Engineering, 1169–83. Singapore: Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-13-5802-9_101.
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Alam, Bilal, Maaz Nusrat, Zeeshan Sarwer, Mohammad Zaid, and Adil Sarwar. "A General Review of the Recently Proposed Asymmetrical Multilevel Inverter Topologies." In Innovations in Cyber Physical Systems, 675–86. Singapore: Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-16-4149-7_61.
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Sarwer, Zeeshan, Marif Daula Siddique, Adil Sarwar, and Saad Mekhilef. "An Improved 15-Level Asymmetrical Multilevel Inverter with Reduced Switch Count." In Lecture Notes in Electrical Engineering, 709–18. Singapore: Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-33-4080-0_68.
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Majumdar, S., B. Mahato, and K. C. Jana. "Doubling Circuit-Based Hybrid Multilevel Inverter for Reduced Components." In Innovations in Soft Computing and Information Technology, 125–33. Singapore: Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-13-3185-5_12.
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Phukan, Hillol, Tamiru Debela, and Jiwanjot Singh. "Fault-Tolerant Cascaded Asymmetrical Multilevel Inverter for the Solar-Based Electric Vehicle." In Lecture Notes in Electrical Engineering, 863–74. Singapore: Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-7031-5_82.
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Ammal Dhanalakshmi, M., M. Parani Ganesh, and Keerthana Paul. "Analysis of Optimum THD in Asymmetrical H-Bridge Multilevel Inverter Using HPSO Algorithm." In Proceedings of 2nd International Conference on Intelligent Computing and Applications, 561–69. Singapore: Springer Singapore, 2016. http://dx.doi.org/10.1007/978-981-10-1645-5_47.
Full textConference papers on the topic "Asymmetrical Hybrid Multilevel Inverter"
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Ruiz-Caballero, Domingo, Luis Martinez, Ramos A. Reynaldo, and Samir A. Mussa. "New asymmetrical hybrid multilevel voltage inverter." In 2009 Brazilian Power Electronics Conference. COBEP 2009. IEEE, 2009. http://dx.doi.org/10.1109/cobep.2009.5347663.
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Sun, Xingtao, and Zhang Yun. "Hybrid Control Strategy for a Novel Asymmetrical Multilevel Inverter." In 2010 International Conference on Intelligent System Design and Engineering Application (ISDEA). IEEE, 2010. http://dx.doi.org/10.1109/isdea.2010.139.
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Boppana, Seshagiri, Varahala Mangadevi Relangi, and Y. Sreenivasa Rao. "Hybrid asymmetrical multilevel inverter for hybrid wind-PV power generation system." In 2015 International Conference on Electrical, Electronics, Signals, Communication and Optimization (EESCO). IEEE, 2015. http://dx.doi.org/10.1109/eesco.2015.7253927.
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Abdulhamed, Zeyad E., Abdulhamid H. Esuri, and Nourdeen A. Abodhir. "New Topology Of Asymmetrical Nine-Level Cascaded Hybrid Bridge Multilevel Inverter." In 2021 IEEE 1st International Maghreb Meeting of the Conference on Sciences and Techniques of Automatic Control and Computer Engineering MI-STA. IEEE, 2021. http://dx.doi.org/10.1109/mi-sta52233.2021.9464511.
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Jana, Puspendu, Sumit Chattopadhyay, Suman Maiti, Prabodh Bajpai, and Chandan Chakraborty. "Hybrid modulation technique for binary asymmetrical cascaded multilevel inverter for PV application." In 2016 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES). IEEE, 2016. http://dx.doi.org/10.1109/pedes.2016.7914265.
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Scelba, G., G. Scarcella, S. Foti, S. De Caro, and A. Testa. "Self-sensing control of open-end winding PMSMs fed by an asymmetrical hybrid multilevel inverter." In 2017 IEEE International Symposium on Sensorless Control for Electrical Drives (SLED). IEEE, 2017. http://dx.doi.org/10.1109/sled.2017.8078448.
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Abraham, Babitha T., and Anish Benny. "Asymmetric multilevel hybrid inverter with reduced number of switches." In 2014 Annual International Conference on Emerging Research Areas: Magnetics, Machines and Drives (AICERA/iCMMD). IEEE, 2014. http://dx.doi.org/10.1109/aicera.2014.6908176.
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Manjunatha, Y. R., and Anusha Malenahalli. "Simulation and implementation of FPGA based hybrid asymmetric multilevel inverter." In 2015 International Conference on Emerging Research in Electronics, Computer Science and Technology (ICERECT). IEEE, 2015. http://dx.doi.org/10.1109/erect.2015.7499058.
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Prabaharan, N., and K. Palanisamy. "A new hybrid asymmetric multilevel inverter with reduced number of switches." In 2016 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES). IEEE, 2016. http://dx.doi.org/10.1109/pedes.2016.7914437.
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Boobalan, S., and R. Dhanasekaran. "Hybrid topology of asymmetric cascaded multilevel inverter with renewable energy sources." In 2014 International Conference on Advanced Communication, Control and Computing Technologies (ICACCCT). IEEE, 2014. http://dx.doi.org/10.1109/icaccct.2014.7019256.
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