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Journal articles on the topic 'Asymmetrical Hybrid Multilevel Inverter'

Author: Grafiati

Published: 21 February 2023

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1

Kumar, Satish, and M. Sasi Kumar. "Asymmetric hybrid multilevel inverter with reduced harmonic using hybrid modulation technique." International Journal of Power Electronics and Drive Systems (IJPEDS) 11, no. 2 (June 1, 2020): 605. http://dx.doi.org/10.11591/ijpeds.v11.i2.pp605-610.

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<span>This paper studies the Asymmetric cascaded three phase multilevel inverter developed with hybrid modulation technique applied for an industrial application. The aim of this paper to reduce the Total harmonics distortion in the cascaded multi level inverter by introducing the new concept to develop the three phase CMLI. This inverter has two segments, one segment has H-bridge inverter and another segment has sequential arrangement of power semi conductor switches with asymmetrical voltage source in the ratio of 1:2. Similarly develop the segments for other phases. This new topology is called as Hybrid MLI. This hybrid MLI is used to reduce the no of semiconductor device requirement and the Total harmonics distortion. The inverter is controlled by Phase disposition (PD) and alternative phase opposition disposition PWM technique (APOD). This control technique is used to minimize the current harmonic and increase the system performance. The circuit is simulated using Matlab circuit and its performance is compared using PD and APOD PWM techniques and verified with simulation results.</span><p> </p>

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2

Arun, Vijayakumar, N. M. G. Kumar, and Natarajan Prabaharan. "A hybrid reference pulse width modulation technique for binary source multilevel inverter." International Journal of Power Electronics and Drive Systems (IJPEDS) 13, no. 2 (June 1, 2022): 980. http://dx.doi.org/10.11591/ijpeds.v13.i2.pp980-987.

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The article presents a seven-level reduced switch asymmetrical multilevel inverter with two different methods of pulse width modulation (PWM) techniques. Phase disposition (PD) PWM and hybrid variable-frequency phase disposition PWM (HVFPD-PWM) are the two different PWM methods for making the quality of output voltage waveform. In the first method, the unipolar sine reference with triangular carriers is used. In the second method, the hybrid unipolar reference (sinusoidal with trapezoidal) is proposed with variable frequency carriers to generate the switching pulses for asymmetric multilevel inverter (MLI). The main objective of this proposed method is to reduce the total harmonic distortion in the output voltage waveforms. A comprehensive comparison of the proposed HVFPD-PWM and the conventional PD-PWM with asymmetrical seven-level inverter is presented to show the enriched performances of the proposed method. The performance and viability of the suggested PWM are evaluated through simulation and experimental results using an asymmetrical seven-level inverter. The total harmonic distortion for the proposed PWM method (16.95%) is significantly reduced as compared with the conventional PWM method (18.01%) at the modulation index of one.

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3

Foti, Salvatore, Antonio Testa, Giacomo Scelba, Salvatore De Caro, and Giuseppe Scarcella. "Self-Sensing Control of Open-End Winding PMSMs Fed by an Asymmetrical Hybrid Multilevel Inverter." Energies 15, no. 9 (April 26, 2022): 3166. http://dx.doi.org/10.3390/en15093166.

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The paper presents a self-sensing control technique for a special type of multilevel motor drive featuring an Open-end Winding Permanent-Magnet Synchronous Motor fed on one side by a main multilevel inverter (MLI) and on the other side by an auxiliary two-level inverter (TLI). In order to minimize the power losses, the MLI manages the machine active power operating at a low-switching frequency. The TLI instead acts as an active power filter and operates at a higher switching frequency and a lower DC-Bus voltage than the MLI. The current control task is shared between the two inverters, as a predictive action is exerted by the MLI, while a feedback action is accomplished by the TLI. Common sensorless rotor position estimation techniques cannot be straightforwardly applied on such a system, due to the particular drive structure. Therefore, a specific technique has been carried out, able to ensure satisfactory efficiency and control performance in all the operating speed ranges by optimally exploiting the different features of the two inverters. Simulation and experimental results confirm the effectiveness of the proposed approach.

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4

Foti, Salvatore, Antonio Testa, Giacomo Scelba, Salvatore De Caro, and Giuseppe Scarcella. "Self-Sensing Control of Open-End Winding PMSMs Fed by an Asymmetrical Hybrid Multilevel Inverter." Energies 15, no. 9 (April 26, 2022): 3166. http://dx.doi.org/10.3390/en15093166.

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The paper presents a self-sensing control technique for a special type of multilevel motor drive featuring an Open-end Winding Permanent-Magnet Synchronous Motor fed on one side by a main multilevel inverter (MLI) and on the other side by an auxiliary two-level inverter (TLI). In order to minimize the power losses, the MLI manages the machine active power operating at a low-switching frequency. The TLI instead acts as an active power filter and operates at a higher switching frequency and a lower DC-Bus voltage than the MLI. The current control task is shared between the two inverters, as a predictive action is exerted by the MLI, while a feedback action is accomplished by the TLI. Common sensorless rotor position estimation techniques cannot be straightforwardly applied on such a system, due to the particular drive structure. Therefore, a specific technique has been carried out, able to ensure satisfactory efficiency and control performance in all the operating speed ranges by optimally exploiting the different features of the two inverters. Simulation and experimental results confirm the effectiveness of the proposed approach.

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5

Han, Jingang, Pinxuan Zhao, Gang Yao, Hao Chen, Yide Wang, Mohamed Benbouzid, and Tianhao Tang. "Model predictive current control of asymmetrical hybrid cascaded multilevel inverter." Journal of Power Electronics 22, no. 4 (February 10, 2022): 580–92. http://dx.doi.org/10.1007/s43236-022-00389-y.

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6

Srinivasan, Ganesh Kumar, Marco Rivera, Vijayaraja Loganathan, Dhanasekar Ravikumar, and Balaji Mohan. "Trends and Challenges in Multi-Level Inverter with Reduced Switches." Electronics 10, no. 4 (February 3, 2021): 368. http://dx.doi.org/10.3390/electronics10040368.

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Multilevel inverter had been paid a lot of attention from the academia and research community in recent times due to its role in high and medium power applications. In this paper, a detailed survey is made on the recently designed multilevel inverter to find the suitability of the inverters for particular applications. Research is performed on various types of multilevel inverters such as: Symmetric, asymmetric, hybrid and modularized multilevel inverter in order to identify the issues in generating more levels at the output. A summary of various issues in multilevel inverter with reduced switch count is provided, so that a novel topology of multilevel inverter can be designed in future. Further, an 81-level switched ladder multilevel inverter using unidirectional and bidirectional switches is designed. Simulation work is carried out using Matlab/Simulink in order to validate the performance of the inverter with change in resistive load and impedance load. The output of the 81-level inverter is fed to a 110 V, 186.5 W single phase induction motor in order to study the characteristics, further speed control of motor is performed by varying the input voltage of the motor and the results are presented.

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7

Pavan M and Dr. Madhusudhana J. "Design and simulation of an asymmetrical 23-level inverter with modulation Techniques." International Journal for Modern Trends in Science and Technology 9, no. 01 (January 25, 2023): 32–36. http://dx.doi.org/10.46501/ijmtst0901006.

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For medium voltage, high power regulation the Multilevel Inverters (MLI) are attracting industry and academic researchers. MLI generates the desired output in the form of stepped waveforms with reduced harmonics. The MLI is expected to be realised using a variety of traditional topologies. Traditional MLIs have the disadvantage of requiring additional components, which increases the complexity of gate pulse production. As a result, MLI's overall costs will rise. This research proposes a hybrid topology to alleviate these drawbacks. With the increase in the number of steps in output voltage, the number of dc sources, power switching devices, converter cost, and space required is significantly reduced compared to typical MLIs. The design and simulation of a hybrid converter using several types of PWM approaches are covered in this work. This hybrid converter combines a T-Type structure and a half bridge inverter that is back-to-back connected. The proposed construction is designed and simulated by MATLAB Simulink software. The proposed 23 level inverter circuit is designed and simulated by Equal phase angle modulation technique and half height modulation technique, THD is compared.

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8

Kumar, Devineni Gireesh, Aman Ganesh, Nagineni Venkata Sireesha, Sainadh Singh Kshatri, Sachin Mishra, Naveen Kumar Sharma, Mohit Bajaj, Hossam Kotb, Ahmad H. Milyani, and Abdullah Ahmed Azhari. "Performance Analysis of an Optimized Asymmetric Multilevel Inverter on Grid Connected SPV System." Energies 15, no. 20 (October 17, 2022): 7665. http://dx.doi.org/10.3390/en15207665.

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The purpose of this research is to develop an efficient single-phase grid-connected PV system using a better performing asymmetrical multilevel inverter (AMI). Circuit component reduction, harmonic reduction, and grid integration are critical criteria for better inverter efficiency. The proposed inverter’s optimized topology requires seven unidirectional switches, three symmetric dc sources, and three diodes to produce an asymmetric fifteen level output; whereas, the same configuration will generate 7, 11, and 15-level output with an appropriate choice of dc source magnitudes. It is possible to reduce inverter losses and boost efficiency by decreasing the number of switches used. The integration of an asymmetric 15-level inverter with a grid-connected solar photovoltaic system is discussed in this article. A grid-connected solar photovoltaic (GCSPV) system is modelled and simulated using an asymmetric 15-level inverter. The dc sources of the 15-level inverter are replaced with PV sources. The results were analyzed with different operating temperatures and solar irradiance conditions. The GCSPV system is controlled by a closed-loop control system using Particle Swarm Optimization (PSO), Harris Hawk Optimization (HHO), and Hybrid Particle Swarm Optimization-Genetic Algorithm (PSOGA) based Proportional plus Integral (PI) controllers. Grid voltage, grid current, grid power, and total harmonic distortion (THD) of grid currents were analyzed. The performance of the 15-level asymmetric inverter was evaluated by comparing the THD of the grid current and the efficiency of the grid-connected photovoltaic system.

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9

Ramya, M., P. Usha Rani, G. Ganesan @ Subramanian, and K. Ramash Kumar. "Neural network controller based sequential switch cascaded H-bridge multilevel inverter." International Journal of Engineering & Technology 7, no. 2.8 (March 19, 2018): 592. http://dx.doi.org/10.14419/ijet.v7i2.8.10527.

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This paper presents a novel cascaded multilevel inverter structure with reduced devices. This structure is termed as sequential switch cascaded multilevel inverter. The basic asymmetrical hybrid circuit is described and is capable of generating 17 voltage levels. The various modes of deriving 17 levels are explained and the proposed topology is compared with existing topologies in various aspects. Neural network controller can be used to generate the gating pulses. The algorithm can be trained online by using back propagation algorithm and also an algorithm to determine the number of levels, maximum voltage ratings and power loss is explained. The simulation can be done by MATLAB Simulink.

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10

Foti, Salvatore, Giacomo Scelba, Antonio Testa, and Angelo Sciacca. "An Averaged-Value Model of an Asymmetrical Hybrid Multi-Level Rectifier." Energies 12, no. 4 (February 13, 2019): 589. http://dx.doi.org/10.3390/en12040589.

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The development and the validation of an averaged-value mathematical model of an asymmetrical hybrid multi-level rectifier is presented in this work. Such a rectifier is composed of a three-level T-type unidirectional rectifier and of a two-level inverter connected to an open-end winding electrical machine. The T-type rectifier, which supplies the load, operates at quite a low switching frequency in order to minimize inverter power losses. The two-level inverter is instead driven by a standard sinusoidal pulse width modulation (SPWM) technique to suitably shape the input current. The two-level inverter also plays a key role in actively balancing the voltage across the DC bus capacitors of the T-type rectifier, making unnecessary additional circuits. Such an asymmetrical structure achieves a higher efficiency compared to conventional PWM multilevel rectifiers, even considering extra power losses due to the auxiliary inverter. In spite of its advantageous features, the asymmetrical hybrid multi-level rectifier topology is a quite complex system, which requires suitable mathematical tools for control and optimization purposes. This paper intends to be a step in this direction by deriving an averaged-value mathematical model of the whole system, which is validated through comparison with other modeling approaches and experimental results. The paper is mainly focused on applications in the field of electrical power generation; however, the converter structure can be also exploited in a variety of grid-connected applications by replacing the generator with a transformer featuring an open-end secondary winding arrangement.

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11

Boopathy, C. P., and M. Kaliamoorthy. "A Novel Asymmetrical Single-Phase Multilevel Inverter Suitable for Hybrid Renewable Energy Sources." Circuits and Systems 07, no. 06 (2016): 932–45. http://dx.doi.org/10.4236/cs.2016.76079.

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12

Malathy, S., and R. Ramaprabha. "Suitability of Asymmetrical Multilevel Inverters for Partial Shaded Photovoltaic Systems." Applied Mechanics and Materials 622 (August 2014): 173–79. http://dx.doi.org/10.4028/www.scientific.net/amm.622.173.

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The efficiency of building integrated photovoltaic (PV) system is greatly affected by the partial shaded conditions. The impact of shading conditions depends not only on the level of shading but also on other factors like array size, type of configuration adopted, pattern and intensity of the shade. The influence of partial shading is much pronounced in series configuration than any other types due to the absence of cross ties. Unless protected by bypass diodes, the thermal stress across the panel increases under shaded conditions and eventually leads to the development of hot spots that can damage the shaded panel permanently. Bypass diode totally isolates the shaded panel from the rest of the of the array leaving the array underutilized. To address this issue, this paper proposes repositioning of the panels to distribute the shade uniformly all over the array. Besides, a hybrid asymmetric multilevel inverter is proposed for power conversion.

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13

Sandirasegarane, Thamizharasan, J. Maalmarugan, and C. Krishnakumar. "Hybrid PWM modulated cross switched asymmetrical multilevel inverter with reduced number of conducting devices." International Journal of Power Electronics 13, no. 2 (2021): 166. http://dx.doi.org/10.1504/ijpelec.2021.112984.

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14

Maalmarugan, J., C. Krishnakumar, and Thamizharasan Sandirasegarane. "Hybrid PWM modulated cross switched asymmetrical multilevel inverter with reduced number of conducting devices." International Journal of Power Electronics 13, no. 2 (2021): 166. http://dx.doi.org/10.1504/ijpelec.2021.10034216.

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15

Esmailzadeh, Rasool, A. Ajami, and M. R. Banaei. "Neoteric Hybrid Multilevel Cascade Inverter Based on Low Switch Numbers Along with Low Voltage Stress: Design, Analysis, Verification." Indonesian Journal of Electrical Engineering and Computer Science 8, no. 1 (October 1, 2017): 92. http://dx.doi.org/10.11591/ijeecs.v8.i1.pp92-100.

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Abstract: With the purpose of rein in the high voltage of flexible power systems, renovation and amendment of multi-level structures aimed at acquisition of high quality voltage is certainly required. In this regard, robust topology must be occupied that encompass the maximum output voltage levels along with minimum of switch number, of course, with taking into account of Peak Inverse Voltage (PIV). In this paper, a neoteric high-performance multilevel cascaded inverter is suggested up to the problem of repetitive output levels to be unraveled and also number of output voltage levels to be maximized. It has been constructed by series-connected multilevel inverters blocks and three-level inverter. The simulation results along with experimental results extracted by manufactured prototype have transparently approved high efficiency of proposed inverter as well as its feasibility. Apart from above, new mathematical approach has been presented to calculate and define the DC voltage sources magnitudes in asymmetric converter.

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16

Foti, Salvatore, Salvatore De Caro, Giacomo Scelba, Tommaso Scimone, Antonio Testa, Mario Cacciato, and Giuseppe Scarcella. "An Optimal Current Control Strategy for Asymmetrical Hybrid Multilevel Inverters." IEEE Transactions on Industry Applications 54, no. 5 (September 2018): 4425–36. http://dx.doi.org/10.1109/tia.2018.2832024.

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17

Javier, Perez R., Beristain J. Jose A., Hernandez L. Jesus H., and Urquijo R. Francisco R. "Hybrid Modulation Strategy for Asymmetrical Cascade H-Bridge Multilevel Inverters." IEEE Latin America Transactions 16, no. 6 (June 2018): 1623–30. http://dx.doi.org/10.1109/tla.2018.8444158.

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18

Zambra, Diorge A. B., Cassiano Rech, and José Renes Pinheiro. "Comparison of Neutral-Point-Clamped, Symmetrical, and Hybrid Asymmetrical Multilevel Inverters." IEEE Transactions on Industrial Electronics 57, no. 7 (July 2010): 2297–306. http://dx.doi.org/10.1109/tie.2010.2040561.

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19

Feyrouz Abdelgoui, Rim, Rachid Taleb, Abderrahim Bentaallah, and Fayçal Chabni. "Improved hybrid algorithm based on GA and local search method for asymmetrical 9-level inverter." Indonesian Journal of Electrical Engineering and Computer Science 21, no. 3 (March 10, 2021): 1309. http://dx.doi.org/10.11591/ijeecs.v21.i3.pp1309-1316.

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<span id="docs-internal-guid-09d7eb9c-7fff-b2fc-ebd1-1a60862765dc"><span>Selective Harmonic elimination has emerged as an in-depth research method to replace traditional PWM technology. This study demonstrates the selective harmonic elimination by using a hybrid Genetic algorithm GA and local search (GA-LS) method of a uniform asymmetric multilevel inverter called USAMI That removes the higher-order harmonics defined while maintaining the fundamental voltage needed. This new technology can be implemented at any USAMI level. For example, in this article, we plan to use USAMI at 9 levels and find the optimal switching angle to remove the 5</span><span><span>th</span></span><span>, 7</span><span><span>th</span></span><span>, and 11</span><span><span>th</span></span><span> harmonics. </span></span>

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20

Banaei, M. R., and A. Fazel Bakhshayesh. "Selection of DC voltage magnitude using Fibonacci series for new hybrid asymmetrical multilevel inverter with minimum PIV." Alexandria Engineering Journal 53, no. 3 (September 2014): 529–35. http://dx.doi.org/10.1016/j.aej.2014.06.008.

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21

Kumar, Sanjeev, H. K. Verma, and M. P. S. Chawla. "A Hybrid Self-Voltage Balanced Multilevel Inverter Topologies for Induction Motors." International Journal of Emerging Science and Engineering 7, no. 4 (November 30, 2021): 1–8. http://dx.doi.org/10.35940/ijese.e2517.117421.

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A hybrid structured asymmetric switching capacitor multilevel inverter (ASC-MLI) is suggested in this work. The notion behind presenting this topology is to reduce the device count and DC sources as compared with conventional MLI. The step by step operating mode of single phase ASC-MLI is presented and by doing slight modifications the same configuration is used in three phase utility application and electric drive. The proposed configurations utilize major benefits of self-voltage balancing capability of capacitor voltage, which is independent from different load type and modulations index. To generate the switching pulse for corresponding switches the multi-carrier based sinusoidal pulse width modulation (MCS-PWM) technique is used; in addition to this simulation result are obtained using MATLAB/Simulink 2016b software version. Simulation results of an induction motor drive connected as three phase load highlights good performance of 17-level MLI.

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Mariethoz, Sebastien. "Design and Control of High-Performance Modular Hybrid Asymmetrical Cascade Multilevel Inverters." IEEE Transactions on Industry Applications 50, no. 6 (November 2014): 4018–27. http://dx.doi.org/10.1109/tia.2014.2322133.

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23

Sunddararaj, Suvetha Poyyamani, Shriram Srinivasarangan Rangarajan, and Subashini N. "An Extensive Review of Multilevel Inverters Based on Their Multifaceted Structural Configuration, Triggering Methods and Applications." Electronics 9, no. 3 (March 5, 2020): 433. http://dx.doi.org/10.3390/electronics9030433.

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Power electronic converters are used to transform one form of energy to another. They are classified into four types depending upon the nature of the input and output voltages. The inverter is one among those types; it converts direct electrical current into alternating electrical current at desired frequency. Conventional types of inverters are capable of producing voltage at the output terminal that can only switch between two levels. The range of output voltage generated at the output is low when they are used for high power applications. To improve the voltage profile and efficiency of the overall system, multilevel inverters (MLIs) are introduced. In multilevel inverters the voltage at the output terminal is generated from several DC voltage levels fed at its input. The generated output is more appropriate to a sine wave and the dv/dt rating is also less leading to the reduction in EMI. Though they possess many advantages compared to the conventional inverters, the structural complexity and triggering techniques involved in designing multilevel inverters are high. Many studies are being carried out in defining new topologies of MLI with reduced switch as well as with the implementation of different PWM techniques. This paper will provide an extensive review on variety of MLI configurations based on the parameters such as the number of switches, switching techniques, symmetric, asymmetric, hybrid topologies, configurations based on applications, THD and power quality.

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Suresh, Y., J. Venkataramanaiah, Anup Kumar Panda, C. Dhanamjayulu, and P. Venugopal. "Investigation on cascade multilevel inverter with symmetric, asymmetric, hybrid and multi-cell configurations." Ain Shams Engineering Journal 8, no. 2 (June 2017): 263–76. http://dx.doi.org/10.1016/j.asej.2016.09.006.

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Veenstra, M., and A. Rufer. "Control of a Hybrid Asymmetric Multilevel Inverter for Competitive Medium-Voltage Industrial Drives." IEEE Transactions on Industry Applications 41, no. 2 (March 2005): 655–64. http://dx.doi.org/10.1109/tia.2005.844382.

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26

Majdoul, Radouane, Abelwahed Touati, Abderrahmane Ouchatti, Abderrahim Taouni, and Elhassane Abdelmounim. "Improved 25-level inverter topology with reduced part count for PV grid-tie applications." International Journal of Power Electronics and Drive Systems (IJPEDS) 12, no. 3 (September 1, 2021): 1687. http://dx.doi.org/10.11591/ijpeds.v12.i3.pp1687-1698.

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<span lang="EN-US">A new bidirectional multilevel inverter topology with a high number of voltage levels with a very reduced number of power components is proposed in this paper. Only TEN power switches and four asymmetric DC voltage sources are used to generate 25 voltage levels in this new topology. The proposed multilevel converter is more suitable for e-mobility and photovoltaic applications where the overall energy source can be composed of a few units/associations of several basic source modules. Several benefits are provided by this new topology: Highly sinusoidal current and voltage waveforms, low Total Harmonic Distortion, very low switching losses, and minimum cost and size of the device. For optimum control of this 25-level voltage inverter, a special Modified Hybrid Modulation technique is performed. The proposed 25-level inverter is compared to various topologies published recently in terms of cost, the number of active power switches, clamped diodes, flying capacitors, DC floating capacitors, and the number of DC voltage sources. This comparison clearly shows that the proposed topology is cost-effective, compact, and very efficient. The effectiveness and the good performance of the proposed multilevel power converter (with and without PWM control) are verified and checked by computational simulations.</span>

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Venkataramanaiah, J., Y. Suresh, and Anup Kumar Panda. "A review on symmetric, asymmetric, hybrid and single DC sources based multilevel inverter topologies." Renewable and Sustainable Energy Reviews 76 (September 2017): 788–812. http://dx.doi.org/10.1016/j.rser.2017.03.066.

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Manoharan, Mohana Sundar, Ashraf Ahmed, and Joung-Hu Park. "A PV Power Conditioning System Using Nonregenerative Single-Sourced Trinary Asymmetric Multilevel Inverter With Hybrid Control Scheme and Reduced Leakage Current." IEEE Transactions on Power Electronics 32, no. 10 (October 2017): 7602–14. http://dx.doi.org/10.1109/tpel.2016.2632864.

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Bhaskar, K. B., A. Vijayaprabhu, R. Kumaresan, and E. Kokila. "Design and Implementation of Hybrid Asymmetric 15-Level Cascaded Modified H-Bridge Multilevel Inverter(CMHB-MLI) to reduce the Total Harmonics Distortion." IOP Conference Series: Materials Science and Engineering 1177, no. 1 (August 1, 2021): 012005. http://dx.doi.org/10.1088/1757-899x/1177/1/012005.

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V., Arun, and Prabaharan N. "Micro controller based asymmetrical multilevel inverter." IAES International Journal of Robotics and Automation (IJRA) 8, no. 1 (March 1, 2019): 18. http://dx.doi.org/10.11591/ijra.v8i1.pp18-25.

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This paper presents the Asymmetrical multilevel inverter with 1:3 voltage propagation. Switching pulse for Asymmetrical multilevel inverter are generated using embedded controller in m-file using MATLAB. The Asymmetrical multilevel inverter with 1:3 voltage propagation can produce high quality output voltage with less number of switches and voltage sources compare to conventional multilevel inverters. Contrasting other switching schemes, the proposed Switching scheme significantly reduces the Total Harmonic Distortion (THD) and minimize switching losses and reduces the complexity. To evaluate the developed scheme, simulations are carried out through MATLAB and real time implementations are done through microcontroller ARM Cortex™-M0 Core. The simulation and hardware results are presented.

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31

Yatim, M. H., A. Ponniran, M. A. Zaini, M. S. Shaili, N. A. S. Ngamidun, A. N. Kasiran, A. A. Bakar, and J. N. Jumadril. "Symmetrical and Asymmetrical Multilevel Inverter Structures with Reduced Number of Switching Devices." Indonesian Journal of Electrical Engineering and Computer Science 11, no. 1 (July 1, 2018): 144. http://dx.doi.org/10.11591/ijeecs.v11.i1.pp144-151.

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The purpose of this study is to analyze the operation and design of symmetrical and asymmetrical multilevel inverter structures with reduced number of switching devices. In this study, the term of conventional inverter is defined as a single cascaded inverter. Specifically, the inverter operates in three complete loops and only produces 2-level and 3-level of output voltages. Usually, cascaded structure suffers from the high total harmonic distortion. Thus, by considering multilevel structure of inverter, low total harmonic distortion reduction and voltage stress reduction on switching devices can be archived. Sinusoidal pulse width modulation and modified square pulse width modulation are used as modulation techniques in switching schemes of the designed multilevel inverters. The findings indicate that, the designed multilevel structure cause low total harmonics distortion at the output voltage. Furthermore, the asymmetrical structure is producing the same output voltage levels with reduced number of switching devices compared to the symmetrical structure is experimentally confirmed. The findings show that the total harmonic distortion for 7-level (symmetrical) and 9-level (asymmetrical) are 16.45% and 15.22%, respectively.

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H P, Manoj. "A 129-level Asymmetrical Cascaded H-Bridge Multilevel Inverter with Reduced Switches and Low THD." International Journal for Research in Applied Science and Engineering Technology 9, no. 8 (August 31, 2021): 1982–89. http://dx.doi.org/10.22214/ijraset.2021.37697.

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Abstract: The multilevel inverter is a power conversion device which is uses multiple dc sources to provide required alternating current level. It is can be used for medium to high power applications. This paper presents a 129 level asymmetrical cascaded Hbridge multilevel inverter with reduced switching components and higher THD. The proposed inverter uses multiple dc sources with voltage ratio 1:1:2:4:8:16:32. The proposed inverter uses voltage reference technique to control the switching components of the topology. The comparative analysis of 129 level ASCHBMLI and conventional inverter topologies have been presented. The main advantages of the proposed topology is lower switching components, lower losses, and lower THD without the need of filter. MATLAB/SIMULINK software is used to perform simulation and analyse the performance of the proposed topology. Keywords: Multilevel Inverter (MLI), Asymmetrical Cascaded H Bridge Multilevel Inverter (ASCHBMLI), Cascaded H Bridge (CHB), MATLAB, Total Harmonic Distortion (THD).

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Das, Madan Kumar, Akanksha Sinha, and Kartick Chandra Jana. "A Novel Asymmetrical Reduced Switch Nine-Level Inverter." Journal of Circuits, Systems and Computers 29, no. 08 (September 25, 2019): 2050117. http://dx.doi.org/10.1142/s0218126620501170.

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A novel asymmetrical nine-level inverter topology using only six switches along with its generalized structure are presented in this paper. The proposed reduced switch multilevel inverter topology makes use of a lower total standing voltage for a required output voltage as compared to the existing ones. One of the major advantages of the proposed multilevel inverter over other existing topologies is that, the circuit can be extended to a higher-level inverter, by cascading a few proposed inverter modules and can also be extended to the three-phase structure very easily, thereby making the inverter structure simple. In addition to this, the proposed inverter module does not require any additional H-bridge circuit to obtain the negative voltage levels for AC voltage, resulting in reduced voltage stress on the switches. This paper also incorporates an effective technique to determine the total standing voltage as well as the switching and conduction losses of the inverter. The MATLAB/Simulink based proposed nine-level as well as an 81-level inverters are modeled and the simulation results are presented. An experimental prototype of nine-level inverter using six switches is developed and tested to validate the simulation results.

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Hussan, Md Reyaz, Adil Sarwar, Marif Daula Siddique, Atif Iqbal, and Basem Alamri. "A Cross Connected Asymmetrical Switched-Capacitor Multilevel Inverter." IEEE Access 9 (2021): 96416–29. http://dx.doi.org/10.1109/access.2021.3093826.

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35

Liu, Junfeng, Jialei Wu, and Jun Zeng. "Symmetric/Asymmetric Hybrid Multilevel Inverters Integrating Switched-Capacitor Techniques." IEEE Journal of Emerging and Selected Topics in Power Electronics 6, no. 3 (September 2018): 1616–26. http://dx.doi.org/10.1109/jestpe.2018.2848675.

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Lai, Y. S., and F. S. Shyu. "Topology for hybrid multilevel inverter." IEE Proceedings - Electric Power Applications 149, no. 6 (2002): 449. http://dx.doi.org/10.1049/ip-epa:20020480.

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37

Nagaraju, Motaparthi, and Malligunta Kiran Kumar. "Analysis of series/parallel multilevel inverter with symmetrical and asymmetrical configurations." International Journal of Power Electronics and Drive Systems (IJPEDS) 10, no. 1 (March 1, 2019): 300. http://dx.doi.org/10.11591/ijpeds.v10.i1.pp300-306.

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<p>Usage of high power and medium voltage applications in domestic and industrial purpose has been increased in the recent years. Also, the penetration of renewable energy sources is increasing rapidly. To make use the renewable energy sources there is a need of using inverters. The basic inverter is conventional two level inverter which produces the square wave output voltage. The major drawback of conventional inverter is it contains more harmonics. Therefore, multilevel inverters have been introduced with staircase output voltage waveform. Lot of multilevel inverter topologies have been developed and cascaded H bridge type is the more frequently used. But, it requires more number of switches for higher output voltage level. In this paper, a novel 7 level asymmetrical multilevel inverter topology is proposed with less number of switches. This proposed topology is compared with already existing topology. The simulation of circuit and result analysis of the circuit is carried out by using Matlab/simulink software. The comparison between existing topology and proposed topology is given. The results are discussed and presented.</p>

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38

Balaji, V., Uppili Subha, and G. Joga Rao. "A Reduced Switch Count Seven Level Symmetrical Inverter with Low Distortion." International Journal of Recent Technology and Engineering (IJRTE) 10, no. 2 (July 30, 2021): 181–86. http://dx.doi.org/10.35940/ijrte.b6032.0710221.

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Various types of new structures in multilevel inverters are evolving day by day. One among those is the reduced switch count type multilevel inverters. This inverter consists of low number of switches, gate driver components, and other switches like auxiliary switches. Depending on the value of the voltage sources we have symmetrical and asymmetrical multilevel inverters. In this paper, the seven level symmetrical inverter design is shown for seven levels in its output. The output voltage waveform is plotted and its FFT is performed and the THD values are shown. The inverter is simulated in SIMULINK software. Index Terms: Seven level MLI, inverter, and Modular Inverter.

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Tamilarasi, D., and T. S. Sivakumaran. "Analysis of Symmetrical and Asymmetrical Current Source Multilevel Inverter." Circuits and Systems 07, no. 11 (2016): 3469–84. http://dx.doi.org/10.4236/cs.2016.711295.

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Singh, Varsha, Swapnajit Pattnaik, Shubhrata Gupta, and Bokam Santosh. "A Single-Phase Cell-Based Asymmetrical Cascaded Multilevel Inverter." Journal of Power Electronics 16, no. 2 (March 20, 2016): 532–41. http://dx.doi.org/10.6113/jpe.2016.16.2.532.

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41

Singh,, Suman, Mohit Jain, and Anuradha Singh. "Performance Evaluation of Asymmetrical Cascaded H-Bridge Multilevel Inverter." International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering 04, no. 01 (January 20, 2015): 222–31. http://dx.doi.org/10.15662/ijareeie.2015.0401034.

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42

Belkamel, Hamza, Saad Mekhilef, Ammar Masaoud, and Mohsen Abdel Naeim. "Novel three‐phase asymmetrical cascaded multilevel voltage source inverter." IET Power Electronics 6, no. 8 (September 2013): 1696–706. http://dx.doi.org/10.1049/iet-pel.2012.0508.

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Gowrishankar, J., G. Balasundaram, R. JayaKishore, and J. Belwin Edwardd. "Symmetrical and asymmetrical cascaded multilevel inverter for photovoltaic system." International Journal of Engineering & Technology 7, no. 4.5 (September 22, 2018): 732. http://dx.doi.org/10.14419/ijet.v7i4.5.25071.

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The manuscript should contain an abstract. The abstract should be self-contained and citation-free and should not exceed 200 words. The abstract should state the purpose, approach, results and conclusions of the work. The author should assume that the reader has some knowledge of the subject but has not read the paper. Thus, the abstract should be intelligible and complete in it-self (no numerical references); it should not cite figures, tables, or sections of the paper. The abstract should be written using third person instead of first person.

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Thiyagarajan, V., P. Somasundaram, and K. Ramash Kumar. "Simulation and Analysis of Novel Extendable Multilevel Inverter Topology." Journal of Circuits, Systems and Computers 28, no. 06 (June 12, 2019): 1950089. http://dx.doi.org/10.1142/s0218126619500890.

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Multilevel inverter (MLI) has become more popular in high power, high voltage industries owing to its high quality output voltage waveform. This paper proposes a novel single phase extendable type MLI topology. The term ‘extendable’ is included since the presented topology can be extended with maximum number of dc voltage sources to synthesize larger output levels. This topology can be operated in both symmetrical and asymmetrical conditions. The major advantages of the proposed inverter topology include minimum switching components, reduced gate driver circuits, less harmonic distortion and reduced switching losses. The comparative analysis based on the number of switches, dc voltage sources and conduction switches between the proposed topology and other existing topologies is presented in this paper. The comparison results show that the proposed inverter topology requires fewer components. The performance of the proposed MLI topology has been analyzed in both symmetrical and asymmetrical conditions. The simulation model is developed using MATLAB/SIMULINK software to verify the performance of the proposed inverter topology and also the feasibility of the presented topology during the symmetrical condition has been validated experimentally.

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45

Bharatiraja, C., Harshavardhan Reddy, Sunkavalli Satya Sai Suma, and N. SriRamsai. "FPGA Based Design and Validation of Asymmetrical Reduced Switch Multilevel Inverter." International Journal of Power Electronics and Drive Systems (IJPEDS) 7, no. 2 (June 1, 2016): 340. http://dx.doi.org/10.11591/ijpeds.v7.i2.pp340-348.

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This paper proposes a new Asymmetrical multilevel inverter topology with reduced number of switches. This topology is superior to the existing multilevel inverter (MLI) conﬁgurations in terms of lower total harmonic distortion (THD) value and lower cost. The idea incorporates a new module setup comprising of four different voltage sources having voltage output levels in a specific ratio. The proposed topology uses a novel pulse width modulation (PWM) technique (as presented) to control the gating pulses. The operation is simulated using MATLAB/SIMULINK and its results are validated through FPGA Spartan 3 based hardware prototype inverter (using three voltage sources to produce a 7 level output, which may be extended to 15 level). The circuit complexity is drastically reduced and it is suitable for medium and high power applications. THD for the output is quite low when compared with the conventional inverter.

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Susheela, Nunsavath. "Comparative Analysis of Carrier based techniques for Single phase Diode Clamped MLI and Hybrid inverter with reduced components." Indonesian Journal of Electrical Engineering and Computer Science 7, no. 3 (September 1, 2017): 687. http://dx.doi.org/10.11591/ijeecs.v7.i3.pp687-697.

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<p>The multilevel inverters have highly desirable characteristics in high power high voltage applications. The multilevel inverter was started first with diode clamped multilevel inverter. Later, various configurations have been came into existence for many applications. However the multilevel inverters have some demerits such as requiring higher number of components, PWM control method is complex and capacitor voltage balancing problem. The hybrid multilevel inverter presented in this paper has superior characteristics over conventional multilevel inverters. The hybrid multilevel inverter employs fewer components and less carrier signals when compared to conventional multilevel inverters. It consists of level generation and polarity generation stages which involves high frequency and low frequency switches. The complexity and overall cost for higher output voltage levels are greatly reduced. Implementation of single phase 7-level, 9-level and 11-level diode clamped multilevel inverter and hybrid multilevel inverter has been performed using sinusoidal pulse width modulation (SPWM) strategies i.e., phase disposition (PD), alternate phase opposition disposition (APOD). Also these techniques are compared in terms of total harmonic distortion (THD) for various modulation indices and observed to be greatly improved in case of hybrid inverter when compared to diode clamped inverter. The comparative study of performance for single phase diode clamped multilevel inverter and hybrid inverter is analyzed with different loads. Simulation is performed using MATLAB/ SIMULINK. </p>

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Oskuee, Mohammad Reza Jannati, Sahar Khalilnasab, Sajad Najafi Ravadanegh, and Gevork B. Gharehpetian. "Reduction of Circuit Devices in Developed Symmetrical/Asymmetrical Multilevel Converters." Journal of Circuits, Systems and Computers 25, no. 04 (February 2, 2016): 1650020. http://dx.doi.org/10.1142/s0218126616500201.

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In this paper, a developed configuration for multilevel voltage source inverters (MVSIs) is proposed. The proposed topology can be used as symmetric and asymmetric inverters. In asymmetric mode, DC source magnitudes are defined in a way that the number of output levels gets more than the case when the symmetrical DC sources are applied. In this regard, to calculate the required magnitudes of DC voltage sources several different solutions are proposed. In multilevel inverters, the overall costs, circuit size and installation area, complexity of control scheme and reliability are directly dependent on the number of circuit devices needed. The provided comparison study among suggested inverter in all defined solutions, cascaded H-bridge (CHB) and recently proposed converters, validates that the proposed inverter uses reduced number of circuit devices. The given simulation results confirm the feasibility of the proposed modular structure. Also, to approve the practicability of the proposed inverter, a prototype of the proposed topology has been implemented. Finally, simulation and experimental results are compared with each other and the provided comparison shows that the obtained results are in good agreements.

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48

Sathish Kumar, S., R. Ramkumar, S. Sivarajeswari, D. Ramya, T. Subburaj, and Martin Sankoh. "Performance Enhancement of a Three Phase Boost-Cascaded Fifteen Level Inverter Using the PI Controller." Mathematical Problems in Engineering 2022 (May 19, 2022): 1–17. http://dx.doi.org/10.1155/2022/3888571.

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Photovoltaic power generation is a potential alternative energy source that offers several benefits over other alternative energy sources such as wind, sun, ocean, biomass, geothermal, and so on. Multilevel inverters are essential for power conversion in solar power generation. These multilevel inverters employ three distinct topologies: diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter, and cascaded H-bridge multilevel inverter. The cascaded H-bridge multilevel inverter is more appropriate for photovoltaic applications than the other two topologies. The proposed system asymmetrical cascaded multilevel inverter (ACMLI) is energized using a photovoltaic system (PV). A three-phase cascaded H-bridge fifteen-level inverter for grid-connected solar systems is given in this study utilizing a proportional integral controller. The harmonic distortion was removed using a multicarrier pulse width modulation method. The MATLAB/Simulink is used to simulate the performance of a three-phase cascaded H-bridge fifteen-level inverter in terms of harmonic content and number of switches. To test the performance of the designed system, a hardware prototype was created. From the obtained results, the proposed method reduces the switch count, harmonic distortion, and rejects the external disturbances of input and output variables.

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Prabaharan, Nataraj, V. Arun, Padmanaban Sanjeevikumar, Lucian Mihet-Popa, and Frede Blaabjerg. "Reconfiguration of a Multilevel Inverter with Trapezoidal Pulse Width Modulation." Energies 11, no. 8 (August 17, 2018): 2148. http://dx.doi.org/10.3390/en11082148.

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This paper presents different multi-carrier unipolar trapezoidal pulse width modulation strategies for a reduced switch asymmetrical multilevel inverter. The different strategies are phase disposition, alternative phase opposition and disposition, and carrier overlapping and variable frequency that involve triangular waves as carriers with a unipolar trapezoidal wave as a reference. The reduced switch, asymmetrical multilevel inverter operation was examined for generating the seven-level output voltage using Matlab/Simulink 2009b and the results were verified with a real-time laboratory-based experimental setup using a field-programmable gate array. Different parameter analyses, such as total harmonic distortion, fundamental root mean square voltage, and distortion factor, were analyzed with different modulation indices to investigate the performance of the selected topology. Unipolar trapezoidal pulse width modulation provides a higher root mean square voltage value.

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Taleb, Rachid, M’hamed Helaimi, Djilali Benyoucef, and Zinelaabidine Boudjema. "Genetic Algorithm Application in Asymmetrical 9-Level Inverter." International Journal of Power Electronics and Drive Systems (IJPEDS) 7, no. 2 (June 1, 2016): 521. http://dx.doi.org/10.11591/ijpeds.v7.i2.pp521-530.

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Selective harmonic elimination (SHE) has been a widely researched alternative to traditional PWM techniques. This paper presents the selective harmonic elimination of a uniform step asymmetrical multilevel inverter (USAMI) using genetic algorithm (GA) which eliminates specified higher order harmonics while maintaining the required fundamental voltage. This technique can be applied to USAMI with any number of levels. As an example, in this paper a 9-level USAMI is considered and the optimum switching angles are calculated to eliminate the 5th, 7th and 11th harmonics.

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