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1

Akansha, Ephraim* Neelesh Agrawal Anil Kumar A.K. Jaiswal. "STUDY OF ELECTRICAL CHARACTERISTIC OF NEW P-TYPE TRENCHED UMOSFET." Global Journal of Engineering Science and Research Management 4, no. 8 (2017): 20–25. https://doi.org/10.5281/zenodo.841194.

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In this paper p-type trenched UMOSFET was designed without super junction and constructed like any other conventional MOSFET. Characteristic curve was studied between drain current verses drain voltage and drain current verses gate voltage. The trench was designed under TCAD simulation tool Silvaco software using etching process. The specific channel length of the p-type UMOSFET has been concentrated as 0.9 microns. The device structures are designed using Silvaco Athena and characteristics were examined using Silvaco Atlas.
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2

Kløw, Frode, Erik S. Marstein, and Sean Erik Foss. "Tunneling Contact Passivation Simulations using Silvaco Atlas." Energy Procedia 77 (August 2015): 99–105. http://dx.doi.org/10.1016/j.egypro.2015.07.015.

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3

Stęszewski, Jędrzej, Andrzej Jakubowski, and Michael L. Korwin-Pawlowski. "Comparison of 4H-SiC and 6H-SiC MOSFET I-V characteristics simulated with Silvaco Atlas and Crosslight Apsys." Journal of Telecommunications and Information Technology, no. 3 (June 25, 2023): 93–95. http://dx.doi.org/10.26636/jtit.2007.3.837.

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A set of physical models describing silicon carbide with fitting parameters is proposed. The theoretical I-V output and transfer characteristics and parameters of MOS transistors were calculated using Silvaco Atlas and Crosslight Apsys semiconductor device simulation environments
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4

Taouririt, Taki Eddine, Afak Meftah, Nouredine Sengouga, Marwa Adaika, Slimane Chala, and Amjad Meftah. "Effects of high-k gate dielectrics on the electrical performance and reliability of an amorphous indium–tin–zinc–oxide thin film transistor (a-ITZO TFT): an analytical survey." Nanoscale 11, no. 48 (2019): 23459–74. http://dx.doi.org/10.1039/c9nr03395e.

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This study is a numerical simulation obtained by using Silvaco Atlas software to investigate the effect of different types of dielectric layers, inserted between the channel and the gate, on the performance and reliability of an a-ITZO TFT.
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5

Parajuli, D., Deb Kumar Shah, Devendra KC, Subhash Kumar, Mira Park, and Bishweshwar Pant. "Influence of Doping Concentration and Thickness of Regions on the Performance of InGaN Single Junction-Based Solar Cells: A Simulation Approach." Electrochem 3, no. 3 (2022): 407–15. http://dx.doi.org/10.3390/electrochem3030028.

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The impact of doping concentration and thickness of n-InGaN and p-InGaN regions on the power conversion efficiency of single junction-based InGaN solar cells was studied by the Silvaco ATLAS simulation software. The doping concentration 5 × 1019 cm−3 and 1 × 1015 cm−3 were optimized for n-InGaN and p-InGaN regions, respectively. The thickness of 300 nm was optimized for both n-InGaN and p-InGaN regions. The highest efficiency of 22.17% with Jsc = 37.68 mA/cm2, Voc = 0.729 V, and FF = 80.61% was achieved at optimized values of doping concentration and thickness of n-InGaN and p-InGaN regions of InGaN solar cells. The simulation study shows the relevance of the Silvaco ATLAS simulation tool, as well as the optimization of doping concentration and thickness of n- and p-InGaN regions for solar cells, which would make the development of high-performance InGaN solar cells low-cost and efficient.
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6

Islam, Md Rabiul, Md Kamrul Hasan, Md Abdul Mannan, M. Tanseer Ali, and Md Rokib Hasan. "Gate Length Effect on Gallium Nitride Based Double Gate Metal-Oxide-Semiconductor Field-Effect Transistor." AIUB Journal of Science and Engineering (AJSE) 18, no. 2 (2019): 73–80. http://dx.doi.org/10.53799/ajse.v18i2.43.

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We have investigated the performance of Gallium Nitride (GaN) based Double-Gate (DG) Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET). Atlas Device Simulation Framework -Silvaco has been used to access Non-Equilibrium Green Function to distinguish the transfer characteristics curve, ON state current (ION), OFF-state current (IOFF), Drain Induced Barrier Lowering (DIBL), Subthreshold Swing, Electron Current Density, Conduction Band Energy and Electric Field. The concept of Solid state device physics on the effect of gate length studied for the next generation logic applications. GaN-based DG MOSFETs shows better performance than Si-based Single gate MOSFETs. The proposed device has drawn the attention over conventional SG-MOSFET due to fas switching performance. The device turn on and turn off voltage is respectively VGS=1V(On state) and VGS-0V(OFF State). To validate our simulation tool and model results, previous research model has been investigated using Silvaco Atlas and the results obtained are compared to the previous results.
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7

Иванов, П. А., А. С. Потапов та Т. П. Самсонова. "Моделирование переходных процессов в полупроводниковых приборах на основе 4H-SiC (учет неполной ионизации легирующих примесей в модуле ATLAS программного пакета SILVACO TCAD)". Физика и техника полупроводников 53, № 3 (2019): 407. http://dx.doi.org/10.21883/ftp.2019.03.47295.9014.

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AbstractTransient process in a resistor–capacitor (RC) circuit with a reverse-biased 4 H -SiC p – n diode as the capacitive element is simulated. Simulation is performed with the ATLAS software module from the SILVACO TCAD system for technology computer-aided design (TCAD). An alternative way, to that in ATLAS, to set the parameters of doping impurities partly ionized in 4 H -SiC at room temperature is suggested. (The INCOMPLETE physical model available in the ATLAS module, which describes the incomplete ionization of doping impurities in semiconductors, is unsuitable for simulating the dynamic characteristics of devices.) The simulation results are discussed in relation to previously obtained experimental results.
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8

A. Z. Djennati, S. Kerai, and M. Khaouani. "HTL material variation of Graphene/ITO/TiO2/MAPbI3/spiro-OMeTAD solar cells under high temperature effect." International Journal of Nanoelectronics and Materials (IJNeaM) 17, no. 3 (2024): 446–51. http://dx.doi.org/10.58915/ijneam.v17i3.1167.

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Perovskite-based solar cells have recently gained attention as a potentially viable option to replace conventional photovoltaic technologies, offering high efficiency and low cost. In this work, we present a numerical simulation of ITO/TiO2/MAPbI3/OMeTAD solar cell under Silvaco TCAD Tools; the devices exhibit a high efficiency of 27.42 %, 0.3 A/W spectral response at 580 nm optical wavelength. The device is studied under different parameter variations such as: HLT material variation (spiro-OMeTAD, Silicon,PEDOT:PSS and carbon fiber), doping effect of the Sprio layer on IV curves and performance under temperature variation (25-300 ͦC). Overall, this study highlights the potential of perovskite materials in the development of photovoltaic technologies and the accuracy of Silvaco-Atlas in predicting their performance and efficiency
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9

Cazarre, A., N. Nolhier, F. Morancho, P. Austin, and P. Calmon. "Initiation à la simulation bidimensionnelle Environnement SILVACO ( ATHENA - ATLAS)." J3eA 4 (2005): 003. http://dx.doi.org/10.1051/j3ea:200515.

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10

Munir, Tarriq, Azlan Abdul Aziz, Mat Johar Abdullah, and Mohd Fadzil Ain. "Temperature Dependent DC and RF Performance of n-GaN Schottky Diode: A Numerical Approach." Advanced Materials Research 895 (February 2014): 439–43. http://dx.doi.org/10.4028/www.scientific.net/amr.895.439.

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This paper reports the temperature dependent DC and RF characteristics of n-GaN Schottky diode simulated using Atlas/Blaze developed by Silvaco. It was found that as the temperature increases from 300K to 900K the forward current decreases due to lowering of the Schottky barrier with an increase in series-resistance and ideality factor. These observations indicates that tunneling behavior dominates the current flow rather than thermionic emission. Furthermore, the breakdown voltage decreases in reverse bias and insertion loss for RF behavior increases with respect to temperature due to the increase in capacitance near diode junction.Keywords: Atlas/Blaze, Schottky barrier, series resistance, ideality factor, insertion loss.
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11

Rolland, Gwen, Christophe Rodriguez, Guillaume Gommé, et al. "High Power Normally-OFF GaN/AlGaN HEMT with Regrown p Type GaN." Energies 14, no. 19 (2021): 6098. http://dx.doi.org/10.3390/en14196098.

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In this paper is presented a Normally-OFF GaN HEMT (High Electron Mobility Transistor) device using p-doped GaN barrier layer regrown by CBE (Chemical Beam Epitaxy). The impact of the p doping on the device performance is investigated using TCAD simulator (Silvaco/Atlas). With 4E17 cm−3 p doping, a Vth of 1.5 V is achieved. Four terminal breakdowns of the fabricated device are investigated, and the origin of the device failure is identified.
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12

Boukortt, N., S. Patanè, and B. Hadri. "Development of High-Efficiency PERC Solar Cells Using Atlas Silvaco." Silicon 11, no. 1 (2018): 145–52. http://dx.doi.org/10.1007/s12633-018-9838-8.

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13

DWIVEDI, A. D. D., and POOJA KUMARI. "TCAD SIMULATION AND PERFORMANCE ANALYSIS OF SINGLE AND DUAL GATE OTFTs." Surface Review and Letters 27, no. 05 (2019): 1950145. http://dx.doi.org/10.1142/s0218625x19501452.

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This paper presents finite element-based numerical simulation and performance analysis of dual and single gate pentacene-based organic thin film transistors (OTFTs) using technology computer-aided design (TCAD) tools. Electrical characteristics of the devices have been simulated using 2D numerical device simulation software ATLAS™ from Silvaco International. Also, device parameters like threshold voltage, mobility, transconductance, subthreshold swing and current on/off ratio of the single and dual gate OTFTs have been extracted and compared.
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14

Kang, J., X. He, D. Vasileska, and D. K. Schroder. "Optimization of FIBMOS Through 2D Silvaco ATLAS and 2D Monte Carlo Particle-based Device Simulations." VLSI Design 13, no. 1-4 (2001): 251–56. http://dx.doi.org/10.1155/2001/45747.

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Focused Ion Beam MOSFETs (FIBMOS) demonstrate large enhancements in core device performance areas such as output resistance, hot electron reliability and voltage stability upon channel length or drain voltage variation. In this work, we describe an optimization technique for FIBMOS threshold voltage characterization using the 2D Silvaco ATLAS simulator. Both ATLAS and 2D Monte Carlo particle-based simulations were used to show that FIBMOS devices exhibit enhanced current drive capabilities when compared to normal MOSFETs. It was also found that the device performance is very much dependent upon the FIB implant profile. High and narrow doping of the FIB implant leads to high drain current and low hot carrier reliability, whereas low and wide doping gives rise to lower drain current and higher hot carrier reliability.
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15

Dubey, Sarvesh, and Rahul Mishra. "Modeling of Sub Threshold Current and Sub Threshold Swing of Short-Channel Fully-Depleted SOI MOSFET with Back-Gate Control." SAMRIDDHI : A Journal of Physical Sciences, Engineering and Technology 9, no. 01 (2017): 67–72. http://dx.doi.org/10.18090/samriddhi.v9i01.8340.

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The present paper deals with the analytical modeling of subthreshold characteristics of short-channel fully-depleted recessed-source/drain SOI MOSFET with back-gate control. The variations in the subthreshold current and subthreshold swing have been analyzed against the back-gate bias voltage, buried-oxide (BOX) thickness and recessed source/drain thickness to assess the severity of short-channel effects in the device. The model results are validated by simulation data obtained from two-dimensional device simulator ATLAS from Silvaco.
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16

Chowdhury, Md. Iqbal Bahar. "Study of Characteristics Curves Top-Gated Graphene FET Using SILVACO TCAD." Journal of Electronic Design Engineering 3, no. 3 (2017): 1–9. https://doi.org/10.5281/zenodo.15319750.

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This work presents a SILVACO TCAD based fabrication and device simulation of a topgated graphene field-effect transistor. Effects of channel length and channel doping concentrations on the characteristics curves (transfer and output characteristics) of the GFET are also investigated and analyzed physically to obtain more physical insight. 
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17

Sharma, Sanjeev Kumar, Jeetendra Singh, Balwinder Raj, and Mamta Khosla. "Analysis of Barrier Layer Thickness on Performance of In1–xGaxAs Based Gate Stack Cylindrical Gate Nanowire MOSFET." Journal of Nanoelectronics and Optoelectronics 13, no. 10 (2018): 1473–77. http://dx.doi.org/10.1166/jno.2018.2374.

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In this paper, InGaAs/InP heterostructure based Cylindrical Gate Nanowire MOSFETs (CGNWMOSFET) is designed and its performance has been analyzed using silvaco ATLAS TCAD tool. The influence of the barrier thickness is investigated for perusal performance of an InGaAs/InP heterostructure CGNWMOSFET. The performance compared for various parameters on current, off current, Cut off Frequency (fT), Transconductance (gm), Gate to Source capacitance (Cgs), and Gate to Drain capacitance (Cgd). Results show significant variation in the performance of InGaAs/InP heterostructure CGNWMOSFET by varying the barrier thickness.
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18

Mehrabian, Masood, and Sina Dalir. "11.73% efficient perovskite heterojunction solar cell simulated by SILVACO ATLAS software." Optik 139 (June 2017): 44–47. http://dx.doi.org/10.1016/j.ijleo.2017.03.077.

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19

Surdi, Harshad, Trevor Thornton, Robert J. Nemanich, and Stephen M. Goodnick. "Space charge limited corrections to the power figure of merit for diamond." Applied Physics Letters 120, no. 22 (2022): 223503. http://dx.doi.org/10.1063/5.0087059.

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An interpretation of the unipolar figure of merit is formulated for wide bandgap (WBG) semiconductors based on the on-state specific resistance ([Formula: see text]) derived from the space charge limited current–voltage relationship (Mott–Gurney square law). The limitations of the traditional Ohmic [Formula: see text] for WBG semiconductors are discussed, particularly at low doping, while the accuracy of the Mott–Gurney based [Formula: see text] is confirmed by Silvaco ATLAS drift–diffusion simulations of diamond Schottky pin diodes. The effects of incomplete ionization are considered as well.
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20

PICOS, R., E. GARCIA, M. ESTRADA, A. CERDEIRA, and B. IÑIGUEZ. "EFFECT OF PROCESS VARIATIONS ON AN OTFT COMPACT MODEL PARAMETERS." International Journal of High Speed Electronics and Systems 20, no. 04 (2011): 815–28. http://dx.doi.org/10.1142/s0129156411007070.

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We have studied the effect of some of the possible deviations on the values of the extracted parameters of a specific OTFT model, considering OTFTs designed using P 3 HT as semiconductor layer, PMMA as insulator, bottom gate, and top gold contacts. Specifically, we have studied the influence of misposition or misalignment of the masks, the effect of imperfections of etching, and the effect of variations on the layer deposition process. These effects have been simulated using the Silvaco Athena software, and they have been modeled as horizontal shifts of the etching windows and variations of the layers thickness. Once the devices were defined, they were simulated using Silvaco Atlas, and parameter extraction was performed using a specifically developed algorithm. We have found a strong correlation among some of the physical parameters and the model parameters that may offer useful insight for process optimization. Moreover, strong correlations have been found also among the model parameters. We have used these results to develop a Monte Carlo model, suitable for statistical circuit simulation.
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21

Tobbeche, S., and M. N. Kateb. "Two-Dimensional Modelling and Simulation of Crystalline Silicon n+pp+ Solar Cell." Applied Mechanics and Materials 260-261 (December 2012): 154–62. http://dx.doi.org/10.4028/www.scientific.net/amm.260-261.154.

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In this work, we present the simulation results of the technological parameters and the electrical characteristics of a crystalline silicon n+pp+ solar cell, using two-dimension (2D) software, namely TCAD Silvaco (Technology Computer Aided Design). TCAD Silvaco Athena is used to simulate various stages of the technology manufacturing, while TCAD Silvaco Atlas is used for the simulation of the electrical characteristics and the spectral response of the solar cell. The J-V characteristics and the external quantum efficiency (EQE) are simulated under AM 1.5 illumination. The conversion efficiency(η)of 16.06% is reached and the other characteristic parameters are simulated: the open circuit voltage (Voc) is of 0.63 V, the short circuit current density (Jsc) equals 30.54 mA/cm² and the form factor (FF) is of 0.83 for the n+pp+ solar cell with a silicon nitride antireflection layer (Si3N4). In order to highlight the importance of the back surface field (BSF), a comparison between two cells, one without BSF (structure n+p), the other with one BSF (structure n+pp+), was made. By creating a BSF on the rear face of the cell the short circuit current density increases from 28.55 to 30.54 mA/cm2, the open circuit voltage from 0.6 to 0.63 V and the conversion efficiency from 14.19 to 16.06%. A clear improvement of the spectral response is obtained in wavelengths ranging from 0.65 to 1.1 µm for the solar cell with BSF.
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22

Hossain, Md Mosabbir, Kh Shakil Ahmed, Kazi Mysoon Rubyat, et al. "Simulation-Driven Fabrication and Performance Evaluation of n-MOSFET using Silvaco Athena and Atlas: From Process to Parameters." Journal of Microprocessor and Microcontroller Research 1, no. 3 (2014): 21–43. http://dx.doi.org/10.46610/jommr.2024.v01i03.003.

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In this work, an n-channel MOSFET of Silvaco TCAD has been fabricated and analyzed using commercially available simulation software tools, namely Athena and Atlas. The fabrication of NMOS has been done through a series of fabrication steps, which include wafer selection with appropriate orientation and phosphorus doping, oxide diffusion, boron-implantation for p-well formation, polysilicon deposition, phosphorus-implantation for heavily doped n+-regions, aluminum-deposition for source/drain contact and extraction of unused materials-all of these steps has been performed through the Athena tool. Afterward, Atlas performs several simulations to deduce the transfer characteristics curves (the ID vs. VGS curves). The various performance parameters of the fabricated device, which include the on current (Ion), the off current (Ioff), the on/off ratio, the threshold voltage (Vth), the subthreshold swing, and the Drain-Induced Barrier Lowering (DIBL), are also determined using the Atlas tool. These simulation-basedanalyses provide a better understanding of an NMOS device's fabrication process and a clearer physical insight into its characteristiccurves and performance parameters.
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23

Vimala, Palanichamy, and N. R. Nithin Kumar. "Comparative Analysis of Various Parameters of Tri-Gate MOSFET with High-K Spacer." Journal of Nano Research 56 (February 2019): 119–30. http://dx.doi.org/10.4028/www.scientific.net/jnanor.56.119.

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In this paper, a comparative analysis of the Tri-gate MOSFET device structure with respect to Single Material Gate (SMG) Tri-gate MOSFET, Double Material Gate (DMG) Tri-gate MOSFET and Triple Material Gate (TMG) Tri-gate MOSFET with & without Hafnium dioxide as high-K dielectric material is employed using Silvaco TCAD Atlas Tool. It shows a compact model and better DC, AC performance for triple material gate structures and yields a high drive current of the device for TMG Tri-gate MOSFET with high-k dielectrics and shows a better electrical characteristics in comparison with other device structures.
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24

Jaafar, Hind, Abdellah Aouaj, Ahmed Bouziane, and Benjamin Iñiguez. "An Analytical Drain Current Model for Dual-material Gate Graded - channel and Dual-oxide Thickness Cylindrical Gate (DMG-GC-DOT) MOSFET." Nanoscience &Nanotechnology-Asia 9, no. 2 (2019): 291–97. http://dx.doi.org/10.2174/2210681208666180813122145.

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Background: A novel Dual Material Gate Graded Channel and Dual Oxide Thickness Cylindrical Gate (DMG-GC-DOT) MOSFET is presented in this paper. Methods: Analytical model of drain current is developed using a quasi-two-dimensional cylindrical form of the Poisson equation and is expressed as a function of the surface potential, which is calculated using the expressions of the current density. Results: Comparison of the analytical results with 3D numerical simulations using Silvaco Atlas - TCAD software presents a good agreement from subthreshold to strong inversion regime and for different bias voltages. Conclusion: Two oxide thicknesses with different permittivity can effectively improve the subthreshold current of DMG-GC-DOT MOSFET.
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Sadoun, Ali. "Extraction of the electrical parameters of the Au/InSb/InP Schottky diode in the temperature range (300 K- 425 K)." International Journal of Energetica 5, no. 1 (2020): 30. http://dx.doi.org/10.47238/ijeca.v5i1.120.

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In this work, we have presented a theoretical study of Au/InSb/InP Schottky diode based on current-voltage (I-V) measurement in the temperature range ( 300 K- 425 K). Electrical parameters of Au/InSb/InP such as barrier height (Φb), ideality factor and series resistance have been calculated by employing the conventional (I-V), Norde, Cheung and Chattopadhyay methods. Measurements show that the Schottky barrier height (SBH), ideality factor and series resistance, RS for Au/InSb/InP Schottky diode in the temperature range (300 K–425 K) are 0.602-0.69eV, 1.683-1.234 and 84.54-18.95 (Ω), respectively. These parameters were extracted using Atlas-Silvaco-Tcad logical.
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26

Abd Rahim, Alhan Farhanah, N. M. Sah, I. H. Hamzah, Siti Noraini Sulaiman, and Musa Mohamed Zahidi. "Study on the Effect of Porous Silicon Sizes for Potential Visible Photodetector." Applied Mechanics and Materials 815 (November 2015): 121–30. http://dx.doi.org/10.4028/www.scientific.net/amm.815.121.

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In this work, the characterization of porous silicon (PS) for potential visible light emission was investigated by simulation. SILVACO TCAD simulator was used to simulate PS by using process simulator, ATHENA and device simulator, ATLAS. Different pore diameter sizes of the PS structures were constructed. The structural, optical and electrical characteristics of the structures PS were investigated by current-voltage (I-V), current gain, spectral response and the energy band gap. It was observed that PS enhances the current gain compare to bulk Si and exhibited photo emission in the visible spectrum which constitutes to the quantum confinement effect of the Si in the PS structures.
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Mohd Said, Muzalifah, Zul Atfyi Fauzan, and Nur Fatihah Azmi. "NMOS Low Boron Activation in Pre-Amorphise Silicon." Advanced Materials Research 875-877 (February 2014): 734–38. http://dx.doi.org/10.4028/www.scientific.net/amr.875-877.734.

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The high demand of smaller and compact size of MOSFETs has leads to desirable for ultra shallow junction formation with low sheet resistance and good electrical performances. These two characteristics are required to suppress short channel effects and to increase the efficiency of device. In this paper, Pre-amorphise implantation (PAI) PMOS with different doses of Boron and the basic PMOS structure are done by using ATHENA and the performance of devices is compared by using ATLAS software package from Silvaco TCAD. Comparison done in electrical characteristic, I-V curve Ion and Ioff has showed PMOS with PAI technology with low boron doses resulted in increasing electrical performance characteristic.
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Smaani, Billel, Mourad Bella, and Saϊda Latreche. "Compact Modeling of Lightly Doped Nanoscale DG MOSFET Transistor." Applied Mechanics and Materials 492 (January 2014): 306–10. http://dx.doi.org/10.4028/www.scientific.net/amm.492.306.

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In this paper, a compact modeling of lightly doped nanoscale Double Gate (DG) MOSFET transistor is presented. In the first time, a DG MOSFET transistor with long channel is considered. In this case, by using 1-D Poissons equation and applying the Gauss law at the interface of Silicone/Oxide, the static behavior of the long channel DG MOSFET can be observed by simple relationships between charges-voltages and charges-drain current. In second time, the dynamic behavior of the device is described through the intrinsic trans-capacitances. The present results (obtained using MATLAB) are validated by comparing them with those obtained using commercial software (Silvaco Atlas-TCAD).
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29

Benykrelef, Souad, Sedik Mansouri, Hicham Helal, Abdelaziz Rabehi, Abdelaziz Joti, and Zineb Benamara. "Electrical behavior of n-GaAs Schottky nanowire in wide temperature range for different contacts." Journal of Engineering and Exact Sciences 9, no. 4 (2023): 15855–01. http://dx.doi.org/10.18540/jcecvl9iss4pp15855-01e.

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This research aims to study the impact of metal work function ?m on the I–V characteristics of a n-GaAs Schottky nanowire structure, using 3D Silvaco-Atlas software. The electrical characteristics have been performed in a wide temperature range of 300-550K. This allows us to study and discuss the influence of temperature and the metal work function ?m on the performance of our proposed device. The results show a great dependence between ?m and the electrical parameters. A decrease in current is observed with increasing ?m, as well as an increase in barrier height with increasing ?m and a decrease with increasing temperature.
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Xu, Hui Fang, Guo Wei Cui, Yong Li, Wen Yang Sun, Kui Xia, and Chao He. "Two-dimensional analytical model for a non-lightly doped drain SOI MOSFET." Japanese Journal of Applied Physics 63, no. 3 (2024): 034001. http://dx.doi.org/10.35848/1347-4065/ad27a2.

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Abstract A two-dimensional (2D) analytical model considering the effects of the gate oxide region, channel region, and buried oxide region for a non-lightly doped drain (LDD) SOI MOSFET is proposed. The top and bottom surface potential distributions have been derived on the basis of solving 2D Poisson’s equation and using an evanescent mode analysis. The potential distribution, threshold voltage, and threshold voltage roll-off have been verified by Silvaco ATLAS simulated results for the proposed device with different device parameters. The model agrees well with the simulation results under the above-mentioned conditions. Therefore, the analytical model provides the basic designing guidance for non-LDD SOI MOSFETs.
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A, N. Moulai Khatir, Guen-Bouazza A, and Bouazza B. "3D Simulation of Fin Geometry Influence on Corner Effect in Multifin Dual and Tri-Gate SOI-Finfets." International Journal of Nano Studies & Technology 2, no. 4 (2013): 29–32. https://doi.org/10.19070/2167-8685-130006.

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In this work the corner effect sensitivity to fin geometry variation in multifin dual and tri-gate SOI-FinFETs is studied through a commercial, three-dimensional numerical simulator ATLAS from Silvaco International. These devices are compatible with conventional silicon integrated circuit processing, but offer superior performance as the device is scaled into the nanometer range. This study aims wider to use multiple fins between the source and drain regions. The results indicate that for both multifin double and triple gate FinFETs, the corner effect does not lead to an additional leakage current and therefore does not deteriorate the SOI-FinFET performance.
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32

Sanjay, Sharma, Yadav R.P., and Janyani Vijay. "Substrate Current Evaluation for Lightly and Heavily Doped MOSFETs at 45 nm process Using Physical Models." Bulletin of Electrical Engineering and Informatics 5, no. 1 (2016): 120–25. https://doi.org/10.11591/eei.v5i1.556.

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Substrate noise is a major integration issue in mixed signal circuits; particularly at radio frequency (RF) it becomes a key issue. In deep sub micron MOSFETs hot carrier effect induces device degradation. The impact ionization phenomenon is one of the main hot carrier effects. The paper covers the process and device level simulation of MOSFETs by TCAD and the substrate current comparison in lightly and heavily doped MOS. PMOS and NMOS devices are virtually fabricated with the help of ATHENA process simulator. The modeled devices include the hot carrier effects. The MOS devices are implemented on lightly and heavily doped substrates and substrate current is evaluated and compared with the help of ATLAS device simulator. Substrate current is better in lightly doped substrate than in heavily doped one. Drain current is also better in lightly doped than heavily doped substrates. Silvaco TCAD Tool is used for Virtual fabrication and simulation. ATHENA process simulator is used for virtual fabrication and ATLAS device simulator is used for device characterization.
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33

El-Yazami, Chaimae, Seddik Bri, and Adiba El Fadl. "Model of AlGaN/GaN based on High Electron Mobility Transistors using SILVACO ATLAS™." E3S Web of Conferences 601 (2025): 00047. https://doi.org/10.1051/e3sconf/202560100047.

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Since the introduction of semiconductors, the world has undergone numerous profound transformations during the past few decades. With advancements in technology, semiconductor products' performance requirements keep rising. Research on novel materials and device structures is required to meet the criteria. This research presents a novel GaN HEMT construction. The components of an AlGaN/GaN heterojunction HEMT are the drain, source and gate electrode. Since M. Asif Khan and his colleagues published the first AlGaN/GaN HEMT in 1993, a lot of HEMT structures have been reported by researchers; nevertheless, none of them contain three electrodes on distinct sides of the device. In this study, we constructed a 2DEG GaN HEMT and observed its features, including its drain current characteristics curves, Ion/Ioff ratio, and transconductance characteristics curves. Which were acquired from simulations carried out with Silvaco ATLAS™.
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34

Karker, Olfa, Konstantinos Zekentes, Aude Bouchard, et al. "Modelling and Development of 4H-SiC Nanowire/Nanoribbon Biosensing FET Structures." Materials Science Forum 1062 (May 31, 2022): 608–12. http://dx.doi.org/10.4028/p-23d7ab.

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A SiCNWFET device serving as a biosensor was designed and simulated using Silvaco ATLAS device simulation software. The performance of the designed device in charges sensing was investigated. The device shows the ability to recognize different interface charge values ranging from-1.10E11 to-5.10E12 cm-2 applied on the surface of the silicon carbide nanowire channel to simulate target charge biomolecules that bound to the biosensor. A significant change in the output current is observed due to the presence of different values of fixed interface charge densities. An optimum, according to the TCAD simulation, the 4H-SiC epitaxial structure has been grown. The designed device was fully fabricated on this structure and it exhibited acceptable electrical characteristics.
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35

Takata, Masashi, Kenichiro Takagi, Takashi Nagase, Takashi Kobayashi, and Hiroyoshi Naito. "Effects of Bimolecular Recombination on Impedance Spectra in Organic Semiconductors: Analytical Approach." Journal of Nanoscience and Nanotechnology 16, no. 4 (2016): 3322–26. http://dx.doi.org/10.1166/jnn.2016.12289.

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An analytical expression for impedance spectra in the case of double injection (both electrons and holes are injected into an organic semiconductor thin film) has been derived from the basic transport equations (the current density equation, the continuity equation and the Possion’s equation). Capacitance-frequency characteristics calculated from the analytical expression have been examined at different recombination constants and different values of mobility balance defined by a ratio of electron mobility to hole mobility. Negative capacitance appears when the recombination constant is lower than the Langevin recombination constant and when the value of the mobility balance approaches unity. These results are consistent with the numerical results obtained by a device simulator (Atlas, Silvaco).
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36

Hind, Jaafar, Aouaj Abdellah, Bouziane Ahmed, and Iñiguez Benjamin. "A compact model of transconductance and drain conductance for DMG-GC-DOT cylindrical gate MOSFET." International Journal of Reconfigurable and Embedded Systems 9, no. 1 (2020): 34–41. https://doi.org/10.11591/ijres.v9.i1.pp34-41.

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A compact model for dual-material gate graded-channel and dual-oxide thickness with two dielectric constant different cylindrical gate (DMG-GCDOTTDCD) MOSFET was investigated in terms of transconductance, drain conductance and capacitance. Short channel effects are modeled with simple expressions, and incorporated into the core of the model (at the drain current). The design effectiveness of DMG-GC-DOTTDCD was monitored in comparing with the DMG-GC-DOT transistor, the effect of variations of technology parameters, was presented in terms of gate polarization and drain polarization. The results indicate that the DMG-GC-DOTTDCD devices have characteristics higher than the DMG-GC-DOT MOSFET. To validate the proposed model, we used the results obtained from the simulation of the device with the SILVACO-ATLAS-TCAD software.
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37

Nadimi, M., and A. Sadr. "Computer Modeling of MWIR Homojunction Photodetector Based on Indium Antimonide." Advanced Materials Research 383-390 (November 2011): 6806–10. http://dx.doi.org/10.4028/www.scientific.net/amr.383-390.6806.

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High operating temperatures infrared photodetectors are needed for improving the performance of existing military and civilian infrared systems. To obtain high device performance at higher temperatures, the thermally generated noise required to be reduced. Minority-carrier extraction and exclusion techniques are the approaches for decreasing the thermal noise of infrared systems. In the present work, an InSb extraction diode was studied and simulated for operation in the MWIR region. The simulation was performed using ATLAS device simulator from SILVACO®. The energy band diagram, doping profile, electric field profile, dark current and spectral response were calculated as a function of device thickness, applied reverse voltage and operating wavelength. The simulated photodetector exhibited a zero bias resistance-area product, R0A = 1.6×〖10〗^(-3) Ω〖.cm〗^2 at 240K.
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38

Chandra, Varun, Nidhi Sinha, and Garima Mathur. "Modeling, Numerical Simulation and Performance Optimization of P3HT:PC70BM Based Bulk Hetero Junction Organic Solar Cells." Journal of Nanoelectronics and Optoelectronics 17, no. 4 (2022): 579–87. http://dx.doi.org/10.1166/jno.2022.3242.

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In this paper we had presented the modeling and simulation of organic solar cell based on P3HT:PC70BM using TCAD tool Silvaco ATLAS™ using Aluminum and Silver as cathodes. The Poole-Frenkel model was used to estimate the organic solar cell characteristics in combination with Langevin recombination model. The main challenges faced during the modeling were the repetitive iteration which was needed to obtain a numerical solution for the figure of merits. The optimized thickness shows the considerable change in efficiency, fill factor and open-circuit voltage. The efficiency obtained is 8.14% with short circuit current density of 20.17 mA/cm2, open circuit voltage as 707.97 mV approximately and fill factor is 55.47% which is higher than the reported works in literature.
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39

Zhang, Junqin, Aofei Liu, Hailong Xing, and Yintang Yang. "Study on surface leakage current at sidewall in InP-based avalanche photodiodes with mesa structure." AIP Advances 12, no. 3 (2022): 035336. http://dx.doi.org/10.1063/5.0080656.

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A multi-mesa InGaAs/InP avalanche photodiode (APD) with the advantage of the completely restricted electric field is proposed. The surface defects, which are the reasons for the sidewall leakage current generation in the mesa-structure APD, are theoretically studied, and then a sidewall leakage current model is developed. The Silvaco Atlas device simulation tool is used to analyze the generation mechanism of the sidewall leakage current, and the effects of different mesa structures on the sidewall leakage current of the APD are compared. The simulation results show that the sidewall leakage current of the multi-mesa APD is about zero and is not affected by the terrace size, which can be contributed by a very weak electric field at the sidewall.
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40

Chawla, Rashmi, Poonam Singhal, and Amit Kumar Garg. "Design and Analysis of Multi Junction Solar Photovoltaic Cell with Graphene as an Intermediate Layer." Journal of Nanoscience and Nanotechnology 20, no. 6 (2020): 3693–702. http://dx.doi.org/10.1166/jnn.2020.17512.

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An efficacious Intermediate Layer (IML) is important for multi junction solar Photo Voltaic Cell (PVC) owing to its good electrical conductivity and optical transparency. In this research work, the use of Graphene as an IML with varied thickness on InGaP/GaAs/InGaAs multi-junction solar PVCs is investigated using virtual fabrication TCAD tool SILVACO-Atlas. The detail absorption rate from wavelength 300 nm (ultraviolet)-2500 nm (middle infra-red region) is determined and the effected modelling stages are recounted. The results after simulation are further confirmed with experimental data to prove accuracy of the research work proposed. The performance parameters with Jsc = 33.4 mA/cm2, Voc = 1.27 V, fill factor (FF) = 99.5% and conversion efficiency of 30.91% (1 sun) are obtained under AM1.5G illumination.
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41

Liu, Yanli, Dunjun Chen, Kexiu Dong, et al. "Temperature Dependence of the Energy Band Diagram of AlGaN/GaN Heterostructure." Advances in Condensed Matter Physics 2018 (2018): 1–4. http://dx.doi.org/10.1155/2018/1592689.

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Temperature dependence of the energy band diagram of AlGaN/GaN heterostructure was investigated by theoretical calculation and experiment. Through solving Schrodinger and Poisson equations self-consistently by using the Silvaco Atlas software, the energy band diagram with varying temperature was calculated. The results indicate that the conduction band offset of AlGaN/GaN heterostructure decreases with increasing temperature in the range of 7 K to 200 K, which means that the depth of quantum well at AlGaN/GaN interface becomes shallower and the confinement of that on two-dimensional electron gas reduces. The theoretical calculation results are verified by the investigation of temperature dependent photoluminescence of AlGaN/GaN heterostructure. This work provides important theoretical and experimental basis for the performance degradation of AlGaN/GaN HEMT with increasing temperature.
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42

Mao, Hong-kai, Ying Wang, Xue Wu, and Fang-wen Su. "Simulation Study of 4H-SiC Trench Insulated Gate Bipolar Transistor with Low Turn-Off Loss." Micromachines 10, no. 12 (2019): 815. http://dx.doi.org/10.3390/mi10120815.

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In this work, an insulated gate bipolar transistor (IGBT) is proposed that introduces a portion of the p-polySi/p-SiC heterojunction on the collector side to reduce the tail current during device turn-offs. By adjusting the doping concentration on both sides of the heterojunction, the turn-off loss is further reduced without sacrificing other characteristics of the device. The electrical characteristics of the device were simulated through the Silvaco ATLAS 2D simulation tool and compared with the traditional structure to verify the design idea. The simulation results show that, compared with the traditional structure, the turn-off loss of the proposed structure was reduced by 58.4%, the breakdown voltage increased by 13.3%, and the forward characteristics sacrificed 8.3%.
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43

Gangwani, L., and S. Hajela. "Analog Performance Analysis of a Novel 5nm Stacked Oxide Top Bottom Gated Junctionless FinFET." IOP Conference Series: Materials Science and Engineering 1258, no. 1 (2022): 012046. http://dx.doi.org/10.1088/1757-899x/1258/1/012046.

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This paper depicts the analog investigation of a Novel Stacked Oxide Top Bottom Gated Junctionless (TBG-JL) Fin-shaped Field Effect Transistor (FinFET) structure. The structure is designed in this way to enhance the switching performance and curtail the Short Channel Effects (SCEs). The study is done on Silvaco Atlas TCAD tools for the Novel Stacked Oxide FinFET device and analyzed against Top-Bottom Gated Junctionless FinFET and Traditional FinFET. The Novel device shows 280 times improvement in switching ratio when stacked against the Traditional JL FinFET at identical gate length at room temperature (300K). The results from device simulation affirm that the Novel device has better analog performance over Traditional Junctionless FinFET and diminishes the Short Channel Effects (SCEs) a cut above the Traditional Junctionless FinFET.
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44

Joseph Mebelson, T., and K. Elampari. "A study of electrical and optical characteristics of CZTSe solar cell using Silvaco Atlas." Materials Today: Proceedings 46 (2021): 2540–43. http://dx.doi.org/10.1016/j.matpr.2021.01.758.

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45

Mehrabian, Masood, Sina Dalir, and Hossein Shokrvash. "Numerical simulation of CdS quantum dot sensitized solar cell using the Silvaco-Atlas software." Optik 127, no. 20 (2016): 10096–101. http://dx.doi.org/10.1016/j.ijleo.2016.08.016.

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46

Iype, Preethi Elizabeth, V. Suresh Babu, and Geenu Paul. "Thermal and Electrical Performance of AlGaAs/GaAs based HEMT device on SiC substrate." Journal of Physics: Conference Series 2070, no. 1 (2021): 012057. http://dx.doi.org/10.1088/1742-6596/2070/1/012057.

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Abstract In this paper investigation on electrical and thermal performance of the AlGaAs/GaAs HEMT device is carried out by comparing the device grown on substrates like 4H-SiC and Sapphire. The investigation was carried out based on Silvaco TCAD Atlas simulation. The DC characteristics of the device with varying ambient temperature were evaluated. A deterioration of drain current from 0.9 mA to 0.5 mA is observed as temperature rises from 300K to 500K on 4H-SiC substrate. The HEMT grown on 4H-SiC substrate has a high power dissipation, resulting in reduced temperature compared to sapphire substrate. This increases the lifetime of the device by 1000s of hours and also its overall performance. The HEMT proposed here is found to have an electrically and thermally optimal performance on 4H-SiC substrate than on sapphire
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47

Hazdra, Pavel, Stanislav Popelka, and Adolf Schöner. "Local Lifetime Control in 4H-SiC by Proton Irradiation." Materials Science Forum 924 (June 2018): 436–39. http://dx.doi.org/10.4028/www.scientific.net/msf.924.436.

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The effect of local lifetime control by proton irradiation on the OCVD response of a 10 kV SiC PiN diode was investigated. Carrier lifetime was reduced locally by irradiation with 800 keV protons at fluences up to 1x1011cm-2. Radiation defects were characterized by DLTS and C-V profiling; excess carrier dynamics were measured by the OCVD and analyzed using the calibrated device simulator ATLAS from Silvaco, Inc. Results show that proton implantation followed by low temperature annealing can be used for controllable local lifetime reduction in SiC devices. The dominant recombination centre is the Z1/2defect, whose distribution can be set by irradiation energy and fluence. The local lifetime reduction, which improves diode recovery, can be monitored by OCVD response and simulated using the SRH model accounting for the Z1/2defect.
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48

Karker, Olfa, Konstantinos Zekentes, Nikolaos Makris, Valerie Stambouli, and Edwige Bano. "Fabrication of an Open Gate-4H-SiC Junction Field Effect Transistor for Bio-Related and Chemical Sensing Applications." Key Engineering Materials 946 (May 25, 2023): 111–18. http://dx.doi.org/10.4028/p-03m3ss.

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In this paper, a suitable process technology is employed to fabricate a new open gate silicon carbide-based junction field-effect transistor (OG-4H-SiC-JFET) intended to be used for all types of biochemical sensing applications. The main focus is dedicated to the fabrication steps and specifically the plasma etching of the SiC as it is the key step to pattern the device components. All necessary I-V characteristics (IDS-VDS and IDS-VGS) have been derived and show acceptable electrical performance. Furthermore, the electrical characteristics of the OG-4H-SiC JFET were simulated using 3D Silvaco ATLAS and are in line with the experimental electrical characteristics. The efficacity and simplicity of the process described in this paper is the first step for future development of biochemical sensors based on SiC-FETs.
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49

Jain, S. K., A. M. Joshi, and C. Kirpalani. "Performance analysis of OTFT with varying semiconductor film thickness for future flexible electronics." Journal of Optoelectronic and Biomedical Materials 16, no. 1 (2024): 55–62. http://dx.doi.org/10.15251/jobm.2024.161.55.

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The goal of this study was to get a deeper understanding of the intricate impact of organic semiconductor thickness on the performance of devices, using a thorough and meticulous investigation at the microscopic level incorporating the density of defect model using using Silvaco ATLAS TCAD Simulator. The present work thoroughly investigates the relationship between the thickness of semiconductors and important performance parameters, such as hole concentration, electric potential, electric field, and Hole QFL. The comprehensive insights derived from this research not only enhance the comprehension of device physics but also provide a framework for the systematic enhancement of electronic devices. The widespread use of organic thin film transistors (OTFT) in future Flexible electronics, particularly in display and memory circuits, necessitates the incorporation of low voltage, high speed, and low cost characteristics.
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50

Verma, Akshay, and Nitesh Kashyap. "Thickness Dependency Analysis of IGZO-Based Thin Film Transistor." International Journal of Microsystems and IoT 2, no. 10 (2024): 1269–75. https://doi.org/10.5281/zenodo.14168632.

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This paper highlights the thin film transistors used in the latest applications and devices. The working principle of thin film transistors with various device structures can be used to fabricate thin film transistors. Progress in the latest materials that are being used in applications like LCDs, sensors, RFID tags, Displays, etc. The remarkable characteristics of Indium-Gallium-Zinc Oxide (IGZO) thin films, for instance, their transparency and high mobility, have generated significant interest in the application part of Thin-Film Transistors (TFTs). The operation of a-IGZO TFTs taking four different insulators [Si<sub>3</sub>N<sub>4</sub>, SiO<sub>2</sub>, HfO<sub>2,</sub> and Al<sub>2</sub>O<sub>3</sub>] into consideration by varying insulator thicknesses is studied by simulating it over Silvaco [Atlas] TCAD Tool.
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