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Hwang, Yves. "An automated software design synthesis framework." University of Western Australia. School of Electrical, Electronic and Computer Engineering, 2009. http://theses.library.uwa.edu.au/adt-WU2009.0157.
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This thesis presents an automated software design synthesis framework known as Project Calliope. This framework aligns with Harel's automated software development process as it addresses the aspect of automating design and implementation. Project Calliope is based on a Statecharts synthesis approach in the literature. The main goal of Project Calliope is to automatically generate testable Unified Modeling Language (UML) Statecharts that are deterministic, visually manageable and UML compliant. In order to minimise design errors in the generated UML Statecharts, Project Calliope supports model checking through Statecharts execution. In addition, executable code is automatically generated based on the synthesised UML Statecharts. This framework seeks to provide a pragmatic design framework that can be readily incorporated into software development methodologies that leverage UML. In this thesis, Project Calliope is applied to three simple applications from Whittle and Schumann's examples and a case study based on a commercial application. They are automatic teller machine, coffee dispenser, an agent application, and a groupware application respectively.
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Nastov, Ognen J. (Ognen Jovan). "Automated design synthesis of CMOS operational amplifers." Thesis, Massachusetts Institute of Technology, 1994. http://hdl.handle.net/1721.1/36432.
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Thomas, Dale Arlington III. "Design and implementation of an automated reconfigurable modular flow chemistry synthesis platform." Thesis, Massachusetts Institute of Technology, 2019. https://hdl.handle.net/1721.1/121851.
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Thesis: Ph. D., Massachusetts Institute of Technology, Department of Mechanical Engineering, 2019Cataloged from PDF version of thesis.
Includes bibliographical references (pages 115-124).
Synthetic chemistry has been the driving force behind advances in pharmaceuticals, agricultural chemicals to advanced materials; however, these fields have struggled with a slow pace of discovery, limited reproducibility, and difficulty scaling promising new molecules. Current organic chemistry labs rely on batch methodologies limiting the safe process windows, contributing to scaling difficulties, and causing reproducibility issues. Advances in laboratory automation and flow chemistry can be combined to address this bottleneck while increasing expert chemists' productivity. Automated reaction platforms, however, have been limited in their ability to access a diverse set of process units, beyond simple mixing and stirring. A system capable of carrying out multi-step syntheses, inline reaction monitoring, multi-phase reactions, and is easily reconfigurable could enable access to novel process windows and enhance laboratory productivity.
In this work, the development of a reconfigurable continuous flow chemistry platform capable of multistep syntheses is undertaken. This system is capable of interfacing with a library of process modules capable of handling solids, aggressive reagents, inline separations, and reaction conditions required for organic synthesis. These modules can be reconfigured and connected into the required sequence for target molecule synthesis. With reagents being routed to the process modules through the physical wiring of the connections to the assembled process modules eliminating complex valving manifolds. The assembly of the system is coordinated through graphical user interfaces (GUI) which executes a user generated recipe. The platform has been used to rapidly synthesize a variety of active pharmaceutical ingredients (API) and dyes requiring stereo-selectivity, site-selectivity, library generation, and convergent synthesis.
This integrated reconfigurable flow chemistry platform aims to decrease the time required for synthesizing new molecules while increasing synthetic repeatability and lab-to-lab transferability. Automation of synthetic chemistry can decrease the time for molecule development and allow chemists to focus on pathway refinement, reaction optimization, and process analytics. This work required the incorporation of design concepts from microfluidics, robotics, and precision machine design into an integrated modular system for continuous end-to-end production of molecules.
by Dale Arlington Thomas III.
Ph. D.
Ph.D. Massachusetts Institute of Technology, Department of Mechanical Engineering
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Zhang, Haoqi. "Computational Environment Design." Thesis, Harvard University, 2012. http://dissertations.umi.com/gsas.harvard:10598.
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The Internet has evolved into a platform on which large numbers of individuals take action and join in collaborations via crowdsourcing, social media, and electronic commerce. When designing social and economic systems on the Internet, a key challenge is understanding how to promote particular desired behaviors and outcomes. I call this problem computational environment design. Notable abilities afforded by the Internet, such as the ability to recruit large numbers of individuals to join problem-solving efforts via crowdsourcing and social media, and the ability to engage in a data-driven iterative design process, are creating new opportunities and inspiring new methods for computational environment design. This dissertation focuses on these abilities and proposes an approach for arriving at effective designs by reasoning and learning about characteristics of participants and how these characteristics interact with a system’s design to influence behavior. The dissertation consists of two major components. The first component focuses on designing crowdsourcing and human computation systems that leverage a crowd to solve complex problems that require effective coordination among participants or the recruitment of individuals with relevant expertise. I show how reasoning about crowd abilities and limitations can lead to designs that make crowdsourcing complex tasks feasible, effective, and efficient. The solutions introduce new design patterns and methods for human computation and crowdsourcing; notable contributions include a crowdware design for tackling human computation tasks with global constraints, and incentive mechanisms for task routing that harness people’s expertise and social expertise by engaging them in both problem solving and routing. The second component focuses on understanding how to design effective environments automatically. I introduce a general active, indirect elicitation framework for automated environment design that learns relevant characteristics of participants based on observations of their behavior and optimizes designs based on learned models. Theoretical contributions include developing an active, indirect elicitation algorithm for a sequential decision-making setting that is guaranteed to discover effective designs after few interactions. Practical contributions include applications of the active, indirect elicitation framework to crowdsourcing. Specifically, I demonstrate how to automatically design tasks and synthesize workflows when optimizing for desired objectives given resource constraints.Engineering and Applied Sciences
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Deas, Alexander Roger. "An idiomatic framework for the automated synthesis of topographical information from behavioural specifications." Thesis, University of Edinburgh, 1985. http://hdl.handle.net/1842/13604.
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RANJAN, MUKESH. "AUTOMATED LAYOUT-INCLUSIVE SYNTHESIS OF ANALOG CIRCUITS USING SYMBOLIC PERFORMANCE MODELS." University of Cincinnati / OhioLINK, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1129922496.
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Svahn, Carl. "Quantified Interactive Morphological Matrix : An automated approach to aircraft fuel system synthesis." Thesis, Linköping University, Department of Mechanical Engineering, 2006. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-7715.
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This report is one part of a masters thesis in mechanical engineeing. Is is executed at the Department of Mechanical Engineering at Linköping Insitute of Technology in cooperation with Saab Aerosystems in Linköping.
A tool for concept generation called a quantified interactive morphological matrix has been created. It is based on rules of thumb and approximations concerning aircraft fuel systems.
The tool can be used for discarding bad concepts, with regard to weight, power consumption and MTBF, during the concept phase of a fuel system design process. The tool is ready for calibration towards a future specific area of use. It is open for validation and optimization and is specifically designed to be easily modified for different future products.
Suggestions for future use has been given concerning expansion, implementation, validation and optimization.
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Das, Angan. "Algorithms for Topology Synthesis of Analog Circuits." University of Cincinnati / OhioLINK, 2008. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1227204301.
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Jin, Zengxiang. "An automated size synthesis system for preliminary design of tall buildings under both vertical and lateral loads /." View Abstract or Full-Text, 2002. http://library.ust.hk/cgi/db/thesis.pl?CIVL%202002%20JIN.
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Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2002.Includes bibliographical references (leaves 125-128). Also available in electronic version. Access restricted to campus users.
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KANKIPATI, SUNDER RAJAN. "MACRO MODEL GENERATION FOR SYNTHESIS OF ANALOG AND MIXED SIGNAL CIRCUITS." University of Cincinnati / OhioLINK, 2004. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1077297705.
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Shin, Eung Seo. "Automated Generation of Round-robin Arbitration and Crossbar Switch Logic." Diss., Available online, Georgia Institute of Technology, (2003), 2003. http://etd.gatech.edu/theses/available/etd-11232003-150424/.
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Beikzadeh, Mohammad Reza. "Automatic high-level synthesis based upon artificial intelligence techniques." Thesis, University of Essex, 1992. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.315691.
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Carrera, Montesinos Javier. "AUTOMATIC COMPUTATIONAL DESIGN OF SYNTHETIC GENOMES." Doctoral thesis, Universitat Politècnica de València, 2014. http://hdl.handle.net/10251/35380.
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El desarrollo de tecnologías para sintetizar nuevos genomas e introducirlos dentro de hospedadores con sus respectivos cromosomas naturales inactivados abre las puertas a nuevos horizontes en biología sintética. Es de suma importancia aprovechar la habilidad de usar métodos computacionales para predecir y optimizar genomas sintéticos antes de llevar a cabo su síntesis. El objetivo de esta tesis es propulsar la ingeniería de genomas sintéticos de una célula procariota y otras dos eucariotas usando modelos cuantitativos a escala genómica. Así pues, he desarrollado una nueva metodología para el diseño automatizado de genomas sintéticos que se basa en una optimización que computacionalmente imita la evolución natural de genomas.
Primero, he abordado el diseño de la red genómica transcripcional de Escherichia coli con adaptación a entornos cambiantes. Aplicando métodos de ingeniería reversa a los datos masivos disponibles de la transcripción y señalización para la bacteria, tratamos entender los principios de diseño que determinan la regulación de su transcriptoma. Encontramos que el genoma de E. coli puede ser rediseñado de tal forma que tenga una estructura reguladora transcripcional más simple manteniendo aún la respuesta fisiológica global ante ambientes fluctuantes. Estos genomas son más sensibles y muestran una respuesta más robusta ante ambientes agresivos.
Segundo, he estudiado cómo los virus reprograman los chasis celulares de sus hospedadores asumiendo que existen mecanismos por los cuales los virus son capaces de superar con éxito las defensas expuestas por los hospedadores y modificar la expresión de sus genes en su propio beneficio. He desarrollado un nuevo modelo cuantitativo de la regulaci\'on transcripcional a nivel genómico de Arabidopsis thaliana para explorar el paisaje de posibles genomas rediseñados. Encontré un conjunto básico de genes del hospedador cuyos silenciamiento o sobre-expresión dieron pie a la predicción de perfiles de transcripción que sCarrera Montesinos, J. (2012). AUTOMATIC COMPUTATIONAL DESIGN OF SYNTHETIC GENOMES [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/35380
Palancia
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TAKADA, Hiroaki, Hiroyuki TOMIYAMA, Shinya HONDA, Seiya SHIBATA, and Yuki ANDO. "Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design." Institute of Electronics, Information and Communication Engineers, 2010. http://hdl.handle.net/2237/15033.
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Mutigwe, Charles. "Automatic synthesis of application-specific processors." Thesis, Bloemfontein : Central University of Technology, Free State, 2012. http://hdl.handle.net/11462/163.
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Thesis (D. Tech. (Engineering: Electrical)) -- Central University of technology, Free State, 2012This thesis describes a method for the automatic generation of appli- cation speci_c processors. The thesis was organized into three sepa- rate but interrelated studies, which together provide: a justi_cation for the method used, a theory that supports the method, and a soft- ware application that realizes the method. The _rst study looked at how modern day microprocessors utilize their hardware resources and it proposed a metric, called core density, for measuring the utilization rate. The core density is a function of the microprocessor's instruction set and the application scheduled to run on that microprocessor. This study concluded that modern day microprocessors use their resources very ine_ciently and proposed the use of subset processors to exe- cute the same applications more e_ciently. The second study sought to provide a theoretical framework for the use of subset processors by developing a generic formal model of computer architecture. To demonstrate the model's versatility, it was used to describe a number of computer architecture components and entire computing systems. The third study describes the development of a set of software tools that enable the automatic generation of application speci_c proces- sors. The FiT toolkit automatically generates a unique Hardware Description Language (HDL) description of a processor based on an application binary _le and a parameterizable template of a generic mi- croprocessor. Area-optimized and performance-optimized custom soft processors were generated using the FiT toolkit and the utilization of the hardware resources by the custom soft processors was character- ized. The FiT toolkit was combined with an ANSI C compiler and a third-party tool for programming _eld-programmable gate arrays (FPGAs) to create an unconstrained C-to-silicon compiler.
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Pouya, Bahram. "Synthesis of testable core-based designs /." Digital version accessible at:, 2000. http://wwwlib.umi.com/cr/utexas/main.
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MANSOURI, NAZANIN. "AUTOMATED CORRECTNESS CONDITION GENERATION FOR FORMAL VERIFICATION OF SYNTHESIZED RTL DESIGNS." University of Cincinnati / OhioLINK, 2001. http://rave.ohiolink.edu/etdc/view?acc_num=ucin982064542.
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Takada, Hiroaki, Hiroyuki Tomiyama, Shinya Honda, Seiya Shibata, and Yuki Ando. "Automatic Communication Synthesis with Hardware Sharing for Design Space Exploration." IEEE, 2010. http://hdl.handle.net/2237/14472.
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Andersson, Sofie. "Automatic Control Design Synthesis under Metric Interval Temporal Logic Specifications." Thesis, KTH, Skolan för elektro- och systemteknik (EES), 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-187716.
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The problem of synthesizing controllers for motion planning of multi-agent systems under Linear Temporal Logic (LTL) high-level specifications has been of great interest and has been widely studied over the last years. However, LTL cannot handle time constraints as specifications. The time aspect would allow more complicated and specific tasks and it is therefore desirable to incorporate. This work aims to determine how control synthesis for a continuous linear system can be performed based on Metric Interval Temporal Logic (MITL), which is able to handle desired time constraints to high-level specifications. Firstly, a control design synthesis method for a single-agent, based on previous work within both the field of LTL and MITL is presented. Secondly, a control design synthesis method for multi-agent systems considering both local an global MITL specifications is presented. Extended simulations has been performed in MATLAB environment demonstrating the two proposed methodologies. The result shows that the methods guarantee that the MITL specifications are satisfied, for all cases for which a solution is found.Problemet gällande regulator syntetisering for rörelse planering av fler-agents system under Line-ar Temporal Logic (Linjär Temporal Logik=LTL) hög-nivå specifikationer har varit av stort intresse och har studerats brett under de senaste åren. LTL kan emellertid inte hantera tidsbegränsningar som specifikationer. Tidsaspekten skulle tillåta mer komplicerade och specifika uppgifter. Det är därför önskvärt att inkorporera. Målet med det här arbetet är att fastställa hur regulator syntetisering för ett kontinuerligt, linjärt system kan utföras utgående från Metric Interval Temporal Logic (Metrisk Intervall Temporal Logic =MITL), en gren av Temporal Logik som kan hantera de önskvärda tidsbegränsningarna för högnivå specifikationer. Först presenteras en metod för att syntetisera regulatorer för en-agents system. Metoden är baserad på tidigare arbeten inom fälten LTL och MITL. Sedan presenteras en metod för att syntetisera regulatorer för fler-agents system som ¨önskas uppfylla såväl lokala som globala MITL specifikationer. Utbredda simulationer har genomförts i MATLAB miljö för att demonstrera de två˚ föreslagna metoderna. Resultatet visar att metoderna garanterar att MITL specifikationerna är uppfyllda för alla fall för vilka en lösning hittas.
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Nixon, Ian Michael. "The automatic synthesis of fault tolerant and fault secure VLSI systems." Thesis, University of Edinburgh, 1988. http://hdl.handle.net/1842/6637.
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This thesis investigates the design of fault tolerant and fault secure (FTFS) systems within the framework of silicon compilation. Automatic design modification is used to introduce FTFS characteristics into a design. A taxonomy of FTFS techniques is introduced and is used to identify a number of features which an "automatic design for FTFS" system should exhibit. A silicon compilation system, Chip Churn 2 (CC2), has been implemented and has been used to demonstrate the feasibility of automatic design of FTFS systems. The CC2 system provides a design language, simulation facilities and a back-end able to produce CMOS VLSI designs. A number of FTFS design methods have been implemented within the CC2 environment; these methods range from triple modular redundancy to concurrent parity code checking. The FTFS design methods can be applied automatically to general designs in order to realise them as FTFS systems. A number of example designs are presented; these are used to illustrate the FTFS modification techniques which have been implemented. Area results for CMOS devices are presented; this allows the modification methods to be compared. A number of problems arising from the methods are highlighted and some solutions suggested.
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Soulat, Romain. "Synthesis of correct-by-design schedulers for hybrid systems." Phd thesis, École normale supérieure de Cachan - ENS Cachan, 2014. http://tel.archives-ouvertes.fr/tel-01062337.
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In this thesis, we are interested in designing schedulers for hybrid systems. We consider two specific subclasses of hybrid systems, real-time systems where tasks are competing for the access to common resources, and sampled switched systems where a choice has to be made on dynamics of the system to reach goals. Scheduling consists in defining the order in which the tasks will be run on the processors in order to complete all the tasks before a given deadline. In the first part of this thesis, we are interested in the scheduling of periodic tasks on multiprocessor architectures. We are especially interested in the robustness of schedulers, i.e., to prove that some values of the system parameters can be modified, and until what value they can be extended while preserving the scheduling order and meeting the deadlines. The Inverse Method can be used to prove the robustness of parametric timed systems. In this thesis, we introduce a state space reduction technique which allows us to treat challenging case studies such as one provided by Astrium EADS for the launcher Ariane 6. We also present how an extension of the Inverse Method, the Behavioral Cartography, can solve the problem of schedulability, i.e., finding the area in the parametric space in which there exists a scheduler that satisfies all the deadlines. We compare this approach to an analytic method to illustrate the interest of our approach In the second part of this thesis, we are interested in the control of affine switched systems. These systems are governed by a finite family of affine differential equations. At each time step, a controller can choose which dynamics will govern the system for the next time step. Controlling in this sense can be seen as a scheduling on the order of dynamics the system will have to use. The objective for the controller can be to make the system stay in a given area of the state space (stability) or to reach a given region of the state space (reachability). In this thesis, we propose a novel approach that computes a scheduler where the strategy is uniform for dense subsets of the state space. Moreover, our approach only uses forward computation, which is better suited than backward computation for contractive systems. We show that our designed controllers, systems evolve to a limit cyclic behavior. We apply our method to several case studies from the literature and on a real-life prototype of a multilevel voltage converter. Moreover, we show that our approach can be extended to systems with perturbations and non-linear dynamics.
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Richards, Daniel. "Automatic synthesis of architectural structures using an evo-devo approach to design." Thesis, Manchester Metropolitan University, 2013. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.582532.
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To address important global challenges regarding climate change and urbanisation, architects and engineers require new methods of designing efficient, performance- oriented structures. An emerging approach looks to nature for inspiration and seeks to utilise computation early within the design process to create bio-inspired, performance-driven structures. Indeed, natural structures are often much more complex and efficient than anything we can design by hand, thus the ability to harness nature's underlying processes in computation would provide significant advances for architectural design and contribute new territories for performance- oriented design. However, existing computational models are limited to addressing relatively simple design problems and have not yet been able to synthesise complex material structures as nature does. This research proposes a new and interdisciplinary trajectory for architectural design which focuses on computational processes of form generation that require minimal direct human guidance. Significantly, it is argued that such models could provide ways of dealing with complex design problems and thereby greatly extend existing approaches. Using a series of experiments, this research proposes, develops and interrogates a novel computational model which is inspired by principles gene regulation and evolutionary-developmental biology. The results contribute a novel method of automatically designing efficient material-based structures, from scratch, and demonstrate rich trajectories for further research in the emerging field of computational design synthesis.
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Singhal, Rahul. "Logic Realization Using Regular Structures in Quantum-Dot Cellular Automata (QCA)." PDXScholar, 2011. https://pdxscholar.library.pdx.edu/open_access_etds/196.
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Semiconductor industry seems to approach a wall where physical geometry and power density issues could possibly render the device fabrication infeasible. Quantum-dot Cellular Automata (QCA) is a new nanotechnology that claims to offer the potential of manufacturing even denser integrated circuits, which can operate at high frequencies and low power consumption. In QCA technology, the signal propagation occurs as a result of electrostatic interaction among the electrons as opposed to flow to the electrons in a wire. The basic building block of QCA technology is a QCA cell which encodes binary information with the relative position of electrons in it. A QCA cell can be used either as a wire or as logic. In QCA, the directionality of the signal flow is controlled by phase-shifted electric field generated on a separate layer than QCA cell layer. This process is called clocking of QCA circuits. The logic realization using regular structures such as PLAs have played a significant role in the semiconductor field due to their manufacturability, behavioral predictability and the ease of logic mapping. Along with these benefits, regular structures in QCA's would allow for uniform QCA clocking structure. The clocking structure is important because the pioneers of QCA technology propose it to be fabricated in CMOS technology. This thesis presents a detailed design implementation and a comparative analysis of logic realization using regular structures, namely Shannon-Lattices and PLAs for QCAs. A software tool was developed as a part of this research, which automatically generates complete QCA-Shannon-Lattice and QCA-PLA layouts for single-output Boolean functions based on an input macro-cell library. The equations for latency and throughput for the new QCA-PLA and QCA-Shannon-Lattice design implementations were also formulated. The correctness of the equations was verified by performing simulations of the tool-generate layouts with QCADesigner. A brief design trade-off analysis between the tool-generated regular structure implementation and the unstructured custom layout in QCA is presented for the full-adder circuit.
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Ungureanu, George. "Automatic Software Synthesis from High-Level ForSyDe Models Targeting Massively Parallel Processors." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-127832.
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In the past decade we have witnessed an abrupt shift to parallel computing subsequent to the increasing demand for performance and functionality that can no longer be satisfied by conventional paradigms. As a consequence, the abstraction gab between the applications and the underlying hardware increased, triggering both industry and academia in several research directions. This thesis project aims at analyzing some of these directions in order to offer a solution for bridging the abstraction gap between the description of a problem at a functional level and the implementation on a heterogeneous parallel platform using ForSyDe – a formal design methodology. This report treats applications employing data-parallel and time-parallel computation, regards nvidia CUDA-enabled GPGPUs as the main backend platform. The report proposes a heuristic transformation-and-refinement process based on analysis methods and design decisions to automate and aid in a correct-by-design backend code synthesis. Its purpose is to identify potential data parallelism and time parallelism in a high-level system. Furthermore, based on a basic platform model, the algorithm load-balances and maps the execution onto the best computation resources in an automated design flow. This design flow will be embedded into an already existing tool, f2cc (ForSyDe-to-CUDA C) and tested for correctness on an industrial-scale image processing application aimed at monitoring inkjet print-heads reliability.
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Williams, Robert L. "Synthesis and design of the RSSR spatial mechanism for function generation." Thesis, Virginia Tech, 1985. http://hdl.handle.net/10919/41573.
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The purpose of this thesis is to provide a complete package for the synthesis and design of the RSSR spatial function generating mechanism.
In addition to the introductory material this thesis is divided into three sections. The section on background kinematic theory includes synthesis, analysis, link rotatability, transmission quality, and branching analysis. The second division details the computer application of the kinematic theory. The program RSSRSD has been developed to incorporate the RSSR synthesis and design theory. An example is included to demonstrate the computer-implemented theory.
The third part of this thesis includes miscellaneous mechanism considerations and recommendations for further research.The theoretical work in this project is a combination of original derivations and applications of the theory in the mechanism literature.
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Slezák, Josef. "Evoluční syntéza analogových elektronických obvodů s využitím algoritmů EDA." Doctoral thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2014. http://www.nusl.cz/ntk/nusl-233666.
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Disertační práce je zaměřena na návrh analogových elektronických obvodů pomocí algoritmů s pravěpodobnostními modely (algoritmy EDA). Prezentované metody jsou na základě požadovaných charakteristik cílových obvodů schopny navrhnout jak parametry použitých komponent tak také jejich topologii zapojení. Tři různé metody využití EDA algoritmů jsou navrženy a otestovány na příkladech skutečných problémů z oblasti analogových elektronických obvodů. První metoda je určena pro návrh pasivních analogových obvodů a využívá algoritmus UMDA pro návrh jak topologie zapojení tak také hodnot parametrů použitých komponent. Metoda je použita pro návrh admitanční sítě s požadovanou vstupní impedancí pro účely chaotického oscilátoru. Druhá metoda je také určena pro návrh pasivních analogových obvodů a využívá hybridní přístup - UMDA pro návrh topologie a metodu lokální optimalizace pro návrh parametrů komponent. Třetí metoda umožňuje návrh analogových obvodů obsahujících také tranzistory. Metoda využívá hybridní přístup - EDA algoritmus pro syntézu topologie a metoda lokální optimalizace pro určení parametrů použitých komponent. Informace o topologii je v jednotlivých jedincích populace vyjádřena pomocí grafů a hypergrafů.
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Thapliyal, Himanshu. "Design, Synthesis and Test of Reversible Circuits for Emerging Nanotechnologies." Scholar Commons, 2011. http://scholarcommons.usf.edu/etd/3379.
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Reversible circuits are similar to conventional logic circuits except that they are built from reversible gates. In reversible gates, there is a unique, one-to-one mapping between the inputs and outputs, not the case with conventional logic. Also, reversible gates require constant ancilla
inputs for reconfiguration of gate functions and garbage outputs that help in keeping reversibility. Reversible circuits hold promise in futuristic computing technologies like quantum computing, quantum dot cellular automata, DNA computing, optical computing, etc. Thus, it is important to
minimize parameters such as ancilla and garbage bits, quantum cost and delay in the design of reversible circuits.
The first contribution of this dissertation is the design of a new reversible gate namely the TR gate (Thapliyal-Ranganathan) which has the unique structure that makes it ideal for the realization of arithmetic circuits such as adders, subtractors and comparators, efficient in terms of the parameters such as ancilla and garbage bits, quantum cost and delay. The second contribution is the development of design methodologies and a synthesis framework to synthesize reversible data path
functional units, such as binary and BCD adders, subtractors, adder-subtractors and binary comparators. The objective behind the proposed design methodologies is to synthesize arithmetic and logic functional units optimizing key metrics such as ancilla inputs, garbage outputs, quantum cost and delay. A library of reversible gates such as the Fredkin gate, the Toffoli gate, the TR gate, etc. was developed by coding in Verilog for use during synthesis. The third contribution of this dissertation
is the set of methodologies for the design of reversible sequential circuits such as reversible latches, flip-flops and shift registers. The reversible designs of asynchronous set/reset D latch and the D flip-flop are attempted for the first time. It is shown that the designs are optimal in terms of number of garbage outputs while exploring the best possible values for quantum cost and delay.
The other important contributions of this dissertation are the applications of reversible logic as well as a special class of reversible logic called conservative reversible logic towards concurrent (online) and offline testing of single as well as multiple faults in traditional and reversible nanoscale VLSI circuits, based on emerging nanotechnologies such as QCA, quantum computing, etc. Nanoelectronic devices tend to have high permanent and transient faults and thus are susceptible to high
error rates. Specific contributions include (i) concurrently testable sequential circuits for molecular QCA based on reversible logic, (ii) concurrently testable QCA-based FPGA, (iii) design of self checking conservative logic gates for QCA, (iv) concurrent multiple error detection in emerging nanotechnologies using reversible logic, (v) two-vectors, all 0s and all 1s, testable reversible sequential circuits.
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Ding, Huafeng [Verfasser], and Andrés [Akademischer Betreuer] Kecskeméthy. "Automatic Structural Synthesis of Planar Mechanisms and Its Application to Creative Design / Huafeng Ding. Betreuer: Andrés Kecskeméthy." Duisburg, 2016. http://d-nb.info/108130300X/34.
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Ankelhed, Daniel. "On design of low order H-infinity controllers." Doctoral thesis, Linköpings universitet, Reglerteknik, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-67869.
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When designing controllers with robust performance and stabilization requirements, H-infinity synthesis is a common tool to use. These controllers are often obtained by solving mathematical optimization problems. The controllers that result from these algorithms are typically of very high order, which complicates implementation. Low order controllers are usually desired, since they are considered more reliable than high order controllers. However, if a constraint on the maximum order of the controller is set that is lower than the order of the so-called augmented system, the optimization problem becomes nonconvex and it is relatively difficult to solve. This is true even when the order of the augmented system is low. In this thesis, optimization methods for solving these problems are considered. In contrast to other methods in the literature, the approach used in this thesis is based on formulating the constraint on the maximum order of the controller as a rational function in an equality constraint. Three methods are then suggested for solving this smooth nonconvex optimization problem. The first two methods use the fact that the rational function is nonnegative. The problem is then reformulated as an optimization problem where the rational function is to be minimized over a convex set defined by linear matrix inequalities (LMIs). This problem is then solved using two different interior point methods. In the third method the problem is solved by using a partially augmented Lagrangian formulation where the equality constraint is relaxed and incorporated into the objective function, but where the LMIs are kept as constraints. Again, the feasible set is convex and the objective function is nonconvex. The proposed methods are evaluated and compared with two well-known methods from the literature. The results indicate that the first two suggested methods perform well especially when the number of states in the augmented system is less than 10 and 20, respectively. The third method has comparable performance with two methods from literature when the number of states in the augmented system is less than 25.
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Chou, Pang-Yen [Verfasser]. "Automatic Analog Layout Synthesis – from Capacitor Arrays in Data Converters to General Design with Routing / Pang-Yen Chou." München : Verlag Dr. Hut, 2021. http://d-nb.info/123284666X/34.
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Gmeiner, Thomas [Verfasser], Kristina [Akademischer Betreuer] Shea, Udo [Akademischer Betreuer] Lindemann, and Farhad [Akademischer Betreuer] Ameri. "Automatic Fixture Design Based on Formal Knowledge Representation, Design Synthesis and Verification / Thomas Gmeiner. Betreuer: Kristina Shea. Gutachter: Udo Lindemann ; Kristina Shea ; Farhad Ameri." München : Universitätsbibliothek der TU München, 2015. http://d-nb.info/1077867352/34.
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Voitovich, Iuliia. "Les inhibiteurs d'interaction protéine-protéine, une stratégie innovante en cancérologie." Thesis, Aix-Marseille, 2018. http://www.theses.fr/2018AIXM0701.
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Les protéines BET, modules impliqués dans la régulation épigénétique, jouent un rôle essentiel dans le développement du cancer. Actuellement plusieurs inhibiteurs de protéines BET font l'objet d'essais cliniques pour le traitement de différents types de cancer. Une des limitations au développement clinique est l'impact général de la modulation génique induite par des inhibiteurs de type ‘pan-BET’ non sélectifs. Un ciblage individuel des protéines BET et la discrimination des domaines BD1 et BD2 conduiraient à un effet transcriptionnel plus spécifique limitant les effets secondaires et l’apparition de résistance. Le criblage d’une chimiothèque focalisée sur les interactions protéine-protéine a permis d’identifier deux molécules avec des profils de sélectivité uniques. Une étude de SAR a révélé le fragment minimal nécessaire à l’interaction ligand-protéine. La résolution de la structure cristallographique en complexe avec Brd4(BD1) a permis de valider nos interprétations et de développer des inhibiteurs BET plus puissants et sélectifs. Une stratégie de synthèse originale orientée vers une diversité structurale (DOTS) combinant le criblage virtuel et l’élaboration automatisée de bibliothèques focalisées a été utilisée. Ce travail a découvert un inhibiteur optimisé de BD1 avec une affinité de 100x supérieure à la molécule initiale et un ratio de sélectivité BD1 vs BD2 égale à 300. L’activité cellulaire d’inhibition du pro-oncogène c-Myc, au µM, a permis de valider le composé en tant que sonde moléculaire. Des études in vitro et in vivo permettront d'élucider le rôle biologique individuel de chaque BD et de valider l'intérêt de leurs développement en cliniqueBET-proteins, acting as epigenetic readers, play an essential role in cancer development. To date, numerous potent inhibitors disrupting BET functions have been discovered, including several of them that are undergoing clinical trials for the treatment of different types of cancer. The common drawback limiting their use in clinical practice is an inability to distinguish between BET-members that may cause side effects and resistances. The selective targeting of individual BET and the discrimination between BD1 and BD2 present an opportunity to achieve more selective transcriptional effect. A midthroughput screening of previously designed chemical library allowed identification of two molecules with unique profiles of selectivity that have never been observed. An undertaken structure-based program revealed a minimum scaffolds necessary for binding. Taking together with resolved X-Ray structures it allowed the development of more potent and selective BET inhibitors by DOTS (diversity oriented target focused synthesis) strategy, combining virtual screening and diversity oriented library design. This optimization led to a potent inhibitor with up to 100-fold improvement of affinity to the target and up to 300-fold selectivity toward BD1. Dose-response downregulation of c-Myc levels in low micromolar range in cell assays allowed the validation of the identified molecule as a chemical probe. Further comprehensive in vitro and in vivo evaluations of this compound will enable elucidating the biological role of each bromodomain and a validation of the interest toward the development of selective inhibitors in clinic
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Abdel-Rahman, Tarek. "Mixture of Factor Analyzers (MoFA) Models for the Design and Analysis of SAR Automatic Target Recognition (ATR) Algorithms." The Ohio State University, 2017. http://rave.ohiolink.edu/etdc/view?acc_num=osu1500625807524146.
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Sarabi, Andisheh. "Logic Synthesis with High Testability for Cellular Arrays." PDXScholar, 1994. https://pdxscholar.library.pdx.edu/open_access_etds/4752.
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The new Field Programmable Gate Array (FPGA) technologies and their structures have opened up new approaches to logic design and synthesis. The main feature of an FPGA is an array of logic blocks surrounded by a programmable interconnection structure. Cellular FPGAs are a special class of FPGAs which are distinguished by their fine granularity and their emphasis on local cell interconnects. While these characteristics call for specialized synthesis tools, the availability of logic gates other than Boolean AND, OR and NOT in these architectures opens up new possibilities for synthesis. Among the possible realizations of Boolean functions, XOR logic is shown to be more compact than AND/OR and also highly testable. In this dissertation, the concept of structural regularity and the advantages of XOR logic are used to investigate various synthesis approaches to cellular FPGAs, which up to now have been mostly nonexistent. Universal XOR Canonical Forms, Two-level AND/XOR, restricted factorization, as well as various Directed Acyclic Graph structures are among the proposed approaches. In addition, a new comprehensive methodology for the investigation of all possible XOR canonical forms is introduced. Additionally, a new compact class of XOR-based Decision Diagrams for the representation of Boolean functions, called Kronecker Functional Decision Diagrams (KFDD), is presented. It is shown that for the standard, hard, benchmark examples, KFDDs are on average 35% more compact than Binary Decision Diagrams, with some reductions of up to 75% being observed.
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Javaheri, Fatemeh Negin. "Synthèse automatique de circuits numériques à partir de spécifications temporelles." Thesis, Université Grenoble Alpes (ComUE), 2015. http://www.theses.fr/2015GREAT083/document.
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Les travaux présentés dans cette thèse visent à produire automatiquement des prototypes de circuits de communication et de contrôle à partir de spécifications temporelles déclaratives. Partant d'un ensemble de propriétés écrites en langage PSL, nous produisons un modèle RTL synthétisable automatiquement. La méthode proposée est modulaire, contrairement aux méthodes publiées antérieurement qui étaient fondées sur la théorie des automates. Pour chaque propriété, nous produisons un composant qui observe certains opérandes et génère des chronogrammes pour les autres opérandes : le module réactif. Tout d'abord, une bibliothèque des modules réactifs primitifs a été développée pour les opérateurs FL et SERE. Pour ce faire, une relation de dépendance a été définie pour chaque opérateur : fondée sur la sémantique de l'opérateur, elle exprime la dépendance entre ses opérandes. Ensuite, la relation de dépendance de chaque opérateur est interprétée comme un composant matériel qui met en œuvre l'opérateur : c'est le module réactif primitif de l'opérateur. À l'aide de cette formalisation, nous proposons une méthode pour déterminer automatiquement quels signaux d'une propriété sont observés et lesquels sont générés. Dans le cas où il n'est pas possible de déterminer le sens du signal, un solveur est ajouté pour identifier la valeur du signal. Le solveur sert aussi à déterminer la valeur d'un signal généré par plusieurs propriétés. Le circuit final est l'interconnexion des modules réactifs et des solveurs pour l'ensemble des propriétés. Un outil prototype, SyntHorus2, qui est une extension d'HORUS, a été mis développé. Il prend les propriétés PSL comme entrées et génère le code VHDL synthétisable du circuit. En outre, il génère des propriétés complémentaires pour vérifier si l'ensemble des spécifications est cohérent et complet. La méthode est efficace et synthétise des circuits de commande en quelques secondes. Les résultats que nous avons obtenus sur des jeux d'essais classiques montrent que notre technique compile les propriétés plus efficacement que les outils prototypes qui l'ont précédéeThe work presented in this thesis aims at automatically prototype communication and control designs from declarative temporal specifications. From a set of PSL properties, we produce a synthesizable RTL design automatically. The proposed method is modular, in contrast to previously published methods that were based on automata theory. From each property, we produce a component that observes some operands and generates waveforms for the other operands: the reactant. First, a library of primitive reactants has been provided for FL and SERE operators. To this goal, a dependency relation is defined for each operator that expresses the dependency among its operands using the operator's semantics. Then, the dependency relation of each operator is interpreted as a hardware component that implements the operator: the operator's primitive reactant. Using this formalization, a method is proposed to automatically decide which signals of a property are observed and which are generated. In the cases when specifying the signal direction is not possible, a solver is implemented to identify the signal value. In addition, the way of identifying the value of the signal that is generated in several properties is addressed. The final circuit is the interconnection of the properties' reactants and solvers. A prototype tool SyntHorus2, which is an extension to HORUS, has been developed. It takes PSL properties as its inputs, and generates the synthesizable VHDL code of the circuit. In addition, it generates some complementary properties to verify if the set of specification is coherent and complete. The method is efficient, and synthesizes control circuits in a few seconds. Results obtained on classical benchmarks show that our technique compiles properties more efficiently than previous prototype tools
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Moraes, Fernando Gehm. "Synthese topologique de macro-cellules en technologie cmos." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 1994. http://hdl.handle.net/10183/17853.
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Les problèmes majeurs de la génération automatique du dessin des masques des circuits intégrés sont la dépendance vis-à-vis des règles de dessin et le dimensionnement correct des transistors. Les méthodes traditionnelles, telles que l'utilisation de cellules pré-caractérisées, manquent de flexibilité, car les portes des bibliothèques (en nombre limité) sont dessinées et dimensionnées (independarnment de l'application) pour une technologie donnée. Les méthodes de synthèse automatique du dessin des masques ont pour but de surmonter ces problèmes. Les techniques les plus couramment utilisées sont le "gate-matrix" et le "linear-matrix". L'indépendance vis-à-vis des règles de dessin est obtenue en utilisant la technique de description symbolique (dessin sous une grille unitaire), et les dimensions des transistors sont définies par le concepteur ou par un outil de dimensionnement. Nous proposons une méthode et un prototype logiciel pour la synthèse automatique des masques, en utilisant le style "linear-matrix multi-bander". La description d'entree du générateur est un fichier format SPICE (au niveau transistor), ce qui permet d'avoir un nombre très élevé de cellules, en particulier les portes complexes (A01), et ainsi avoir une meilleure optimisation lors de la phase d'assignation technologique. Les macro-cellules générées doivent être assemblées afin de réaliser un circuit complet. Deux contraintes supplémentaires sont ainsi imposées au générateur: malléabilité de la forme et position des broches d'entrées/sorties sur la périphérie de la macro-cellule. Les macro-cellules sont assemblées en utilisant un environnement de conception industriel. Les contributions de ce mémoire de doctorat sont d'une part le développement d'un générateur de macro-cellules flexible ayant les caracteristiques d'indépendance aux règles de dessin et d'intégration dans un environnement de macro-cellules, et d'autre part l'étude detailée des paramètres qui déterminent la surface occupée, les performances électriques et la puissance dissipée des macro-cellules générées automatiquement.The main problems of the automatic layout synthesis are the design rules dependence and the transistor sizing. The traditional layout synthesis methods, like standard-cells, are not flexible, since the cells in the libraries are designed and sized for a specific technology. In this way, the designer must change his library at each technology improvement. The automatic layout synthesis methods overcomes these problems (design rules dependence and transistor sizing). Examples of layout styles are gate-matrix and linear-matrix. The technology independence is achieved by symbolic description (layout under an unitary grid), and the transistor sizes are defined by the designer or by a sizing tool. From these two constraints, we develop an automatic layout synthesis tool, using a linear-matrix multi-row layout style. The input description for our tool is a Spice file. This descriptions allows to define a greater number of cells (mainly AOIs gates), resulting a technology mapping with less constraints. The generated macro-cells must be assembled in order to construct a complete circuit. Two additional constraints are then imposed to the generator : variable aspect ratio and placement of the inputs/outputs pins in the macro-cell border. The macro-cells are assembled by an industrial CAD environment. The main contributions of this thesis are the development of a macro-cell generator (with the characteristics of technology independence and easy integration in a macro-cell environment) and the analysis of the parameters playing a role in the area, delay and power consumption.
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Samanta, Roopsha. "Program reliability through algorithmic design and analysis." 2013. http://hdl.handle.net/2152/23103.
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Software systems are ubiquitous in today's world and yet, remain vulnerable to the fallibility of human programmers as well as the unpredictability of their operating environments. The overarching goal of this dissertation is to develop algorithms to enable automated and efficient design and analysis of
reliable programs.
In the first and second parts of this dissertation, we focus on the development of programs that are free from programming errors. The intent is not to eliminate the human programmer, but instead to complement his or her expertise, with sound and efficient computational techniques, when possible. To this end, we make contributions in two specific domains.
Program debugging --- the process of fault localization and error elimination from a program found to be incorrect --- typically relies on expert human intuition and experience, and is often a lengthy, expensive part of the program development cycle. In the first part of the dissertation, we target automated debugging of sequential programs. A broad and informal statement of the (automated) program debugging problem is to suitably modify an
erroneous program, say P, to obtain a correct program, say P'. This problem is undecidable in general; it is hard to formalize; moreover, it is particularly challenging to assimilate and mechanize the customized, expert
programmer intuition involved in the choices made in manual program debugging. Our first contribution in this domain is a methodical formalization of the program debugging problem, that enables automation, while incorporating expert programmer intuition and intent. Our second contribution is a solution framework that can debug infinite-state, imperative, sequential programs written in higher-level programming languages such as C. Boolean programs, which are smaller, finite-state abstractions of infinite-state or large, finite-state programs, have been found to be tractable for program verification. In this dissertation, we utilize Boolean programs for program debugging. Our solution framework involves two main steps: (a) automated debugging of a Boolean program, corresponding to an erroneous program P, and (b) translation of the corrected Boolean program into a correct program P'.
Shared-memory concurrent programs are notoriously difficult to write, verify
and debug; this makes them excellent targets for automated program
completion, in particular, for synthesis of synchronization code. Extant work
in this domain has focused on either propositional temporal logic specifications with simplistic models of concurrent programs, or more refined
program models with the specifications limited to just safety properties. Moreover, there has been limited effort in developing adaptable and fully-automatic synthesis frameworks that are capable of generating synchronization at different levels of abstraction and granularity. In the
second part of this dissertation, we present a framework for synthesis of
synchronization for shared-memory concurrent programs with respect to temporal logic specifications. In particular, given a concurrent program composed of synchronization-free processes, and a temporal logic specification describing their expected concurrent behaviour, we generate synchronized processes such
that the resulting concurrent program satisfies the specification. We
provide the ability to synthesize readily-implementable synchronization code
based on lower-level primitives such as locks and condition variables. We
enable synchronization synthesis of finite-state concurrent programs composed of processes that may have local and shared variables, may be straight-line or branching programs, may be ongoing or terminating, and may have program-initialized or user-initialized variables. We also facilitate
expression of safety and liveness properties over both control and data
variables by proposing an extension of propositional computation tree logic.
Most program analyses, verification, debugging and synthesis methodologies target traditional correctness properties such as safety
and liveness. These techniques typically do not provide a quantitative
measure of the sensitivity of a computational system's behaviour to
unpredictability in the operating environment. We propose that the
core property of interest in reasoning in the presence of such uncertainty is robustness --- small perturbations to the operating environment do not change the system's observable behavior substantially. In well-established areas such as control theory, robustness has always been a fundamental concern; however, the
techniques and results therein are not directly applicable to computational systems with large amounts of discretized, discontinuous
behavior. Hence, robustness analysis of software programs used in heterogeneous settings necessitates development of new theoretical
frameworks and algorithms.
In the third part of this dissertation, we target robustness analysis of two
important classes of discrete systems --- string transducers and networked
systems of Mealy machines. For each system, we formally define robustness of the system with respect to a specific source of uncertainty. In particular, we
analyze the behaviour of transducers in the presence of input perturbations,
and the behaviour of networked systems in the presence of channel
perturbations. Our overall approach is automata-theoretic, and necessitates the use of specialized distance-tracking automata for tracking various
distance metrics between two strings. We present constructions for such
automata and use them to develop decision procedures based on reducing the problem of robustness verification of our systems to the problem of checking
the emptiness of certain automata. Thus, the system under consideration is robust if and only if the languages of particular automata are empty.text
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SUN, LI-FANG, and 孫黎芳. "Design of an automated synthesis for digital systems." Thesis, 1988. http://ndltd.ncl.edu.tw/handle/08685163938876241298.
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Nicaise, Fabien. "Automated Design Synthesis of Structures using Growth Enhanced Evolution." Thesis, 2008. https://thesis.library.caltech.edu/5231/1/main.pdf.
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Engineering design is a complex problem on generating and evaluating a variety of options. In traditional methods, this typically involves evaluating up to a dozen different point designs. The limit on the process is the amount of time to generate, refine, and evaluate the various concepts. Using a computer helps to speed up the process, but human involvement still remains the weakest link.
The natural extension of this process is to continually and rapid generate, refine, and evaluate concepts entirely automatically. Evolutionary Algorithms provide such a method, by emulating natural evolution. The computer maintains a population point design, each of which is represented by a gene string that is allowed to change (mutate) and combine with other genes (crossover). At each generation, every individual is modified then evaluated and the improved solutions proceed to the next generation.
This thesis will extend the biological model by introducing a growth process to each individual. This is akin to the concept of a multi-cellular organism developing in the womb. An encoding for discrete truss structures is described that provides for such an extension. The truss grows from a few basic elements. After showing several examples demonstrating the growth process, the method is applied to a couple simple examples using evolutionary algorithms.
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Williams, Joshua Murry. "Automated conceptual design of manufacturing workcells in radioactive environments." 2013. http://hdl.handle.net/2152/21429.
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The design of manufacturing systems in hazardous environments is complex, requiring interdisciplinary knowledge to determine which components and operators (human or robotic) are feasible. When conceptualizing designs, some options may be overlooked or unknowingly infeasible due to the design engineers' lack of knowledge in a particular field or ineffective communication of requirements between disciplines. To alleviate many of these design issues, we develop a computational design tool to automate the synthesis of conceptual manufacturing system designs and optimization of preliminary layouts. To generate workcell concepts for manufacturing processes, we create a knowledge-based system (KBS) that performs functional modeling using a common language, a generic component database, and a rule set. The KBS produces high-level task plans for specific manufacturing processes and allocates needed material handling tasks between compatible human and/or robotic labor. We develop an extended pattern search (EPS) algorithm to optimize system layouts based on worker dose and cycle time minimization using the functions and sequencing of generated task plans. The KBS and EPS algorithm were applied to the design of glovebox processing systems at Los Alamos National Laboratory (LANL). Our computational design tool successfully generates design concepts with varied task allocation and processing sub-tasks and layouts with favorable manipulation workspaces. This work establishes a framework for automated conceptual design while providing designers with a beneficial tool for designing manufacturing systems in an interdisciplinary and highly constrained domain.text
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Mirjafari, Mehran. "Automated Synthesis Tool for Design Optimization of Power Electronic Converters." Thesis, 2013. http://hdl.handle.net/1969.1/149257.
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Designers of power electronic converters usually face the challenge of having multiple performance indices that must be simultaneously optimized, such as maximizing efficiency while minimizing mass or maximizing reliability while minimizing cost. The experienced engineer applies his or her judgment to reduce the number of possible designs to a manageable number of feasible designs for which to prototype and test; thus, the optimality of this design-space reduction is directly dependent upon the experience, and expertise and biases of the designer. The practitioner is familiar with tradeoff analysis; however, simple tradeoff studies can become difficult or even intractable if multiple metrics are considered. Hence a scientific and systematic approach is needed. In this dissertation, a multi-objective optimization framework is presented as a design tool.
Optimization of power electronic converters is certainly not a new subject. However, when limited to off-the-shelf components, the resulting system is really optimized only over the set of commercially available components, which may represent only a subset of the design space; the reachable space limited by available components and technologies. While this approach is suited to cost-reduce an existing design, it offers little insight into design possibilities for greenfield projects.
Instead, this work uses the Technology Characterization Methods (TCM) to broaden the reachable design space by considering fundamental component attributes. The result is the specification for the components that create the optimal design rather than an evaluation of an apriori selected set of candidate components. A unique outcome of this approach is that new technology development vectors may emerge to develop optimized components for the optimized power converter. The approach presented in this work uses a mathematical descriptive language to abstract the characteristics and attributes of the components used in a power electronic converter in a way suitable for multi-objective and constrained optimization methods.
This dissertation will use Technology Characterization Methods (TCM) to bridge the gap between high-level performance attributes and low-level design attributes where direct relationship between these two does not currently exist. The loss and size models for inductors, capacitors, IGBTs, MOSFETs and heat sinks will be used to form objective functions for the multi-objective optimization problem. A single phase IGBT-based inverter is optimized for efficiency and volume based on the component models derived using TCM. Comparing the obtained designs to a design, which can be made from commercial off-the-shelf components, shows that converter design can be optimized beyond what is possible from using only off-the-shelf components. A module-integrated photovoltaic inverter is also optimized for efficiency, volume and reliability. An actual converter is constructed using commercial off-the-shelf components. The converter design is chosen as close as possible to a point obtained by optimization. Experimental results show that the converter modeling is accurate. A new approach for evaluation of efficiency in photovoltaic converter is also proposed and the front-end portion of a photovoltaic converter is optimized for this efficiency, as well as reliability and volume.
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Radhakrishnan, Pradeep 1984. "Automated design of planar mechanisms." Thesis, 2014. http://hdl.handle.net/2152/24806.
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The challenges in automating the design of planar mechanisms are tremendous especially in areas related to computational representation, kinematic analysis and synthesis of planar mechanisms. The challenge in computational representation relates to the development of a comprehensive methodology to completely define and manipulate the topologies of planar mechanisms while in kinematic analysis, the challenge is primarily in the development of generalized analysis routines to analyze different mechanism topologies. Combining the aforementioned challenges along with appropriate optimization algorithms to synthesize planar mechanisms for different user-defined applications presents the final challenge in the automated design of planar mechanisms. The methods presented in the literature demonstrate synthesis of standard four-bar and six-bar mechanisms with revolute and prismatic joints. But a detailed review of these methods point to the fact that they are not scalable when the topologies and the parameters of n-bar mechanisms are required to be simultaneously synthesized. Through this research, a comprehensive and scalable methodology for synthesizing different mechanism topologies and their parameters simultaneously is presented that overcomes the limitations in different challenge areas in the following ways. In representation, a graph-grammar based scheme for planar mechanisms is developed to completely describe the topology of a mechanism. Grammar rules are developed in conjunction with this representation scheme to generate different mechanism topologies in a tree-search process. In analysis, a generic kinematic analysis routine is developed to automatically analyze one-degree of freedom mechanisms consisting of revolute and prismatic joints. Two implementations of kinematic analysis have been included. The first implementation involves the use of graphical methods for position and velocity analyses and the equation method for acceleration analysis for mechanisms with a four-bar loop. The second implementation involves the use of an optimization-based method that has been developed to handle position kinematics of indeterminate mechanisms while the velocity and acceleration analyses of such mechanisms are carried out by formulating appropriate linear equations. The representation and analysis schemes are integrated to parametrically synthesize different mechanism topologies using a hybrid implementation of Particle Swarm Optimization and Nelder-Mead simplex algorithm. The hybrid implementation is able to produce better results for the problems found in the literature using a four-bar mechanism with revolute joints as well as through other higher order mechanisms from the design space. The implementation has also been tested on three new challenge problems with satisfactory results subject to computational constraints. The difficulties in the search have been studied that indicates the reasons for the lack of solution repeatability. This dissertation concludes with a discussion of the results and future directions.text
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Pal, Ujjwal. "A Computational Platform For Automated Identification Of Building Blocks In Mechanical Design For Enhancing Ideation." Thesis, 2012. http://hdl.handle.net/2005/2555.
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Conceptual design is an early stage in the design process, in which functional requirements of a design problem are transformed into solution concepts for satisfying the requirements. It is regarded as a crucial step in design, because decisions made in this stage will strongly affect all the subsequent stages of the design process. Research evidence suggests that inspiration is useful for exploration and discovery of new solution spaces, and exploration of a wide variety of concepts increases the chances of developing more novel, and hence more creative solutions.
There are various approaches to providing inspiration, e.g., creativity techniques such as trigger word technique, biomimetics such as Idea-Inspire, and computational synthesis approaches such as compositional synthesis. Computational synthesis tools are used for automated generation of concepts, which can be offered to the designer as triggers for inspiring ideation. The advantage of using solutions from computational synthesis as triggers are the following: the solutions can be produced in a relatively unbiased manner, allowing a variety of directions to be explored, and the solutions are exhaustive within the constraints of the databases or rules used, allowing a multitude of possibilities to be offered. However, computational synthesis has been traditionally used for automating solution generation, rather than creating triggers for designers’ ideation. Notwithstanding their potential for inspiring ideation, current computational synthesis approaches rarely focused on this task. One exception is FuncSION, a compositional synthesis tool, which can automatically synthesize solution concepts for mechanical devices, where a set of input and output characteristics i.e. functional requirements are provided by the user and the computer generates solutions by combining building blocks from a library to satisfy the requirements; these solutions are then used as stimuli for ideation by designers. The focus of this thesis is on evaluating and improving the effectiveness of computational synthesis in triggering ideation during conceptual design, in terms of improving the fluency and variety of the concept space produced. FuncSION has been used as the example synthesis approach on which the work has been focused. In order to evaluate the effectiveness of FuncSION in terms of fluency and variety, a method for assessing variety of a concept space is proposed, and a tool for supporting the assessment process has been developed.
However, compositional synthesis research has always assumed that the building blocks are given, and has confined its focus on the process of combining the building blocks. It has not been investigated as to how such building blocks can be automatically identified. If new building blocks can be automatically identified, the resulting change in the library of building blocks would have a substantial effect on the outcomes of compositional synthesis, i.e. the triggers that can be offered to the designers for ideation, with a resulting effect on the concepts generated by the designers. Therefore, in this thesis, an automated method for building blocks synthesis has been proposed, and has been implemented as a computational tool.
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Cheng, Yue Lung, and 鄭玉龍. "Design of an automated structured fault tree synthesis method based on system decomposition." Thesis, 1995. http://ndltd.ncl.edu.tw/handle/55098151839570610272.
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Radhakrishnan, Pradeep 1984. "A graph grammar scheme for representing and evaluating planar mechanisms." Thesis, 2010. http://hdl.handle.net/2152/ETD-UT-2010-05-1393.
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There are different phases in any design activity, one of them being concept generation. Research in automating the conceptual design process in planar mechanisms is always challenging due to the existence of many different elements and their endless combinations. There may be instances where designers arrive at a concept without considering all the alternatives. Computational synthesis aims to arrive at a design by considering the entire space of valid designs. Different researchers have adopted various methods to automate the design process that includes existence of similar graph grammar approaches. But few methods replicate the way humans’ design. An attempt is being made in the thesis in this direction and as a first step, we focus on representing and evaluating planar mechanisms designed using graph grammars. Graph grammars have been used to represent planar mechanisms but there are disadvantages in the methods currently available. This is due to the lack of information in understanding the details of a mechanism represented by the graph since the graphs do not include information about the type of joints and components such as revolute links, prismatic blocks, gears and cams. In order to overcome drawbacks in the existing methods, a novel representation scheme has been developed. In this method, labels and x, y position information in the nodes are used to represent the different mechanism types. A set of sixteen grammar rules that construct different mechanisms from the basic seed is developed, which implicitly represents a tree of candidate solutions. The scheme is tested to determine its capability in capturing the entire set of feasible planar mechanisms of one degree of freedom including Stephenson and double butterfly linkages. In addition to the representation, another important consideration is the need for an accurate and generalized evaluator for kinematic analysis of mechanisms which, given the lack of information, may not be possible with current design automation schemes. The approach employed for analysis is purely kinematic and hence the instantaneous center of rotation method is employed in this research. The velocities of pivots and links are obtained using the instant center method. Once velocities are determined, the vector polygon approach is used to obtain accelerations and geometrical intersection to determine positions of pivots. The graph grammar based analysis module is implemented in an existing object-oriented grammar framework and the results have found this to be superior to or equivalent to existing commercial packages such as Working Model and SAM for topologies consisting of four-bar loop chain with single degree of freedom.text
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Patel, Jay K. 1978. "An approach to automate the synthesis of sheet metal parts." 2008. http://hdl.handle.net/2152/17895.
Full textAbstract:
In this research, an approach is developed to automate the design for sheet metal parts that are not only novel and manufacturable but also satisfies multiple objective functions such as material cost. Unlike commercial software tools such as Pro/SHEETMETAL which aids the user in finalizing and determining the sequence of manufacturing operations for a specified component, our approach starts with spatial constraints in order to create the component geometries and helps the designer design. While there is an enormous set of parts that can feasibly be generated with sheet metal, it is difficult to define this space systematically. To solve this problem, we currently have 108 design rules that have been developed for five basic sheet metal operations: slitting, notching, shearing, punching and bending. The technique revealed here represents candidate solutions as a graph of nodes and arcs where each node is a rectangular patch of sheet metal, and modifications are progressively made to the sheet to maintain the parts manufacturability. They are presented in the form of Standard Tessellation Language files (.stl) that can be transferred into available modeling software for further analysis. The overall purpose of this research is to provide creative designs to the designer granting him/her a new perspective and to check all the solutions for manufacturability in the early stage of design process. The abovementioned automation approach uses a new topological optimization technique to solve graph based engineering design problems by decoupling parameters and topology changes. This technique namely Topological and Parametric Tune and Prune (TP²) is the first topology optimization method that has been developed specifically for domains representable by a graph grammar schema. The method is stochastic and incorporates distinct phases for modifying the topologies and modifying parameters stored within topologies. Thus far, with the problems that been tested, (TP²) had proven better than genetic algorithm in terms of the quality of solutions and time taken to acquire them.text
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Lee, Cin-Young. "Efficient Automatic Engineering Design Synthesis Via Evolutionary Exploration." Thesis, 2002. https://thesis.library.caltech.edu/6369/1/Lee_c_2002.pdf.
Full textAbstract:
The evolution of designs in nature has been the inspiration for this thesis, which seeks to develop a framework for efficient automatic engineering design synthesis based on evolutionary methods.
The design synthesis process is equated to an evolutionary process. Because of this, the same formalization for evolution, the evolution algorithm, is used as a design synthesis formalism. Implementation of the evolution algorithm on a computer allows evolution of non-biological systems, and, hence, automatic engineering design synthesis. The early and canonical versions of such evolutionary computation are bare bones evolution tools that neglect several key aspects of evolutionary systems. Some universal aspects of good designs are identified, three of which are dealt with in this thesis. These are variable complexity, modularity, and speciation.
Framed in an evolutionary context, each of these characteristics are requisites for being able to evolve in correspondence with a dynamic environment. Those that are most evolvable will survive. After all, if a species cannot evolve quickly enough with changes in the environment, it will perish. In a design context, this indicates that the characteristics are vital for efficiency and shorter design cycles.
An integrated framework is developed to address all three aspects individually or in any combination thereof, which has not been done heretofore. Because of the poor theoretical foundations of evolutionary computation, the effectiveness of the developed approach is determined through computer experimentation on several test and design problems. Results are promising as all three
aspects were successfully achieved in comparison to canonical evolutionary computation.
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Jie, Yung, and 羅永杰. "Automatic Synthesis Design for Energy Harvesting IC Systems." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/26486938212238586982.
Full textAbstract:
碩士國立高雄第一科技大學
電子工程研究所
99
In this paper, an automatic design tool for energy-harvesting circuit and system is developed with the visual basic (VB) software. The synthesis tool can be used to shorten the design time to market. The design has charge controller and maximum power point tracking (MPPT), in order to achieve optimal battery charging control function. Meanwhile, a smart metering system is developed to measure the energy-harvesting system’s information with an online system. In this way, users can get the proposed system’s information at any time and from anywhere. Finally, computer simulations and experimental results demonstrate the superior performance of the proposed technique. Three chips are finished in this thesis. All of the chips had been taped out through the design flow of the Chip Implementation Center (CIC). These chips are analog pulse-width modulator (APWM) IC, digital pulse-width modulator (DPWM) IC, and analog to digital converter (ADC) IC, respectively. The ICs are combined with an 8-bit microcontroller chip to implement the novel solar charger.
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Bell, Robert Henry. "Automatic workload synthesis for early design studies and performance model validation." Thesis, 2005. http://hdl.handle.net/2152/2392.
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Chung, Ching-Che, and 鍾菁哲. "Automatic Synthesis of Timing-Locked Loops for SoC Designs." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/79566070446025129456.
Full textAbstract:
博士國立交通大學
電子工程系
92
In this dissertation, the designs for All-Digital Phase-Locked Loop (ADPLL) and All-Digital Delay-Locked Loop (ADDLL) are presented. The proposed flexible ADPLL/ADDLL architectures can easily be modified to fit different applications and achieve fast lock-in time. The proposed automated synthesis methodology uses both benefits of digital VSLI and cell-based design to build up user-specified ADPLL/ADDLL in a short time, making it very suitable for System-on-Chip (SoC) applications. This dissertation first presents a scheme to overcome the limitations of standard cells and to build up high resolution delay cell and high sensitivity Phase and Frequency detector (PFD). Then the proposed fine-tuning delay cell and PFD are applied to ADPLL/ADDLL. Time-to-Digital Converter (TDC) is widely used in the proposed ADPLL/ADDLL architecture to reduce frequency/phase acquisition time. Then design for the proposed DLL-based All-Digital Multi-phase Clock Generator (ADMCG) is presented. In ADMCG design, TDC is used to choose a suitable delay range to avoid false-lock to harmonics. Finally, a synthesis approach for ADPLL/ADDLL/ADMCG design is presented. As a result, the gate-level Hardware Description Language (HDL) codes of ADPLL/ADDLL/ADMCG can be automatically generated using standard cells from cell-library. Hence both design time and design complexity of ADPLL/ ADDLL/ADMCG is greatly reduced by the proposed methodology.