Relevant bibliographies by topics / BCB etching

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Conference papers
  4. Reports

Academic literature on the topic 'BCB etching'

Author: Grafiati
Published: 4 June 2021
Last updated: 9 February 2022

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Journal articles on the topic "BCB etching"

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Ishutkin, Sergey, Vadim Arykov, Igor Yunusov, Mikhail Stepanenko, Pavel Troyan, and Yury Zhidik. "Technological Development of an InP-Based Mach–Zehnder Modulator." Symmetry 12, no. 12 (2020): 2015. http://dx.doi.org/10.3390/sym12122015.

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This paper presents the results of the development of a technology for manufacturing electro-optical Mach–Zehnder modulators based on InP. The key features of the technology are the use of one SiNx double-patterned dielectric mask with two sequential inductively coupled plasma (ICP) etchings of the heterostructure for the simultaneous formation of active and passive sections of the modulator’s optical waveguides. This prevents misalignment errors at the borders. The planarization of the wafer surface was performed using photosensitive benzocyclobutene (BCB) films in a combined scheme. Windows in the BCB film to the bottom ohmic contact and at the die boundaries were formed by lithography, and then the excess thickness of the BCB film was removed by ICP etching until the p-InGaAs contact regions of the p-i-n heterostructure were exposed. The deposition and annealing of the top ohmic contact Ti/Pt/Au (50/25/400 nm) to p-InGaAs was carried out after the surface planarization, with the absence of both deformation and cracking of the planarizing film. A new approach to the division of the wafers into single dies is presented in this paper. The division was carried out in two stages: first, grooves were formed by dicing or deep wet etching, and then cleaving was performed along the formed grooves. The advantages of these techniques are that it allows the edges of the waveguides at the optical input/outputs to be formed and the antireflection coating to be deposited simultaneously on all dies on the wafer, before it is divided.
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Liew, Li-Anne, D. Boteler, C. Y. Lin, N. Marsiglia, and Y. C. Lee. "Design and Fabrication of a PCB MEMS Module With Integrated Switches and Sensor Suite." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2015, DPC (2015): 001070–122. http://dx.doi.org/10.4071/2015dpc-tp63.

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We demonstrate the feasibility of integrating Kapton-based MEMS capacitive switches and a sensor suite onto a printed circuit board (PCB) with minimal impact to existing manufacturing processes. Copper-cladded kapton laminates were bonded onto rigid PCB substrates with a BCB film spacer. The kapton was patterned using reactive ion etching to produce MEMS structures such as suspended membranes and flexures. Atomic layer deposited alumina coatings were applied as dielectric layers for the capacitive switches and tilt sensors/accelerometers. The copper cladding was also patterned by etching to function as electrical leads, resistors, and capacitive electrodes. In this way, MEMS switches, tilt/acceleration sensors, temperature sensors, humidity sensors, and vacuum pressure sensors, were all fabricated monolithically onto a PCB in a single module. We describe the fabrication process, challenges and improvements to the process in particular in the bonding and etching of the kapton films. We also describe the design of the various sensors and switches and demonstrate their functionality.
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Zhang, A. Z., S. A. Reshanov, Adolf Schöner, et al. "Planarization of Epitaxial SiC Trench Structures by Plasma Ion Etching." Materials Science Forum 821-823 (June 2015): 549–52. http://dx.doi.org/10.4028/www.scientific.net/msf.821-823.549.

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In this work, we present a planarization concept for epitaxial SiC trench structures involving reactive ion etching (RIE) and inductive coupled plasma (ICP) dry etching. The general idea is to transfer the flat surface from spun-on BCB/photo-resist layers to deposited silicon dioxide and finally to bulk SiC by applying process conditions with the same etch rate for the different materials. In this way several microns of unwanted material can be removed and planar SiC surfaces are obtained. With this method trench structures filled by epitaxial re-growth can be planarized with smooth surfaces and good homogeneity over the wafer. Cost-efficient device manufacturing can be achieved by using standard semiconductor process equipment. This technology makes it possible to manufacture advanced epitaxial SiC material structures for devices such as trench JBS diodes and double-gate trench JFETs.
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Seok, S., N. Rolland, and P. A. Rolland. "Zero-level packaging using BCB adhesive bonding and glass wet-etching for W-band applications." Electronics Letters 42, no. 13 (2006): 755. http://dx.doi.org/10.1049/el:20061103.

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Zoschke, Kai, J. U. Kim, M. Wegner, et al. "Laser Direct Patterning of Dry Etch BCB Adhesive Layers for Low Temperature Permanent Wafer-to-Wafer Bonding." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2016, DPC (2016): 001222–54. http://dx.doi.org/10.4071/2016dpc-wp13.

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To enable advanced wafer level packaging approaches for devices like MEMS, image sensors or optical elements, wafer-to-wafer bonding processes using structured low temperature curable adhesives are required. A lot of Benzocyclobutene (BCB)-based wafer bonding works have been reported in the past showing a broad range of applications and good performance, but also some limitations such as long bond cycles and high cure temperature of 250 °C. In 2013 new process concepts were demonstrated [1], showing that wafer bond cycle time can be reduced to less than 10 min and a post bond batch cure at temperatures below 200 °C can be used to significantly shrink the overall cost of a BCB-based adhesive wafer bonding process. In order to create a patterned BCB bond layer, photo structuring of CYCLOTENE ® 4000 Resin is one solution. However, due to the decreased flow capability of that material after exposure, high bond forces and extended bonding times during wafer bonding as well as nearly flat surfaces with low topography are required for void-free bonding. To overcome these limitations, an increased material flow capability during wafer bonding is required. In this context non-photo sensitive CYCLOTENE ® 3000 Resin is suitable, since it has excellent flow capability in non-cured state. However, non-cured CYCLOTENE ® 3000 Resin cannot be structured with standard dry etching processes using a photo resist layer as mask. In order to enable patterned adhesive bonding based on CYCLOTENE ® 3000 Resin, alternative structuring methods have to be evaluated. One method was presented in [1] which is transfer printing of CYCLOTENE ® 3000 Resin from a help wafer to topography features of the device wafer. Although very good results were obtained, the method is restricted to applications with significant topography to enable the transfer printing. In this work we focus on a new structuring method for non-cured BCB layers formed from CYCLOTENE ® 3000 Resin. The layers were spin coated, baked and subsequently patterned using a 248 nm excimer laser stepper. The system features a 2.5× mask projection with a resulting exposure field of 6.5 × 6.5 mm2 and allows a direct ablation patterning of polymers. By using this method bond frame structures were patterned into 5 μm thick BCB layers at 200 mm silicon wafers. The wafers with the structured adhesive were bonded at 80 °C and 0.2 MPa for 5 minutes with 200 mm glass wafers. The bonded wafer stacks were subsequently post bond batch cured at 190 °C. Wafer dicing and shear tests of the bonded structures revealed excellent mechanical robustness of the BCB bond frames. The paper will review the new BCB wafer bond processes for supporting short cycle times with special focus on the new patterning approach by laser ablation. Process flow description as well as systematical analysis of pattern reproducibility of the new structuring method is part of the discussion.
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Seok, S., N. Rolland, and P. A. Rolland. "A novel packaging method using wafer-level BCB polymer bonding and glass wet-etching for RF applications." Sensors and Actuators A: Physical 147, no. 2 (2008): 677–82. http://dx.doi.org/10.1016/j.sna.2008.06.008.

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Vitale, Steven A., Heeyeop Chae, and Herbert H. Sawin. "Etching chemistry of benzocyclobutene (BCB) low-kdielectric films in F2+O2 and Cl2+O2 high density plasmas." Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films 18, no. 6 (2000): 2770–78. http://dx.doi.org/10.1116/1.1310655.

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Toepper, Michael, Tanja Braun, Robert Gernhardt та ін. "BCB-Based Dry Film low k Permanent Polymer with sub 4-μm Vias for Advanced WLP and FO-WLP Applications". International Symposium on Microelectronics 2015, № 1 (2015): 000079–85. http://dx.doi.org/10.4071/isom-2015-tp33.

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There is a strong demand to increase the routing density of the RDL to match the requirements for future microelectronic systems which are mainly miniaturization and performance. Photo-resists for structuring the metallization or acting as a mold for electroplating are common for very fine lines and spaces due to the developments in the front-end processing. For example chemical amplified Photo-resists are now moving in the back-end and wafer level packaging process. The results are mainly governed by the performance of the equipment i.e. the photo-tool. This is different for the permanent dielectric polymer material. The major difference in photo-resists and dielectric photo-polymer are the different functions of the material systems. Photo-resists are only temporary masks for subsequent process steps like etching and plating. This is different for the photo-polymers which are a permanent part of the future systems. In this paper a new technology is discussed which uses a laser scanning ablation process and BCB-Based Dry Film low k Permanent Polymer. Laser ablation of polymers is in principle not a new technology. Low speed and high cost was the major barrier. But the combination of a scanning technology together with quartz masks has opened this technology to overcome the limitation of the current photo-polymer process. The new technology is described in detail and the results of structuring BCB-Based Films down to less than 4 μm via diameter in a 15 μm thick film has been shown. The via side wall can be controlled by the fluence of the laser pulse. Test structures have been designed and fabricated to demonstrate the excellent electrical resistivity of the vias using a two-layer metallization process.
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Du, Xiu Yun, and Zhe Nan Tang. "Thermal Analysis of a Face-to-Back Bonded Four-Layer Stacked 3D IC Model." Key Engineering Materials 562-565 (July 2013): 141–46. http://dx.doi.org/10.4028/www.scientific.net/kem.562-565.141.

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Three dimensional integrated circuits (3D ICs) consisted of stacking and vertically interconnecting are an emerging technology with great potential for improving system performance. 3D integration relies on Through Silicon Via (TSV) interconnection and interlayer bonding between the silicon layers. Due to the advantages of higher device density, lesser signal delay, shorter interconnection length and smaller package size, this technology attracts growing attentions. A number of innovative processes contribute to the realization of 3D IC. These include back grinding, coating, cleaning, etching, wafer thinning, filling of high aspect ratio vias with electroplated copper and interlayer bonding, etc. In this work, finite element models for four-layer stacked TSV-based (Through Silicon Via) 3D IC are established based on the heat distribution of working process caused by heat source in device die, in order to investigate the thermal effects and determine the improvements required. The transient temperature fields of 3D IC structures are obtained. The effects of various geometric parameters and thermal properties on the overall temperature have been analyzed. The result indicates that TSV diameter, pitch, BCB thickness and BEOL conductivity play more important roles to the temperature increment and the maximum temperature of no TSV structures is several times of that of TSV-based structures. The copper provides for an effective heat conduction path, and reduces considerably the overall temperature. It is also shown that the heat path from chip to the bottom surface is the main way for the heat dissipation.
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Gernhardt, Robert, Friedrich Müller, Markus Woehrmann та ін. "Ultra-fine Line Multi-Redistribution Layers with 10 μm Pitch Micro-Vias for Wafer Level and Panel Level Packaging realized by an innovative Excimer Laser Dual Damascene Process". International Symposium on Microelectronics 2017, № 1 (2017): 000120–25. http://dx.doi.org/10.4071/isom-2017-tp45_130.

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Abstract Multi-chip integrated Fan-Out packages and high I/O CSPs demands for higher routing density on wafer level. Due to that, the classical mask aligner lithography and photosensitive thin-film polymers used for BEOL reach its limits and new technologies and materials are necessary to generate lines and space down to two μm. These multi-metal layers set also higher demands on the mechanical properties of the materials. This paper presents a new excimer laser dual damascene process for ultra-fine routing for BEOL. Various materials like low cure temperature polyimide, BCB and 15-μm thick dry-film ABF material are structured by using an excimer laser stepper with a reticle mask to realize feature size below four μm with a high throughput. Micro-vias with a diameter below five μm are realized with high aspect ratio, which overcome the photolithographic limitations of the common used photosensitive thin-film polymers. The laser structuring allows to use innovative dielectric materials for WLP with optimized mechanical and electrical parameters for example inorganic filled polymers like dry-film ABF materials, which do not have to be photosensitive. The ablations depth per laser pulse and the cross-section of the ablated structures in dependence of the ablation parameters was investigated. The depth of embedded lines was set by number of pulses aside of integrated micro-vias. The lines and micro-vias were metallized with copper by galvanic process and the following CMP step removes the copper outside the ablated structures. The CMP removes only the copper and the metal of the seed-layer, which has the functions of an adhesion and barrier layer, stays intact. The under-etching of the conventional wet etch seed layer removal is a major problem for the fine line structures realized by the Laser Dual Damascene process. Due to that, the removal of the seed layer (usually titan) was investigated and it could be shown, that this layer can be removed by the excimer laser system. The stepper like system allows a sub-micron alignment accuracy with no need of a capture pad of the embedded lines. Test structures have been designed and fabricated with lines and spaces below 10 μm to demonstrate the dense multi-layer routing capability where the excellent reliability can be proven by air to air thermal cycling (from −55°C up to 125°C), current leakage and electro migration test.
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Dissertations / Theses on the topic "BCB etching"

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Kumbhat, Nitesh. "New Carbon-Silicon Carbide Composite Board Material for High Density and High Reliability Packaging." Thesis, Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/7100.

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Current board technologies are inherently performance-limited (FR-4) or cost-prohibitive (Al2O3/AlN). Next-generation high-density packaging applications would necessitate a new base substrate material to achieve ultra-fine pitch solder-joint reliability and multiple layers of fine-line wiring at low cost. The NEMI 2000 roadmap defines the need for 4-8 layers of 5-10 m wiring for future system boards. The 2003 ITRS roadmap calls for organic substrates with less than 100-m area-array pitch in the package or board by year 2010. Solder-joint reliability at such fine-pitch is a matter of concern for the industry. Use of underfills reduces thermal stresses but increases cost and, in addition, their dispensing becomes increasingly more complicated with the shorter gaps required for future interconnects. Therefore, there is a pronounced need to evaluate board materials with CTE close to that of Si for reliable flip-chip on board without underfill. Recently, a novel manufacturing process (using polymeric precursor) has been demonstrated to yield boards that have the advantages of organic boards in terms of large-area processability and machinability at potentially low-cost while retaining the high stiffness (~250 GPa) and Si-matched CTE (~2.5 ppm/㩠of ceramics. This work reports the evaluation of novel SiC-based ceramic composite board material for ultra-fine pitch solder-joint reliability without underfill and multilayer support. FE models were generated to model the behavior of flip-chips assembled without underfill and subjected to accelerated thermal cycling. These models were used to calculate solder-joint strains which have a strong direct influence on fatigue life of the solder. Multilayer structures were also simulated for thermal shock testing so as to assess via strains for microvia reliability. Via-pad misregistration was derived from the models and compared for different boards. Experiments were done to assemble flip-chips on boards without underfill followed by thermal shock testing so as to get the number of cycles to failure. To assess microvia reliability, 2 layer structures containing vias of different diameters were fabricated and subjected to thermal cycling. Via-pad misalignment was also studied experimentally. Modeling and experimental results were corroborated so as to evaluate thermomechanical suitability of C-SiC for high-density packaging requirements.
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Frank, Niklaus. "Adhesive Wafer Bonding for Microelectronic and Microelectromechanical Systems." Doctoral thesis, KTH, Signals, Sensors and Systems, 2002. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-3410.

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<p>Semiconductor wafer bonding has been a subject of interestfor many years and a wide variety of wafer bonding techniqueshave been reported in literature. In adhesive wafer bondingorganic and inorganic adhesives are used as intermediatebonding material. The main advantages of adhesive wafer bondingare the relatively low bonding temperatures, the lack of needfor an electric voltage or current, the compatibility withstandard CMOS wafers and the ability to join practically anykind of wafer materials. Adhesive wafer bonding requires nospecial wafer surface treatmentssuch as planarisation.Structures and particles at the wafer surfaces can be toleratedand compensated for some extent by the adhesive material.Adhesive wafer bonding is a comparably simple, robust andlowcost bonding process. In this thesis, adhesive wafer bondingtechniques with different polymer adhesives have beendeveloped. The relevant bonding parameters needed to achievehigh quality and high yield wafer bonds have been investigated.A selective adhesive wafer bonding process has also beendeveloped that allows localised bonding on lithographicallydefined wafer areas.</p><p>Adhesive wafer bonding has been utilised in variousapplication areas. A novel CMOS compatible film, device andmembrane transfer bonding technique has been developed. Thistechnique allows the integration of standard CMOS circuits withthin film transducers that can consist of practically any typeof crystalline or noncrystalline high performance material(e.g. monocrystalline silicon, gallium arsenide,indium-phosphide, etc.). The transferred transducers or filmscan be thinner than 0.3 µm. The feature sizes of thetransferred transducers can be below 1.5 µm and theelectrical via contacts between the transducers and the newsubstrate wafer can be as small as 3x3 µm2. Teststructures for temperature coefficient of resistancemeasurements of semiconductor materials have been fabricatedusing device transfer bonding. Arrays of polycrystallinesilicon bolometers for use in uncooled infrared focal planearrays have been fabricated using membrane transfer bonding.The bolometers consist of free-hanging membrane structures thatare thermally isolated from the substrate wafer. Thepolycrystalline silicon bolometers are fabricated on asacrificial substrate wafer. Subsequently, they are transferredand integrated on a new substrate wafer using membrane transferbonding. With the same membrane transfer bonding technique,arrays of torsional monocrystalline silicon micromirrors havebeen fabricated. The mirrors have a size of 16x16 µm2 anda thickness of 0.34 µm. The advantages of micromirrorsmade of monocrystalline silicon are their flatness, uniformityand mechanical stability. Selective adhesive wafer bonding hasbeen used to fabricate very shallow cavities that can beutilised in packaging and component protection applications. Anew concept is proposed that allows hermetic sealing ofcavities fabricated using adhesive wafer bonding. Furthermore,microfluidic devices, channels and passive valves for use inmicro total analysis systems are presented.</p><p>Adhesive wafer bonding is a generic CMOS compatible bondingtechnique that can be used for fabrication and integration ofvarious microsystems such as infrared focal plane arrays,spatial light modulators, microoptical systems, laser systems,MEMS, RF-MEMS and stacking of active electronic films forthree-dimensional high-density integration of electroniccircuits. Adhesive wafer bonding can also be used forfabrication of microcavities in packaging applications, forwafer-level stacking of integrated circuit chips (e.g. memorychips) and for fabrication of microfluidic systems.</p>
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Liang, Che-Hsin, and 梁哲昕. "Hybrid Heterogeneously Integrated Optical Waveguide by Ultra-thin DVS-BCB Adhesive Bonding of III-V/Silicon using Selective Dry Etching." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/288yav.

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碩士<br>國立中山大學<br>光電工程學系研究所<br>106<br>Nowadays, three-dimensional integrated circuit (3-D IC) plays an important role in integrated circuit and optic communication for low loss transmission and bulk shrinking. We use advanced CMOS processing and active devices’ integration in III-V materials for heterogeneous integration. However, the connection of layer-to-layer and materials structure processing are extremely important. We adopt high selective dry etch and self-alignment technology for light transformation between different materials in submicron-scale waveguides for the sake of making others optical devices and the use of low-loss transmission. In this paper, we combine III-V materials with quantum well and silicon on insulator (SOI) by wafer bonding. Through building quantum well and silicon to be an active layer, we make hybrid nanoscale waveguides and use dry etch with CF4/O2 mixture to achieve selective and clean waveguide processing for mode confined structures. We bond III-V materials and SOI with diluted BCB. In III-V waveguide, we design tapered structure to achieve reflective index matching between III-V waveguide and silicon waveguide for resonant coupling. We input light into silicon waveguide and successfully observe the mode field coupled to III-V waveguide, achieving the connection of layer-to-layer.
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Conference papers on the topic "BCB etching"

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Mischke, Helge, Gabi Gruetzner, and Mark Shaw. "Plasma etching of polymers like SU8 and BCB." In Micromachining and Microfabrication, edited by John A. Yasaitis, Mary Ann Perez-Maher, and Jean Michel Karam. SPIE, 2003. http://dx.doi.org/10.1117/12.472734.

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Lee, Yu-Tao, Dominik Moser, Tobias Holzhammer, Weileun Fang, Oliver Paul, and Patrick Ruther. "Ultrathin, dual-sided silicon neural microprobes realized using BCB bonding and aluminum sacrificial etching." In 2013 IEEE 26th International Conference on Micro Electro Mechanical Systems (MEMS). IEEE, 2013. http://dx.doi.org/10.1109/memsys.2013.6474422.

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Seok, Seonho, Nathalie Rolland, and Paul-Alain Rolland. "A Novel Zero-Level Packaging using BCB Adhesive Bonding and Glass Wet-Etching for Millimeter-Wave Applications." In TRANSDUCERS '07 & Eurosensors XXI. 2007 14th International Conference on Solid-State Sensors, Actuators and Microsystems. IEEE, 2007. http://dx.doi.org/10.1109/sensor.2007.4300579.

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Wei, J., B. K. Lok, P. C. Lim, et al. "Wafer Level Packaging of RF MEMS for Flip Chip Assembly." In ASME 2003 International Mechanical Engineering Congress and Exposition. ASMEDC, 2003. http://dx.doi.org/10.1115/imece2003-42825.

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In this paper, the development of wafer level packaging of radio frequency (RF) microelectromechanical system (MEMS) is reported. The packaging process consists of wafer bonding, wafer thinning, via etching, plating, under-bump-metallization (UBM) and bumping processes. 6-inch Si and glass wafers are used in the study. RF MEMS devices are fabricated on Si wafers and sandwiched between Si and glass cap wafers. To maintain the pressure balance between the cavities and outside world after bonding process, Si and glass wafers are anodically bonded at a pressure of 2 bar and a bonding temperature of 400 °C. The cavities are hermetically sealed. The glass wafer of the bonded pair is thinned down to 100 μm using mechanical polishing and chemical etching, the good uniformity of the wafer thickness is maintained with etching process. A layer of Cr/Au is sputtered and patterned as the hard mask for glass via etching process. Via holes with undercut closer to the etching depth are formed in HF+HNO3 acid. After stripping the metal mask, a seed layer of TiW/Cu is deposited using sputtering and plating processes. TiW layer is used to enhance the adhesion of metal and glass. With the completion of the re-routing and via metallization processes, benzocyclobutene (BCB) photoresist is used to planarize via holes and opened for UBM process. Finally, the packaged devices can be assembled using flip chip approach.
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Hsieh, C. C., Yousef Alyousef, and S. C. Yao. "Development of a Silicon-Based Passive Gas-Liquid Separation System for Microscale Direct Methanol Fuel Cells." In ASME 4th International Conference on Nanochannels, Microchannels, and Minichannels. ASMEDC, 2006. http://dx.doi.org/10.1115/icnmm2006-96084.

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The design, fabrication, and performance characterization of a passive gas-liquid separation system is presented in this paper. The gas-liquid separation system is silicon-based and its fabrication is compatible with the existing CMU design of the microscale direct methanol fuel cell (DMFC). Both gas and liquid separators consist of staggered arrays of etched-through holes fabricated by deep reactive ion etching (DRIE). The gas separator is coated with a thin layer of hydrophobic polymer to substantiate the gas-liquid separation. To visually characterize the system performance, the gas-liquid separation system is made on a single wafer with a glass plate bonded on the top to form a separation chamber with a narrow gap in between. Benzocyclobutene (BCB) is applied for the low-temperature bonding. The maximum pressure for the liquid leakage of the gas separators is experimentally determined and compared with the values predicted theoretically. Several successful gas-liquid separations are observed at liquid pressures between 14.2 and 22.7 cmH2O, liquid flow rates between 0.705 and 1.786 cc/min, and CO2 flow rates between 0.15160 to 0.20435 cc/min.
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Hsieh, C. C., S. C. Yao, and Yousef Alyousef. "Development of a Silicon-Based Passive Gas-Liquid Separation System for Microscale Direct Methanol Fuel Cells." In ASME 2003 International Mechanical Engineering Congress and Exposition. ASMEDC, 2003. http://dx.doi.org/10.1115/imece2003-42135.

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The design, fabrication, and performance characterization of a passive gas-liquid separation system is presented in this paper. The gas-liquid separation system is silicon-based and its fabrication is compatible with the existing CMU design of the microscale direct methanol fuel cell (DMFC). Both gas and liquid separators consist of staggered arrays of etched-through holes fabricated by deep reactive ion etching (DRIE). The gas separator is coated with a thin layer of hydrophobic polymer to substantiate the gas-liquid separation. To visually characterize the system performance, the gas-liquid separation system is made on a single wafer with a glass plate bonded on the top to form a separation chamber with a narrow gap in between. Benzocyclobutene (BCB) is applied for the low-temperature bonding. The maximum pressure for the liquid leakage of the gas separators is experimentally determined and compared with the values predicted theoretically. Several successful gas-liquid separations are observed at liquid pressures between 14.2 and 22.7 cmH2O, liquid flow rates between 0.705 and 1.786 cc/min, and CO2 flow rates between 0.15160 to 0.20435 cc/min.
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Trabia, Mohamed B., William Culbreth, Satishkumar Subramanian, and Tsuyoshi Tajima. "Optimization of Chemical Etching Process in Niobium Cavities." In ASME 2004 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. ASMEDC, 2004. http://dx.doi.org/10.1115/detc2004-57133.

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Superconducting niobium cavities are important components of linear accelerators. Buffered chemical polishing (bcp) on the inner surface of the cavity is a standard procedure to improve its performance. The quality of bcp, however, has not been optimized well in terms of the uniformity of surface smoothness. A finite element computational fluid dynamics (cfd) model was developed to simulate the chemical etching process inside the cavity. The analysis confirmed the observation of other researchers that the sections closer to the axis of the cavity received more etching than other regions. A baffle was used by lanl personnel to direct the flow of the etching fluid toward the walls of the cavity. A new baffle design was tined using optimization techniques. The redesigned baffle significantly improves the performance of the etching process. To verify these results an experimental setup for flow visualization was created. The setup consists of a high speed, high resolution ccd camera. The camera is positioned by a computer-controlled traversing mechanism. A dye injecting arrangement is used for tracking the fluid path. Experimental results are in general agreement with computational findings.
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Nordheden, Karen J., Bogdan A. Pathak, and John L. Alexander. "ICP etching of ZnO in BCl 3 /SF 6 gas mixtures." In SPIE OPTO: Integrated Optoelectronic Devices, edited by Ferechteh H. Teherani, Cole W. Litton, and David J. Rogers. SPIE, 2009. http://dx.doi.org/10.1117/12.817016.

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Chen, Liang, Yimin Huang, Jun Chen, et al. "Inductively coupled plasma etching of AlGaN using Cl 2 /Ar/BCl 3 gases." In International Symposium on Photoelectronic Detection and Imaging: Technology and Applications 2007, edited by Liwei Zhou. SPIE, 2008. http://dx.doi.org/10.1117/12.790829.

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Hara, M., T. Masuzumi, L. Zhiming, C. Kimura, H. Aoki, and T. Sugino. "Suppression of Fluorine Diffusion into Low-k Material (Methyl-BCN) using Low Temperature Etching." In 2009 International Conference on Solid State Devices and Materials. The Japan Society of Applied Physics, 2009. http://dx.doi.org/10.7567/ssdm.2009.p-2-3.

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Reports on the topic "BCB etching"

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Shul, R. J., C. I. H. Ashby, C. G. Willison, et al. GaN etching in BCl{sub 3}Cl{sub 2} plasmas. Office of Scientific and Technical Information (OSTI), 1998. http://dx.doi.org/10.2172/658195.

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Shul, R. J., A. G. Baca, D. J. Rieger, H. Hou, S. J. Pearton, and F. Ren. ECR etching of GaP, GaAs, InP, and InGaAs in Cl{sub 2}/Ar, Cl{sub 2}/N{sub 2}, BCl{sub 3}/Ar, and BCl{sub 3}/N{sub 2}. Office of Scientific and Technical Information (OSTI), 1996. http://dx.doi.org/10.2172/244631.

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