Academic literature on the topic 'Bipolar junction transistor (BJT)'

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Journal articles on the topic "Bipolar junction transistor (BJT)"

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Elamin, Abdenabi Ali, and Waell H. Alawad. "Effect of Gamma Radiation on Characteristic of bipolar junction Transistors (BJTs )." Journal of The Faculty of Science and Technology, no. 6 (January 12, 2021): 1–9. http://dx.doi.org/10.52981/jfst.vi6.597.

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This paper describes the effects of 60Cogamma radiation hardness of characteristic and parameters of Bipolar Junction Transistors in order to analyze the performance changes of the individual devices used in nuclear field. Bipolar Junction Transistor (BJT) of the type (BC-301) (npn) silicon, Transistor was irradiated by gamma radiation using 60Cosource at different doses (1, 2, 3, 4, and 5) KGy. The characteristics and parameter of Bipolar Junction Transistor was studied before and after irradiated by using Transistor Characteristics Apparatus with regulated power supplies. Obtained result showed that, the saturation voltage VCE(sat) of Bipolar Junction Transistor decreased because of the gain degradation of the transistor and increased silicon resistivity, Another parameter of a bipolar junction transistor affected by ionizing radiation is a collector-base leakage current, a strong increase of the current is caused by the build-up charge near the junction.
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Perkasa, Dedy Bagus, Trias Andromeda, and Munawar A. Riyadi. "PERANCANGAN PERANGKAT KERAS ALAT UJI BIPOLAR JUNCTION TRANSISTOR BERBASIS MIKROKONTROLER." Transmisi 21, no. 1 (April 22, 2019): 19. http://dx.doi.org/10.14710/transmisi.21.1.19-24.

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Transistor bipolar merupakan piranti elektronika yang banyak digunakan dalam teknologi elektronika. Salah satu penggunaan transistor adalah sebagai amplifier audio. Pada rangkaian digital transistor digunakan sebagai saklar berkecepatan tinggi. Agar transistor bekerja dengan optimal, pemasangan transistor dalam rangkaian harus benar. Untuk itu, posisi kaki-kaki pin transistor dan nilai parameter yang ada pada transistor perlu diperhatikan. Alat bantu atau tester yang handal diperlukan untuk mengetahui letak pin pada transistor. Penelitian ini merancang suatu perangkat keras yang dapat digunakan untuk membaca jenis, letak kaki, nilai penguatan, dan tegangan maju transistor BJT (Bipolar Junction Transistor). Perangkat keras ini dirancang menggunakan mikrokontroller dan resistor untuk analisis titik kerja transistor. Pengujian dilakukan dengan menguji beberapa transistor BJT dengan tipe yang berbeda-beda. Hasil pengujian menunjukkan bahwa perangkat telah dapat bekerja dengan baik.
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Bang, Jeong-Ju, Chang-Su Huh, and Jong-Won Lee. "A Study on Destruction Characteristics of BJT (Bipolar Junction Transistor) at Different Pulse Repetition Rate." Journal of the Korean Institute of Electrical and Electronic Material Engineers 27, no. 3 (March 1, 2014): 167–71. http://dx.doi.org/10.4313/jkem.2014.27.3.167.

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Zhang, Nuo, Yi Rao, Nuo Xu, Ayden Maralani, and Albert P. Pisano. "Characterization of 4H-SiC Bipolar Junction Transistor at High Temperatures." Materials Science Forum 778-780 (February 2014): 1013–16. http://dx.doi.org/10.4028/www.scientific.net/msf.778-780.1013.

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In this work, a 4H-Silicon Carbide (SiC) Bipolar Junction Transistor (BJT) capable of operating at high temperatures up to 673 K is demonstrated. Comprehensive characterization including current gain, early voltage, and intrinsic voltage gain was performed. At elevated temperatures, although the current gain of the device is reduced, the intrinsic voltage gain increases to 5900 at 673 K, suggesting 4H-SiC BJT has the potential to be used as a voltage amplifier at extremely high temperatures.
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Zhang, Qing Chun Jon, Robert Callanan, Anant K. Agarwal, Albert A. Burk, Michael J. O'Loughlin, John W. Palmour, and Charles Scozzie. "10 kV, 10 A Bipolar Junction Transistors and Darlington Transistors on 4H-SiC." Materials Science Forum 645-648 (April 2010): 1025–28. http://dx.doi.org/10.4028/www.scientific.net/msf.645-648.1025.

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4H-SiC Bipolar Junction Transistors (BJTs) and hybrid Darlington Transistors with 10 kV/10 A capability have been demonstrated for the first time. The SiC BJT (chip size: 0.75 cm2 with an active area of 0.336 cm2) conducts a collector current of 10 A (~ 30 A/cm2) with a forward voltage drop of 4.0 V (forced current gain βforced: 20) corresponding to a specific on-resistance of ~ 130 mΩ•cm2 at 25°C. The DC current gain, β, at a collector voltage of 15 V is measured to be 28 at a base current of 1 A. Both open emitter breakdown voltage (BVCBO) and open base breakdown voltage (BVCEO) of ~10 kV have been achieved. The 10 kV SiC Darlington transistor pair consists of a 10 A SiC BJT as the output device and a 1 A SiC BJT as the driver. The forward voltage drop of 4.5 V is measured at 10 A of collector current. The DC forced current gain at the collector voltage of 5.0 V was measured to be 440 at room temperature.
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Kusuma, Zeka Wijaya, Sunu Pradana, and Abdul Hamid Kurniawan. "Rancang Bangun Modul Praktikum Penggunaan Bipolar Junction Transistor Sebagai Sakelar Berbasis Arduino Mega." PoliGrid 1, no. 1 (June 30, 2020): 14. http://dx.doi.org/10.46964/poligrid.v1i1.343.

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Abstrak- BJT (Bipolar Junction Transistor) sebagai sakelar adalah salah satu pokok bahasan pada mata kuliah elektronika daya dan membutuhkan modul praktikum sebagai media dalam proses pembelajarannya. Modul praktikum yang sudah ada relatif kompleks sehingga penulis membuat rancang bangun yang lebih sederhana sehingga mudah untuk diperbaiki saat terjadi kerusakan serta komponen penggantinya mudah untuk ditemukan. BJT dapat berfungsi sebagai sakelar dengan memanfaatkan dua modenya yaitu saturation dan cut off. Pada perancangan modul, penyakelaran dikendalikan oleh Arduino Mega dengan sinyal PWM (Pulse Width Modulation) pada terminal basis, baik BJT NPN maupun BJT PNP. Berdasarkan pengujian saat cut off untuk BJT NPN dan BJT PNP pada beban resistor maupun resistor dengan induktor, nilai tegangan beban 0 V dan arus beban 0,003 A. sedangkan saat saturation pada beban resistor untuk BJT NPN, nilai tegangan beban 11,45 V dan arus beban 0,572 A dan BJT PNP, nilai tegangan beban 11,45 V dan arus beban 0,573 A. pada beban resistor dengan induktor untuk BJT NPN, nilai tegangan beban 11,81 V dan arus beban 0,122 A dan BJT PNP, nilai tegangan beban 11,79 V dan arus beban 0,121 A.
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David Theodore, N., Sophie Verdonckt-Vandebroek, C. Barry Carter, and S. Simon Wong. "Characterization of lateral bipolar transistor structures." Proceedings, annual meeting, Electron Microscopy Society of America 48, no. 4 (August 1990): 628–29. http://dx.doi.org/10.1017/s0424820100176277.

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Semiconductor devices are being scaled down into the submicron regime in order to meet technological demands for increased device-packing densities. Other factors considered for device design include low power dissipation, noise immunity, speed and high driving capability. Of these factors, high packing densities and low power dissipation can be derived using Coinplementary-Metal-Oxide-Semiconductor (CMOS) schemes. Bipolar-Junction-Transistor (BJT) schemes on the other hand provide driving capability, low noise performance and speed, at the expense however of greater device power- consumption. Combining CMOS and BJT technologies, a compromise can be struck between devicespeed and power dissipation. Most such combinations have resulted in vertical BJT requiring complex fabrication sequences. Recently, simpler lateral BJTs have been proposed for use in Bipolar CMOS processes. The viability of such semiconducting devices depends in part on the absence or controlled presence of structural defects. Diagnostic techniques are therefore required that are capable of high spatial resolution, for investigating the origin, behavior and possible elimination of fabrication-process-induced defects. Transmission electron microscopy (TEM) of device cross-sections can be effectively used for this purpose. In this study, lateral BJT structures are characterized using cross-section TEM and the results are correlated with electrical device-behavior.
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Jumiasih, Jumiasih, Trias Andromeda, and Munawar Agus Riyadi. "PERANCANGAN PERANGKAT LUNAK ALAT UJI BIPOLAR JUNCTION TRANSISTOR BERBASIS MIKROKONTROLER." TRANSIENT 7, no. 4 (May 25, 2019): 1075. http://dx.doi.org/10.14710/transient.7.4.1075-1083.

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Transistor merupakan salahsatu komponen penting dalam rangkaian elektronika. Transistor telah digunakan hampir disemua rangkaian elektronika. Namun, permasalahan sering timbul ketika ingin mengaplikasikan transistor ke dalam sebuah rangkaian elektronika, karena transistor sangat rentan terhadap kerusakan. Transistor bisa rusak karena suhu yang terlalu tinggi, kesalahan pengukuran, maupun kesalahan pemasangan dalam rangkaian. Hal ini karena cukup sulit mengetahui jenis maupun kaki-kaki dari transistor yang akan digunakan apabila tanpa panduan dari datasheet transistor tersebut. Bahkan datasheet transistor tidak memberikan data yang pasti mengenai nilai penguatan transistor (hanya berupa range maksimum-minimum). Pengecekan secara manual menggunakan multimeter dapat dilakukan untuk menentukan kaki-kaki transistor beserta nilai penguatannya, namun cara tersebut kurang praktis. Pengecekan kaki-kaki transistor dengan cara tersebut harus melalui beberapa tahapan dan ketelitian serta membutuhkan waktu yang cukup lama. Dalam Tugas Akhir ini, dirancang suatu perangkat pengujian transistor yang dapat membantu dalam pengecekan transistor BJT, melakukan identifikasi jenis transistor NPN dan PNP, identifikasi kaki-kaki transistor, mengetahui nilai penguatan (hFE) serta nilai tegangan forward (vf) dari transistor tersebut.
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Johannesson, Daniel, Muhammad Nawaz, and Hans Peter Nee. "TCAD Model Calibration of High Voltage 4H-SiC Bipolar Junction Transistors." Materials Science Forum 963 (July 2019): 670–73. http://dx.doi.org/10.4028/www.scientific.net/msf.963.670.

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In this project, a Technology CAD (TCAD) model has been calibrated and verified against experimental data of a 15 kV silicon carbide (SiC) bipolar junction transistor (BJT). The device structure of the high voltage BJT has been implemented in the Synopsys Sentaurus TCAD simulation platform and design of experiment simulations have been performed to extract and fine-tune device parameters and 4H-SiC material parameters to accurately reflect the 15 kV SiC BJT experimental results. The set of calibrated TCAD parameters may serve as a base for further investigations of various SiC device design and device operation in electrical circuits.
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Zhang, Jian Hui, Leonid Fursin, Xue Qing Li, Xiao Hui Wang, Jian Hui Zhao, Brenda L. VanMil, Rachael L. Myers-Ward, Charles R. Eddy, and D. Kurt Gaskill. "4H-SiC Bipolar Junction Transistors with Graded Base Doping Profile." Materials Science Forum 615-617 (March 2009): 829–32. http://dx.doi.org/10.4028/www.scientific.net/msf.615-617.829.

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This work reports 4H-SiC bipolar junction transistor (BJT) results based upon our first intentionally graded base BJT wafer with both base and emitter epi-layers continuously grown in the same reactor. The 4H-SiC BJTs were designed to improve the common emitter current gain through the built-in electrical fields originating from the grading of the base doping. Continuously-grown epi-layers are also believed to be the key to increasing carrier lifetime and high current gains. The 4H-SiC BJT wafer was grown in an Aixtron/Epigress VP508, a horizontal hot-wall chemical vapor deposition reactor using standard silane/propane chemistry and nitrogen and aluminum dopants. High performance 4H-SiC BJTs based on this initial non-optimized graded base doping have been demonstrated, including a 4H-SiC BJT with a DC current gain of ~33, specific on-resistance of 2.9 mcm2, and blocking voltage VCEO of over 1000 V.
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Dissertations / Theses on the topic "Bipolar junction transistor (BJT)"

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Buono, Benedetto. "Simulation and Characterization of Silicon Carbide Power Bipolar Junction Transistors." Doctoral thesis, KTH, Integrerade komponenter och kretsar, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-95320.

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The superior characteristics of silicon carbide, compared with silicon, have suggested considering this material for the next generation of power semiconductor devices. Among the different power switches, the bipolar junction transistor (BJT) can provide a very low forward voltage drop, a high current capability and a fast switching speed. However, in order to compete on the market, it is crucial to a have high current gain and a breakdown voltage close to ideal. Moreover, the absence of conductivity modulation and long-term stability has to be solved. In this thesis, these topics are investigated comparing simulations and measurements. Initially, an efficient etched JTE has been simulated and fabricated. In agreement with the simulations, the fabricated diodes exhibit the highest BV of around 4.3 kV when a two-zone JTE is implemented. Furthermore, the simulations and measurements demonstrate a good agreement between the electric field distribution inside the device and the optical luminescence measured at breakdown. Additionally, an accurate model to simulate the forward characteristics of 4H-SiC BJTs is presented. In order to validate the model, the simulated current gains are compared with measurements at different temperatures and different base-emitter geometries. Moreover, the simulations and measurements of the on-resistance are compared at different base currents and different temperatures. This comparison, coupled with a detailed analysis of the carrier concentration inside the BJT, indicates that internal forward biasing of the base-collector junction limits the BJT to operate at high current density and low forward voltage drop simultaneously. In agreement with the measurements, a design with a highly-doped extrinsic base is proposed to alleviate this problem. In addition to the static characteristics, the comparison of measured and simulated switching waveforms demonstrates that the SiC BJT can provide fast switching speed when it acts as a unipolar device. This is crucial to have low power losses during transient. Finally, the long-term stability is investigated. It is observed that the electrical stress of the base-emitter diode produces current gain degradation; however, the degradation mechanisms are still unclear. In fact, the analysis of the measured Gummel plot suggests that the reduction of the carrier lifetime in the base-emitter region might be only one of the causes of this degradation. In addition, the current gain degradation due to ionizing radiation is investigated comparing the simulations and measurements. The simulations suggest that the creation of positive charge in the passivation layer can increase the base current; this increase is also observed in the electrical measurements.
QC 20120522
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Lee, Hyung-Seok. "Fabrication and Characterization of Silicon Carbide Power Bipolar Junction Transistors." Doctoral thesis, Stockholm : Kungliga Tekniska högskolan, 2008. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-4623.

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Elahipanah, Hossein. "Design Optimization and Realization of 4H-SiC Bipolar Junction Transistors." Doctoral thesis, KTH, Elektronik, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-211659.

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4H-SiC-based bipolar junction transistors (BJTs) are attractive devices for high-voltage and high-temperature operations due to their high current capability, low specific on-resistance, and process simplicity. To extend the potential of SiC BJTs to power electronic industrial applications, it is essential to realize high-efficient devices with high-current and low-loss by a reliable and wafer-scale fabrication process. In this thesis, we focus on the improvement of the 4H-SiC BJT performance, including the device optimization and process development. To optimize the 4H-SiC BJT design, a comprehensive study in terms of cell geometries, device scaling, and device layout is performed. The hexagon-cell geometry shows 42% higher current density and 21% lower specific on-resistance at a given maximum current gain compared to the interdigitated finger design. Also, a layout design, called intertwined, is used for 100% usage of the conducting area. A higher current is achieved by saving the inactive portion of the conducting area. Different multi-step etched edge termination techniques with an efficiency of >92% are realized. Regarding the process development, an improved surface passivation is used to reduce the surface recombination and improve the maximum current gain of 4H-SiC BJTs. Moreover, wafer-scale lift-off-free processes for the n- and p-Ohmic contact technologies to 4H-SiC are successfully developed. Both Ohmic metal technologies are based on a self-aligned Ni-silicide (Ni-SALICIDE) process. Regarding the device characterization, a maximum current gain of 40, a specific on-resistance of 20 mΩ·cm2, and a maximum breakdown voltage of 5.85 kV for the 4H-SiC BJTs are measured. By employing the enhanced surface passivation, a maximum current gain of 139 and a specific on-resistance of 579 mΩ·cm2 at the current density of 89 A/cm2 for the 15-kV class BJTs are obtained. Moreover, low-voltage 4H-SiC lateral BJTs and Darlington pair with output current of 1−15 A for high-temperature operations up to 500 °C were fabricated. This thesis focuses on the improvement of the 4H-SiC BJT performance in terms of the device optimization and process development for high-voltage and high-temperature applications. The epilayer design and the device structure and topology are optimized to realize high-efficient BJTs. Also, wafer-scale fabrication process steps are developed to enable realization of high-current devices for the real applications.

QC 20170810

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Tolstoy, Georg. "High-Efficiency SiC Power Conversion : Base Drivers for Bipolar Junction Transistors and Performance Impacts on Series-Resonant Converters." Doctoral thesis, KTH, Elektrisk energiomvandling, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-168163.

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This thesis aims to bring an understanding to the silicon carbide (SiC) bipolar junction transistor (BJT). SiC power devices are superior to the silicon IGBT in several ways. They are for instance, able to operate with higher efficiency, at higher frequencies, and at higher junction temperatures. From a system point of view the SiC power device could decrease the cost and complexity of cooling, reduce the size and weight of the system, and enable the system to endure harsher environments. The three main SiC power device designs are discussed with a focus on the BJT. The SiC BJT is compared to the SiC junction field-effect transistor (JFET) and the metal-oxide semiconductor field-effect transistor (MOSFET). The potential of employing SiC power devices in applications, ranging from induction heating to high-voltage direct current (HVDC), is presented. The theory behind the state-of-the-art dual-source (2SRC) base driver that was presented by Rabkowski et al. a few years ago is described. This concept of proportional base drivers is introduced with a focus on the discretized proportional base drivers (DPBD). By implementing the DPBD concept and building a prototype it is shown that the steady-state consumption of the base driver can be reduced considerably.  The aspects of the reverse conduction of the SiC BJT are presented. It is shown to be of importance to consider the reduced voltage drop over the base-emitter junction. Last the impact of SiC unipolar and bipolar devices in series-resonant (SLR) converters is presented. Two full-bridges are designed and constructed, one with SiC MOSFETs utilizing the body diode for reverse conduction during the dead-time, and the second with SiC BJTs with anti-parallel SiC Schottky diodes. It is found that the SiC power devices, with their absence of tail current, are ideal devices to fully utilize the soft-switching properties that the SLR converters offer. The SiC MOSFET benefits from its possibility to utilize reverse conduction with a low voltage drop. It is also found that the size of capacitance of the snubbers can be reduced compare to state-of-the-art silicon technology. High switching frequencies of 200 kHz are possible while still keeping the losses low. A dead-time control strategy for each device is presented. The dual control (DuC) algorithm is tested with the SiC devices and compared to frequency modulation (FM). The analytical investigations presented in this thesis are confirmed by experimental results on several laboratory prototype converters.

QC 20150529

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Sandén, Martin. "Low-Frequency Noise in Si-Based High-Speed Bipolar Transistors." Doctoral thesis, KTH, Microelectronics and Information Technology, IMIT, 2001. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-3203.

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Pejnefors, Johan. "Chemical Vapor Depositionof Si and SiGe Films for High-Speed Bipolar Transistors." Doctoral thesis, KTH, Microelectronics and Information Technology, IMIT, 2001. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-3214.

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This thesis deals with the main aspects in chemical vapordeposition (CVD) of silicon (Si) and silicon-germanium (Si1-xGex) films for high-speed bipolar transistors.In situdoping of polycrystalline silicon (poly-Si)using phosphine (PH3) and disilane (Si2H6) in a low-pressure CVD reactor was investigated toestablish a poly-Si emitter fabrication process. The growthkinetics and P incorporation was studied for amorphous Si filmgrowth. Hydrogen (H) incorporated in the as-deposited films wasrelated to growth kinetics and the energy for H2desorption was extracted. Film properties such asresistivity, mobility, carrier concentration and grain growthwere studied after crystallization using either furnaceannealing or rapid thermal annealing (RTA). In order tointegrate an epitaxial base, non-selective epitaxial growth(NSEG) of Si and SiGe in a lamp-heated single-waferreduced-pressure CVD reactor was examined. The growth kineticsfor Si epitaxy and poly-Si deposition showed a differentdependence on the deposition conditions i.e. temperature andpressure. The growth rate difference was mainly due to growthkinetics rather than wafer surface emissivity effects. However,it was observed that the growth rate for Si epitaxy and poly-Sideposition was varying during growth and the time-dependencewas attributed to wafer surface emissivity variations. A modelto describe the emissivity effects was established, taking intoconsideration kinetics and the reactor heating mechanisms suchas heat absorption, emission andconduction. Growth ratevariations in opening of different sizes (local loading) andfor different oxide surface coverage (global loading) wereinvestigated. No local loading effects were observed, whileglobal loading effects were attributed to chemical as well astemperature effects. Finally, misfit dislocations formed in theSiGe epitaxy during NSEG were found to originate from theinterface between the epitaxial and polycrystalline regions.The dislocations tended to propagate across the activearea.

Keywords:chemical vapor deposition (CVD), bipolarjunction transistor (BJT), heterojunction bipolar transistor(HBT), silicon-germanium (SiGe), epitaxy, poly-Si emitter,in situdoping, non-selective epitaxy (NSEG), loadingeffect, emissivity effect

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Fernández, S. Alejandro D. "Modelling the temperature dependences of Silicon Carbide BJTs." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-202754.

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Silicon Carbide (SiC), owing to its large bandgap, has proved itself to be a very viable semiconductor material for the development of extreme temperature electronics. Moreover, its electrical properties like critical field (Ecrit) and saturation velocity (vsat) are superior as compared to the commercially abundant Silicon, thus making it a better alternative for RF and high power applications. The in-house SiC BJT process at KTH has matured a lot over the years and recently developed devices and circuits have shown to work at temperatures exceeding 500˚C. However, the functional reliability of more complex circuits requires the use of simulators and device models to describe the behavior of constituent devices. SPICE Gummel Poon (SGP) is one such model that describes the behavior of the BJT devices. It is simpler as compared to the other models because of its relatively small number of parameters. A simple semi-empirical DC compact model has been successfully developed for low voltage applications SiC BJTs. The model is based on a temperature dependent SiC-SGP model. Studies over the temperature dependences for the SGP parameters have been performed. The SGP parameters have been extracted and some have been optimized over a wide temperature range and they have been compared with the measured data. The accuracy of the developed compact model based on these parameters has been proven by comparing it with the measured data as well. A fairly accurate performance at the required working conditions and correlation with the measured results of the SiC compact model has been achieved.
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Sadik, Diane-Perle. "On Reliability of SiC Power Devices in Power Electronics." Doctoral thesis, KTH, Elkraftteknik, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-207763.

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Silicon Carbide (SiC) is a wide-bandgap (WBG) semiconductor materialwhich has several advantages such as higher maximum electric field, lowerON-state resistance, higher switching speeds, and higher maximum allowablejunction operation temperature compared to Silicon (Si). In the 1.2 kV - 1.7kV voltage range, power devices in SiC are foreseen to replace Si Insulatedgatebipolar transistors (IGBTs) for applications targeting high efficiency,high operation temperatures and/or volume reductions. In particular, theSiC Metal-oxide semiconductor field-effect transistor (MOSFET) – which isvoltage controlled and normally-OFF – is the device of choice due to the easeof its implementation in designs using Si IGBTs.In this work the reliability of SiC devices, in particular that of the SiCMOSFET, has been investigated. First, the possibility of paralleling two discreteSiC MOSFETs is investigated and validated through static and dynamictests. Parallel-connection was found to be unproblematic. Secondly, drifts ofthe threshold voltage and forward voltage of the body diode of the SiC MOSFETare investigated through long-term tests. Also these reliability aspectswere found to be unproblematic. Thirdly, the impact of the package on thechip reliability is discussed through a modeling of the parasitic inductancesof a standard module and the impact of those inductances on the gate oxide.The model shows imbalances in stray inductances and parasitic elementsthat are problematic for high-speed switching. A long-term test on the impactof humidity on junction terminations of SiC MOSFETs dies and SiCSchottky dies encapsulated in the same standard package reveals early degradationfor some modules situated outdoors. Then, the short-circuit behaviorof three different types (bipolar junction transistor, junction field-effect transistor,and MOSFET) of 1.2 kV SiC switching devices is investigated throughexperiments and simulations. The necessity to turn OFF the device quicklyduring a fault is supported with a detailed electro-thermal analysis for eachdevice. Design guidelines towards a rugged and fast short-circuit protectionare derived. For each device, a short-circuit protection driver was designed,built and validated experimentally. The possibility of designing diode-lessconverters with SiC MOSFETs is investigated with focus on surge currenttests through the body diode. The discovered fault mechanism is the triggeringof the npn parasitic bipolar transistor. Finally, a life-cycle cost analysis(LCCA) has been performed revealing that the introduction of SiC MOSFETsin already existing IGBT designs is economically interesting. In fact,the initial investment is saved later on due to a higher efficiency. Moreover,the reliability is improved, which is beneficial from a risk-management pointof-view. The total investment over 20 years is approximately 30 % lower fora converter with SiC MOSFETs although the initial converter cost is 30 %higher.
Kiselkarbid (SiC) är ett bredbandgapsmaterial (WBG) som har flera fördelar,såsom högre maximal elektrisk fältstyrka, lägre ON-state resitans, högreswitch-hastighet och högre maximalt tillåten arbetstemperatur jämförtmed kisel (Si). I spänningsområdet 1,2-1,7 kV förutses att effekthalvledarkomponenteri SiC kommer att ersätta Si Insulated-gate bipolar transistorer(IGBT:er) i tillämpningar där hög verkningsgrad, hög arbetstemperatur ellervolymreduktioner eftersträvas. Förstahandsvalet är en SiC Metal-oxidesemiconductor field-effect transistor (MOSFET) som är spänningsstyrd ochnormally-OFF, egenskaper som möjliggör enkel implementering i konstruktionersom använder Si IGBTer.I detta arbete undersöks tillförlitligheten av SiC komponenter, specielltSiC MOSFET:en. Först undersöks möjligheten att parallellkoppla tvådiskretaSiC MOSFET:ar genom statiska och dynamiska prov. Parallellkopplingbefanns vara oproblematisk. Sedan undersöks drift av tröskelspänning ochbody-diodens framspänning genom långtidsprov. Ocksådessa tillförlitlighetsaspekterbefanns vara oproblematiska. Därefter undersöks kapslingens inverkanpåchip:et genom modellering av parasitiska induktanser hos en standardmoduloch inverkan av dessa induktanser pågate-oxiden. Modellen påvisaren obalans mellan de parasitiska induktanserna, något som kan varaproblematiskt för snabb switchning. Ett långtidstest av inverkan från fuktpåkant-termineringar för SiC-MOSFET:ar och SiC-Schottky-dioder i sammastandardmodul avslöjar tidiga tecken pådegradering för vissa moduler somvarit utomhus. Därefter undersöks kortslutningsbeteende för tre typer (bipolärtransistor,junction-field-effect transistor och MOSFET) av 1.2 kV effekthalvledarswitchargenom experiment och simuleringar. Behovet att stänga avkomponenten snabbt stöds av detaljerade elektrotermiska simuleringar för allatre komponenter. Konstruktionsriktlinjer för ett robust och snabbt kortslutningsskyddtas fram. För var och en av komponenterna byggs en drivkrets medkortslutningsskydd som valideras experimentellt. Möjligheten att konstrueradiodlösa omvandlare med SiC MOSFET:ar undersöks med fokus påstötströmmargenom body-dioden. Den upptäckta felmekanismen är ett oönskat tillslagav den parasitiska npn-transistorn. Slutligen utförs en livscykelanalys(LCCA) som avslöjar att introduktionen av SiC MOSFET:ar i existerandeIGBT-konstruktioner är ekonomiskt intressant. Den initiala investeringensparas in senare pågrund av en högre verkningsgrad. Dessutom förbättrastillförlitligheten, vilket är fördelaktigt ur ett riskhanteringsperspektiv. Dentotala investeringen över 20 år är ungefär 30 % lägre för en omvandlare medSiC MOSFET:ar även om initialkostnaden är 30 % högre.

QC 20170524

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Hedayati, Raheleh. "High-Temperature Analog and Mixed-Signal Integrated Circuits in Bipolar Silicon Carbide Technology." Doctoral thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-213697.

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Silicon carbide (SiC) integrated circuits (ICs) can enable the emergence of robust and reliable systems, including data acquisition and on-site control for extreme environments with high temperature and high radiation such as deep earth drilling, space and aviation, electric and hybrid vehicles, and combustion engines. In particular, SiC ICs provide significant benefit by reducing power dissipation and leakage current at temperatures above 300 °C compared to the Si counterpart. In fact, Si-based ICs have a limited maximum operating temperature which is around 300 °C for silicon on insulator (SOI). Owing to its superior material properties such as wide bandgap, three times larger than Silicon, and low intrinsic carrier concentration, SiC is an excellent candidate for high-temperature applications. In this thesis, analog and mixed-signal circuits have been implemented using SiC bipolar technology, including bandgap references, amplifiers, a master-slave comparator, an 8-bit R-2R ladder-based digital-to-analog converter (DAC), a 4-bit flash analog-to-digital converter (ADC), and a 10-bit successive-approximation-register (SAR) ADC. Spice models were developed at binned temperature points from room temperature to 500 °C, to simulate and predict the circuits’ behavior with temperature variation. The high-temperature performance of the fabricated chips has been investigated and verified over a wide temperature range from 25 °C to 500 °C. A stable gain of 39 dB was measured in the temperature range from 25 °C up to 500 °C for the inverting operational amplifier with ideal closed-loop gain of 40 dB. Although the circuit design in an immature SiC bipolar technology is challenging due to the low current gain of the transistors and lack of complete AC models, various circuit techniques have been applied to mitigate these problems. This thesis details the challenges faced and methods employed for device modeling, integrated circuit design, layout implementation and finally performance verification using on-wafer characterization of the fabricated SiC ICs over a wide temperature range.

QC 20170905

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Tian, Ye. "SiC Readout IC for High Temperature Seismic Sensor System." Doctoral thesis, KTH, Integrerade komponenter och kretsar, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-213969.

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Over the last decade, electronics operating at high temperatures have been increasingly demanded to support in situ sensing applications such as automotive, deep-well drilling and aerospace. However, few of these applications have requirements above 460 °C, as the surface temperature of Venus, which is a specific target for the seismic sensing application in this thesis. Due to its wide bandgap, Silicon Carbide (SiC) is a promising candidate to implement integrated circuits (ICs) operating in such extreme environments. In this thesis, various analog and mixed-signal ICs in 4H-SiC bipolar technology for high-temperature sensing applications are explored, in which the device performance variation over temperatures are considered. For this purpose, device modeling, circuit design, layout design, and device/circuit characterization are involved. In this thesis, the circuits are fabricated in two batches using similar technologies. In Batch 1, the first SiC sigma-delta modulator is demonstrated to operate up to 500 °C with a 30 dB peak SNDR. Its building blocks including a fully-differential amplifier, an integrator and a comparator are characterized individually to investigate the modulator performance variation over temperatures. In the succeeding Batch 2, a SiC electromechanical sigma-delta modulator is designed with a chosen Si capacitive sensor for seismic sensing on Venus. Its building blocks including a charge amplifier, a multiplier and an oscillator are designed. Compared to Batch 1, a smaller transistor and two metal-interconnects are used to implement higher integration ICs in Batch 2. Moreover, the first VBIC-based compact model featured with continuous-temperature scalability from 27 to 500 °C is developed based on the SiC transistor in Batch 1, in order to optimize the design of circuits in Batch 2. The demonstrated performance of ICs in Batch 1 show the feasibility to further develop the SiC readout ICs for seismic sensor system operating on Venus.

QC 20170911

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Books on the topic "Bipolar junction transistor (BJT)"

1

The bipolar junction transistor. 2nd ed. Reading, Mass: Addison-Wesley, 1989.

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Jo, Myungsuk. Multi-regional charge-based small-signal bipolar junction transistor model. 1989.

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Neudeck, George W. Modular Series on Solid State Devices, Volume III: The Bipolar Junction Transistor (2nd Edition). Prentice Hall, 1989.

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Book chapters on the topic "Bipolar junction transistor (BJT)"

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N. Makarov, Sergey, Reinhold Ludwig, and Stephen J. Bitar. "Bipolar Junction Transistor and BJT Circuits." In Practical Electrical Engineering, 851–918. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-21173-2_17.

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Prasad, R. "Transistor Bipolar Junction (BJT) and Field-Effect (FET) Transistor." In Undergraduate Lecture Notes in Physics, 457–581. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-65129-9_6.

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Gift, Stephan J. G., and Brent Maundy. "Bipolar Junction Transistor." In Electronic Circuit Design and Application, 41–87. Cham: Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-46989-4_2.

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Li, Sheng S. "Bipolar Junction Transistor." In Semiconductor Physical Electronics, 391–422. Boston, MA: Springer US, 1993. http://dx.doi.org/10.1007/978-1-4613-0489-0_13.

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Vogel, Burkhard. "Bipolar Junction Transistors (BJTs) and Noise." In Balanced Phono-Amps, 87–141. Cham: Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-11229-5_5.

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Kolawole, Michael Olorunfunmi. "Structure of Bipolar Junction Transistor." In Electronics, 67–125. First edition. | Boca Raton, FL : CRC Press, 2020.: CRC Press, 2020. http://dx.doi.org/10.1201/9781003052913-3.

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Loan, Sajad A., Faisal Bashir, Asim M. Murshid, Humyra Shabir, M. Rafat, M. Nizamuddin, Abdul Rahman Alamoud, and Shuja A. Abbasi. "Charge Plasma Based Bipolar Junction Transistor on Silicon on Insulator." In Transactions on Engineering Technologies, 219–29. Dordrecht: Springer Netherlands, 2014. http://dx.doi.org/10.1007/978-94-017-9588-3_17.

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Elsayed, Ahmed M., Hassan M. Emam, Hussein S. Ahmed, Yousof O. Moustafa, and Nihal Y. Ibrahim. "Second-Order Rectification of High-Frequency Radiation in Bipolar Junction Transistor." In Recent Advances in Engineering Mathematics and Physics, 163–68. Cham: Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-39847-7_12.

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Cahen, David, Leonid Chernyak, Geula Dagan, and Abraham Jakubowicz. "Ion Mobility in Chalcogenide Semiconductors; Room Temperature Creation of Bipolar Junction Transistor." In Fast Ion Transport in Solids, 121–41. Dordrecht: Springer Netherlands, 1993. http://dx.doi.org/10.1007/978-94-011-1916-0_7.

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Phipps, Eric T., Roscoe A. Bartlett, David M. Gay, and Robert J. Hoekstra. "Large-Scale Transient Sensitivity Analysis of a Radiation-Damaged Bipolar Junction Transistor via Automatic Differentiation." In Advances in Automatic Differentiation, 351–62. Berlin, Heidelberg: Springer Berlin Heidelberg, 2008. http://dx.doi.org/10.1007/978-3-540-68942-3_31.

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Conference papers on the topic "Bipolar junction transistor (BJT)"

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Daranagama, Thilini, Vasantha Pathirana, Florin Udrea, and Richard McMahon. "Novel 4H-SiC bipolar junction transistor (BJT) with improved current gain." In 2015 IEEE 13th Brazilian Power Electronics Conference and 1st Southern Power Electronics Conference (COBEP/SPEC). IEEE, 2015. http://dx.doi.org/10.1109/cobep.2015.7420235.

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Hussain, Safina, Parameshwaran Gnanachchelvi, Jeffrey C. Suhling, Richard C. Jaeger, Michael C. Hamilton, and Bogdan M. Wilamowski. "The Influence of Uniaxial Normal Stress on the Performance of Vertical Bipolar Transistors." In ASME 2013 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems. American Society of Mechanical Engineers, 2013. http://dx.doi.org/10.1115/ipack2013-73233.

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In this paper, we have explored the response of bipolar junction transistors (BJT) to the controlled application of mechanical stress. Mechanical strains and stresses are developed during the fabrication, assembly and packaging of the integrated circuit (IC) chips. Due to these stresses and strains, it has been observed by many researchers that changes can occur in the electrical performance of both analog and digital devices. Stress-induced device parametric shifts affect the performance of analog circuits that depend upon precise matching of bipolar and/or MOS devices, and can cause them to operate out of specifications. In the past the authors have extensively investigated the stress effects on resistors embedded on integrated chips and were successful in characterizing die stresses for various packaging architectures. We have also observed stress effects on diodes, field effect transistors (FETs), van der Pauw structures and CMOS sensor arrays. In this present work, the stress dependence of the electrical behavior of bipolar transistors has been investigated. Test structures have been utilized to characterize the stress sensitivity of vertical bipolar devices fabricated on (100) silicon wafers. In the experiments, uniaxial normal stresses were applied to silicon wafer strips using a four-point-bending fixture. An approximate theory has also been developed for stress-induced changes in the current gain of bipolar junction transistors. Both the theoretical and experimental results show similar trend for DC current gain vs. stress plots. Multi-Physics based finite element simulations (coupled electro-mechanical-thermal) have been performed to understand the device level mechanisms that cause the stress induced changes in the BJTs and also to characterize and model stress dependence of fundamental silicon material parameters such as bandgap, intrinsic carrier concentration, and electron/hole mobilities. In the future, the developed formulations can be applied to theoretically optimize transistor design, placement, orientation, and processing to minimize the impact of fabrication and packaging induced die stresses.
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Loh, S. K., C. Q. Chen, K. H. Yip, A. C. T. Quah, X. Tao, P. T. Ng, G. B. Ang, and S. P. Zhao. "Advanced FIB CE Combined with Static Analysis for Functional Failure Analysis." In ISTFA 2013. ASM International, 2013. http://dx.doi.org/10.31399/asm.cp.istfa2013p0424.

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Abstract It is difficult to simulate functional failures using static analysis tools, therefore, debugging and troubleshooting devices with functional failures present a special challenge for failure analysis (FA) work and often result in a root-cause success rate is quite low. In this paper, the application of advanced FIB circuit edit (CE) processes combined the static FA analysis yielded successful localization of a bipolar junction transistor (BJT) device soft failure. Additional FA techniques were incorporated within the FA flow, resulting in characterization of the electrical behavior of a suspected transistor and detection of an abnormal implant profile within the active area.
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Imamoto, Takuya, and Tetsuo Endoh. "Suppression of self-heating effect employing bulk vertical-channel bipolar junction transistor (BJT) type capacitorless 1T-DRAM cell." In 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (Formerly known as SOI Conference). IEEE, 2013. http://dx.doi.org/10.1109/s3s.2013.6716574.

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Yuan, Heng, Bo Wang, Se-Hyuk Yeom, Byoung-Ho Kang, Kyu-Jin Kim, Jung-Hee Lee, Shin-Won Kang, and Dae-Hyuk Kwon. "Novel Biosensor Based on MOSFET-BJT Hybrid Mode of Gated Lateral Bipolar Junction Transistor for C-reactive Protein Detection." In 2012 3rd International Conference on Intelligent Systems, Modelling and Simulation (ISMS). IEEE, 2012. http://dx.doi.org/10.1109/isms.2012.79.

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Tianbing Chen and James Ma. "Advances in bipolar junction transistor modeling." In 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT). IEEE, 2010. http://dx.doi.org/10.1109/icsict.2010.5667345.

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Daniel, C., C. Plettner, A. Schuttauf, C. Poivey, F. Tonicello, and M. Triggianese. "Laser Pulse Tests of Bipolar Junction Transistors (BJTs) for SET Analysis." In 2014 IEEE Radiation Effects Data Workshop (REDW) (in conjunction with NSREC 2014). IEEE, 2014. http://dx.doi.org/10.1109/redw.2014.7004576.

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Yourun Zhang, Bo Zhang, Zhaoji Li, Xilin liu, and Xiaochuan Deng. "Novel structure of 4H-SiC bipolar junction transistor." In 2009 International Conference on Communications, Circuits and Systems (ICCCAS). IEEE, 2009. http://dx.doi.org/10.1109/icccas.2009.5250432.

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Hossain, Md Mahbub. "Thermal Node Characteristics of a Bipolar Junction Transistor." In 2019 IEEE International Conference on Electro Information Technology (EIT). IEEE, 2019. http://dx.doi.org/10.1109/eit.2019.8834123.

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Causevic, A., H. S. Funk, D. Schwarz, K. Guguieva, and J. Schulze. "Processing sequence for a PureB bipolar junction transistor." In 2020 43rd International Convention on Information, Communication and Electronic Technology (MIPRO). IEEE, 2020. http://dx.doi.org/10.23919/mipro48935.2020.9245196.

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Reports on the topic "Bipolar junction transistor (BJT)"

1

Schaeffer, Daniel. Very High Frequency Bipolar Junction Transistor Frequency Multiplier Drive Network Design and Analysis. Portland State University Library, January 2000. http://dx.doi.org/10.15760/etd.6907.

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