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Adachi, Kazuhiro. "Simulation and modelling of power devices based on 4H silicon carbide." Thesis, University of Newcastle Upon Tyne, 2003. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.273406.
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Lee, Hyung-Seok. "High power bipolar junction transistors in silicon carbide." Licentiate thesis, Stockholm, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-3854.
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Gallagher, Jeanne M. B. "A monolithic bipolar junction transistor amplifier in the common emitter configuration." Honors in the Major Thesis, University of Central Florida, 1992. http://digital.library.ucf.edu/cdm/ref/collection/ETH/id/98.
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This item is only available in print in the UCF Libraries. If this is your Honors Thesis, you can help us make it available online for use by researchers around the world by following the instructions on the distribution consent form at http://library.ucf.edu/Systems/DigitalInitiatives/DigitalCollections/InternetDistributionConsentAgreementForm.pdf You may also contact the project coordinator, Kerri Bottorff, at kerri.bottorff@ucf.edu for more information.Bachelors
Engineering
Electrical Engineering
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SILVA, Malana Marcelina Almeida da. "Caracterização de transistor bipolar de Junção para medição em feixes de radioterapia." Universidade Federal de Pernambuco, 2016. https://repositorio.ufpe.br/handle/123456789/18420.
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Capes
Transistores bipolares de junção - TBJ possuem uma característica inerente à sua construção física que é o fator de amplificação do sinal produzido, ou seja, amplificação da corrente. Fótons de megavoltagem, ao interagirem com o material semicondutor são capazes de produzir o que é chamado de fotocorrente, ao mesmo tempo em que provocam danos na estrutura cristalina do transistor. O objetivo desta dissertação foi caracterizar o TBJ do tipo BC846 para feixes de fótons de megavoltagem com a finalidade de entender o comportamento deste dispositivo para que futuramente seja desenvolvido um novo método dosimétrico visando complementar os métodos já existentes. O estudo concerniu em caracterizar um TBJ para se analisar como tal dispositivo eletrônico pode ser utilizado como detector de radiação no modo ativo, isto é, em mensurar em tempo real a dose, taxa de dose, dependência energética, e os efeitos direcional e de tamanho de campo de irradiação. Os experimentos foram realizados utilizando um simulador de placas de água sólida com o transistor posicionado no eixo central do feixe em uma profundidade de 5 cm, tamanho de campo padrão, 10 x 10 cm², e uma distância fonte-superfície de 100 cm. Os resultados mostram que o TBJ pode funcionar como detector em feixes de radioterapia desde que seja obedecido certos critérios técnicos relacionados ao comportamento elétrico do dispositivo antes e durante a irradiação. Uma perda percentual média de ±3% na sensibilidade do dispositivo foi registrada após cada irradiação. Essa variação guarda uma proporcionalidade com a dose absorvida e foi encontrada resposta semelhante mesmo com transistores que possuem diferentes fatores de amplificação da corrente.
Bipolar Junction Transistor - BJT have a characteristic inherent to their physical construction, which is the amplification factor of the produced signal, i.e., current amplification. Megavoltage photons interacting with the semiconductor material are capable of producing what is called photocurrent, while causing damage to the crystalline structure of the transistor. The aim of this work was to characterize the BJT type BC846 for MV photon beams in order to understand the behavior of this mechanism to be developed in the future a new dosimetric method to complement existing methods. The study's concerned characterization of a BJT to be analyzed as such electronic device may be used as a radiation detector in the active mode, i.e., measuring in real time the dose, dose rate, energy dependence, and directional effects and size radiation field. The experiments were performed using a solid water phantom with the transistor positioned at the central axis of the beam at a depth of 5 cm, standard field size, 10 x 10 cm², and a source-surface distance of 100 cm. The results show that the BJT may function as a detector in radiotherapy beam since certain technical criteria are met related to the electrical behavior of the device before and during the irradiation. An average percentage loss of ± 3% in the device sensitivity was recorded after each irradiation. This variation is in proportion to the dose absorbed and one can see similar response even with transistors having different amplification factors of the current.
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Schaeffer, Daniel Dale. "Very High Frequency Bipolar Junction Transistor Frequency Multiplier Drive Network Design and Analysis." PDXScholar, 2019. https://pdxscholar.library.pdx.edu/open_access_etds/5031.
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The function of a frequency multiplier is verbatim -- a frequency multiplier is a circuit that takes a signal of particular frequency at the input and produces harmonic multiples of the input signal's frequency at the output. Their use is widespread throughout history, primarily in the application of frequency synthesis. When implemented as a part of a large system, a chain of multipliers can be used to synthesize multiple reference signals from a single high-performance reference oscillator.
Frequency multiplier designs use a variety of nonlinear devices and topologies to achieve excitation of harmonics. This thesis will focus on the design and analysis of single ended bipolar junction transistor frequency multipliers. This topology serves as a relatively simple design that lends itself to analysis of device parasitics and nonlinearities. In addition, design is done in the Very High Frequency (VHF) band of 30-300 MHz to allow for design and measurement freedoms. However, the design methodologies and theory can be frequency scaled as needed.
The parasitics and nonlinearities of frequency multipliers are well explored on the output side of circuit design, but literature is lacking in analysis of the drive network. In order to explore device nonlinearities on the drive side of the circuit, this thesis implements novel nonlinear reflectometry systems in both simulations and real-world testing. The simulation nonlinear reflectometry consists of intelligently configured voltage sources, whereas directional couplers allow for real world nonlinear reflectometry measurements. These measurements allow for harmonically rich reflected waveforms to be accurately measured, allowing for waveform engineering to be performed at the drive network. Further, nonlinear reflectometry measurements can be used to explain how load- and source-pull obtained drive and load terminations are able to achieve performance increases.
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Okuda, Takafumi. "Enhancement of Carrier Lifetimes in SiC and Fabrication of Bipolar Junction Transistors." 京都大学 (Kyoto University), 2015. http://hdl.handle.net/2433/202717.
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Yu, Chi Sun. "Effectiveness of parallel diode linearizers on bipolar junction transistor and its use in dynamic linearization /." access full-text access abstract and table of contents, 2009. http://libweb.cityu.edu.hk/cgi-bin/ezdb/thesis.pl?phd-ee-b23749362f.pdf.
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Thesis (Ph.D.)--City University of Hong Kong, 2009."Submitted to Department of Electronic Engineering in partial fulfillment of the requirements for the degree of Doctor of Philosophy." Includes bibliographical references (leaves 129-134)
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Rodriguez, Luis. "Design of a Monolithic Bipolar Junction Transistor Amplifier in the Common Emitter with Cascaded Common Collector Configuration." Honors in the Major Thesis, University of Central Florida, 2004. http://digital.library.ucf.edu/cdm/ref/collection/ETH/id/724.
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This item is only available in print in the UCF Libraries. If this is your Honors Thesis, you can help us make it available online for use by researchers around the world by following the instructions on the distribution consent form at http://library.ucfBachelors
Engineering and Computer Science
Electrical Engineering
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Dias, Pedro Carvalhaes 1983. "Um novo sensor de umidade de solo de pulso de calor de alta sensibilidade, baseado em um único transistor bipolar de junção npn = A novel high sensitivity single probe heat pulse soil moisture sensor based on a single npn bipolar junction transistor = A novel high sensitivity single probe heat pulse soil moisture sensor based on a single npn bipolar junction transistor." [s.n.], 2012. http://repositorio.unicamp.br/jspui/handle/REPOSIP/261867.
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Orientador: Elnatan Chagas FerreiraTexto em inglês
Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação
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Resumo: A constante preocupação em aumentar a produtividade das plantações de uma forma sustentável e otimizando o uso dos insumos agrícolas (água, fertilizantes, pesticidas e produtos para correção do PH) levou ao desenvolvimento da agricultura de precisão, que permite determinar a quantidade correta de insumos para cada região do solo (tipicamente um hectare), evitando o desperdício. Sensores de umidade de solo de baixo custo e fácil aplicação no campo são fundamentais para permitir um controle preciso da atividade de irrigação, sendo que os sensores que melhor atendem estes requisitos são os chamados sensores de dissipação de calor ou sensores de transferência de calor. Estes sensores, entretanto, apresentam um problema de baixa sensibilidade na faixa de umidade mais importante para as plantas (umidade de solo 'teta'v variando entre 5% e 35%), pois, para cobrir esta variação de 30% em 'teta'v com resolução de 1%, é necessário medir variações de temperatura de aproximadamente 0,026 ºC nos sensores de pulso de calor a duas pontas e 0,05 ºC para os sensores de pulso de calor de ponta simples. Neste trabalho foi desenvolvido um novo sensor de umidade de solo do tipo pulso de calor de ponta simples, baseado em um único elemento: um transistor bipolar de junção npn, que é usado tanto como aquecedor e como sensor de temperatura de alta precisão. Resultados experimentais, obtidos em medidas realizadas através de uma técnica de interrogação especialmente desenvolvida para este novo sensor mostram que neste trabalho foi possível obter uma sensibilidade cerca de uma ordem de grandeza maior do que nos sensores de pulso de calor com uma ponta e cerca de 20 vezes maior do que nos sensores de pulso de calor de duas pontas. Outra vantagem da técnica desenvolvida é que o aumento da sensibilidade não é obtido às custas do aumento da corrente drenada da bateria para aquecer o sensor. No sensor desenvolvido é utilizada uma corrente de apenas 6 mA para gerar o aquecimento (com energia dissipada de 1,5 J), enquanto que que os sensores de pulso de calor com ponta simples requerem cerca de 50 mA (com 2,4 J de energia dissipada) para operar. Os sensores de pulso de calor de ponta dupla também são fabricados com resistores que requerem cerca de 50 mA para o aquecimento (0.8 J de energia dissipada) para operar corretamente
Abstract: The concern regarding sustainable development and crop inputs optimization (such as water, fertilizers, pesticides and soil PH correction products) has led to the development of the precision agriculture concept, that allows to determine the exact amount of each input required on each ground section (typically one hectare), avoiding waste of inputs. Low-cost and easily handled soil moisture sensors are very important for allowing a precise irrigation control. The class of sensors which fulfill those requirements are the heat transfer sensors, where there are basically two types of devices: dual (or multi) probe heat pulse sensors and single probe heat pulse sensors. However, these sensors have a low sensitivity in the most important range of soil humidity 'teta'v for plants (usually from 5% ? 'teta'v ? 35%). To cover this 30% soil humidity range with 1% resolution it is necessary to measure temperature with a resolution of 0,026 ºC in the dual/multi probe heat pulse sensors and 0,05 ºC in the single probe heat pulse sensor. In this work it was developed a new type of single probe heat pulse sensor, comprised of a single element: an npn junction bipolar transistor, that plays the role of both the heating element and a high accuracy temperature sensor. Experimental results, obtained through an interrogation technique especially developed for this sensor, show sensitivity about one order of magnitude greater than the typical sensitivity of the single probe heat pulse sensors and 20 times greater than dual probe heat pulse sensors. Another great advantage of the developed interrogation technique is that the increase in sensibility is not obtained through a higher current being drained from the batteries that power the sensor. The developed sensor operates at a much lower current level than the other sensors, draining only 6 mA from the battery (with an energy of 150 mW). The single probe heat pulse sensor requires 50 mA and 1.5 J of energy to operate, whilst the dual probe heat pulse sensors are manufactured with resistors which also drain 50 mA from the battery with 0.8 J of dissipated energy
Mestrado
Eletrônica, Microeletrônica e Optoeletrônica
Mestre em Engenharia Elétrica
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Sandén, Martin. "Low-Frequency Noise in Si-Based High-Speed Bipolar Transistors." Doctoral thesis, KTH, Microelectronics and Information Technology, IMIT, 2001. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-3203.
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Tolstoy, Georg. "High-Efficiency SiC Power Conversion : Base Drivers for Bipolar Junction Transistors and Performance Impacts on Series-Resonant Converters." Doctoral thesis, KTH, Elektrisk energiomvandling, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-168163.
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This thesis aims to bring an understanding to the silicon carbide (SiC) bipolar junction transistor (BJT). SiC power devices are superior to the silicon IGBT in several ways. They are for instance, able to operate with higher efficiency, at higher frequencies, and at higher junction temperatures. From a system point of view the SiC power device could decrease the cost and complexity of cooling, reduce the size and weight of the system, and enable the system to endure harsher environments. The three main SiC power device designs are discussed with a focus on the BJT. The SiC BJT is compared to the SiC junction field-effect transistor (JFET) and the metal-oxide semiconductor field-effect transistor (MOSFET). The potential of employing SiC power devices in applications, ranging from induction heating to high-voltage direct current (HVDC), is presented. The theory behind the state-of-the-art dual-source (2SRC) base driver that was presented by Rabkowski et al. a few years ago is described. This concept of proportional base drivers is introduced with a focus on the discretized proportional base drivers (DPBD). By implementing the DPBD concept and building a prototype it is shown that the steady-state consumption of the base driver can be reduced considerably. The aspects of the reverse conduction of the SiC BJT are presented. It is shown to be of importance to consider the reduced voltage drop over the base-emitter junction. Last the impact of SiC unipolar and bipolar devices in series-resonant (SLR) converters is presented. Two full-bridges are designed and constructed, one with SiC MOSFETs utilizing the body diode for reverse conduction during the dead-time, and the second with SiC BJTs with anti-parallel SiC Schottky diodes. It is found that the SiC power devices, with their absence of tail current, are ideal devices to fully utilize the soft-switching properties that the SLR converters offer. The SiC MOSFET benefits from its possibility to utilize reverse conduction with a low voltage drop. It is also found that the size of capacitance of the snubbers can be reduced compare to state-of-the-art silicon technology. High switching frequencies of 200 kHz are possible while still keeping the losses low. A dead-time control strategy for each device is presented. The dual control (DuC) algorithm is tested with the SiC devices and compared to frequency modulation (FM). The analytical investigations presented in this thesis are confirmed by experimental results on several laboratory prototype converters.QC 20150529
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Shafai, Adam, and Wei Zhao. "Kiselkarbidtransistorer i växelriktare för solceller." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-177197.
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Since the first commercial silicon carbide (SiC) transistor was released, the interest in SiC has grown exponentially [1]. The wide energy band gap, high critical electric field and thermal conductivity of silicon carbide allow it to withstand higher voltage/current gains than conventional semiconductor materials [2]. The electrical properties of SiC enable integrated devices and circuits to operate at higher voltages and temperatures. One of the most attractive applications for SiC is in inverters for photovoltaic systems, where switching time is of great importance. This thesis presents the study of two bipolar junction transistors (BJT), FSICBH15A120 of SiC and BUV48A of conventional silicon (Si). The transistors were simulated and validated experimentally, then tested in a DC/AC pv inverter with a polycrystalline solar module of 36 solar cells as power source. The simulation results showed high efficiency and low power losses.Sedan den första kommersiella transistorn av kiselkarbid (SiC) släpptes har intresset för SiC ökat exponentiellt [1]. Det breda energibandgapet, höga kritisk elektriska fältstyrkan och termiska ledningsförmågan i SiC gör att den klarar en högre kombination av spänning/strömförstärkning än konventionella halvledarmaterial [2]. De elektriska egenskaperna av SiC gör det möjligt för integrerade komponenter och kretsar att arbeta i högre spänningar och temperaturer. Ett av de största användningsområdena för SiC är i växelriktare för solceller, där switch-tid har stor betydelse. I detta examensarbete presenteras studien av två bipolära transistorer (BJT), FSICBH15A120 av SiC och BUV48A av konventionellt kisel (Si). Transistorerna simulerades och valideras experimentellt, och slutligen jämfördes med varandra i en DC/AC-omvandlare med en polykristallin solpanel av 36 solceller som strömkälla. Hög verkningsgrad och låga energiförluster påvisades.
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Ahmed, Adnan. "Study of Low-Temperature Effects in Silicon-Germanium Heterojunction Bipolar Transistor Technology." Thesis, Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/7227.
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This thesis investigates the effects of low temperatures on Silicon Germanium (SiGe) Hterojunction Bipolar Transistors (HBT) BiCMOS technology. A comprehensive set of dc measurements were taken on first, second, third and fourth generation IBM SiGe technology over a range of temperatures (room temperature to 43K for first generation, and room temperature to 15K for the rest). This work is unique in the sense that this sort of comprehensive study of dc characteristics on four SiGe HBT technology generations over a wide range of temperatures has never been done before to the best of the authors knowledge.
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Pejnefors, Johan. "Chemical Vapor Depositionof Si and SiGe Films for High-Speed Bipolar Transistors." Doctoral thesis, KTH, Microelectronics and Information Technology, IMIT, 2001. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-3214.
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This thesis deals with the main aspects in chemical vapordeposition (CVD) of silicon (Si) and silicon-germanium (Si1-xGex) films for high-speed bipolar transistors.In situdoping of polycrystalline silicon (poly-Si)using phosphine (PH3) and disilane (Si2H6) in a low-pressure CVD reactor was investigated toestablish a poly-Si emitter fabrication process. The growthkinetics and P incorporation was studied for amorphous Si filmgrowth. Hydrogen (H) incorporated in the as-deposited films wasrelated to growth kinetics and the energy for H2desorption was extracted. Film properties such asresistivity, mobility, carrier concentration and grain growthwere studied after crystallization using either furnaceannealing or rapid thermal annealing (RTA). In order tointegrate an epitaxial base, non-selective epitaxial growth(NSEG) of Si and SiGe in a lamp-heated single-waferreduced-pressure CVD reactor was examined. The growth kineticsfor Si epitaxy and poly-Si deposition showed a differentdependence on the deposition conditions i.e. temperature andpressure. The growth rate difference was mainly due to growthkinetics rather than wafer surface emissivity effects. However,it was observed that the growth rate for Si epitaxy and poly-Sideposition was varying during growth and the time-dependencewas attributed to wafer surface emissivity variations. A modelto describe the emissivity effects was established, taking intoconsideration kinetics and the reactor heating mechanisms suchas heat absorption, emission andconduction. Growth ratevariations in opening of different sizes (local loading) andfor different oxide surface coverage (global loading) wereinvestigated. No local loading effects were observed, whileglobal loading effects were attributed to chemical as well astemperature effects. Finally, misfit dislocations formed in theSiGe epitaxy during NSEG were found to originate from theinterface between the epitaxial and polycrystalline regions.The dislocations tended to propagate across the activearea.
Keywords:chemical vapor deposition (CVD), bipolarjunction transistor (BJT), heterojunction bipolar transistor(HBT), silicon-germanium (SiGe), epitaxy, poly-Si emitter,in situdoping, non-selective epitaxy (NSEG), loadingeffect, emissivity effect
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Stein, Félix. "SPICE Modeling of TeraHertz Heterojunction bipolar transistors." Thesis, Bordeaux, 2014. http://www.theses.fr/2014BORD0281/document.
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Les études qui seront présentées dans le cadre de cette thèse portent sur le développement et l’optimisation des techniques pour la modélisation compacte des transistors bipolaires à hétérojonction (TBH). Ce type de modélisation est à la base du développement des bibliothèques de composants qu’utilisent les concepteurs lors de la phase de simulation des circuits intégrés. Le but d’une technologie BiCMOS est de pouvoir combiner deux procédés technologiques différents sur une seule et même puce. En plus de limiter le nombre de composants externes, cela permet également une meilleure gestion de la consommation dans les différents blocs digitaux, analogiques et RF. Les applications dites rapides peuvent ainsi profiter du meilleur des composants bipolaires et des transistors CMOS. Le défi est d’autant plus critique dans le cas des applications analogiques/RF puisqu’il est nécessaire de diminuer la puissance consommée tout en maintenant des fréquences de fonctionnement des transistors très élevées. Disposer de modèles compacts précis des transistors utilisés est donc primordial lors de la conception des circuits utilisés pour les applications analogiques et mixtes. Cette précision implique une étude sur un large domaine de tensions d’utilisation et de températures de fonctionnement. De plus, en allant vers des nœuds technologiques de plus en plus avancés, des nouveaux effets physiques se manifestent et doivent être pris en compte dans les équations du modèle. Les règles d’échelle des technologies plus matures doivent ainsi être réexaminées en se basant sur la physique du dispositif. Cette thèse a pour but d’évaluer la faisabilité d’une offre de modèle compact dédiée à la technologie avancée SiGe TBH de chez ST Microelectronics. Le modèle du transistor bipolaire SiGe TBH est présenté en se basant sur le modèle compact récent HICUMversion L2.3x. Grâce aux lois d’échelle introduites et basées sur le dessin même des dimensions du transistor, une simulation précise du comportement électrique et thermique a pu être démontrée.Ceci a été rendu possible grâce à l’utilisation et à l’amélioration des routines et méthodes d’extraction des paramètres du modèle. C’est particulièrement le cas pour la détermination des éléments parasites extrinsèques (résistances et capacités) ainsi que celle du transistor intrinsèque. Finalement, les différentes étapes d’extraction et les méthodes sont présentées, et ont été vérifiées par l’extraction de bibliothèques SPICE sur le TBH NPN Haute-Vitesse de la technologie BiCMOS avancée du noeud 55nm, avec des fréquences de fonctionnement atteignant 320/370GHz de fT = fmaxThe aim of BiCMOS technology is to combine two different process technologies intoa single chip, reducing the number of external components and optimizing power consumptionfor RF, analog and digital parts in one single package. Given the respectivestrengths of HBT and CMOS devices, especially high speed applications benefit fromadvanced BiCMOS processes, that integrate two different technologies.For analog mixed-signal RF and microwave circuitry, the push towards lower powerand higher speed imposes requirements and presents challenges not faced by digitalcircuit designs. Accurate compact device models, predicting device behaviour undera variety of bias as well as ambient temperatures, are crucial for the development oflarge scale circuits and create advanced designs with first-pass success.As technology advances, these models have to cover an increasing number of physicaleffects and model equations have to be continuously re-evaluated and adapted. Likewiseprocess scaling has to be verified and reflected by scaling laws, which are closelyrelated to device physics.This thesis examines the suitability of the model formulation for applicability to production-ready SiGe HBT processes. A derivation of the most recent model formulationimplemented in HICUM version L2.3x, is followed by simulation studies, whichconfirm their agreement with electrical characteristics of high-speed devices. Thefundamental geometry scaling laws, as implemented in the custom-developed modellibrary, are described in detail with a strong link to the specific device architecture.In order to correctly determine the respective model parameters, newly developed andexisting extraction routines have been exercised with recent HBT technology generationsand benchmarked by means of numerical device simulation, where applicable.Especially the extraction of extrinsic elements such as series resistances and parasiticcapacitances were improved along with the substrate network.The extraction steps and methods required to obtain a fully scalable model library wereexercised and presented using measured data from a recent industry-leading 55nmSiGe BiCMOS process, reaching switching speeds in excess of 300GHz. Finally theextracted model card was verified for the respective technology
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Aguirre, Fernando Rodrigues. "Estudo sobre distribuição de cargas em semicondutores sujeitos a radiação ionizante." Universidade de São Paulo, 2017. http://www.teses.usp.br/teses/disponiveis/43/43134/tde-13032017-113040/.
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Os efeitos da radiação ionizante em dispositivos eletrônicos é uma preocupação crescente na tecnologia de semicondutores, especialmente devido à contínua redução dos dispositivos e ainda maior, quando são destinados para uso em ambientes agressivos com alta radiação, tais como missões espaciais, aceleradores de partículas ou reatores nucleares. Dentre os vários efeitos causados pela radiação ionizante em dispositivos eletrônicos está aquele devido à Dose Acumulada (Total Ionizing Dose - TID), o qual a acumulação de danos de radiação no dispositivo muda seu funcionamento normal. O TID causado por fótons em transístores já foi estudado no Brasil, mas o efeito de prótons num transistor bipolar, apresentado neste trabalho é um trabalho pioneiro no país. As curvas características de um transistor 2N3733 foram medidas antes, durante e após a irradiação de prótons entre 1,5 e 3,8 MeV, para quantificar as alterações das especificações elétricas do dispositivo. Nestas energias, há uma correlação direta entre a mudança na resposta elétrica e a energia do próton, exceto em algumas energias específicas, onde o pico de Bragg ocorreu perto das junções ou no meio do cristal de silício, demonstrando a importância da correta caracterização da camada de passivação em estudos de TID em dispositivos eletrônicos. A recuperação dos transistores irradiados após o recozimento a 50°C durante 8 horas também foi maior para aqueles irradiados nessas energias. Existe um limite superior de dose para o qual não foi observada alteração significativa do transistor. Este limite, da ordem de Grad, excede a maioria das aplicações em ambientes terrestres, mas está dentro do intervalo esperado para missões espaciais a Júpiter ou em grandes aceleradores de partículas.The effect of ionizing radiation on electronic devices is a growing concern in semiconductor technology, especially due to the continuous reduction of the devices and even greater when they are intended for use in aggressive environments with high radiation, such as space missions, particle accelerators or nuclear reactors. Among the various effects caused by ionizing radiation on electronic devices are the effects due to Total Ionizing Dose (TID), in which the accumulation of radiation damage in the device changes its normal functioning. The TID caused by photons has already been studied in Brazil, but the effect of protons on a bipolar transistor, presented in this work is a pioneer work in the country. The characteristic curves of a 2N3733 transistor were measured before, during and after proton irradiation between 1.5 and 3.8 MeV, to quantify changes of the electrical specifications of the device. At these proton energies, there is a direct correlation between the change in the electric response to the proton energy, except at some specific energies where the Bragg peak occurred near the junctions or in the middle of the silicon crystal, demonstrating the importance of the correct characterization of the passivation layer in TID studies of electronic devices. The recovery of transistors irradiated after annealing at 50 ° C for 8 hours was also higher for those irradiated at these energies. There is an upper dose limit for which no alteration of the transistor was observed. This limit, of the order of Grad, exceeds most applications in terrestrial environments, but is within the expected range for space missions to Jupiter or large particle accelerators.
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Liu, Wei. "Electro-thermal simulations and measurements of silicon carbide power transistors." Doctoral thesis, Stockholm, 2004. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-86.
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Vu, Van Tuan. "Recherche et évaluation d'une nouvelle architecture de transistor bipolaire à hétérojonction Si/SiGe pour la prochaine génération de technologie BiCMOS." Thesis, Bordeaux, 2016. http://www.theses.fr/2016BORD0304/document.
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L'objectif principal de cette thèse est de proposer et d'évaluer une nouvelle architecture de Transistor Bipolaire à Héterojonction (TBH) Si/SiGe s’affranchissant des limitations de l'architecture conventionnelle DPSA-SEG (Double-Polysilicium Self-Aligned, Selective Epitaxial Growth) utilisée dans la technologie 55 nm Si/SiGe BiCMOS (BiCMOS055) de STMicroelectronics. Cette nouvelle architecture est conçue pour être compatible avec la technologie 28-nm FD-SOI (Fully Depleted Si-licon On Insulator), avec pour objectif d'atteindre la performance de 400 GHz de fT et 600 GHz de fMAX dans ce noeud. Pour atteindre cet objectif ambitieux, plusieurs études complémentaires ont été menées: 1/ l'exploration et la comparaison de différentes architectures de TBH SiGe, 2/ l'étalonnage TCAD en BiCMOS055, 3/ l'étude du budget thermique induit par la fabrication des technologies BiCMOS, et finalement 4/ l'étude d'une architecture innovante et son optimisation. Les procédés de fabrication ainsi que les modèles physiques (comprenant le rétrécissement de la bande interdite, la vitesse de saturation, la mobilité à fort champ, la recombinaison SRH, l'ionisation par impact, la résistance distribuée de l'émetteur, l'auto-échauffement ainsi que l’effet tunnel induit par piégeage des électrons), ont été étalonnés dans la technologie BiCMOS055. L'étude de l’impact du budget thermique sur les performances des TBH SiGe dans des noeuds CMOS avancés (jusqu’au 14 nm) montre que le fT maximum peut atteindre 370 GHz dans une prochaine génération où les profils verticaux du BiCMOS055 seraient ‘simplement’ adaptés à l’optimisation du budget thermique total. Enfin, l'architecture TBH SiGe EXBIC, prenant son nom d’une base extrinsèque épitaxiale isolée du collecteur, est choisie comme la candidate la plus prometteuse pour la prochaine génération de TBH dans une technologie BiCMOS FD-SOI dans un noeud 28 nm. L'optimisation en TCAD de cette architecture résulte en des performances électriques remarquables telles que 470 GHz fT et 870 GHz fMAX dans ce noeud technologiqueThe ultimate objective of this thesis is to propose and evaluate a novel SiGe HBT architec-ture overcoming the limitation of the conventional Double-Polysilicon Self-Aligned (DPSA) archi-tecture using Selective Epitaxial Growth (SEG). This architecture is designed to be compatible with the 28-nm Fully Depleted (FD) Silicon On Insulator (SOI) CMOS with a purpose to reach the objec-tive of 400 GHz fT and 600 GHz fMAX performance in this node. In order to achieve this ambitious objective, several studies, including the exploration and comparison of different SiGe HBT architec-tures, 55-nm Si/SiGe BiCMOS TCAD calibration, Si/SiGe BiCMOS thermal budget study, investi-gating a novel architecture and its optimization, have been carried out. Both, the fabrication process and physical device models (incl. band gap narrowing, saturation velocity, high-field mobility, SRH recombination, impact ionization, distributed emitter resistance, self-heating and trap-assisted tunnel-ing, as well as band-to-band tunneling), have been calibrated in the 55-nm Si/SiGe BiCMOS tech-nology. Furthermore, investigations done on process thermal budget reduction show that a 370 GHz fT SiGe HBT can be achieved in 55nm assuming the modification of few process steps and the tuning of the bipolar vertical profile. Finally, the Fully Self-Aligned (FSA) SiGe HBT architecture using Selective Epitaxial Growth (SEG) and featuring an Epitaxial eXtrinsic Base Isolated from the Collector (EXBIC) is chosen as the most promising candidate for the 28-nm FD-SOI BiCMOS genera-tion. The optimization of this architecture results in interesting electrical performances such as 470 GHz fT and 870 GHz fMAX in this technology node
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Ditz, Marc William Legori. "S-parameter modeling of two-port devices using a single, memoryless nonlinearity." Thesis, This resource online, 1992. http://scholar.lib.vt.edu/theses/available/etd-03172010-020656/.
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Flitcroft, Richard M. "Wide bandgap collector III-V double heterojunction bipolar transistors." Thesis, University of Sheffield, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.341875.
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Fernández, S. Alejandro D. "Modelling the temperature dependences of Silicon Carbide BJTs." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-202754.
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Silicon Carbide (SiC), owing to its large bandgap, has proved itself to be a very viable semiconductor material for the development of extreme temperature electronics. Moreover, its electrical properties like critical field (Ecrit) and saturation velocity (vsat) are superior as compared to the commercially abundant Silicon, thus making it a better alternative for RF and high power applications. The in-house SiC BJT process at KTH has matured a lot over the years and recently developed devices and circuits have shown to work at temperatures exceeding 500˚C. However, the functional reliability of more complex circuits requires the use of simulators and device models to describe the behavior of constituent devices. SPICE Gummel Poon (SGP) is one such model that describes the behavior of the BJT devices. It is simpler as compared to the other models because of its relatively small number of parameters. A simple semi-empirical DC compact model has been successfully developed for low voltage applications SiC BJTs. The model is based on a temperature dependent SiC-SGP model. Studies over the temperature dependences for the SGP parameters have been performed. The SGP parameters have been extracted and some have been optimized over a wide temperature range and they have been compared with the measured data. The accuracy of the developed compact model based on these parameters has been proven by comparing it with the measured data as well. A fairly accurate performance at the required working conditions and correlation with the measured results of the SiC compact model has been achieved.
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Hedayati, Raheleh. "High-Temperature Analog and Mixed-Signal Integrated Circuits in Bipolar Silicon Carbide Technology." Doctoral thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-213697.
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Silicon carbide (SiC) integrated circuits (ICs) can enable the emergence of robust and reliable systems, including data acquisition and on-site control for extreme environments with high temperature and high radiation such as deep earth drilling, space and aviation, electric and hybrid vehicles, and combustion engines. In particular, SiC ICs provide significant benefit by reducing power dissipation and leakage current at temperatures above 300 °C compared to the Si counterpart. In fact, Si-based ICs have a limited maximum operating temperature which is around 300 °C for silicon on insulator (SOI). Owing to its superior material properties such as wide bandgap, three times larger than Silicon, and low intrinsic carrier concentration, SiC is an excellent candidate for high-temperature applications. In this thesis, analog and mixed-signal circuits have been implemented using SiC bipolar technology, including bandgap references, amplifiers, a master-slave comparator, an 8-bit R-2R ladder-based digital-to-analog converter (DAC), a 4-bit flash analog-to-digital converter (ADC), and a 10-bit successive-approximation-register (SAR) ADC. Spice models were developed at binned temperature points from room temperature to 500 °C, to simulate and predict the circuits’ behavior with temperature variation. The high-temperature performance of the fabricated chips has been investigated and verified over a wide temperature range from 25 °C to 500 °C. A stable gain of 39 dB was measured in the temperature range from 25 °C up to 500 °C for the inverting operational amplifier with ideal closed-loop gain of 40 dB. Although the circuit design in an immature SiC bipolar technology is challenging due to the low current gain of the transistors and lack of complete AC models, various circuit techniques have been applied to mitigate these problems. This thesis details the challenges faced and methods employed for device modeling, integrated circuit design, layout implementation and finally performance verification using on-wafer characterization of the fabricated SiC ICs over a wide temperature range.QC 20170905
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Holder, David John. "Characterisation and modelling of Heterostructure Bipolar Junction Transistors." Thesis, University of Leeds, 1991. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.305433.
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Sadik, Diane-Perle. "On Reliability of SiC Power Devices in Power Electronics." Doctoral thesis, KTH, Elkraftteknik, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-207763.
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Silicon Carbide (SiC) is a wide-bandgap (WBG) semiconductor materialwhich has several advantages such as higher maximum electric field, lowerON-state resistance, higher switching speeds, and higher maximum allowablejunction operation temperature compared to Silicon (Si). In the 1.2 kV - 1.7kV voltage range, power devices in SiC are foreseen to replace Si Insulatedgatebipolar transistors (IGBTs) for applications targeting high efficiency,high operation temperatures and/or volume reductions. In particular, theSiC Metal-oxide semiconductor field-effect transistor (MOSFET) – which isvoltage controlled and normally-OFF – is the device of choice due to the easeof its implementation in designs using Si IGBTs.In this work the reliability of SiC devices, in particular that of the SiCMOSFET, has been investigated. First, the possibility of paralleling two discreteSiC MOSFETs is investigated and validated through static and dynamictests. Parallel-connection was found to be unproblematic. Secondly, drifts ofthe threshold voltage and forward voltage of the body diode of the SiC MOSFETare investigated through long-term tests. Also these reliability aspectswere found to be unproblematic. Thirdly, the impact of the package on thechip reliability is discussed through a modeling of the parasitic inductancesof a standard module and the impact of those inductances on the gate oxide.The model shows imbalances in stray inductances and parasitic elementsthat are problematic for high-speed switching. A long-term test on the impactof humidity on junction terminations of SiC MOSFETs dies and SiCSchottky dies encapsulated in the same standard package reveals early degradationfor some modules situated outdoors. Then, the short-circuit behaviorof three different types (bipolar junction transistor, junction field-effect transistor,and MOSFET) of 1.2 kV SiC switching devices is investigated throughexperiments and simulations. The necessity to turn OFF the device quicklyduring a fault is supported with a detailed electro-thermal analysis for eachdevice. Design guidelines towards a rugged and fast short-circuit protectionare derived. For each device, a short-circuit protection driver was designed,built and validated experimentally. The possibility of designing diode-lessconverters with SiC MOSFETs is investigated with focus on surge currenttests through the body diode. The discovered fault mechanism is the triggeringof the npn parasitic bipolar transistor. Finally, a life-cycle cost analysis(LCCA) has been performed revealing that the introduction of SiC MOSFETsin already existing IGBT designs is economically interesting. In fact,the initial investment is saved later on due to a higher efficiency. Moreover,the reliability is improved, which is beneficial from a risk-management pointof-view. The total investment over 20 years is approximately 30 % lower fora converter with SiC MOSFETs although the initial converter cost is 30 %higher.Kiselkarbid (SiC) är ett bredbandgapsmaterial (WBG) som har flera fördelar,såsom högre maximal elektrisk fältstyrka, lägre ON-state resitans, högreswitch-hastighet och högre maximalt tillåten arbetstemperatur jämförtmed kisel (Si). I spänningsområdet 1,2-1,7 kV förutses att effekthalvledarkomponenteri SiC kommer att ersätta Si Insulated-gate bipolar transistorer(IGBT:er) i tillämpningar där hög verkningsgrad, hög arbetstemperatur ellervolymreduktioner eftersträvas. Förstahandsvalet är en SiC Metal-oxidesemiconductor field-effect transistor (MOSFET) som är spänningsstyrd ochnormally-OFF, egenskaper som möjliggör enkel implementering i konstruktionersom använder Si IGBTer.I detta arbete undersöks tillförlitligheten av SiC komponenter, specielltSiC MOSFET:en. Först undersöks möjligheten att parallellkoppla tvådiskretaSiC MOSFET:ar genom statiska och dynamiska prov. Parallellkopplingbefanns vara oproblematisk. Sedan undersöks drift av tröskelspänning ochbody-diodens framspänning genom långtidsprov. Ocksådessa tillförlitlighetsaspekterbefanns vara oproblematiska. Därefter undersöks kapslingens inverkanpåchip:et genom modellering av parasitiska induktanser hos en standardmoduloch inverkan av dessa induktanser pågate-oxiden. Modellen påvisaren obalans mellan de parasitiska induktanserna, något som kan varaproblematiskt för snabb switchning. Ett långtidstest av inverkan från fuktpåkant-termineringar för SiC-MOSFET:ar och SiC-Schottky-dioder i sammastandardmodul avslöjar tidiga tecken pådegradering för vissa moduler somvarit utomhus. Därefter undersöks kortslutningsbeteende för tre typer (bipolärtransistor,junction-field-effect transistor och MOSFET) av 1.2 kV effekthalvledarswitchargenom experiment och simuleringar. Behovet att stänga avkomponenten snabbt stöds av detaljerade elektrotermiska simuleringar för allatre komponenter. Konstruktionsriktlinjer för ett robust och snabbt kortslutningsskyddtas fram. För var och en av komponenterna byggs en drivkrets medkortslutningsskydd som valideras experimentellt. Möjligheten att konstrueradiodlösa omvandlare med SiC MOSFET:ar undersöks med fokus påstötströmmargenom body-dioden. Den upptäckta felmekanismen är ett oönskat tillslagav den parasitiska npn-transistorn. Slutligen utförs en livscykelanalys(LCCA) som avslöjar att introduktionen av SiC MOSFET:ar i existerandeIGBT-konstruktioner är ekonomiskt intressant. Den initiala investeringensparas in senare pågrund av en högre verkningsgrad. Dessutom förbättrastillförlitligheten, vilket är fördelaktigt ur ett riskhanteringsperspektiv. Dentotala investeringen över 20 år är ungefär 30 % lägre för en omvandlare medSiC MOSFET:ar även om initialkostnaden är 30 % högre.
QC 20170524
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Geil, Bruce Robert. "Fabrication and modeling of Silicon Carbide Bipolar Junction Transistors." College Park, Md. : University of Maryland, 2008. http://hdl.handle.net/1903/8244.
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Thesis (M.S.) -- University of Maryland, College Park, 2008.Thesis research directed by: Dept. of Electrical and Computer Engineering. Title from t.p. of PDF. Includes bibliographical references. Published by UMI Dissertation Services, Ann Arbor, Mich. Also available in paper.
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Granier, André. "Etude et réalisation d'un transistor JFET vertical silicium et son évaluation en hyperfréquence." Grenoble 1, 1993. http://www.theses.fr/1993GRE10146.
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Cette etude presente la realisation d'un transistor a effet de champ vertical a jonction (jfet) compatible avec la technologie cmos du centre national d'etudes des telecommunications de meylan. Dans un premier temps, la structure du composant est presentee: elle est derivee de celle du transistor pmos et utilise un caisson de phosphore implante a haute energie en tant que drain et un siliciure de titane autoaligne. Nous decrivons les procedures et les outils de caracterisation mis en jeu. La physique du dispositif est apprehendee. Nous analysons l'observation d'un courant de grille et de substrat induit par l'ionisation par impact dans ce transistor. Un regime particulier de fonctionnement, le regime bipolaire, est decrit. Une analyse statistique des parametres electriques demontre que les dispersions sont liees a celles de la largeur de source. L'effet avantageux de la siliciuration sur les caracteristiques electriques est mis en evidence. A l'aide de la simulation numerique, nous definissons les caracteristiques technologiques de deux types de transistor dans le cadre de la filiere cmos 0,7 m. Ils se distinguent par une dose du caisson retrograde differente. A partir de mesures statiques et dynamiques, nous donnons une evaluation de ces dispositifs. Chacun presente des performances en frequence de coupure d'environ 4 ghz, limitees par la capacite de la jonction grille-drain et de la resistance de drain, et des tensions de claquages superieures a 10 v. Ainsi, nous montrons qu'un jfet vertical peut etre developpe pour des applications de puissance hyperfrequence avec un excellent compromis cout-performance. Enfin une approche du jfet vertical realise sur une couche enterree est etudiee
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Hashim, Md Roslan. "Low temperature characterization of Si-bipolar junction transistors and Siâ†1â†-â†xGeâ†x heterojunction bipolar transistors." Thesis, University of Southampton, 1997. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.241938.
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Buono, Benedetto. "Simulation and Characterization of Silicon Carbide Power Bipolar Junction Transistors." Doctoral thesis, KTH, Integrerade komponenter och kretsar, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-95320.
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The superior characteristics of silicon carbide, compared with silicon, have suggested considering this material for the next generation of power semiconductor devices. Among the different power switches, the bipolar junction transistor (BJT) can provide a very low forward voltage drop, a high current capability and a fast switching speed. However, in order to compete on the market, it is crucial to a have high current gain and a breakdown voltage close to ideal. Moreover, the absence of conductivity modulation and long-term stability has to be solved. In this thesis, these topics are investigated comparing simulations and measurements. Initially, an efficient etched JTE has been simulated and fabricated. In agreement with the simulations, the fabricated diodes exhibit the highest BV of around 4.3 kV when a two-zone JTE is implemented. Furthermore, the simulations and measurements demonstrate a good agreement between the electric field distribution inside the device and the optical luminescence measured at breakdown. Additionally, an accurate model to simulate the forward characteristics of 4H-SiC BJTs is presented. In order to validate the model, the simulated current gains are compared with measurements at different temperatures and different base-emitter geometries. Moreover, the simulations and measurements of the on-resistance are compared at different base currents and different temperatures. This comparison, coupled with a detailed analysis of the carrier concentration inside the BJT, indicates that internal forward biasing of the base-collector junction limits the BJT to operate at high current density and low forward voltage drop simultaneously. In agreement with the measurements, a design with a highly-doped extrinsic base is proposed to alleviate this problem. In addition to the static characteristics, the comparison of measured and simulated switching waveforms demonstrates that the SiC BJT can provide fast switching speed when it acts as a unipolar device. This is crucial to have low power losses during transient. Finally, the long-term stability is investigated. It is observed that the electrical stress of the base-emitter diode produces current gain degradation; however, the degradation mechanisms are still unclear. In fact, the analysis of the measured Gummel plot suggests that the reduction of the carrier lifetime in the base-emitter region might be only one of the causes of this degradation. In addition, the current gain degradation due to ionizing radiation is investigated comparing the simulations and measurements. The simulations suggest that the creation of positive charge in the passivation layer can increase the base current; this increase is also observed in the electrical measurements.QC 20120522
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Lee, Hyung-Seok. "Fabrication and Characterization of Silicon Carbide Power Bipolar Junction Transistors." Doctoral thesis, Stockholm : Kungliga Tekniska högskolan, 2008. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-4623.
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Elahipanah, Hossein. "Design Optimization and Realization of 4H-SiC Bipolar Junction Transistors." Doctoral thesis, KTH, Elektronik, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-211659.
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4H-SiC-based bipolar junction transistors (BJTs) are attractive devices for high-voltage and high-temperature operations due to their high current capability, low specific on-resistance, and process simplicity. To extend the potential of SiC BJTs to power electronic industrial applications, it is essential to realize high-efficient devices with high-current and low-loss by a reliable and wafer-scale fabrication process. In this thesis, we focus on the improvement of the 4H-SiC BJT performance, including the device optimization and process development. To optimize the 4H-SiC BJT design, a comprehensive study in terms of cell geometries, device scaling, and device layout is performed. The hexagon-cell geometry shows 42% higher current density and 21% lower specific on-resistance at a given maximum current gain compared to the interdigitated finger design. Also, a layout design, called intertwined, is used for 100% usage of the conducting area. A higher current is achieved by saving the inactive portion of the conducting area. Different multi-step etched edge termination techniques with an efficiency of >92% are realized. Regarding the process development, an improved surface passivation is used to reduce the surface recombination and improve the maximum current gain of 4H-SiC BJTs. Moreover, wafer-scale lift-off-free processes for the n- and p-Ohmic contact technologies to 4H-SiC are successfully developed. Both Ohmic metal technologies are based on a self-aligned Ni-silicide (Ni-SALICIDE) process. Regarding the device characterization, a maximum current gain of 40, a specific on-resistance of 20 mΩ·cm2, and a maximum breakdown voltage of 5.85 kV for the 4H-SiC BJTs are measured. By employing the enhanced surface passivation, a maximum current gain of 139 and a specific on-resistance of 579 mΩ·cm2 at the current density of 89 A/cm2 for the 15-kV class BJTs are obtained. Moreover, low-voltage 4H-SiC lateral BJTs and Darlington pair with output current of 1−15 A for high-temperature operations up to 500 °C were fabricated. This thesis focuses on the improvement of the 4H-SiC BJT performance in terms of the device optimization and process development for high-voltage and high-temperature applications. The epilayer design and the device structure and topology are optimized to realize high-efficient BJTs. Also, wafer-scale fabrication process steps are developed to enable realization of high-current devices for the real applications.QC 20170810
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Woywode, Oliver. "Nonlinearities in the Base Emitter Junction of Heterojunction Bipolar Transistors." PDXScholar, 1996. https://pdxscholar.library.pdx.edu/open_access_etds/5208.
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The nonlinear behaviour of the base emitter junction in HBTs is investigated. Nonlinearities cause troublesome distortion and intermodulation of signals and raise the bit error rate. They are therefore a key issue in microwave communication systems. Hewlett-Packard's Microwave Design System (MDS) software package has been used to simulate these phenomena. The simulation results are verified by an analytical method called nonlinear current method which is a derivative of the Volterra series approach. With the aid of this method new analytical expressions are derived that provide insight into the subtleties of nonlinear phenomena. These expressions are evaluated by the program MAPLE and subsequently compared with the MDS results. Two different models for the B-E junction are juxtaposed. The derived equations reveal the identity and correspondence between the two models. Finally, this thesis also addresses harmonic balance simulation which is the type of simulation MDS employs to simulate nonlinear circuits.
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Ghandi, Reza. "Fabrication Technology for Efficient High Power Silicon Carbide Bipolar Junction Transistors." Doctoral thesis, KTH, Integrerade komponenter och kretsar, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-29726.
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The superior characteristics of Silicon Carbide as a wide band gap semiconductor have motivated many industrial and non-industrial research groups to consider SiC for the next generations of high power semiconductor devices. The SiC Bipolar Junction Transistor (BJT) is one candidate for high power applications due to its low on-state power loss and fast switching capability. However, to compete with other switching devices such as Field Effect Transistors (FETs) or IGBTs, it is necessary for a power SiC BJT to provide a high current gain to reduce the power required from the drive circuit. In this thesis implantation free 4H-SiC BJTs with linearly graded base layer have been demonstrated with common-emitter current gain of 50 and open-base breakdown voltage of 2700 V. Also an efficient junction termination extension (JTE) with 80% of theoretical parallel-plane breakdown voltage was analyzed by fabrication of high voltage PiN diodes to achieve an optimum dose of remaining JTE charge. Surface passivation of 4H-SiC BJT is an essential factor for efficient power BJTs. Therefore different passivation techniques were compared and showed that around 60% higher maximum current gain can be achieved by a newsurface passivation layer with low interface trap density that consists of PECVD oxide followed by post-deposition oxide anneal in N2O ambient. This surface passivation along with doublezone JTE were used for fabrication of high power BJTs that result in successful demonstration of 2800 V breakdown voltage for small area (0.3 × 0.3 mm) and large area (1.8 × 1.8 mm) BJTs with a maximum dc current gain of 55 and 52, respectively. The small area BJT showed RON = 4mΩcm2, while for the large are BJT RON = 6.8 mΩcm2. Finally, a Darlington transistor with a maximum current gain of 2900 at room temperature and 640 at 200 °C is reported. The high current gain of the Darlington transistor is achieved by optimum design for the ratio of the active area of the driver BJT to the output BJT.QC 20110216
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Manera, Leandro Tiago 1977. "Desenvolvimento de sistemas e medida de ruído de alta e baixa frequência em dispositivos semicondutores." [s.n.], 2010. http://repositorio.unicamp.br/jspui/handle/REPOSIP/261062.
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Orientador: Peter Jurgen TatschTese (doutorado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação
Made available in DSpace on 2018-08-15T23:27:09Z (GMT). No. of bitstreams: 1 Manera_LeandroTiago_D.pdf: 3739799 bytes, checksum: 12a6fc4ebbea20e529e4e7e2c7c5a761 (MD5) Previous issue date: 2010
Resumo: Este trabalho teve como objetivo a montagem de um sistema de caracterização de ruído de alta e de baixa freqüência, utilizando equipamentos disponíveis no Centro de Componentes Semicondutores da Unicamp. Foi montado um sistema para a caracterização do ruído de baixa freqüência em dispositivos semicondutores e desenvolveu-se um método para a análise da qualidade de interfaces e cálculo de cargas, utilizando o ruído 1/f. Na descrição do ruído em baixa freqüência é apresentado em detalhes todo o arranjo utilizado para a medição, além dos resultados da medida em transistores nMOS e CMOS do tipo p e do tipo n fabricados no Centro. Detalhes importantes sobre o cuidado com a medição, tais como a utilização de baterias para a alimentação dos dispositivos e o correto aterramento, também são esclarecidos. A faixa de freqüência utilizada vai de 1 Hz até 100 KHz. Como aplicação, a medida de ruído é utilizada como ferramenta de diagnóstico de dispositivos semicondutores. Resultados destas medidas também são apresentados. Foi desenvolvido também um sistema para a medição do ruído em alta freqüência. A caracterização teve como objetivo determinar o parâmetro conhecido como Figura de Ruído. Apresenta-se além da descrição do arranjo utilizado na medição, os equipamentos e a metodologia empregada. Em conjunto com as medidas de ruído também são apresentados os resultados das medidas de parâmetros de espalhamento. Para a validação do método de obtenção desse conjunto de medidas, um modelo de pequenos sinais de um transistor HBT, incluindo as fontes de ruído é proposto, e é apresentado o resultado entre a medição e a simulação. A faixa disponível para medida vai de 45 MHz até 30 GHz para os parâmetros de espalhamento e de 10 MHz até 1.6 GHz para medida de figura de ruído
Abstract: The main goal of this work is the development of a noise characterization system for high and low frequency measurements using equipments available at the Center for Semiconductor Components at Unicamp. A low noise characterization system for semiconductors was built and by means of 1/f noise measurement it was possible to investigate semiconductor interface condition and oxide traps density. Detailed information about the test set-up is presented along with noise measurement data for nMOS, p and n type CMOS transistors. There is also valuable information to careful conduct noise measurements, as using battery powered devices and accurate grounding procedures. The low noise set-up frequency range is from 1 Hz up to 100 KHz. Noise as a diagnostic tool for quality and reliability of semiconductor devices is also presented. Measurement data is also shown. A measurement set-up for high frequency noise characterization was developed. Measurements were carried out in order to determine the noise figure parameter (NF) of the HBT devices. Comprehensive information about the test set-up and equipments are provided. Noise data measurements and s-parameters are also presented. In order to validate the measurement procedure, a small signal model for HBT transistor including noise sources is presented. Comparisons between simulation and measured data are performed. The s-parameters frequency range is from 45 MHz to 30 GHz, and noise set-up frequency range is from 10 MHz up to 1.6 GHz
Doutorado
Eletrônica, Microeletrônica e Optoeletrônica
Doutor em Engenharia Elétrica
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Witczak, Steven Christopher 1962. "Current gain degradation in bipolar junction transistors due to radiation, electrical and mechanical stresses." Diss., The University of Arizona, 1996. http://hdl.handle.net/10150/282140.
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The current gain of bipolar junction transistors is reduced due to ionizing radiation exposure or hot-carrier stressing. Radiation-induced degradation is particularly severe at the low dose rates encountered in space. In this work, the dose rate effect in lateral and substrate pnp bipolar transistors is rigorously quantified over the range of 0.001 to 294 rad(Si)/s. Gain degradation shows little dependence on dose rate below 0.005 rad(Si)/s, suggesting that degradation enhancement comparable to that expected from space-like dose rates was achieved. In addition, the effect of ambient temperature on radiation-induced gain degradation at 294 rad(Si)/s is thoroughly investigated over the range of 25 to 240°C. Degradation is enhanced with increasing temperature while simultaneously being moderated by in situ annealing such that, for a given total dose, an optimum irradiation temperature for maximum degradation results. Optimum irradiation temperature decreases logarithmically with total dose and is larger and more sensitive to dose in the substrate device than in the lateral device. Maximum high dose rate degradation at elevated temperature closely approaches low dose rate degradation in both of the devices. A flexible hardness assurance methodology based on accelerated irradiations at elevated temperatures is described. The influence of mechanical stress on the radiation hardness of single-crystalline emitter transistors is investigated using x-ray diffraction. Correlation of device radiation sensitivity and mechanical stress in the base supports previously reported observations that Si-SiO₂ interfaces exhibit increased susceptibility to radiation damage under tensile Si stress. Relaxation of processing-induced stress in the base oxide due to ionizing radiation is smaller than the stress induced by emitter contact metallization followed by a post-metallization anneal. Possible mechanisms for radiation-induced stress relaxation and their effect on the radiation sensitivity of bipolar transistors are discussed. The combined effects of ionizing radiation and hot-carrier stress on the current gain of npn transistors are investigated. The hot-carrier response of the transistors is improved by radiation damage, whereas hot-carrier damage has little effect on subsequent radiation stress. Characterization of the temporal progression of hot-carrier effects reveals that hot-carrier stress acts initially to reduce excess base current and improve current gain in irradiated transistors. Numerical simulations show that the magnitude of the peak electric-field within the emitter-base depletion region is reduced significantly by net positive oxide charges induced by radiation. The interaction of the two stress types is explained in a physical model based on the probability of hot-carrier injection and the neutralization and compensation of radiation damage in the base oxide. The results of this work further the understanding of stress-induced gain degradation in bipolar transistors and provide important insight for the use of bipolar transistors in stress environments.
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Salemi, Arash. "Silicon Carbide Technology for High- and Ultra-High-Voltage Bipolar Junction Transistors and PiN Diodes." Doctoral thesis, KTH, Integrerade komponenter och kretsar, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-197913.
Full textAbstract:
Silicon carbide (SiC) is an attractive material for high-voltage and high-temperature electronic applications owing to the wide bandgap, high critical electric field, and high thermal conductivity. High- and ultra-high-voltage silicon carbide bipolar devices, such as bipolar junction transistors (BJTs) and PiN diodes, have the advantage of a low ON-resistance due to conductivity modulation compared to unipolar devices. However, in order to be fully competitive with unipolar devices, it is important to further improve the off-state and on-state characteristics, such as breakdown voltage, leakage current, common-emitter current gain, switching, current density, and ON-resistance. In order to achieve a high breakdown voltage with a low leakage current, an efficient and easy to fabricate junction edge protection or termination is needed. Among different proposed junction edge protections, a mesa design integrated with junction termination extensions (JTEs) is a powerful approach. In this work, implantation-free 4H-SiC BJTs in two classes of voltage, i.e., 6 kV-class and 15 kV-class with an efficient and optimized implantation-free junction termination (O-JTE) and multiple-shallow-trench junction termination extension (ST-JTE) are designed, fabricated and characterized. These terminations result in high termination efficiency of 92% and 93%, respectively. The 6 kV-class BJTs shows a maximum current gain of β = 44. A comprehensive study on the geometrical design is done in order to improve the on-state performances. For the first time, new cell geometries (square and hexagon) are presented for the SiC BJTs. The results show a significant improvement of the on-state characteristics because of a better utilization of the base area. At a given current gain, new cell geometries show a 42% higher current density and 21% lower ON-resistance. The results of this study, including an optimized fabrication process, are utilized in the 15 kV-class BJTs where a record high current gain of β = 139 is achieved. Ultra-high-voltage PiN diodes in two classes of voltage, i.e., 10+ kV using on-axis 4H-SiC and 15 kV-class off-axis 4H-SiC, are presented. O-JTE is utilized for 15 kV-class PiN diodes, while three steps ion-implantation are used to form the JTE in 10+ kV PiN diodes. Carbon implantation followed by high-temperature annealing is also performed for the 10+ kV PiN diodes in order to enhance the lifetime. Both type diodes depict conductivity modulation in the drift layer. No bipolar degradation is observed in 10+ kV PiN diodes.QC 20161209
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Kosier, Steven Louie. "Modeling gain degradation in bipolar junction transistors due to ionizing radiation and hot-carrier stressing." Diss., The University of Arizona, 1994. http://hdl.handle.net/10150/186751.
Full textAbstract:
The roles of net positive oxide trapped charge and surface recombination velocity in producing excess base current in bipolar junction transistors (BJTs) are identified. Although the interaction of these two quantities is physically complex, simple approaches for estimating their magnitude from measured BJT characteristics are presented. The oxide charge is estimated using a transition voltage in the plot of excess base current versus emitter bias. Two approaches for quantifying the effects of surface recombination velocity are described. The first measures surface recombination directly using a gated diode, while the second estimates its effects using an intercept current that is easily obtained from the BJT itself. The results are compared to two-dimensional simulations and measurements made on test structures. The techniques are simple to implement and provide insight into the mechanisms and magnitudes of the radiation-induced damage in BJTs. A physically-based comparison between hot-carrier and ionizing radiation stress in BJTs is presented as well. Although both types of stress lead to qualitatively similar changes in the current gain of the device, the physical mechanisms responsible for the degradation are quite different. Implications for correlating and comparing hot-carrier-induced and ionizing-radiation-induced damage are discussed. Finally, the worst-case increase in base current is shown to be dose-rate independent. This fact allows the worst-case response of bipolar devices to be determined using convenient laboratory dose rates.
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Duan, G. (Guoyong). "Three-dimensional effects and surface breakdown addressing efficiency and reliability problems in avalanche bipolar junction transistors." Doctoral thesis, Oulun yliopisto, 2013. http://urn.fi/urn:isbn:9789526200859.
Full textAbstract:
Abstract Although avalanche switching has been known since the 1950s, a trustworthy one-dimensional physical interpretation of the practically interesting high-current mode ("secondary breakdown") in a Si avalanche transistor has appeared only within the last decade and thanks to numerical one-dimensional and two-dimensional physics-based device modelling. A good fit with experimental waveforms has been achieved only for high-current, long-duration pulses (~100 A/7 ns), however, and modelling fails in the case of shorter pulses in a range that is of greater practical importance. One significant finding in this thesis is that reliable modelling of a Si avalanche transistor is in general impossible without taking account of three-dimensional effects. The task is a challenging one, as it is being put forward for the first time and state-of-the-art simulators are unable to model three-dimensional avalanche dynamics with an external circuit included (i.e. in “MixedMode”). Thus a smart approach was adopted which allowed the main features of the three-dimensional transient to be explained using a two-dimensional simulator and compared with the experimental data. The focus was on a trade-off of between high switching efficiency in an avalanche transistor (high-speed switching with a lower residual voltage as occurs at extremely high current densities) and device reliability as determined by local overheating during a single pulse, similarly resulting from high current density. This denotes the practical importance of the work performed here, as the current density is directly affected by three-dimensional dynamic processes. The second task performed in this thesis concerns the reliability of the GaAs avalanche transistors developed recently in the Electronics Laboratory and demonstrated of unique (superfast) switching and high-power-density sub-THz emission for mm-wave imaging and radars. Critically important for this new device is the limitation originating from premature breakdown at the surface of the GaAs p-n junction with a high density of surface states. Two of the results of this work are also fairly challenging: (i) the mechanism of "soft" surface breakdown intrinsic to all GaAs transistor mesas was interpreted in terms of the surface trapping of avalanche-generated electrons as suggested here, and (ii) passivation of the surface with a chalcogenide glass was suggested, as this allows the premature surface breakdown to be suppressed completely, an effect that has proved to be caused by a large negative surface charge formed on the “U centres” intrinsic to a chalcogenide glassTiivistelmä Vaikka avalanche läpilyönti pii-transistoreissa on tunnettu jo 1950-luvulta lähtien, luotettava 1-dimensionaalinen fysikaalinen tulkinta ilmiöstä käytännön sovellusten kannalta kiinnostavilla suurilla virtatasoilla (ns. “secondary breakdown”) on esitetty vasta viime vuosikymmenen aikana 1- ja 2-dimensionaalisiin numeerisiin simulointeihin ja fysikaaliseen mallinnukseen perustuen. Kokeellisten mittausten ja simulointien välille on saatu hyvä sovitus kuitenkin vain sellaisessa ohjaustilanteessa, jossa transistori toimii suurella virtatasolla ja tuottaa leveitä virtapulsseja (~100 A / 7 ns); mallinnus ei vastaa mittaustuloksia lyhyillä virtapulsseilla, jotka kuitenkin ovat tärkeitä käytännön sovellusten kannalta. Yksi tämän työn keskeisiä havaintoja on se, että piipohjaisen avalanche transistorin luotettava mallintaminen ei ole käytännössä yleisesti mahdollista ottamatta huomioon 3-dimensionaalisia (3D) efektejä. Tällainen mallinnus, jota tässä työssä on kehitetty ensimmäistä kertaa, on vaikeaa, koska kaupalliset simulointiohjelmistot eivät kykene käsittelemään avalanche ilmiön dynamiikka 3-dimensionaalisesti tilanteessa, jossa transistoriin on kytketty ulkoinen piiri (ns. mixed-mode -simulointitilanne). Tähän kehitettiin tekniikka, joka mahdollistaa 3-dimensionaalisen kytkentätransientin tärkeimpien piirteiden selittämisen ja mittaustuloksiin vertaamisen 2-dimensionaalisten simulointien perusteella. Erityisesti pyrittiin selvittämään avalanche transistorin korkean kytkentähyötysuhteen (kollektori-emitterin ns. residual-jännitteen käyttäytyminen virrantiheystason mukaan) ja komponentin luotettavuuden välistä riippuvuutta. Luotettavuuteen vaikuttaa olennaisesti komponentin sisäinen, lokalisoitunut lämpötilamaksimi, joka myös riippuu keskeisesti komponentin virrantiheystasosta kytkentäpulssin aikana. Toisaalta virrantiheyteen vaikuttavat juuri komponentin 3-dimensionaaliset dynaamiset prosessit, joten työn käytännöllinen merkitys on suuri. Työn toisen osa käsittelee elektroniikan laboratoriossa äskettäin kehitetyn GaAs-avalanche transistorin luotettavuutta. Tällaisella transistorilla on demonstroitu olevan erityislaatuinen supernopea kytkeytymisefekti, ja se emittoi korkealla tehotasolla sähkömagneettista säteilyä n. 0,1–1 THz taajuusalueella. GaAs-avalanche transistoria voidaan täten potentiaalisesti hyödyntää mm-alueen kuvantamisessa ja tutkissa. Tämän uuden transistorin luotettavuuteen vaikuttaa ratkaisevasti rajoitus, joka aiheutuu ennenaikaisen, GaAs-pn-liitoksen pinnassa vaikuttavasta suuresta pintatilatiheydestä johtuvan läpilyönnin mahdollisuudesta. Työn kaksi keskeistä tulosta ovat: (i) kaikilla GaAs-transistoreilla ilmenevä ns. ”pehmeä”-läpilyönti aiheutuu avalanche ilmiön synnyttämien elektronien loukkuuntumisesta pinta-tiloihin, ja (ii) pinnan passivointi kalkopyriittilasilla estää läpilyönnin kokonaan, koska kalkopyriittilasille luonteenomaiset ”U-tilat” aiheuttavat liitoksen pintaan korkean negatiivisen pintavarauksen
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Tian, Ye. "SiC Readout IC for High Temperature Seismic Sensor System." Doctoral thesis, KTH, Integrerade komponenter och kretsar, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-213969.
Full textAbstract:
Over the last decade, electronics operating at high temperatures have been increasingly demanded to support in situ sensing applications such as automotive, deep-well drilling and aerospace. However, few of these applications have requirements above 460 °C, as the surface temperature of Venus, which is a specific target for the seismic sensing application in this thesis. Due to its wide bandgap, Silicon Carbide (SiC) is a promising candidate to implement integrated circuits (ICs) operating in such extreme environments. In this thesis, various analog and mixed-signal ICs in 4H-SiC bipolar technology for high-temperature sensing applications are explored, in which the device performance variation over temperatures are considered. For this purpose, device modeling, circuit design, layout design, and device/circuit characterization are involved. In this thesis, the circuits are fabricated in two batches using similar technologies. In Batch 1, the first SiC sigma-delta modulator is demonstrated to operate up to 500 °C with a 30 dB peak SNDR. Its building blocks including a fully-differential amplifier, an integrator and a comparator are characterized individually to investigate the modulator performance variation over temperatures. In the succeeding Batch 2, a SiC electromechanical sigma-delta modulator is designed with a chosen Si capacitive sensor for seismic sensing on Venus. Its building blocks including a charge amplifier, a multiplier and an oscillator are designed. Compared to Batch 1, a smaller transistor and two metal-interconnects are used to implement higher integration ICs in Batch 2. Moreover, the first VBIC-based compact model featured with continuous-temperature scalability from 27 to 500 °C is developed based on the SiC transistor in Batch 1, in order to optimize the design of circuits in Batch 2. The demonstrated performance of ICs in Batch 1 show the feasibility to further develop the SiC readout ICs for seismic sensor system operating on Venus.QC 20170911
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He, Jianqing. "Investigation of transport mechanisms for n-p-n InP/InGaAs/InP double heterojunction bipolar transistors." Thesis, Virginia Tech, 1989. http://hdl.handle.net/10919/44645.
Full textAbstract:
A more complete model for InP/InGaAs Double Heterojunction Bipolar
Transistors (DHBT) is obtained in this thesis by physically analyzing the transport
process of the main current components. The potential distribution of the energy
barrier constitutes a fundamental analytical concept and is employed for applying
the diffusion, the thermionic emission, and the tunneling theories in investigating the
injection mechanisms at the e-b heterojunction interface. The diffusion transport is
considered first for electron injection from the emitter into the base. The thermionic
emission is applied properly at the point of maximum potential energy as one
of the boundary conditions at that interface. A suitable energy level is selected with
respect to which the energy barrier expression is expanded for the calculation of the
tunneling probability. The first "spike" at the conduction band discontinuity is
described as the potential energy for the injected electrons to obtain kinetic energy
to move into the base region with a substantially high Velocity. The electron blocking
action of the second "spike" at the bâ c junction is also analyzed by considering the
transport Velocity with which electrons are swept out of that boundary. Based on the
material parameters recently reported for both InP and InGaAs, computations of the nI
current components are carried out to provide à characteristics in good agreement
with the reported experimental results.
Master of Science
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Huber, Dieter. "InP/InGaAs single hetero-junction bipolar transistors for integrated photoreceivers operating at 40 Gb/s and beyond /." [Zürich] : [s.n.], 2002. http://e-collection.ethbib.ethz.ch/show?type=diss&nr=14504.
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Pereira, Nuno Ruben Ferreira. "Implementation of a sigma delta modulator for a class D audio power amplifier." Master's thesis, Faculdade de Ciências e Tecnologia, 2013. http://hdl.handle.net/10362/10046.
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Asada, Satoshi. "Improvement of ON-Characteristics in SiC Bipolar Junction Transistors by Structure Designing Based on Analyses of Material Properties and Carrier Recombination." Kyoto University, 2019. http://hdl.handle.net/2433/242510.
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Suvanam, Sethu Saveda. "Radiation Hardness of 4H-SiC Devices and Circuits." Doctoral thesis, KTH, Integrerade komponenter och kretsar, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-199907.
Full textAbstract:
Advances in space and nuclear technologies are limited by the capabilities of the conventional silicon (Si) electronics. Hence, there is a need to explore materials beyond Si with enhanced properties to operate in extreme environments. In this regards, silicon carbide (4H-SiC), a wide bandgap semiconductor, provides suitable solutions. In this thesis, radiation effects of 4H-SiC bipolar devices, circuits and dielectrics for SiC are investigated under various radiation types. We have demonstrated for the first time the radiation hardness of 4H-SiC logic circuits exposed to extremely high doses (332 Mrad) of gamma radiation and protons. Comparisons with previously available literature show that our 4H-SiC bipolar junction transistor (BJT) is 2 orders of magnitude more tolerant under gamma radiation to existing Si-technology. 4H-SiC devices and circuits irradiated with 3 MeV protons show about one order of magnitude higher tolerance in comparison to Si. Numerical simulations of the device showed that the ionization is most influential in the degradation process by introducing interface states and oxide charges that lower the current gain. Due to the gain reduction of the BJT, the voltage reference of the logic circuit has been affected and this, in turn, degrades the voltage transfer characteristics of the OR-NOR gates. One of the key advantages of 4H-SiC over other wide bandgap materials is the possibility to thermally grow silicon oxide (SiO2) and process device in line with advanced silicon technology. However, there are still questions about the reliability of SiC/SiO2 interface under high power, high temperature and radiation rich environments. In this regard, aluminium oxide (Al2O3), a chemically and thermally stable dielectric, has been investigated. It has been shown that the surface cleaning treatment prior to deposition of a dielectric layer together with the post dielectric annealing has a crucial effect on interface and oxide quality. We have demonstrated a new method to evaluate the interface between dielectric/4H-SiC utilizing an optical free carrier absorption technique to quantitative measure the charge carrier trapping dynamics. The radiation hardness of Al2O3/4H-SiC is demonstrated and the data suggests that Al2O3 is better choice of dielectric for devices in radiation rich applications.QC 20170119
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Volkov, Anton. "Ionic and electronic transport in electrochemical and polymer based systems." Doctoral thesis, Linköpings universitet, Fysik och elektroteknik, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-135429.
Full textAbstract:
Electrochemical systems, which rely on coupled phenomena of the chemical change and electricity, have been utilized for development an interface between biological systems and conventional electronics. The development and detailed understanding of the operation mechanism of such interfaces have a great importance to many fields within life science and conventional electronics. Conducting polymer materials are extensively used as a building block in various applications due to their ability to transduce chemical signal to electrical one and vice versa. The mechanism of the coupling between the mass and charge transfer in electrochemical systems, and particularly in conductive polymer based system, is highly complex and depends on various physical and chemical properties of the materials composing the system of interest. The aims of this thesis have been to study electrochemical systems including conductive polymer based systems and provide knowledge for future development of the devices, which can operate with both chemical and electrical signals. Within the thesis, we studied the operation mechanism of ion bipolar junction transistor (IBJT), which have been previously utilized to modulate delivery of charged molecules. We analysed the different operation modes of IBJT and transition between them on the basis of detailed concentration and potential profiles provided by the model. We also performed investigation of capacitive charging in conductive PEDOT:PSS polymer electrode. We demonstrated that capacitive charging of PEDOT:PSS electrode at the cyclic voltammetry, can be understood within a modified Nernst-Planck-Poisson formalism for two phase system in terms of the coupled ion-electron diffusion and migration without invoking the assumption of any redox reactions. Further, we studied electronic structure and optical properties of a self-doped p-type conducting polymer, which can polymerize itself along the stem of the plants. We performed ab initio calculations for this system in undoped, polaron and bipolaron electronic states. Comparison with experimental data confirmed the formation of undoped or bipolaron states in polymer film depending on applied biases. Finally, we performed simulation of the reduction-oxidation reaction at microband array electrodes. We showed that faradaic current density at microband array electrodes increases due to non-linear mass transport on the microscale compared to the corresponding macroscale systems. The studied microband array electrode was used for developing a laccase-based microband biosensor. The biosensor revealed improved analytical performance, and was utilized for in situ phenol detection.
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Ericson, Matthias, and Johan Silverudd. "Design of measurement circuits for SiC experiment : KTH student satellite MIST." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-191137.
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SiC in Space is one of the experiments on KTH’s miniature satellite, MIST. The experiment carries out tests on bipolar junction transistors of silicon and silicon carbide. This thesis describes how the characteristics of a transistor can be measured using analog circuits. The presented circuit design will work as a prototype for the SiC in Space experiment. The prototype measures the base current, the collector current, the base-emitter voltage as well as the temperature of the transistor. This thesis describes how a test circuit may be designed. The selected design has been constructed in incremental steps, with each design choice explained. Different designs have been developed. The designs have been verified with simulations. We have also constructed and tested three different prototypes on breadboards and printed circuit boards.SiC in Space är ett av experimenten på KTHs miniatyrsatellit, MIST. Experimentet utför test på bipolära transistorer av kisel och kiselkarbid. Detta examensarbete förklarar hur transistorns karakteristik kan mätas med analoga kretsar. Den framtagna kretsdesignen kommer att fungera som en prototyp till SiC in Space-experimentet. Prototypen mäter basströmmen, kollektorströmmen, bas-emitter-spänningen samt temperaturen för transistorn. Detta examensarbete förklarar hur en testkrets kan designas. Den valda designen byggs i inkrementella steg, där varje designval förklaras. Olika designer har utvecklats. Designerna har verifierats genom simuleringar. Vi har också konstruerat och testat tre olika prototyper på kopplingsdäck och kretskort.
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Usman, Muhammad. "Impact of Ionizing Radiation on 4H-SiC Devices." Doctoral thesis, KTH, Integrerade komponenter och kretsar, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-60763.
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Electronic components, based on current semiconductor technologies and operating in radiation rich environments, suffer degradation of their performance as a result of radiation exposure. Silicon carbide (SiC) provides an alternate solution as a radiation hard material, because of its wide bandgap and higher atomic displacement energies, for devices intended for radiation environment applications. However, the radiation tolerance and reliability of SiC-based devices needs to be understood by testing devices under controlled radiation environments. These kinds of studies have been previously performed on diodes and MESFETs, but multilayer devices such as bipolar junction transistors (BJT) have not yet been studied. In this thesis, SiC material, BJTs fabricated from SiC, and various dielectrics for SiC passivation are studied by exposure to high energy ion beams with selected energies and fluences. The studies reveal that the implantation induced crystal damage in SiC material can be partly recovered at relatively low temperatures, for damag elevels much lower than needed for amorphization. The implantation experiments performed on BJTs in the bulk of devices show that the degradation in deviceperformance produced by low dose ion implantations can be recovered at 420 oC, however, higher doses produce more resistant damage. Ion induced damage at the interface of passivation layer and SiC in BJT has also been examined in this thesis. It is found that damaging of the interface by ionizing radiation reduces the current gain as well. However, for this type of damage, annealing at low temperatures further reduces the gain. Silicon dioxide (SiO2) is today the dielectric material most often used for gate dielectric or passivation layers, also for SiC. However, in this thesis several alternate passivation materials are investigated, such as, AlN, Al2O3 and Ta2O5. These materials are deposited by atomic layer deposition (ALD) both as single layers and in stacks, combining several different layers. Al2O3 is further investigated with respect to thermalstability and radiation hardness. It is observed that high temperature treatment of Al2O3 can substantially improve the performance of the dielectric film. A radiation hardness study furthermore reveals that Al2O3 is more resistant to ionizing radiation than currently used SiO2 and it is a suitable candidate for devices in radiation rich applications.QC 20120117
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Weisz, Mario. "Electrothermal device-to-circuit interactions for half THz SiGe∶C HBT technologies." Thesis, Bordeaux 1, 2013. http://www.theses.fr/2013BOR14909/document.
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Ce travail concerne les transistors bipolaires à hétérogène TBH SiGe. En particulier, l'auto-échauffement des transistors unitaires et le couplage thermique avec leurs plus proches voisins périphériques sont caractérisés et modélisés. La rétroaction électrothermique intra- et inter-transistor est largement étudiée. En outre, l’impact des effets thermiques sur la performance de deux circuits analogiques est évalué. L'effet d'autoéchauffement est évalué par des mesures à basse fréquence et des mesures impulsionnelles DC et AC. L'auto-échauffement est diminué de manière significative en utilisant des petites largeurs d'impulsion. Ainsi la dépendance fréquentielle de l’autoéchauffementa été étudiée en utilisant les paramètres H et Y. De nouvelles structures de test ont été fabriqués pour mesurer l'effet de couplage. Les facteurs de couplage thermique ont été extraits à partir de mesures ainsi que par simulations thermiques 3D. Les résultats montrent que le couplage des dispositifs intra est très prononcé. Un nouvel élément du modèle de résistance thermique récursive ainsi que le modèle de couplage thermique a été inclus dans un simulateur de circuit commercial. Une simulation transitoire entièrement couplée d'un oscillateur en anneau de 218 transistors a été effectuée. Ainsi, un retard de porte record de 1.65ps est démontré. À la connaissance des auteurs, c'est le résultat le plus rapide pour une technologie bipolaire. Le rendement thermique d'un amplificateur de puissance à 60GHz réalisé avec un réseau multi-transistor ou avec un transistor à plusieurs doigts est évalué. La performance électrique du transistor multidoigt est dégradée en raison de l'effet de couplage thermique important entre les doigts de l'émetteur. Un bon accord est constaté entre les mesures et les simulations des circuits en utilisant des modèles de transistors avec le réseau de couplage thermique. Enfin, les perspectives sur l'utilisation des résultats sont donnéesThe power generate by modern silicon germanium (SiGe) heterojunction bipolar transistors (HBTs) can produce large thermal gradients across the silicon substrate. The device opering temperature modifies model parameters and can significantly affect circuit operation. This work characterizes and models self-heating and thermal coupling in SiGe HBTs. The self-heating effect is evaluated with low frequency and pulsed measurements. A novel pulse measurement system is presented that allows isothermal DC and RF measurements with 100ns pulses. Electrothermal intra- and inter-device feedback is extensively studied and the impact on the performance of two analog circuits is evaluated. Novel test structures are designed and fabricated to measure thermal coupling between single transistors (inter-device) as well as between the emitter stripes of a multi-finger transistor (intra-device). Thermal coupling factors are extracted from measurements and from 3D thermal simulations. Thermally coupled simulations of a ring oscillator (RO) with 218 transistors and of a 60GHz power amplifier (PA) are carried out. Current mode logic (CML) ROs are designed and measured. Layout optimizations lead to record gate delay of 1.65ps. The thermal performance of a 60GHz power amplifier is compared when realized with a multi-transistor array (MTA) and with a multi-finger trasistor (MFT). Finally, perspectives of this work within a CAD based circuit design environment are discussed
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Utard, Christian. "Les oscillateurs microondes faible bruit de fond a base de mesfet gaas, tegfet gaalas et transistor bipolaire silicium : modelisation, caracterisation et comparaison." Toulouse 3, 1988. http://www.theses.fr/1988TOU30078.
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On presente une methode simplifiee de modelisation fort signal des mesfet et tegfet et transistors bipolaires. Ces trois types de transistors sont utilises dans un montage oscillateur dont les caracteristiques ont ete determines de trois facons differentes, analytique par simulation electrique temporelle et par mesures experimentales. On presente enfin une etude en bruit bf et bruit mf des transistors et des oscillateurs afin de determiner le composant le plus performant. Nous proposons trois facons de determiner le coefficient de conversion bruit bf - bruit mf, par des mesures directes; indirectes et par simulation temporelle
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Najjari, Hamza. "Power Amplifier Design Based on Electro-Thermal Considerations." Thesis, Bordeaux, 2019. http://www.theses.fr/2019BORD0422.
Full textAbstract:
L’objectif de ce travail de recherche est de concevoir un amplificateur de puissance sur la base de considérations électrothermiques. Il décrit la question du dynamique EVM et du « paquet long » lors de la conception de l’amplificateur avec des transistors bipolaires à hétérojonctions. Basé sur le comportement électrothermique du circuit, une méthode d’optimisation de l’EVM statique et dynamique est proposée. Un frontend RF complet (amplificateur de puissance + coupleur + interrupteur + amplificateur faible bruit) est conçu pour le dernier standard WLAN : le Wi-Fi 6. La distribution de temperature dynamique dans le circuit est analysée. Son effet sur les performances de la puce est quantifié. Enfin, une polarisation adaptative programmable a été conçue pour garder des performances optimales sur toute la plage de température. Les mesures du circuit montre tout l’effet bénéfique de cette compensation, permettant de garder le dynamique EVM en dessous de -47 dB sur la plage de température ambiante de -40 à 85°CThe aim of this work is to design a power amplifier based on electrothermal considerations. It describes the Dynamic Error Vector Magnitude challenge and long packet issue when designing a power amplifier with hetero-junction bipolar transistors. Based on the circuit electrothermal behavior, an optimization method of both the static and dynamic linearity is proposed. A complete RF front-end (PA + coupler + switch + LNA) is designed for the latest WLAN standard: the Wi-Fi 6. The dynamic temperature distribution in the circuit is analyzed. It’s impact on the performances is quantified. Finally, a programmable temperature dependent bias is designed to compensate for performance degradation. The measurements show a significant linearity improvement with this compensation, allowing the PA to maintain the DEVM lower than -47dB at 14.5 dBm output power, over a large ambient temperature range from -40°C to 85°C
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Sahoo, Amit Kumar. "Electro-thermal Characterizations, Compact Modeling and TCAD based Device Simulations of advanced SiGe : C BiCMOS HBTs and of nanometric CMOS FET." Thesis, Bordeaux 1, 2012. http://www.theses.fr/2012BOR14557/document.
Full textAbstract:
Ce travail de thèse présente une évaluation approfondie des différentes techniques de mesure transitoire et dynamique pour l’évaluation du comportement électro-thermique des transistors bipolaires à hétérojonctions HBT SiGe:C de la technologie BiCMOS et des transistors Métal-Oxyde-Semiconducteur à effet de champ (MOSFET) de la technologie CMOS 45nm. En particulier, je propose une nouvelle approche pour caractériser avec précision le régime transitoire d'auto-échauffement, basée sur des mesures impulsionelles. La méthodologie a été vérifiée par des mesures statiques à différentes températures ambiantes, des mesures de paramètres S à basses fréquences et des simulations thermiques transitoires. Des simulations thermiques par éléments finis (TCAD) en trois dimensions ont été réalisées sur les transistors HBTs de la technologie submicroniques SiGe: C BiCMOS. Cette technologie est caractérisée par une fréquence de transition fT de 230 GHz et une fréquence maximum d’oscillation fMAX de 290 GHz. Par ailleurs, cette étude a été réalisée sur les différentes géométries de transistor. Une évaluation complète des mécanismes d'auto-échauffement dans les domaines temporels et fréquentiels a été réalisée. Une expression généralisée de l'impédance thermique dans le domaine fréquentiel a été formulée et a été utilisé pour extraire cette impédance en deçà de la fréquence de coupure thermique. Les paramètres thermiques ont été extraits par des simulations compactes grâce au modèle compact de transistors auquel un modèle électro-thermique a été ajouté via le nœud de température. Les travaux théoriques développés à ce jour pour la modélisation d'impédance thermique ont été vérifiés avec nos résultats expérimentaux. Il a été montré que, le réseau thermique classique utilisant un pôle unique n'est pas suffisant pour modéliser avec précision le comportement thermique transitoire et donc qu’un réseau plus complexe doit être utilisé. Ainsi, nous validons expérimentalement pour la première fois, le modèle distribué électrothermique de l'impédance thermique utilisant un réseau nodal récursif. Le réseau récursif a été vérifié par des simulations TCAD, ainsi que par des mesures et celles ci se sont révélées en excellent accord. Par conséquent, un modèle électro-thermique multi-géométries basé sur le réseau récursif a été développé. Le modèle a été vérifié par des simulations numériques ainsi que par des mesures de paramètre S à basse fréquence et finalement la conformité est excellente quelque soit la géométrie des dispositifsAn extensive evaluation of different techniques for transient and dynamic electro-thermal behavior of microwave SiGe:C BiCMOS hetero-junction bipolar transistors (HBT) and nano-scale metal-oxide-semiconductor field-effect transistors (MOSFETs) have been presented. In particular, new and simple approach to accurately characterize the transient self-heating effect, based on pulse measurements, is demonstrated. The methodology is verified by static measurements at different ambient temperatures, s-parameter measurements at low frequency region and transient thermal simulations. Three dimensional thermal TCAD simulations are performed on different geometries of the submicron SiGe:C BiCMOS HBTs with fT and fmax of 230 GHz and 290 GHz, respectively. A comprehensive evaluation of device self-heating in time and frequency domain has been investigated. A generalized expression for the frequency-domain thermal impedance has been formulated and that is used to extract device thermal impedance below thermal cut-off frequency. The thermal parameters are extracted through transistor compact model simulations connecting electro-thermal network at temperature node. Theoretical works for thermal impedance modeling using different networks, developed until date, have been verified with our experimental results. We report for the first time the experimental verification of the distributed electrothermal model for thermal impedance using a nodal and recursive network. It has been shown that, the conventional single pole thermal network is not sufficient to accurately model the transient thermal spreading behavior and therefore a recursive network needs to be used. Recursive network is verified with device simulations as well as measurements and found to be in excellent agreement. Therefore, finally a scalable electro-thermal model using this recursive network is developed. The scalability has been verified through numerical simulations as well as by low frequency measurements and excellent conformity has been found in for various device geometries