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1

Pratapgarhwala, Mustansir M. "Characterization of Transistor Matching in Silicon-Germanium Heterojunction Bipolar Transistors." Thesis, Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/7536.

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Transistor mismatch is a crucial design issue in high precision analog circuits, and is investigated here for the first time in SiGe HBTs. The goal of this work is to study the effects of mismatch under extreme conditions including radiation, high temperature, and low temperature. One portion of this work reports collector current mismatch data as a function of emitter geometry both before and after 63 MeV proton exposure for first-generation SiGe HBTs with a peak cut-off frequency of 60 GHz. However, minimal changes in device-to-device mismatch after radiation exposure were experienced. Another part of the study involved measuring similar devices at different temperatures ranging from 298K to 377K. As a general trend, it was observed that device-to-device mismatch improved with increasing temperature.
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2

Antoniou, M. A. "SuperJunction insulated gate bipolar transistor." Thesis, University of Cambridge, 2009. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.596130.

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The main achievement of this work is that we show that by intelligently coupling the ideas and designs from various power semiconductor devices, that do not combine under conventional approaches, we can lower the turn-off losses by a factor of 5 (or more) when compared to state-of-the-art medium-high voltage power devices, while maintaining a similarly low on-state voltage drop. In this work we propose an optimised SuperJunction IGBT. The impact of varying the net doping of the n and p drift layer pillars was investigated and the device was optimised to deliver the best trade-off between the on-state and switching performance through extensive numerical simulations, both at room and high temperatures. A PSPICE based model of the SuperJunction IGBT was also developed. The results obtained are in good agreement with the device simulations results. The model allows engineers access to a simple and cheap tool to test and evaluate the performance of the SJIGBT. This model consists of an intrinsic MOSFET and a parallel combination of a wide and a narrow base pnp BJTs. A parasite JFET is also included to account for the restricted current flow between two adjacent p-wells. Here we propose a Semi Superjunction IGBT that maintains a high static and dynamic avalanche breakdown while improving dramatically (by one to two orders of magnitude) the failure rate under cosmic ray exposure. This is unrepentant for any other devices in the field. As a result, this device can provide the solution to unexpected power device breakdowns and therefore save the cost in replacing them and the distraction caused. In the same manner, the introduction of the ‘disconnected p-pillar’ in the Semi-SJIGBT dramatically improves the on-state performance and switching-off speed of the device when compared to the conventional Field Stop IGBT.
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3

Lamontagne, Maurice. "Development of a statistical model for NPN bipolar transistor mismatch." Link to electronic thesis, 2007. http://www.wpi.edu/Pubs/ETD/Available/etd-053007-105648/.

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4

Gradinaru, Diana. "High-voltage RF silicon bipolar transistor." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape11/PQDD_0001/MQ45631.pdf.

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5

Hsu, C. W. "Advanced insulated gate bipolar transistor technologies." Thesis, University of Cambridge, 2010. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.604680.

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The thesis aims at investigating the state-of-the-art The Insulated Gate Bipolar Transistor (IGBT) technologies and exploring novel device concepts based on the IGBT core in order to enhance device performance and functionality. First, a novel double gate IGBT (DG-IGBT) is demonstrated by numerical simulations and experimental verifications. The new device features a low-grain pnp transistor and an embedded thyristor to enhance the carrier concentration near the emitter side and thus improves the on-state performance. Second, a new IGBT structure featuring N+ islands in the buffer layer to control the on-state carrier density in the drift region is proposed. The new technique allows a precise control of the trade-off between on-state voltage drop and turn-off energy losses by simply adjusting the width and spacing of N+ islands on the mask (at the layout level rather than process level). Furthermore, the N+ islands technique can be used to produce a series of products with different specifications by only changing the mask layout. Finally, a new reverse-conducting IGBT (RC-IGBT) with an embedded thyristor is reported in this dissertation for the first time. The thyristor operates similarly to an anti-parallel diode in its on-state and therefore it can release stored energy in the inductive load when the IGBT turns off. The new RC-IGBT shows a “snapback-free” characteristic due to the existence of the thyristor. In addition, coupled with the N+ islands structures proposed before, the on-state performance and switching speed of the IGBT and thyristor can be optimised according to the requirements of the specific application.
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6

Xu, Ziyan Niu Guofu. "Low temperature modeling of I-V characteristics and RF small signal parameters of SiGe HBTs." Auburn, Ala., 2009. http://hdl.handle.net/10415/1925.

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7

Woods, Stephen John. "Simulation of photoactivated bipolar devices." Thesis, University of East Anglia, 1998. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.267275.

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8

Chik, Hope Wuming. "Emitter-up heterojunction bipolar transistor-compatible laser." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk2/tape17/PQDD_0014/MQ34129.pdf.

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9

Hall, S. "An integrated Schottky-collector heterojunction bipolar transistor." Thesis, University of Liverpool, 1987. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.384387.

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10

Hayes, R. C. "Temperature dependance of silicon bipolar transistor D.C. parameters." Thesis, University of Liverpool, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.381268.

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11

Pagette, Francois Carleton University Dissertation Engineering Electronics. "Implementation of a double-poly bipolar transistor technology." Ottawa, 1994.

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12

Mitter, Chang Su. "Insulated gate bipolar transistor (IGBT) simulation using IG-Spice." Thesis, This resource online, 1991. http://scholar.lib.vt.edu/theses/available/etd-03022010-020115/.

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13

Mawby, P. A. "Characterisation and fabrication of heterojunction bipolar transistors." Thesis, University of Leeds, 1988. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.383334.

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14

Lee, Yi-Che. "Development of III-nitride transistors: heterojunction bipolar transistors and field-effect transistors." Diss., Georgia Institute of Technology, 2014. http://hdl.handle.net/1853/53472.

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The fabrication processes development for on III-nitride (III-N) heterojunction bipolar transistors (HBTs), heterojunction field-effect transistors (HFETs) and metal-insulator-semiconductor field-effect transistors (MISFETs) were performed. D.c, microwave and quasi-static I-V and C-V measurements were carried out to characterize the fabricated III-N transistors and diodes. The GaN/InGaN direct-growth HBTs (DG-HBTs) grown on free-standing GaN (FS-GaN) substrates demonstrated a high current gain (hfe) > 110, high current density (JC) > 141 kA/cm2, and high power density (Pdc) > 3 MW/cm2. The first III-N DG-HBT showing fT > 8 GHz and fmax > 1.3 GHz were also demonstrated on sapphire substrates. Recessed-gate AlGaN/AlN/GaN HFETs demonstrated Vth = 0 V with 0.17 V deviation across the sample. Baliga's figure of merit is 240 MW/cm2 was achieved. Current collapse was eliminated and the dynamic on-resistance was reduced by 67% after using a remote-oxygen-plasma treatment. Normally-off recessed-gate AlGaN/AlN/GaN MISFETs with Vth = 0.9 V were also fabricated with the remote-oxygen-plasma treatment. Low leakage current (< 1 pA/mm), high on-off ratio (> 2.2E11) are achieved. These achievements suggest that high-performance III-N transistors are very promising for high-power switching and microwave amplification. Findings concerning remaining process issues and implications for future research are also discussed.
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15

Julien, Marquis C. "Bipolar transistor modelling from a power amplifier designer's perspective." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp04/mq22121.pdf.

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16

Yüksel, Ayça. "The AlInP material system in heterojunction bipolar transistor technology." Thesis, Massachusetts Institute of Technology, 1994. http://hdl.handle.net/1721.1/37728.

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17

Overstreet, William Patton. "VHF bipolar transistor power amplifiers: measurement, modeling, and design." Diss., Virginia Polytechnic Institute and State University, 1986. http://hdl.handle.net/10919/71166.

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Widely used design techniques for radio frequency power amplifiers yield results which are approximate; the initial design is usually refined by applying trial-and-error procedures in the laboratory. More accurate design techniques are complicated in their application and have not gained acceptance by practicing engineers. A new design technique for VHF linear power amplifiers using bipolar junction transistors is presented in this report. This design technique is simple in its application but yields accurate results. The design technique is based upon a transistor model which is simple enough to be useful for design, but which is sufficiently accurate to predict performance at high frequencies. Additionally, the model yields insight into many of the processes which take place within the typical RF power transistor. The fundamental aspect of the model is the inclusion of charge storage within the transistor base. This charge storage effect gives rise to a nearly sinusoidal collector current waveform, even in a transistor which ostensibly is biased for class B or nonsaturating class C operation. Methods of predicting transistor input and output impedances are presented. A number of other topics related to power amplifier measurement and design are also included. A unique measurement approach which is ideally suited for use with power amplifiers is discussed. This measurement approach is a hybrid of the common S-parameter measurement technique and the "load-pull" procedure. Practical considerations such as amplifier stability, bias network design, and matching network topology are also included in the report.
Ph. D.
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18

Julien, Marquis C. (Marquis Christian) Carleton University Dissertation Engineering Electronics. "Bipolar transistor modelling from a power amplifier designer's perspective." Ottawa, 1997.

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19

Nerurkar, Swarupa Madhav. "Modeling and Simulation of Bipolar Transistor at Low Temperature." PDXScholar, 1993. https://pdxscholar.library.pdx.edu/open_access_etds/4614.

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The BICMOS technology which integrates the CMOS technology with bipolar technology has drawn considerable attention as an attractive VLSI technology because of the high speed performance and low power consumption of the BICMOS. However, continued down scaling of CMOS devices has caused increased concerns with problems such as latch up, hot carriers and short channel effect. Most of the above mentioned problems can be avoided by operating the CMOS at liquid-nitrogen temperature(LNT). At low-temperatures, the CMOS exhibits lower sub threshold leakage, higher carrier mobility (which yields improved speed performance), and a steeper logarithmic currentvoltage slope. On the other hand, the low-temperature operation of conventional silicon bipolar circuits has been generally dismissed as impractical because of the well known decrease in the current gain at low temperature. The present interest in integrated bipolarCMOS circuits, plus the prospect of increased reliability, lower wiring delay, and lower noise, has revised interest in low-temperature bipolar devices. In this context, it is therefore important to acquire accurate knowledge of the transistor properties at liquid nitrogen temperature. This can be done in two ways. One is through experimental lowtemperature measurements and the other by low-temperature device simulations. Existing room temperature numerical simulators are typically not useful for low temperature conditions. This is because the physical assumptions such as complete ionization, the parameter models and implementation methods for room temperature condition do not hold at low temperature. Therefore, we used BiLow - a steady state onedimensional Bipolar Low Temperature Simulator for the temperature range of 77K- 300K. This simulator, originally written in FORTRAN, was converted to C for the dual purpose of proper memory management and making further modifications easier. The focus of this research has been to model bandgap narrowing, incomplete ionization and Mott Transition at room and at low-temperature, evaluate the performance of the new BiLow and to derive conclusions on the BIT performance at LNT. It was observed that the bandgap narrowing was independent of temperature for the entire range of majority carrier concentration. The effect of Mott transition on the abrupt decrease in the electron concentration in emitter has been taken care of by smoothing out the concentration profile in the emitter thereby providing a continuity in the region of Mott transition. Both the current gain(~) and the frequency(ft) values obtained from simulating the two new profiles were found to be smaller than those obtained using the original BiLow simulator, as the doping in the base is higher and the device sizes were smaller. Most of the degradation in 13 and ft was found to occur below 150K. From the plots of the charge characteristics, we found that the total charge which is a strong function of temperature is more in the case of the profiles studied for this work than the total charge from the original BiLow simulator.
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20

Delaney, Larry Duane. "A computer program for the extraction of bipolar transistor spice models /." Online version of thesis, 1992. http://hdl.handle.net/1850/11451.

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21

Suvar, Erdal. "SiGeC Heterojunction Bipolar Transistors." Doctoral thesis, KTH, Microelectronics and Information Technology, IMIT, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-3674.

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Heterojunction bipolar transistors (HBT) based on SiGeC havebeen investigated. Two high-frequency architectures have beendesigned, fabricated and characterized. Different collectordesigns were applied either by using selective epitaxial growthdoped with phosphorous or by non-selective epitaxial growthdoped with arsenic. Both designs have a non-selectivelydeposited SiGeC base doped with boron and a poly-crystallineemitter doped with phosphorous.

Selective epitaxial growth of the collector layer has beendeveloped by using a reduced pressure chemical vapor deposition(RPCVD) technique. The incorporation of phosphorous and defectformation during selective deposition of these layers has beenstudied. A major problem of phosphorous-doping during selectiveepitaxy is segregation. Different methods, e.g. chemical orthermal oxidation, are shown to efficiently remove thesegregated dopants. Chemical-mechanical polishing (CMP) hasalso been used as an alternative to solve this problem. The CMPstep was successfully integrated in the HBT process flow.

Epitaxial growth of Si1-x-yGexCy layers for base layerapplications in bipolar transistors has been investigated indetail. The optimization of the growth parameters has beenperformed in order to incorporate carbon substitutionally inthe SiGe matrix without increasing the defect density in theepitaxial layers.

The thermal stability of npn SiGe-based heterojunctionstructures has been investigated. The influence of thediffusion of dopants in SiGe or in adjacent layers on thethermal stability of the structure has also been discussed.

SiGeC-based transistors with both non-selectively depositedcollector and selectively grown collector have been fabricatedand electrically characterized. The fabricated transistorsexhibit electrostatic current gain values in the range of 1000-2000. The cut-off frequency and maximum oscillation frequencyvary from 40-80 GHz and 15-30 GHz, respectively, depending onthe lateral design. The leakage current was investigated usinga selectively deposited collector design and possible causesfor leakage has been discussed. Solutions for decreasing thejunction leakage are proposed.

Key words:Silicon-Germanium-Carbon (SiGeC),Heterojunction bipolar transistor (HBT), chemical vapordeposition (CVD), selective epitaxy, non-selective epitaxy,collector design, high-frequency measurement, dopantsegregation, thermal stability.

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22

SILVA, Malana Marcelina Almeida da. "Caracterização de transistor bipolar de Junção para medição em feixes de radioterapia." Universidade Federal de Pernambuco, 2016. https://repositorio.ufpe.br/handle/123456789/18420.

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Capes
Transistores bipolares de junção - TBJ possuem uma característica inerente à sua construção física que é o fator de amplificação do sinal produzido, ou seja, amplificação da corrente. Fótons de megavoltagem, ao interagirem com o material semicondutor são capazes de produzir o que é chamado de fotocorrente, ao mesmo tempo em que provocam danos na estrutura cristalina do transistor. O objetivo desta dissertação foi caracterizar o TBJ do tipo BC846 para feixes de fótons de megavoltagem com a finalidade de entender o comportamento deste dispositivo para que futuramente seja desenvolvido um novo método dosimétrico visando complementar os métodos já existentes. O estudo concerniu em caracterizar um TBJ para se analisar como tal dispositivo eletrônico pode ser utilizado como detector de radiação no modo ativo, isto é, em mensurar em tempo real a dose, taxa de dose, dependência energética, e os efeitos direcional e de tamanho de campo de irradiação. Os experimentos foram realizados utilizando um simulador de placas de água sólida com o transistor posicionado no eixo central do feixe em uma profundidade de 5 cm, tamanho de campo padrão, 10 x 10 cm², e uma distância fonte-superfície de 100 cm. Os resultados mostram que o TBJ pode funcionar como detector em feixes de radioterapia desde que seja obedecido certos critérios técnicos relacionados ao comportamento elétrico do dispositivo antes e durante a irradiação. Uma perda percentual média de ±3% na sensibilidade do dispositivo foi registrada após cada irradiação. Essa variação guarda uma proporcionalidade com a dose absorvida e foi encontrada resposta semelhante mesmo com transistores que possuem diferentes fatores de amplificação da corrente.
Bipolar Junction Transistor - BJT have a characteristic inherent to their physical construction, which is the amplification factor of the produced signal, i.e., current amplification. Megavoltage photons interacting with the semiconductor material are capable of producing what is called photocurrent, while causing damage to the crystalline structure of the transistor. The aim of this work was to characterize the BJT type BC846 for MV photon beams in order to understand the behavior of this mechanism to be developed in the future a new dosimetric method to complement existing methods. The study's concerned characterization of a BJT to be analyzed as such electronic device may be used as a radiation detector in the active mode, i.e., measuring in real time the dose, dose rate, energy dependence, and directional effects and size radiation field. The experiments were performed using a solid water phantom with the transistor positioned at the central axis of the beam at a depth of 5 cm, standard field size, 10 x 10 cm², and a source-surface distance of 100 cm. The results show that the BJT may function as a detector in radiotherapy beam since certain technical criteria are met related to the electrical behavior of the device before and during the irradiation. An average percentage loss of ± 3% in the device sensitivity was recorded after each irradiation. This variation is in proportion to the dose absorbed and one can see similar response even with transistors having different amplification factors of the current.
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23

Yee, Mun Chun Marcus. "High current and voltage effects in heterojunction bipolar transistor collectors." Thesis, University of Sheffield, 2002. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.269460.

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24

Borot, Gaël. "Dépôts Si et SiGe fortement dopés pour applications bipolaires avancées." Grenoble INPG, 2007. http://www.theses.fr/2007INPG0155.

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Durant cette thèse, nous nous sommes intéressés au développement de films Si et d'alliages SiGe, réalisés par dépôt chimique en phase vapeur et fortement dopés in situ. Ces dépôts visent principalement les applications bipolaires de génération avancée et plus précisément à la brique Emetteur. Notre but à été de réaliser des films minces, de l'ordre de 500 Â, et fortement dopés, au-delà de 1 x 1019 cm-3 ; et cela tout en conservant de bonnes propriétés cristalline et électriques. Nous nous somme intéressés aux dépôts de Si dopés de type n en étudiant les effets des dopants sur les propriétés de films, ces films visent les applications hautes performances. Des films Si Ge dopés' As ont aussi été développés dans le but de réaliser des dispositifs possédant à la fois de fortes tensions de claquage et de bonnes performances dynamiques. Enfin, notre intérêt s'est porté sur les films Si dopés de type p, dans le but de réaliser des transistors de type pnp pour des technologies complémentaires
During this thesis, we have focused our interest on the development of Si and SiGe alloy films, realised by chemical vapour deposition and in situ heavily doped. These films target advanced bipolar application and more particularly the Emitter of these transistors. Our goal was to prepare thin, around 500 Â, and heavily doped layers, over 1 x 1019 cm-3, which keep good crystalline and electrical properties. First we have focused our interest on n-type doped Si layers and we have studied the effect of As and P on the films properties, this layers target high performances applications. SiGe layers, doped with As, have also been developed in order to realise devices with both high breakdown voltages and good dynamic performances. Finally, we have been interested on p-type doped Si layers, in order to realise pnp transistors for complementary technologies
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25

Sarkar, Manju. "Lambda Bipolar Transistor (LBT) in Static Random Access Memory Cell." Thesis, Indian Institute of Science, 1995. http://hdl.handle.net/2005/124.

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With a view to reduce the number of components in a Static Random Access Memory (SRAM) cell, the feasibility of use of Lambda Bipolar Transistor (LBT)in the bistable element of the cell has been explored under the present study. The LBT under consideration here comprises of an enhancement mode MOSFET integrated with a parasitic bipolar transistor so as to perform as a negative resistance device. LBTs for the study have been fabricated and analysed. The devices have been shown to function at much lower voltage and current levels than those reported earlier/ and thus have been shown to be suitable for lower power applications. The issues of agreements and discrepancies of the experimental results with the original DC model of the device have been highlighted and discussed. The factors contributing to the drain current of the MOSFET in the LBT have been identified. It has also been shown that in the real case of an LBT in operation, the MOSFET in it does not function as a discrete device for the same conditions of voltages and current levels as in an LBT. As per the present study, it is assessed to be influenced by the presence of the BJT in operation and this effect is felt more at the lower current levels of operation. With a separate and tailored p-well implantation the possibility of fabrication of LBTs with a CMOS technology is established. Along with a couple of polysilicon resistors, the LBTs have been successfully made to perform in the common-collector configuration as the bistable storage element of SRAM cell (as proposed in the literature). The bistable element with the LBT in common-emitter mode also has been visualised and practically achieved with the fabricated devices. The WRITE transients for either case have been simulated for various levels of WRITE voltages and their time of hold.The speed of Writing achieved are found comparable with that of the standard SRAMs. The advantages and disadvantages of using the LBT in either mode have been highlighted and discussed. The power consumption of the bistable element with the LBT in either mode is however shown to be the same. A different approach of READING has been proposed to overcome the factors known to increase the cycle time. On the whole, under the present study, the proposal of using LBTs in the bistable storage element of the SRAM cell has been shown to be feasible. Such SRAM circuits can find possible applications in the fields where smaller circuit area is the major concern.
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26

Bhattacharyya, Arkaprava. "Non quasi-static effects investigation for compact bipolar transistor modeling." Thesis, Bordeaux 1, 2011. http://www.theses.fr/2011BOR14294/document.

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Les transistors rapides actuels présentent un retard lorsqu’ils fonctionnent à très hautes fréquences ou en régime transitoire rapide. Cet effet est appelé effet non quasi-statique (NQS). Dans cette thèse, l’effet NQS est analysé de manière concise de façon à être directement implanté dans les modèles de composant pour les bibliothèques de circuit en utilisant le langage standard VerilogA. Les mécanismes physiques à la base de l’effet NQS sont évalués dans le domaine de fonctionnement petit signal et les résultats sont comparés aux travaux déjà publiés. S’agissant du modèle standard bipolaire HICUM, les effets NQS latéraux et verticaux sont examinés séparément à partir du même modèle, en régime de fonctionnement transitoire et fréquentiel grâce à un sous-circuit dédié au calcul de la phase du signal. A partir de ce sous-circuit, la modélisation compacte avec HICUM est comparée aux données issues de mesures et issues de simulation amont. Enfin, un nouveau sous-circuit calculant l’excès de phase est proposé pour prendre mieux en compte les effets non quasi-statiques dans les transistors bipolaires
Modern high speed (RF) transistors encounter certain delay while operated at high frequency or under fast transient condition. This effect is named as Non Quasi Static (NQS) effect. In the current work, NQS effect is analyzed in a concise manner so that it can be readily implemented in a compact model using the VerilogA description language. The basic physics behind this effect is investigated in small signal domain and the results are compared with the published work. In popular bipolar model HICUM lateral and vertical NQS are examined separately and uses the same model for both transient and AC operation which requires an additional minimum phase type sub circuit. Compact modeling with HICUM model is performed in both measurement and device simulated data. At last, an improved excess phase circuit is proposed to model the NQS effect
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27

Smithers, Colin R. "Linear and efficient bipolar transistor RF amplifiers using envelope feedback." Thesis, University of Surrey, 1985. http://epubs.surrey.ac.uk/843097/.

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After an introduction to amplifiers in communications and an exposition of the literature specifically relevant to high linearity power amplifiers, this study investigates more thoroughly various aspects of envelope feedback as applied to Bipolar Tuned Power Amplifiers at HF and VHP. It is discovered that under the correct conditions a new mode of linear operation exists where gain compression, AM-PM conversion and input impedance are simultaneously linearised, and in this region DC-RF power efficiency is also improved. Spectral measurements are presented from an envelope feedback amplifier constructed to operate over this region. A computerised system is described for measuring accurately the gain and phase shift of the test amplifier against variation of collector supply, quiescent bias current and RF drive power. The results from these measurements are presented as 3-dimensional projections and as contour plots. Subsequently the stored data is used to re-construct two-tone spectra, which is then analysed to show contributions to the spectrum from the gain compression and AM-PM conversion mechanisms separately. Conclusions are drawn with respect to effects of bias on these two mechanisms. A mechanism has been discovered which gives a symetric spectra without requiring AM-PM conversion at the fundamental frequencies. An attempt is made to model the amplifier with a non-linear circuit transient analysis program (SPICE). Good correlation is obtained for some parameters and these results are also plotted in 3-D and in contour.
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28

Lemna, Boyd. "GaInP/GaAs heterojunction bipolar transistor, empirical investigation at 29 GHz." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp04/mq22773.pdf.

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29

Iyer, Indira G. "Implementation of bipolar transistor model in a waveform relaxation simulator." Ohio : Ohio University, 1989. http://www.ohiolink.edu/etd/view.cgi?ohiou1182437646.

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30

Rabah, Kefa V. O. "A study of switching of MOS-bipolar power transistor hybrids." Thesis, Lancaster University, 1991. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.314432.

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31

Li, Kezheng. "Germanium bipolar transistor design and technology for high frequency applications." Thesis, Queen's University Belfast, 2012. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.579763.

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Germanium is a promising material for future high-performance semiconductor devices due to its superior carrier mobility compared to silicon. Work has been carried out with the aim of investigating the germanium as a semiconductor material for advanced bipolar transistors. A germanium compatible bipolar process has been developed and successfully demonstrated on bulk germanium substrates with a basic bipolar structure. Transistors with good output characteristics were achieved with an Early voltage of 55 V and common emitter current gain of 30. Novel Germanium-on-Sapphire (GeOS) was studied for further development of high-frequency application. GeOS substrates with a high quality single crystal germanium layer of thickness 8 urn were manufactured by direct wafer bonding and subsequent grinding and polishing. The germanium bipolar technology is then migrated to GeOS substrates and transistor output characteristics are reported for the first time. Investigation of poly-Ge emitter technology has been undertaken. A non-selective poly-Ge process at 400 QC has been developed by employing a silicon seed layer. This technology has been characterised by manufacture of a novel diode test structure with an n+ doped poly- Ge contact. A very shallow junction of 62 nm junction was successfully fabricated. Then the production of bipolar transistors on bulk germanium substrates through a self-aligned poly- Ge emitter bipolar process was established. These are the first bipolar transistors of this type to be manufactured and initial tests showed working transistors with a current gain of 50. Silvaco process and device simulation tools have been successfully adapted to model the processing steps in the germanium bipolar process flow and also to predict device performance. The issues that are overcome in this work not only apply to the germanium bipolar device, but also provide very useful information and experimental findings for material scientists and germanium-based process engineering.
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32

Donnellan, Benedict T. "Introducing the hybrid unipolar bipolar field effect transistor : the HUBFET." Thesis, University of Warwick, 2013. http://wrap.warwick.ac.uk/57699/.

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Modern commercial aircraft are becoming increasingly dependent on electrical power. More and more of the systems traditionally powered by hydraulics or pneumatics are being migrated to run on electricity. One consequence of the move towards electrical power is the increase in the storage capacity of the bat- teries used to supplement the power generation. The increase in battery size increases the maximum stress that a short circuit failure can put on the power distribution system. Although such failures are extremely rare, the fail safe switches in the distribution system must be capable of handling extremely high energy short circuits and turning off the power to protect the electrical systems from damage. Traditionally aircraft have used electromechanical relays in this role. However, they are large, heavy and slow to switch. As the potential power level is increased, the slow switching becomes more of a problem. The solution is a semiconductor switch. An IGBT can handle the high short circuit currents and switches fast enough to prevent short circuits damaging key systems. However, the inherent voltage drop in the forward current path significantly reduces its efficiency during nominal operation. A power MOSFET would be considerably more efficient than an IGBT during nominal operation. However, during high current surges, the ohmic behaviour of the switch leads to extremely high power loss and thermal failure. In this thesis a solution to this problem is presented. A new class of semiconductor device is proposed that has the highly efficient low current performance of the power MOSFET and the high current handling capability of the IGBT. The device has been named the Hybrid Unipolar Bipolar Field Effect Transistor or HUBFET. The HUBFET operates in unipolar mode, like a MOSFET, at low currents and in bipolar mode, like an IGBT, at high currents. The structure of the HUBFET is a merging of the MOSFET and IGBT. It is a vertical device with a traditional MOS gate structure, however the backside consists of alternating regions of both N-type and P-type doping. Through simulation the key on-state characteristics of the HUBFET have been shown. Fabricated test modules have been tested to validate the simulations and to show how the HUBFET can dynamically transistion from unipolar to bipolar mode during a short circuit event. Following the proof of concept the pattern of implants on the backside of the device that give the HUBFET its characteristic were investigated and potential improvements to the design were identified.
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33

Miyake, Hiroki. "Interface Control of AlGaN/SiC Heterojunction and Development of High-Current-Gain SiC-Based Bipolar Transistors." 京都大学 (Kyoto University), 2012. http://hdl.handle.net/2433/157593.

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34

Adachi, Kazuhiro. "Simulation and modelling of power devices based on 4H silicon carbide." Thesis, University of Newcastle Upon Tyne, 2003. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.273406.

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35

Humphreys, M. J. "A study of failure locus of NPN transistors and its improvement using graded collector structures." Thesis, University of Liverpool, 1988. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.328404.

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36

Amin, Farid Ahmed. "Design, characterisation and reliability of ohmic contacts for HBT applications." Thesis, King's College London (University of London), 2002. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.251977.

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37

Tang, Yue Teng. "Advanced characterisation and modelling of SiGe HBT's." Thesis, University of Southampton, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.323798.

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38

Wendt, Sven. "Turbogenerator mit Insulated Gate Bipolar Transistor (IGBT)-Umrichter zur dezentralen Energieversorgung." Dresden TUDpress, 2009. http://d-nb.info/998316393/04.

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39

Gallagher, Jeanne M. B. "A monolithic bipolar junction transistor amplifier in the common emitter configuration." Honors in the Major Thesis, University of Central Florida, 1992. http://digital.library.ucf.edu/cdm/ref/collection/ETH/id/98.

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This item is only available in print in the UCF Libraries. If this is your Honors Thesis, you can help us make it available online for use by researchers around the world by following the instructions on the distribution consent form at http://library.ucf.edu/Systems/DigitalInitiatives/DigitalCollections/InternetDistributionConsentAgreementForm.pdf You may also contact the project coordinator, Kerri Bottorff, at kerri.bottorff@ucf.edu for more information.
Bachelors
Engineering
Electrical Engineering
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40

Guetre, Eric R. (Eric Rene) Carleton University Dissertation Engineering Electronics. "An Efficient Ka-band MMIC upconverter using a heterojunction bipolar transistor." Ottawa, 1997.

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41

Menon, Kalyani. "Simulation study of silicon carbide Clustered Insulated Gate Bipolar Transistor (CIGBT)." Thesis, University of Sheffield, 2015. http://etheses.whiterose.ac.uk/10402/.

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Power semiconductor devices are inevitable parts of a power electronic converter system, with nearly 50% of electricity used in the world controlled by them. Silicon power devices have been used in power systems ever since the vacuum tubes were replaced by them in the 1950s. The performance of devices in a circuit is decided by the switching strategies and the inherent device performance like its on-state voltage, turn-on and turn-off times and hence their losses. Due to their inherent material properties, the growing interest in wide band gap devices is in applications beyond the limits of Si or GaAs. SiC is a wide bandgap material with properties that make it an attractive alternative to Silicon for high power applications. Silicon Insulated Gate Bipolar Transistor (IGBT) is the most favourable device in the industry today for medium/high power applications. Silicon Clustered Insulated Gate Bipolar Transistor (CIGBT) is experimentally proven to demonstrate better performance as compared to their IGBT counterparts. In this work, the theoretical limit of silicon CIGBT is studied in great detail and compared to previously predicted IGBT limit. Later part of this thesis would explain the design and optimization of CIGBT in 4H- SiC. An in-depth simulation study of the same device is performed for both static and dynamic characteristics. Both planar and trench gate CIGBT devices are discussed here along with possible fabrication process. Along with this, a comparison study between CIGBT with its equivalent IGBT in SiC is also performed through extensive 2D simulations in MEDICITM in terms of their static and dynamic characteristics. Finally, a comparative study of P channel and N channel SiC CIGBT devices is evaluated through simulations.
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42

Lew, Kim-Luong, and 劉錦隆. "Study of Delta-doped Emitter Bipolar Transistor, Heterostruccture Emitter Bipolar Transistor and Pseudo-HBT." Thesis, 1997. http://ndltd.ncl.edu.tw/handle/93382918633693406370.

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碩士
國立成功大學
電機工程學系
85
To reduce the device offset voltage, three types of homojunction bipolar transistor, delta-doped emitter bipolar transistor, heterostructure emitter bipolar transistor and pseudo-HBT are investigated theoretically and experimentally. The main idea behind them is to create a large barrier for hole injection into the emitter. The three devices use different ways to induce the barrier. Firstly, the delta-doped emitter bipolar transistor prepared by molecular beam epitaxy was proposed and demonstrated. A delta-doped structure is used to induce an energy barrier that will result in a minority carrier confinement. This effect will increase the emitter injection efficiency. Then, high current gain and small offset voltage can be achieved in the low doped emitter and high doped base homostructure. The energy band of the delta-doped structure is calculated by an analytical method, taking the effect of band bending into account. Besides, the Gaussian function is used to describe the charge distribution in the emitter delta-doped structure. A prediction of full-width half-maximum of Si in GaAs is given too. Base on the minority carrier transport in the bulk emitter region with drift-diffusion mechanisms and in the triangular barrier region with tunneling and thermionic-emission mechanisms, an analytical derivation of current-voltage characteristics, including the effect of bandgap shrinkage, was obtained. Theoretical results show that the triangular barrier is the key parameter in determining the electrical properties. Furthermore, the emitter set-back layer is another important parameter for the device performances. The calculated an dexperimental results show that it has a most suitable value which will lead the device to the est performances. So, a care should be taken in deternining the emitter set-back layer thickness. Not only the D.C. performance has been considered, the frequency performance has also been estimated. The dependence of the cut-off frequency fT on the device parameters, such as emitter set-back layer, barrier height and barrier width have been considered. The comparison between all the components of the device delay time tEC has been done too. The calculated results suggest that the thin emitter set-back layer and high barrier height are indispensable for developing the high frequency transistor. In the low collector current level, the calculated results show that neither the barrier height nor the barrier width has an apparent effect on the frequency performance. In addition, due to the absence of heterojunction, the proposed device exhibits a lower offset voltage than other HBTs. The experimental results show a differential current gain of 13 and a geometric limited offset voltage of 50m V at a base-to-emitter doping ration of 10. Secondly, a theoretical model of the heterostructure emitter bipolar transistor (HEBTA) emphasizing the effects of helterointerface recombination and emitter set-back layer thickness is developed. Furthermore the bandgap narrowing effect is taken into account. In addition the role of the magnitude of valence band offset and heterointerface recombination velocity is discussed. It is found set-back layer thickness strongly affects DC performance as well as frequency response. When emitter set-back layer thickness equals the base-emitter junction depletion layer width, the recombination effect in the set-back layer and the diffusion capacitance will be reduced due to minimized carrier storage in the emitter, esulting in an optimal HEBT. It is also found that the heterointerface recombination current can limit the HEBT current gain if the trapping density at the heterointerface is larger than 1×1012cm-2. For an optimum design, the current gain of a HEBT can rise to 1000, which is comparable to the best experimental data ever reported. Quite good agreement between the model's predictions and the reported experimental results is achieved. The presented model can be applied to InGaP/GaAs as well as AlGaAs/GaAs structures. Thirdly, the pseudo-HBT that makes use of the difference in effective bandgap narrowing in n- and p-type GaAs is studied. How the barrier is induced in the device will be introduced. The energy band diagrams for the device with and without spacer layer are shown. The existence of spacer layer would increase the barrier. The influence of base doping concentration on the device current gain is discusse. When the base doping concentration is low, as what has shown in conventional bipolar transistor, the current gain will decrease as the doping concentration increases. However, the results show somewhat difference when the base doping concentration is high. The current gain will increase as base doping concentration increases. The frequency performance of pseudo-HBT is considered. Owing to the existence of barrier, the cut-off frequency of the device is shown to be higher than that of conventional bipolar transistor. The comparison between the cut-off frequency of the pseudo-HBT that has a 300 and 700A spacer layer is done. The thicker spacer layer will increase the device emitter resistance and decrease the device cut-off frequency. Finally, the comparison of the three devices discussed above is given. Pseudo-HBT has a structure that is the simplest and easiest to be fabricated. The cut-off frequency and current gain of HEBT are the highest among three of them. Delta-doped emitter bipolar transistor is believed to have a device performance that is comparable to HEBT by optimizing the device parameters.
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43

He, Min-Zhong, and 賀旻中. "Polysilicon-gate lambda bipolar transistor." Thesis, 1987. http://ndltd.ncl.edu.tw/handle/39023186618426939194.

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44

LIN, GUO-XIONG, and 林國雄. "Statistical analysis of bipolar transistor." Thesis, 1991. http://ndltd.ncl.edu.tw/handle/00557376716088719907.

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45

Shen, Dong-Han, and 沈東翰. "Design of Insulating Gate Bipolar Transistor." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/36725014709541496190.

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碩士
國立臺灣科技大學
電子工程系
98
In recent years, following the introducing of state of the art flat panel displays and communication products, demands for power devices have risen substantially. In keeping with the trend of integration circuit, conventional vertical device needs to be changed to lateral structure to make it possible for the integration of power devices and low voltage circuit on the same chip. The available used lateral power device is Thin film Lateral Insulated Gate Bipolar Transistor (TLIGBT) device, which is used to Silicon On Insulator (SOI) platform. Formation of vertical trench-type insulated gate bipolar transistors (IGBT’s) by using a self-aligned silicided scheme as compared with conventional non-self-aligned type, which is the different process in this dissertation. In order to improve the latch-up immunity, a lateral IGBT has been proposed which has two types. The same type which is also applies on thin film structure. In this thesis, IGBTs were studied by using Tsuprem-4 and MEDICI simulation. Formation of vertical trench-type insulated gate bipolar transistors (IGBT’s) by using a self-aligned silicided scheme has been proposed to simplify the fabrication process, Not only reducing the mask steps, but also economizing the cost. For both the conventional process and the self-aligned scheme, no considerable difference is found with respect to the forward blocking voltage, the off-state leakage current, the latch-up triggering current density, and the turn-off time. By this self-aligned scheme, owing to a smaller n+ source, better latch-up immunity is obtained while very little degradation of on-state voltage drop is caused. In keeping with the trend of integration circuit and latch-up immunity, lateral IGBT has been commonly used. By using the retrograde scheme, a relatively lower surface dopant concentration and a relatively higher bulk dopant concentration are simultaneously caused, which significantly improve the latch-up immunity.
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46

Chu-Kung, Benjamin. "Compound semiconductor power heterojunction bipolar transistor technology /." 2007. http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqdiss&rft_dat=xri:pqdiss:3290207.

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Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2007.
Source: Dissertation Abstracts International, Volume: 68-11, Section: B, page: 7533. Adviser: Milton Feng. Includes bibliographical references. Available on microfilm from Pro Quest Information and Learning.
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47

Huang, Tsung-Yi, and 黃宗義. "The Modeling of Insulated-Gate Bipolar Transistor." Thesis, 2001. http://ndltd.ncl.edu.tw/handle/92063066637999684532.

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博士
國立清華大學
電機工程學系
90
The Insulated-Gate Bipolar Transistor (IGBT) is a switching power device designed to overcome the large turn-off time of power bipolar transistor and the high on-state power loss of power MOSFET. The IGBT behaves as a bipolar transistor whose base current is supplied by a MOSFET. The disadvantages of the IGBT are the large turn-off time compared with the power MOSFEET and latch-up due to the inherent p/n/p/n structure. The IGBT has a wide-base region with the contact of the drain region of MOSFET and is operated under high -level injection. Because of this, the conventional BJT and MOSFET model are not adequate for the IGBT to predict the on-state and turn-off electrical characteristics accurately. Hence, a new model developed in this dissertation is proposed. This new IGBT model is developed using the ambipolar transport in wide-base BJT and MOSFET model. In addition, the iteration method is applied to the physically-based analytical equations because the device parameters affect each other mutually until the equilibrium is attained. Hence, an analytical method of analyzing IGBT current-voltage characteristics in terms of applied terminal voltage is established. This new analytical IGBT model is used to describe the on-state I-V characteristics, turn-off current and temperature effect on both latch-up criteria. Besides, this method is also used to extract the essential physical devices parameters of the model, such as the injected carrier concentrations, electron and hole current densities and current gains of BJT and they are also expressed as functions of applied voltages. The commercial process and device simulator are used to simulate the electrical characteristics in order to verify the accuracy of this analytical model. Moreover, The device edge effect and the spacing between cells are taken into consideration because these effects are important in the device fabrication. The guard-ring effect on I-V properties and breakdown, the parasitic JFET effect on I-V properties are inspected and analyzed using these tools. In summary, a new analytical model is developed for IGBT. It is shown that the new model gives accurately steady-state I-V properties, turn-off current and the temperature effect. Besides, the device''s parameters can be extracted using this method to predict the occurring of latch-up. The accuracy of his model is validated by comparison with the measured data in this dissertation.
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48

Zhao, Guang-Wei, and 趙光威. "The application of CMOS compatible bipolar transistor." Thesis, 1996. http://ndltd.ncl.edu.tw/handle/05868857609130546797.

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49

Hsu, Chih Peng, and 徐志鵬. "Over-Current Protection in Insulated Gate Bipolar Transistor." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/02132889220473826364.

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50

Wu, Yen Wei, and 吳彥緯. "Fabration of Low Power Supply Heterojunction Bipolar Transistor." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/66670553485303002631.

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碩士
國立海洋大學
電機工程學系
90
In this thesis, we report a newly designed Al0.45Ga0.55As/GaAs digital graded superlattice emitter (DGSE) structure, which forms a step-wise graded composition to smooth out the potential spike as it is combined with a p-base layer first. Both theoretical derivation and experimental results of DGSE bipolar transistor are included. We obtained good agreements between theoretical calculation and experimental data. Theoretical calculation shows that tunneling current of electron has effectively increased with using DGSE structure. Experimentally, we have successfully fabricated DGSE bipolar transistor with and without InGaP/DGSE passivation layer. For comparison with InGaP/GaAs ones with an InGaP passivation layer, the VON(E-B) (the collector current exceeds 1 μA) of InGaP/DGSE HBT is 0.87 V, which is 80 mV lower than the 0.95-V VON(E-B) of an InGaP HBT over a wide rang of current level. And the collector ideality factor hc are 1.2 and 1.1 as well as the base ideality factor hb are 1.9 and 1.1 respectively. On the other hand, the small offset voltage of 55 mV as compared to a 110-mV offset voltage of our compared device reveals that the DGSE structure really eliminates the spike resulting from DEC.The current gain of the studied HBT is as high as 250 and is even enhanced to 385 with an InGaP passivation layer. Second, we proposed a method of wet-oxidation treatment in this study. Experimental results reveal that the studied HBT’s exhibit reduced collector currents at a fixed base current in the early stage of wet-oxidation treatment. However, better surface passivation and higher current gain are available after an appropriate wet-oxidation treatment is used to reduce base current. Therefore, we still obtained high current gain, small offset voltage, low knee voltage, low turn-on voltage, and breakdown voltage by an appropriate wet-oxidation treatment.
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